Image processing controller, image forming apparatus and control method

Abstract

To suppress consumption of physical resources in a PCI address space when using different PCI devices that coexist.SOLUTION: A system control unit controls the entire image processing controller according to instructions from a control unit. When connected to a PCI device via PCI, a PCI control unit controls communication with the PCI device in response to a request from the system control unit. A PCI address space, which is a memory area reserved for communication with the PCI device, is provided. Further, a dummy space for provisionally setting BAR (Base Address Registers) addresses that cannot be mapped to the PCI address space is provided. When the PCI control unit receives a request directed to an address in the dummy space from the system control unit, the PCI control unit exchanges the addresses of the dummy space and the PCI address space to enable access to the object BAR.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to an image processing controller, an image forming apparatus, and a control method. [Background technology]

[0002] Conventionally, a controller that controls an image forming apparatus is connected to devices such as a scanner engine and a plotter engine via a PCI bus in order to perform high-speed communication.

[0003] PCI connections are subject to physical restrictions on the PCI address space imposed by the controller architecture, and conventionally, devices to be connected could only be selected in a configuration that fit within the PCI address space available to the controller.

[0004] Patent Document 1 discloses a technique for dividing the subordinates of two or more parallel PCI-PCI bridges into a normal system and a redundant system, thereby realizing a redundant configuration of devices while suppressing resource consumption. Summary of the Invention [Problem to be solved by the invention]

[0005] When trying to solve the problem that devices to be connected can only be selected in a configuration that fits within the PCI address space available to the controller, the technology disclosed in Patent Document 1 has the problem that devices cannot coexist because it is based on the assumption of redundant PCI devices.

[0006] The present invention has been made in view of the above, and has an object to suppress consumption of physical resources in the PCI address space when different PCI devices are used in coexistence. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the present invention provides an image processing controller which performs image processing on a PCI device in accordance with instructions from a control unit, the image processing controller comprising: a system control unit which controls the entire image processing controller in accordance with instructions from the control unit; a PCI control unit which controls communication with the PCI device in response to a request from the system control unit when connected to the PCI device via PCI; a PCI address space which is a memory area reserved for communication with the PCI device; and a dummy space for provisionally setting addresses of BARs (Base Address Registers) which cannot be mapped into the PCI address space, the system control unit reserves an address of the dummy space and sets the address in a BAR of a configuration register, and the system control unit sets the reserved address of the dummy space in a BAR setting of a configuration register when initializing a PCI; The PCI control unit is characterized in that, when it receives a request from the system control unit targeting an address in the dummy space, it exchanges addresses in the dummy space and the PCI address space to enable access to the target BAR. Effect of the Invention

[0008] According to the present invention, when different PCI devices are used in coexistence, it is possible to suppress consumption of physical resources in the PCI address space. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram of an MFP according to an embodiment. [Diagram 2] FIG. 2 is a diagram showing a conventional PCI device specification. [Diagram 3] FIG. 3 is a diagram showing a conventional example in which the PCI address space becomes insufficient. [Figure 4] FIG. 4 is a diagram illustrating a functional configuration of the controller ASIC. [Diagram 5] FIG. 5 is a sequence diagram showing an example of PCI address space swap control. [Figure 6] FIG. 6 is a diagram illustrating an example of swap control of a PCI address space. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of an image processing controller, an image forming apparatus, and a control method will be described in detail with reference to the accompanying drawings.

[0011] In this embodiment, an example will be described in which a multifunction peripheral (MFP: Multifunction Peripheral (hereinafter, referred to as MFP)) is applied as an image forming apparatus. Note that a multifunction peripheral is a device having at least two of the following functions: copy function, scanner function, fax function, and printer function.

[0012] Fig. 1 is a block diagram showing the configuration of an MFP 100 according to an embodiment. As shown in Fig. 1, the MFP 100 includes a controller ASIC (Application Specific Integrated Circuit) 101 which is an image processing controller, a chipset 102, a CPU (Central Processing Unit) 103 which is a control unit, a memory 104, an HDD (Hard Disk Drive) 105, an engine 106 which is a PCI device such as a scanner or plotter, and an option 107 which is a PCI device.

[0013] The controller ASIC 101 is connected to a HDD 105. The controller ASIC 101 is also connected to an engine 106 such as a scanner or plotter via a PCI (Peripheral Component Interconnect) 108, and to an option 107 which is an external I / F such as IEEE1394 via a PCI 109.

[0014] The engine 106, which is a scanner, is a device that controls image reading, and the engine 106, which is a plotter, is a device that controls image formation.

[0015] The controller ASIC 101 and the CPU 103 are connected via a chipset 102. The chipset 102 and the controller ASIC 101 are connected by a PCI 110. The chipset 102 is also connected to a memory 104.

[0016] Under the control of the CPU 103, the controller ASIC 101 processes and edits image data input from an engine 106 which is a scanner, and outputs the image data to the engine 106 which is a plotter.

[0017] Here, Fig. 2 shows conventional PCI device specifications, and Fig. 3 shows a conventional example of insufficient PCI address space. Conventionally, when connecting different devices to a controller via PCI, there are physical restrictions on the PCI address space due to the controller's architecture, and devices to be connected could only be selected in a configuration that fits within the PCI address space available to the controller. The examples shown in Figs. 2 and 3 are examples in which, when attempting to connect two devices (Device 1, Device 2) to a controller, there is a shortage of PCI address space of 97 MB for a PCI address space of 256 MB.

[0018] Therefore, in this embodiment, the controller ASIC 101 is configured to enable device connection beyond the physical restrictions of the PCI address space, as will be described in detail below.

[0019] First, a description will be given of the functional configuration of the controller ASIC 101. Fig. 4 is a diagram showing the functional configuration of the controller ASIC 101. As shown in Fig. 4, the controller ASIC 101 functions as a system control unit 1011, a PCI control unit 1012, a PCI address space 1013, and a dummy space 1014 for swapping, which is a dummy space.

[0020] The PCI address space 1013 is a memory area reserved for communication with PCI devices connected via a PCI.

[0021] The dummy swap space 1014 is a save area provided in a general-purpose memory such as a DRAM to temporarily set the addresses of BARs (Base Address Registers) that cannot be mapped into the PCI address space 103 in order to resolve a shortage of memory space in the PCI address space 103 during PCI initialization (system startup).

[0022] The system control unit 1011 controls the entire controller ASIC 101 in accordance with instructions from the CPU 103 via the chipset 102. The system control unit 1011 reserves addresses in the swap dummy space 1014, and sets them in BARs (Base Address Registers) of the configuration register.

[0023] When the PCI control unit 1012 is connected to a PCI device via the PCI 109 or the like, it performs PCI control to control communication with the PCI device in response to a request from the system control unit 1011. When the PCI control unit 1012 receives a request from the system control unit 1011 targeting an address in the swap dummy space 1014 at the time of PCI initialization (at the time of system startup), it swaps (exchanges) the addresses in the swap dummy space 1014 and the PCI address space 1013 to enable access to the target BAR.

[0024] Here, Fig. 5 is a sequence diagram showing an example of swap control of a PCI address space, and Fig. 6 is a diagram showing an example of swap control of the PCI address space 1013. As shown in Fig. 5, the system control unit 1011 reserves an address of the dummy space 1014 for swap in the BAR (Base Address Registers) of the configuration register (step S1). At the time of PCI initialization (at the time of system startup), the system control unit 1011 sets the address of the dummy space 1014 for swap reserved in the BAR setting of the configuration register (step S2).

[0025] The area of ​​the BAR to which the address of the swap dummy space 1014 is set cannot be accessed as it is. Therefore, when the PCI control unit 1012 receives a request for an address of the swap dummy space 1014 from the system control unit 1011 (step S3), it swaps (exchanges) the addresses of the swap dummy space 1014 and the PCI address space 1013 to enable access to the target BAR (step S4).

[0026] 6, it is possible to connect devices beyond the physical constraints of the PCI address space 1013. In addition, since there is no need to block PCI devices when switching, as in the technology disclosed in Patent Document 1, it is possible to freely switch without the constraint of redundant PCI devices.

[0027] As described above, according to this embodiment, when different PCI devices are used in coexistence, consumption of physical resources in the PCI address space can be suppressed.

[0028] In the above embodiment, the image forming apparatus of the present invention is described as being applied to a multifunction peripheral having at least two of the functions of a copy function, a printer function, a scanner function, and a facsimile function. However, the image forming apparatus can be applied to any image forming apparatus such as a copier, a printer, a scanner device, or a facsimile device. [Explanation of symbols]

[0029] 100 Image forming device 101 Image Processing Controller 103 Control section 106, 107 PCI devices 1011 System control section 1012 PCI control unit 1013 PCI Address Space 1014 Dummy Space [Prior art documents] [Patent documents]

[0030] [Patent Document 1] JP 2011-204077 A

Claims

1. In an image processing controller that performs image processing for a PCI device in accordance with an instruction from a control unit, a system control unit that controls the entire image processing controller in accordance with instructions from the control unit; a PCI control unit that controls communication with the PCI device in response to a request from the system control unit when the PCI device is connected via a PCI; a PCI address space which is a memory area reserved for communication with the PCI device; a dummy space for provisionally setting addresses of BARs (Base Address Registers) that cannot be mapped into the PCI address space; Equipped with The system control unit reserves an address of the dummy space and sets the reserved address in a BAR of a configuration register; The system control unit sets the address of the dummy space reserved in the BAR setting of a configuration register at the time of PCI initialization, when the PCI control unit receives a request from the system control unit for an address in the dummy space, the PCI control unit exchanges addresses in the dummy space and the PCI address space to enable access to the target BAR.

13. An image processing controller comprising:

2. the system control unit prepares a dummy space in a general-purpose memory for provisionally setting addresses of BARs that cannot be mapped to the PCI address space; 2. The image processing controller according to claim 1.

3. A control unit; A PCI device; The image processing controller according to claim 1 or 2; An image forming apparatus comprising:

4. A control method for an image processing controller that performs image processing on a PCI device in accordance with an instruction from a control unit, comprising: The image processing controller is a system control unit that controls the entire image processing controller in accordance with instructions from the control unit; a PCI control unit that controls communication with the PCI device in response to a request from the system control unit when the PCI device is connected via a PCI; a PCI address space which is a memory area reserved for communication with the PCI device; a dummy space for provisionally setting addresses of BARs (Base Address Registers) that cannot be mapped into the PCI address space; Equipped with the system control unit reserving an address of the dummy space and setting the reserved address in a BAR of a configuration register; a step of the system control unit setting an address of the dummy space reserved in a BAR setting of a configuration register at the time of initialization of a PCI; a step of, when the PCI control unit receives a request for an address in a dummy space for provisionally setting an address of a BAR (Base Address Register) that cannot be mapped to a PCI address space, which is a memory area reserved for communication with the PCI device, exchanging an address in the dummy space with an address in the PCI address space to enable access to the target BAR; A control method comprising:

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