Semiconductor light emitting device and method for manufacturing the same

Abstract

To provide a semiconductor light-emitting element capable of emitting laser beams having optical characteristics different from each other while suppressing a deterioration in crystal quality.SOLUTION: A semiconductor light-emitting element according to an embodiment includes a semiconductor substrate and a plurality of active layers stacked on the semiconductor substrate, the active layers being capable of emitting laser beams having optical characteristics different from each other. The semiconductor light-emitting element has two or more laser beam emitting parts in areas spaced apart in the planar direction of the semiconductor substrate, and, among the plurality of active layers disposed in an area where the laser beam emitting parts are formed, at least one active layer used as a light emitting layer is stacked on an active layer used as a non-light emitting layer.SELECTED DRAWING: Figure 1A

Description

[Technical field]

[0001] The present invention relates to a semiconductor light-emitting device and a method for manufacturing the same. [Background technology]

[0002] In recent years, the market for display devices such as projectors using semiconductor lasers has expanded, and in order to improve their performance, high resolution and wide viewing angles are required. In order to achieve high resolution and wide viewing angles for display devices, it is effective to make the semiconductor laser multi-beam.

[0003] However, if all the beams have the same optical characteristics, it causes degradation of image quality due to coherence, which is a characteristic of laser light. To reduce the coherence of laser light, a multi-beam semiconductor laser capable of emitting multiple laser beams with different optical characteristics such as oscillation wavelengths is sometimes used.

[0004] Patent Document 1 discloses a monolithic laser diode in which a laser diode for CDs (emission wavelength 780 nm) and a laser diode for DVDs (emission wavelength 650 nm) are mounted on one chip. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2009-016881 A Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the semiconductor laser disclosed in Patent Document 1, since light emitting sections of different oscillation wavelengths are formed on the same substrate, after forming an active layer of a first oscillation wavelength, the active layer of the first oscillation wavelength is removed from the region where the active layer of the second oscillation wavelength is to be formed, and the active layer of the second oscillation wavelength is formed in the removed region. Therefore, after removing the semiconductor layers having a complex laminated structure, the active layer of the second oscillation wavelength is reformed, and there is a risk that the active layer of the second oscillation wavelength may be contaminated or have defects, resulting in a deterioration in crystal quality.

[0007] SUMMARY OF THE PRESENT DISCLOSURE An object of the present invention is to provide a semiconductor light emitting device capable of emitting laser beams having different optical characteristics while suppressing deterioration in crystal quality, and a method for manufacturing the semiconductor light emitting device. [Means for solving the problem]

[0008] A semiconductor light-emitting device according to one aspect of the present invention comprises a semiconductor substrate, and a plurality of active layers stacked on the semiconductor substrate and capable of emitting laser light having different optical properties, the semiconductor substrate having two or more laser light emitting portions in regions spaced apart in a surface direction of the semiconductor substrate, and at least one active layer used as an emission layer among the plurality of active layers arranged in the region where the laser light emitting portions are formed is stacked on an active layer used as a non-emission layer.

[0009] This allows a plurality of active layers capable of emitting laser beams having different optical characteristics to be continuously stacked on a semiconductor substrate, and the active layer thereon can be used as an emitting layer without removing the active layer used as a non-emitting layer. This allows the active layers to be stacked on the semiconductor substrate while preventing contamination of the crystal surface on which the active layers are formed and the occurrence of defects. As a result, it is possible to achieve monolithic integration while suppressing deterioration of the characteristics of the semiconductor lasers capable of emitting laser beams having different optical characteristics.

[0010] Furthermore, in a semiconductor light-emitting device according to one embodiment of the present invention, an active layer used as a non-light-emitting layer is further stacked on at least one of the plurality of active layers that is used as a light-emitting layer.

[0011] This allows the heights of the top surfaces of the electrodes on the current injection regions corresponding to the respective light emitting layers to be aligned while achieving monolithic integration of multi-beam semiconductor lasers with different optical characteristics, thereby stabilizing the junction-down mounting of multi-beam semiconductor lasers with different optical characteristics and improving heat dissipation.

[0012] In addition, in the semiconductor light-emitting device according to one aspect of the present invention, the active layers used as light-emitting layers capable of emitting laser light having different optical characteristics are stacked at different positions from the surface of the semiconductor substrate.

[0013] As a result, after a plurality of active layers capable of emitting laser beams having different optical characteristics are continuously stacked on the entire surface of a semiconductor substrate, the active layers capable of emitting laser beams having different optical characteristics can be used as light-emitting layers without removing the active layers used as non-light-emitting layers, thereby making it possible to achieve monolithic integration while suppressing deterioration in the characteristics of the semiconductor lasers capable of emitting laser beams having different optical characteristics.

[0014] In the semiconductor light emitting device according to one aspect of the present invention, the active layers used as light emitting layers capable of emitting laser beams having different optical characteristics are located at different positions in the surface direction of the semiconductor substrate.

[0015] This makes it possible to stack a plurality of active layers capable of emitting laser beams having different optical characteristics, while separately forming current injection regions for injecting current into each of the active layers used as light-emitting layers capable of emitting laser beams having different optical characteristics.

[0016] In addition, in the semiconductor light emitting device according to one aspect of the present invention, the optical characteristics include at least one of an emission wavelength, a polarization, and a beam divergence angle.

[0017] This makes it possible to monolithically integrate multi-beam semiconductor lasers having different optical characteristics while allowing changes in the application of the laser light, the coherence of the laser light, or the focusing property of the laser light, etc.

[0018] In addition, in the semiconductor light emitting device according to one aspect of the present invention, the light emitting layers capable of emitting laser beams having different optical characteristics can be driven independently.

[0019] This makes it possible to use monolithically integrated multi-beam semiconductor lasers with different optical characteristics for a variety of purposes, such as various media such as CDs / DVDs / Blu-ray (registered trademark) Discs, smart glasses, display devices, and communications.

[0020] In addition, in the semiconductor light emitting device according to one aspect of the present invention, the number of active layers stacked on the semiconductor substrate is equal among the light emitting layers capable of emitting laser beams having different optical characteristics.

[0021] This makes it possible to narrow the interval between the light-emitting layers arranged in the horizontal direction on the semiconductor substrate while achieving monolithic integration of multi-beam semiconductor lasers with different optical characteristics. Furthermore, the heights of the top surfaces of the electrodes on the current injection regions corresponding to the respective light-emitting layers can be made uniform. This makes it possible to stabilize the junction-down mounting while miniaturizing the chip size of multi-beam semiconductor lasers with different optical characteristics, and improve heat dissipation.

[0022] In addition, in a semiconductor light-emitting device according to one aspect of the present invention, the semiconductor substrate has a step that causes the distances from the back surface of the semiconductor substrate to be the same for active layers used as light-emitting layers capable of emitting laser light having different optical characteristics.

[0023] This allows the positions of the light emitting layers in the height direction from the mounting surface of the laser chip to be aligned, making it easier to handle a plurality of laser beams having mutually different optical characteristics.

[0024] Furthermore, in a semiconductor light-emitting device according to one aspect of the present invention, the number of active layers stacked on the semiconductor substrate is set so that the distances from a formation surface of a current injection region for injecting current into the active layers are equal for the active layers used as light-emitting layers capable of emitting laser light having different optical characteristics.

[0025] This allows the heights of the top surfaces of the electrodes on the current injection regions corresponding to the respective light emitting layers to be aligned while achieving monolithic integration of multi-beam semiconductor lasers with different optical characteristics, thereby stabilizing the junction-down mounting of multi-beam semiconductor lasers with different optical characteristics and improving heat dissipation.

[0026] Furthermore, in a semiconductor light-emitting device according to one aspect of the present invention, a thickness of an electrode formed on a current injection region that injects current into an active layer used as a light-emitting layer capable of emitting laser light having different optical characteristics is set so that the distance from the back surface of the semiconductor substrate to the top surface of the electrode is equal between the current injection regions.

[0027] This allows the heights of the top surfaces of the electrodes on the current injection regions corresponding to the respective light-emitting layers to be aligned without removing the active layers used as non-light-emitting layers that are stacked on the active layers used as light-emitting layers, which makes it possible to stabilize the junction-down mounting of multi-beam semiconductor lasers with different optical characteristics and improve heat dissipation.

[0028] Furthermore, a method for manufacturing a semiconductor light-emitting element according to one aspect of the present invention includes the steps of stacking a stacked structure of multiple active layers on a semiconductor substrate, the active layers being capable of emitting laser light having different optical properties from each other, forming current injection regions for injecting current into the active layers such that the active layers are located at different positions in a surface direction of the semiconductor substrate, and forming an electrode on the current injection region so that current is injected into the active layers which are located at different stacking positions from the surface of the semiconductor substrate.

[0029] This makes it possible to continuously stack multiple active layers capable of emitting laser beams with different optical characteristics on a semiconductor substrate, and then form separate current injection regions for injecting current into each of the active layers used as light-emitting layers capable of emitting laser beams with different optical characteristics. This makes it possible to stack multiple active layers on a semiconductor substrate while preventing contamination of the crystal surface on which the active layers are formed and the occurrence of defects. As a result, it is possible to achieve monolithic integration while suppressing deterioration of the characteristics of semiconductor lasers capable of emitting laser beams with different optical characteristics.

[0030] In addition, according to one aspect of the present invention, a method for manufacturing a semiconductor light-emitting element further includes a step of forming a step in the semiconductor substrate corresponding to a difference in the stacking position of the active layer in the stacked structure, and the current injection region is separated by the step.

[0031] As a result, even when multiple active layers capable of emitting laser light with different optical characteristics are continuously stacked on a semiconductor substrate, the positions of the light-emitting layers in the height direction from the mounting surface of the laser chip can be aligned, making it easier to handle multiple laser lights with different optical characteristics.

[0032] According to a method for producing a semiconductor light-emitting element according to an aspect of the present invention, A plurality of element regions partitioned by the steps are formed at once, and then The method further includes a step of removing the active layer in the element region layer by layer from the top.

[0033] This allows the heights of the top surfaces of the electrodes on the current injection regions for injecting current into the active layers used as light-emitting layers capable of emitting laser beams having different optical characteristics to be matched while achieving monolithic integration of multi-beam semiconductor lasers having different optical characteristics, thereby stabilizing the junction-down mounting of the multi-beam semiconductor lasers having different optical characteristics and improving heat dissipation. Effect of the Invention

[0034] According to one aspect of the present invention, it is possible to provide a semiconductor light-emitting element capable of emitting laser beams having different optical characteristics while suppressing deterioration in crystal quality, and a method for manufacturing the semiconductor light-emitting element. [Brief description of the drawings]

[0035] [Figure 1A] 1 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a first embodiment. [Figure 1B] 1 is a plan view showing a schematic configuration example of a semiconductor light emitting device according to a first embodiment. [Figure 1C] 1B is a partially enlarged view of FIG. 1A showing a schematic configuration example of a semiconductor light emitting device according to a first embodiment. [Figure 2A] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light-emitting element according to the second embodiment. [Figure 2B] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2C] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2D] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2E] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2F] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2G] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2H] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2I] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 2J] 6A to 6C are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the second embodiment. [Figure 3A] 10A to 10C are cross-sectional views showing an example of a method for forming an inclined surface of a semiconductor substrate according to a second embodiment. [Figure 3B] 10A to 10C are cross-sectional views showing an example of a method for forming an inclined surface of a semiconductor substrate according to a second embodiment. [Figure 3C] 10A to 10C are cross-sectional views showing an example of a method for forming an inclined surface of a semiconductor substrate according to a second embodiment. [Figure 3D] 10A to 10C are cross-sectional views showing an example of a method for forming an inclined surface of a semiconductor substrate according to a second embodiment. [Figure 4A] 11 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a third embodiment. FIG. [Figure 4B] 11 is a plan view showing a schematic configuration example of a semiconductor light emitting device according to a third embodiment. FIG. [Figure 5A] 10 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a fourth embodiment. [Figure 5B] 5B is an enlarged cross-sectional view showing a part of the semiconductor light emitting device of FIG. 5A. [Figure 6] 13 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a fifth embodiment. FIG. [Figure 7] 13 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a sixth embodiment. FIG. [Figure 8A] 13A to 13C are cross-sectional views showing an example of a method for manufacturing the semiconductor light-emitting element according to the seventh embodiment. [Figure 8B] 13A to 13C are cross-sectional views showing an example of a method for manufacturing the semiconductor light-emitting element according to the seventh embodiment. [Figure 8C] 13A to 13C are cross-sectional views showing an example of a method for manufacturing the semiconductor light-emitting element according to the seventh embodiment. [Figure 8D]13A to 13C are cross-sectional views showing an example of a method for manufacturing the semiconductor light-emitting element according to the seventh embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0036] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the present invention, and not all of the combinations of features described in the embodiments are necessarily essential to the configuration of the present invention. The configuration of the embodiments may be appropriately modified or changed depending on the specifications of the device to which the present invention is applied and various conditions (conditions of use, environment of use, etc.). The technical scope of the present invention is determined by the claims, and is not limited by the individual embodiments below. Also, the drawings used in the following description may differ in scale and shape from the actual structure in order to make each configuration easier to understand.

[0037] (First embodiment) Fig. 1A is a cross-sectional view showing a schematic configuration example of a semiconductor light-emitting device according to a first embodiment, and Fig. 1B is a plan view showing a schematic configuration example of a semiconductor light-emitting device according to the first embodiment. Fig. 1C is a partially enlarged view of Fig. 1A. Note that in the following description, a monolithic multi-wavelength semiconductor laser having four active layers that emit laser beams of different wavelengths is taken as an example, but the laser may be a monolithic multi-wavelength semiconductor laser having m active layers (m is an integer of 2 or more) that emit laser beams of different wavelengths.

[0038] This monolithic multi-wavelength semiconductor laser may be an AlGaAs-based semiconductor laser capable of emitting infrared laser light in the 780 nm wavelength band, an AlGaInP-based semiconductor laser capable of emitting red laser light in the 650 nm wavelength band, an AlGaInN-based semiconductor laser capable of emitting blue laser light in the 405 nm wavelength band, or an InGaAsP-based semiconductor laser capable of emitting communication laser light in the 1.55 μm wavelength band.

[0039] In FIG. 1A and FIG. 1B, the semiconductor laser Z1 includes N-type semiconductor layers 1B to 4B, active layers 1CA, 1CB, 1CC, 1CD (hereinafter also simply referred to as 1CA to 1CD), 2CB, 2CC, 2CD (hereinafter also simply referred to as 2CB to 2CD), 3CC, 3CD, 4CD, P-type semiconductor layers 1D, 2D, 3D, 4D (hereinafter also simply referred to as 1D to 4D), and a semiconductor substrate SB. In this case, the semiconductor laser Z1 has two or more laser light emitting parts in regions spaced apart in the surface direction of the semiconductor substrate SB. For example, the semiconductor substrate SB is partitioned into element regions RA, RB, RC, RD (hereinafter also similarly referred to as RA to RD) in which laser diodes capable of independently emitting laser light are formed. The element regions RA to RD are located at different positions on the surface of the semiconductor substrate SB. The element regions RA to RD are formed across the mutually opposing end faces M1 and M2 (see FIG. 1B) of the semiconductor substrate SB. The end faces M1, M2 are, for example, cleavage planes of the semiconductor substrate SB. The end faces M1, M2 can be used in common for all the element regions RA to RD. In this case, a Fabry-Perot cavity can be formed between the end faces M1, M2 for each of the element regions RA to RD. The laser diodes formed in each of the element regions RA to RD can emit laser light having different optical characteristics. The optical characteristics can include at least one of the emission wavelength, polarization, and beam divergence angle. When the emission wavelengths of the laser diodes in each of the element regions RA to RD are made different, the emission wavelengths may be made different within the same color region, or the emission wavelengths may be made different across different color regions.

[0040] Each of the element regions RA to RD is provided with active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers. During operation of the semiconductor laser Z1, the light-emitting points P1, P2, P3, and P4 (also described as P1 to P4) are located in the active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers. The active layers 1CA, 2CB, 3CC, and 4CD can emit laser beams having different optical characteristics. At this time, in the region where the active layer 2CB is used as a light-emitting layer, it is stacked on the active layer 1CB used as a non-light-emitting layer. Similarly, in the region where the active layer 3CC is used as a light-emitting layer, it is stacked on the active layers 1CC and 2CC used as non-light-emitting layers. In the region where the active layer 4CD is used as a light-emitting layer, it is stacked on the active layers 1CD to 3CD used as non-light-emitting layers. At this time, the active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers are stacked at different positions from the surface of the semiconductor substrate SB. On the other hand, by providing a step on the surface of the semiconductor substrate SB, the distances from the rear surface of the semiconductor substrate SB to the light-emitting points P1 to P4 of the active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers can be made equal.

[0041] Active layers 1CA to 1CD can be formed by patterning active layer 1C formed over the entire surface of semiconductor substrate SB in the process of Figure 2B, active layers 2CB to 2CD can be formed by patterning active layer 2C formed over the entire surface of semiconductor substrate SB in the process of Figure 2B, active layers 3CC and 3CD can be formed by patterning active layer 3C formed over the entire surface of semiconductor substrate SB in the process of Figure 2B, and active layer 4CD can be formed by patterning active layer 4C formed over the entire surface of semiconductor substrate SB in the process of Figure 2B.

[0042] As a result, after a plurality of active layers 1C-4C capable of emitting laser beams having different optical characteristics are continuously stacked on the semiconductor substrate SB, the active layers 2CB, 3CC, and 4CD can be used as light-emitting layers without removing the active layers 1CB, 1CC, 2CC, and 1CD-3CD used as non-light-emitting layers (see FIG. 1 and FIG. 2H). Therefore, the active layers 2CB, 3CC, and 4CD can be stacked on the semiconductor substrate SB while preventing contamination or defects from occurring in the crystal planes on which the active layers 2CB, 3CC, and 4CD are formed. As a result, monolithic integration can be achieved while suppressing deterioration in the characteristics of the semiconductor laser Z1 capable of emitting laser beams having different optical characteristics (see FIG. 1A and FIG. 1B).

[0043] Which of the active layers 1C to 4C is used as a light-emitting layer and which is used as a non-light-emitting layer can be determined by the current injection position. That is, the active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers are disposed at the current injection position. The active layers 1CB, 1CC, 1CD, 2CC, 2CD, and 3CD used as non-light-emitting layers are disposed at the current non-injection position.

[0044] The configuration of the semiconductor laser Z1 in FIGS. 1A and 1B will be specifically described below. In the element region RA, a junction layer T1A is formed on the semiconductor substrate SB. An etch stop layer 1A may be formed between the junction layer T1A and the semiconductor substrate SB. The junction layer T1A includes an N-type semiconductor layer 1B, an active layer 1CA, and a P-type semiconductor layer 1D. The N-type semiconductor layer 1B and the P-type semiconductor layer 1D can form a double heterojunction with the active layer 1CA.

[0045] In the element region RB, the junction layers T1B and T2B are sequentially stacked on the semiconductor substrate SB. The junction layer T1B is stacked on the semiconductor substrate SB via an etch stop layer 1A, and the junction layer T2B is stacked on the junction layer T1B via an etch stop layer 2A. Each of the junction layers T1B and T2B includes an N-type semiconductor layer 1B or 2B, an active layer 1CB or 2CB, and a P-type semiconductor layer 1D or 2D. The N-type semiconductor layer 1B and the P-type semiconductor layer 1D can form a double heterojunction with the active layer 1CB, and the N-type semiconductor layer 2B and the P-type semiconductor layer 2D can form a double heterojunction with the active layer 2CB.

[0046] In the element region RC, the junction layers T1C to T3C are sequentially stacked on the semiconductor substrate SB. The junction layer T1C is stacked on the semiconductor substrate SB via an etch stop layer 1A, the junction layer T2C is stacked on the junction layer T1C via an etch stop layer 2A, and the junction layer T3C is stacked on the junction layer T2C via an etch stop layer 3A. Each of the junction layers T1C to T3C includes N-type semiconductor layers 1B to 3B, active layers 1CC to 3CC, and P-type semiconductor layers 1D to 3D. The N-type semiconductor layer 1B and the P-type semiconductor layer 1D can form a double heterojunction with the active layer 1CC, the N-type semiconductor layer 2B and the P-type semiconductor layer 2D can form a double heterojunction with the active layer 2CC, and the N-type semiconductor layer 3B and the P-type semiconductor layer 3D can form a double heterojunction with the active layer 3CC.

[0047] In the element region RD, the bonding layers T1D to T4D are sequentially stacked on the semiconductor substrate SB. The bonding layer T1D is stacked on the semiconductor substrate SB via an etch stop layer 1A, the bonding layer T2D is stacked on the bonding layer T1D via an etch stop layer 2A, the bonding layer T3D is stacked on the bonding layer T2D via an etch stop layer 3A, and the bonding layer T4D is stacked on the bonding layer T3D via an etch stop layer 3A. Each of the bonding layers T1D to T4D includes N-type semiconductor layers 1B to 4B, active layers 1CD to 4CD, and P-type semiconductor layers 1D to 4D. The N-type semiconductor layer 1B and the P-type semiconductor layer 1D can form a double heterojunction with the active layer 1CD, the N-type semiconductor layer 2B and the P-type semiconductor layer 2D can form a double heterojunction with the active layer 2CD, the N-type semiconductor layer 3B and the P-type semiconductor layer 3D can form a double heterojunction with the active layer 3CD, and the N-type semiconductor layer 4B and the P-type semiconductor layer 4D can form a double heterojunction with the active layer 4CD.

[0048] Here, the junction layers T1A to T1D are formed by the N-type semiconductor layer 1B, active layer 1C, and P-type semiconductor layer 1D laminated on the entire surface of the semiconductor substrate SB in the process of Fig. 2B, and the junction layers T2B to T2D are formed by patterning the N-type semiconductor layer 2B, active layer 2C, and P-type semiconductor layer 2D laminated on the entire surface of the semiconductor substrate SB in the process of Fig. 2B. Similarly, the junction layers T3C and T3D are formed by patterning the N-type semiconductor layer 3B, active layer 3C, and P-type semiconductor layer 3D laminated on the entire surface of the semiconductor substrate SB in the process of Fig. 2B, and the junction layer T4D can be formed by patterning the N-type semiconductor layer 4B, active layer 4C, and P-type semiconductor layer 4D laminated on the entire surface of the semiconductor substrate SB in the process of Fig. 2B.

[0049] The semiconductor substrate SB is provided with steps S1 to S3. The step S1 is located at the boundary between the element regions RA and RB, the step S2 is located at the boundary between the element regions RB and RC, and the step S3 is located at the boundary between the element regions RC and RD. The height of the step S1 can be made to match the sum of the film thickness of the bonding layer T1B and the film thickness of the etch stop layer 1A. The height of the step S2 can be made to match the sum of the film thickness of the bonding layer T1C and the film thickness of the etch stop layer 1A. The height of the step S3 can be made to match the sum of the film thickness of the bonding layer T1D and the film thickness of the etch stop layer 1A. This allows the positions of the active layers 1CA, 2CB, 3CC, and 4CD used as light emitting layers to be matched in the height direction from the mounting surface of the laser chip, making it easy to handle a plurality of laser beams having different optical characteristics.

[0050] In each element region RA-RD, a portion of each active layer 1CA, 2CB, 3CC, 4CD and each P-type semiconductor layer 1D-4D is removed so that a portion of the N-type semiconductor layer 1B-4B is exposed from each active layer 1CA, 2CB, 3CC, 4CD and each P-type semiconductor layer 1D-4D. At this time, in each element region RA-RD, a portion of each active layer 1CA, 2CB, 3CC, 4CD and each P-type semiconductor layer 1D-4D on the N-type semiconductor layer 1B-4B can be removed so that each active layer 1CA, 2CB, 3CC, 4CD and each P-type semiconductor layer 1D-4D remains in a stripe shape on the N-type semiconductor layer 1B-4B. At this time, exposed surfaces K1-K4 are formed on each N-type semiconductor layer 1B-4B.

[0051] In each of the element regions RA to RD, ridges G1 to G4 are formed in each of the P-type semiconductor layers 1D to 4D. Each of the ridges G1 to G4 is formed along the optical waveguide direction of each of the active layers 1CA to 4CD. Each of the ridges G1 to G4 can be formed in a stripe shape across the end faces M1 and M2, for example.

[0052] An insulating film 5 is formed on the P-type semiconductor layers 1D-4D on which the ridges G1-G4 are formed, respectively, and on the N-type semiconductor layers 1B-4B on which the exposed surfaces K1-K4 are formed, respectively. The insulating film 5 may be, for example, a silicon oxide film.

[0053] Current injection regions J1 to J4 for injecting current into each of the active layers 1CA, 2CB, 3CC, and 4CD are provided on the top surface of each of the ridges G1 to G4 (see FIG. 1B and FIG. 1C). At this time, openings corresponding to the current injection regions J1 to J4 are provided in the insulating film 5. Current outflow regions H1 to H4 for outflowing the current injected into each of the active layers 1CA, 2CB, 3CC, and 4CD are provided on the exposed surfaces K1 to K4 of each of the N-type semiconductor layers 1B to 4B. At this time, openings corresponding to the current outflow regions H1 to H4 are provided in the insulating film 5. For example, in the element region RA, an opening is provided by removing a part of the insulating film 5 provided on the exposed surface K1 of the N-type semiconductor layer 1B. A base electrode R1 is formed on the opening and on the insulating film 5 around the opening. The region where the base electrode R1 and the exposed surface K1 of the N-type semiconductor layer 1B contact each other is the current injection region H1. A thick film electrode W1 is formed on the current injection region H1.

[0054] Base electrodes Q1 to Q4 are formed on the top surfaces of the ridges G1 to G4. The base electrodes Q1 to Q4 are connected to the current injection regions J1 to J4 through openings formed in the insulating film 5. Base electrodes R1 to R4 are formed on the exposed surfaces K1 to K4 of the N-type semiconductor layers 1B to 4B. The base electrodes R1 to R4 are connected to the current outflow regions H1 to H4 through openings formed in the insulating film 5. Thick film electrodes U1 to U4 are formed on the base electrodes Q1 to Q4. Thick film electrodes W1 to W4 are formed on the base electrodes R1 to R4. The thicknesses of the thick film electrodes U1 to U4 and W1 to W4 can be set so that the heights from the mounting surface of the laser chip are the same. The base electrodes Q1 to Q4, R1 to R4, and the thick film electrodes U1 to U4 and W1 to W4 can be made of a metal such as Au. In this case, each of the active layers 1CA, 2CB, 3CC, and 4CD used as a light-emitting layer can be driven independently.

[0055] Here, in the element region RA, a bonding layer T1A is provided on the semiconductor substrate SB, and in the element region RB, bonding layers T1B and T2B are provided on the semiconductor substrate SB in sequence. In addition, in the element region RC, bonding layers T1C to T3C are provided on the semiconductor substrate SB in sequence, and in the element region RD, bonding layers T1D to T4D are provided on the semiconductor substrate SB in sequence. By matching the thickness of these bonding layers with the height of the steps S1 to S3 provided on the semiconductor substrate SB, the heights of the current injection regions J1 to J4 and the thick film electrodes W1 to W4 can be made the same. This makes it possible to stabilize the junction-down mounting of the semiconductor laser Z1 and improve heat dissipation.

[0056] Moreover, by providing exposed surfaces K1 to K4 on the N-type semiconductor layers 1B to 4B, the current injected into the active layers 1CA, 2CB, 3CC, and 4CD can be discharged individually, and as a result, the laser elements formed in the element regions RA to RD can emit light at the positions of the light emitting points P1 to P4.

[0057] In addition, in this semiconductor laser Z1, the P-type semiconductor layers 1D-4D can be disposed as the uppermost layers on the active layers 1CA-4CD that become the light-emitting layers. Therefore, the ridges G1-G4 can be formed in the P-type semiconductor layers 1D-4D, respectively, and a refractive index guided monolithic multi-wavelength semiconductor laser can be configured.

[0058] Each of the active layers 1CA to 1CD, 2CB to 2CD, 3CC, 3CD, and 4CD may have a multi-quantum well (MQW) structure in which barrier layers and well layers are alternately stacked. Each of the active layers 1CA to 1CD, 2CB to 2CD, 3CC, 3CD, and 4CD may include a guide layer for guiding the laser light guided through the multi-quantum well structure.

[0059] Each of the N-type semiconductor layers 1B to 4B includes an N-type cladding layer and an N-type contact layer. The N-type contact layer can form an ohmic junction with the base electrodes R1 to R4 that discharge the current injected into each of the active layers 1CA, 2CB, 3CC, and 4CD. Each of the P-type semiconductor layers 1D to 4D includes a P-type cladding layer and a P-type contact layer. The P-type contact layer can form an ohmic junction with the electrodes Q1 to Q4 that inject the current into each of the active layers 1CA, 2CB, 3CC, and 4CD. Each of the P-type semiconductor layers 1D to 4D may include an etch stop layer for forming each of the ridges G1 to G4 in each of the P-type semiconductor layers 1D to 4D.

[0060] In the case of an AlGaInP-based semiconductor laser capable of emitting red laser light, the semiconductor substrate SB can be a GaAs substrate, the P-type contact layer and the N-contact layer can be GaAs layers, the P-type cladding layer, the P-type guide layer, the N-type cladding layer and the N-type guide layer can be AlGaInP layers, the active layers 1CA-1CD, 2CB-2CD, 3CC, 3CD and 4CD can be GaInP / AlGaInP / GaInP multiple quantum well layers, and the etch stop layers 1A-4A and the ridge-forming etch stop layer can be GaInP layers.

[0061] The arrangement period of the active layers 1CA, 2CB, 3CC, and 4CD can be set to, for example, 50 μm. The lamination period of the bonding layers T1D to T4D can be set to, for example, 4 μm. The film thickness of each of the P-type contact layer and the N-type contact layer can be set to, for example, several hundreds of nm. The film thickness of the ridge of the P-type cladding layer can be set to, for example, about 1 μm. The film thickness of the ridge-forming etch stop layer can be set to, for example, several nm. The film thickness of both sides of the ridge of the P-type cladding layer can be set to, for example, several hundreds of nm. The film thickness of the P-type guide layer and the N-type guide layer can be set to, for example, several tens of nm. The film thickness of each of the active layers 1CA to 1CD, 2CB to 2CD, 3CC, 3CD, and 4CD can be set to, for example, several tens of nm. The film thickness of the N-type cladding layer can be set to, for example, approximately 2 μm. The film thickness of each of the etch stop layers 1A to 4A can be set to, for example, several nm.

[0062] Second embodiment 2A to 2J are cross-sectional views showing an example of a method for manufacturing a semiconductor light emitting device according to the second embodiment. In the second embodiment, an example of a method for manufacturing the semiconductor laser Z1 of FIG. 2A, steps S1 to S3 are formed on the semiconductor substrate SB. The steps S1 to S3 are formed on the semiconductor substrate SB by wet etching or the like, the details of which will be described below with reference to FIGS. 3A to 3D.

[0063] Next, as shown in FIG. 2B, an etch stop layer 1A, an N-type semiconductor layer 1B, an active layer 1C, and a P-type semiconductor layer 1D are formed in this order on the entire surface of the semiconductor substrate SB by epitaxial growth. Furthermore, an etch stop layer 2A, an N-type semiconductor layer 2B, an active layer 2C, and a P-type semiconductor layer 2D are formed thereon. After that, an etch stop layer 3A, an N-type semiconductor layer 3B, an active layer 3C, and a P-type semiconductor layer 3D are formed. Furthermore, an etch stop layer 4A, an N-type semiconductor layer 4B, an active layer 4C, and a P-type semiconductor layer 4D are formed in sequence on the entire surface of the semiconductor substrate SB. The epitaxial growth of these layers can be performed continuously in the same chamber. The epitaxial growth may be MOCVD (Metal Organic Chemical Vapor Deposition), MBE (Molecular Beam Epitaxy), or HVPE (Hydride Vapor Phase Epitaxy).

[0064] 2C, a resist pattern F1 having an opening corresponding to the element region RA is formed on the P-type semiconductor layer 4D by photolithography. Then, the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D in the element region RA are removed by wet etching through the resist pattern F1. At this time, the wet etching of the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D can be stopped at the position of the etch stop layer 4A.

[0065] Next, as shown in Fig. 2D, the etch stop layer 4A in the element region RA is removed by performing wet etching through the resist pattern F1. At this time, the wet etching of the etch stop layer 4A can be stopped at the position of the P-type semiconductor layer 3D. Here, by using different chemicals for the wet etching of the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D and the wet etching of the etch stop layer 4A, the etching rate of the wet etching of the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D can be made different from the etching rate of the wet etching of the etch stop layer 4A.

[0066] In addition, dry etching may be used to remove the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D. For example, RIE (Reactive Ion Etching) may be used as the dry etching. In this case, the etch stop layer 4A may not be required.

[0067] Next, as shown in FIG. 2E, the resist pattern F1 in FIG. 2D is removed. Then, a resist pattern F2 having openings corresponding to the element regions RA and RB is formed on the P-type semiconductor layer 4D by using a photolithography technique. Then, wet etching is performed through the resist pattern F2 to remove the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D in the element region RA, and the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D in the element region RB. At this time, the wet etching of the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D can be stopped at the position of the etch stop layer 3A, and the wet etching of the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D can be stopped at the position of the etch stop layer 4A.

[0068] 2F, the etch stop layer 3A in the element region RA and the etch stop layer 4A in the element region RB are removed by wet etching through the resist pattern F2. At this time, the wet etching of the etch stop layer 3A in the element region RA can be stopped at the position of the P-type semiconductor layer 2D, and the wet etching of the etch stop layer 4A in the element region RB can be stopped at the position of the P-type semiconductor layer 3D.

[0069] Next, as shown in FIG. 2G, the resist pattern F2 in FIG. 2F is removed. Then, a resist pattern F3 having openings corresponding to the element regions RA to RC is formed on the P-type semiconductor layer 4D by using a photolithography technique. Then, wet etching is performed through the resist pattern F3 to remove the N-type semiconductor layer 2B, the active layer 2C, and the P-type semiconductor layer 2D in the element region RA, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D in the element region RB, and the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D in the element region RC. At this time, the wet etching of the N-type semiconductor layer 2B, the active layer 2C, and the P-type semiconductor layer 2D can be stopped at the position of the etch stop layer 2A, the wet etching of the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D can be stopped at the position of the etch stop layer 3A, and the wet etching of the N-type semiconductor layer 4B, the active layer 4C, and the P-type semiconductor layer 4D can be stopped at the position of the etch stop layer 4A.

[0070] Next, as shown in Fig. 2H, wet etching is performed through the resist pattern F3 of Fig. 2G to remove the etch stop layer 2A in the element region RA, the etch stop layer 3A in the element region RB, and the etch stop layer 4A in the element region RC. At this time, the wet etching of the etch stop layer 2A in the element region RA can be stopped at the position of the P-type semiconductor layer 1D, and the wet etching of the etch stop layer 3A in the element region RB can be stopped at the position of the P-type semiconductor layer 2D. Similarly, the wet etching of the etch stop layer 4A in the element region RC can be stopped at the position of the P-type semiconductor layer 3D.

[0071] Next, the resist pattern F3 is removed. Then, the P-type semiconductor layers 1D-4D and the active layers 1C-4C are patterned by using photolithography and etching techniques to form the active layers 1CA, 2CB, 3CC, and 4CD used as light-emitting layers and the active layers 1CB, 1CC, 2CC, 1CD, 2CD, and 3CD used as non-light-emitting layers, and the exposed surfaces K1-K4 are formed in the N-type semiconductor layers 1B-4B. At this time, the active layer 1CA is located in the element region RA, and the active layers 1CB and 2CB are located in the element region RB. Similarly, the active layers 1CC-3CC are located in the element region RC, and the active layers 1CD-4CD are located in the element region RD. Note that when the P-type semiconductor layers 1D-4D and the active layers 1C-4C are patterned, the N-type semiconductor layers 1B-4B on the exposed surfaces K1-K4 may be thinned.

[0072] Next, as shown in FIG. 2I, the P-type semiconductor layers 1D to 4D are patterned by using photolithography and etching techniques to form ridges G1 to G4 in the P-type semiconductor layers 1D to 4D.

[0073] Next, as shown in FIG. 2J, an insulating film 5 made of a silicon oxide film or the like is formed by a method such as plasma CVD on the surfaces of the P-type semiconductor layers 1D to 4D on which the ridges G1 to G4 are formed, respectively, and on the surfaces of the N-type semiconductor layers 1B to 4B on which the exposed surfaces K1 to K4 are formed, respectively. Next, the insulating film 5 is patterned using photolithography and dry etching techniques to form openings in the insulating film 5 that expose the top surfaces of the ridges G1 to G4 and openings that expose the exposed surfaces K1 to K4 of the P-type semiconductor layers 1D to 4D.

[0074] Next, by using photolithography and dry etching techniques, base electrodes Q1 to Q4 connected to the top surfaces of the ridges G1 to G4 and base electrodes R1 to R4 on the exposed surfaces K1 to K4 are formed. Next, by using photolithography and dry etching techniques, thick film electrodes U1 to U4 connected to the base electrodes Q1 to Q4, respectively, and thick film electrodes W1 to W4 connected to the base electrodes R1 to R4, respectively, are formed. Furthermore, the semiconductor substrate SB on which the thick-film electrodes U1-U4, W1-W4 are formed is cleaved into a bar shape. Then, end face protection films are formed on the cleavage surfaces that become the end faces of the active layers 1CA, 2CB, 3CC, and 4CD used as the respective light-emitting layers by a method such as sputtering, and the bars on which the end face protection films are formed are separated into individual pieces to form the semiconductor lasers Z1.

[0075] 3A to 3D are cross-sectional views showing an example of a method for forming an inclined surface of a semiconductor substrate according to the second embodiment. In addition, in Fig. 3A to Fig. 3D, a method for forming an inclined surface on a surface of a semiconductor wafer on which a plurality of semiconductor lasers Z1 shown in Fig. 1A (two in the example of Fig. 3A to Fig. 3D) are collectively formed is taken as an example.

[0076] 3A, the semiconductor wafer WF is divided into laser forming regions V1 and V2. Then, a resist pattern F11 for masking the element region RA is formed on the semiconductor wafer WF by using a photolithography technique. Next, the semiconductor wafer WF is wet-etched with the resist pattern F11 remaining, thereby forming a step S1 that defines the position of the element region RA in the semiconductor wafer WF.

[0077] 3B, the resist pattern F11 is removed, and then a resist pattern F12 for masking the element regions RA and RB is formed on the semiconductor wafer WF by using a photolithography technique. Next, the semiconductor wafer WF is wet-etched with the resist pattern F12 remaining, thereby forming a step S2 that defines the position of the element region RB in the semiconductor wafer WF.

[0078] 3C, the resist pattern F12 is removed, and then a resist pattern F13 for masking the element regions RA to RC is formed on the semiconductor wafer WF by using a photolithography technique. Next, the semiconductor wafer WF is wet-etched with the resist pattern F13 remaining, thereby forming a step S3 that defines the position of the element region RC in the semiconductor wafer WF.

[0079] Next, as shown in Fig. 3D, the resist pattern F13 is removed. Here, the semiconductor wafer WF in which the steps S1 to S3 are formed is subjected to the steps of Fig. 2A to Fig. 2J and the electrode formation shown in Fig. 1A, and then the laser formation region V1 is cut out from the semiconductor wafer WF, thereby forming the semiconductor laser Z1 in Fig. 1A.

[0080] Third embodiment Fig. 4A is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a third embodiment, and Fig. 4B is a plan view showing a schematic configuration example of a semiconductor light emitting device according to the third embodiment. Note that in the following embodiments, the same reference numerals are used to designate the same parts as those in the semiconductor laser Z1 in Fig. 1A, and the description thereof will be omitted.

[0081] In Fig. 4A, the semiconductor laser Z2 includes current outflow regions H1'-H4', base electrodes R12, R34, and thick film electrodes W12, W34, instead of the current outflow regions H1-H4, base electrodes R1-R4, and thick film electrodes W1-W4 of the semiconductor laser Z1 in Fig. 1A. The base electrode R12 is a common electrode for the element regions RA and RB. The base electrode R34 is a common electrode for the element regions RC and RD. Other than that, the semiconductor laser Z2 can be configured similarly to the semiconductor laser Z1.

[0082] The current outflow regions H1' and H2' are provided at positions sandwiching a step S1 provided on the semiconductor substrate SB, and the current outflow regions H3' and H4' are provided at positions sandwiching a step S3 provided on the semiconductor substrate SB. The base electrode R12 is formed so as to straddle the exposed surfaces K1 and K2 of the N-type semiconductor layers 1B and 2B, and is connected to the current outflow regions H1' and H2' through an opening, and a thick film electrode W12 is formed on the base electrode R12. The base electrode R34 is formed so as to straddle the exposed surfaces K3 and K4 of the N-type semiconductor layers 3B and 4B, and is connected to the current outflow regions H3' and H4'. A thick film electrode W34 is formed on the base electrode R34. The film thickness of each of the thick film electrodes W12 and W34 can be set so that the heights from the mounting surface of the laser chip are the same.

[0083] Here, base electrodes R12, R34 and thick film electrodes W12, W34 are provided instead of base electrodes R1 to R4 and thick film electrodes W1 to W4. By providing base electrodes R12, R34 and thick film electrodes W12, W34 common to two element regions, it is possible to reduce the number of electrodes drawn from semiconductor laser Z2 while enabling independent driving of light-emitting layers with different optical characteristics.

[0084] (Fourth embodiment) FIG. 5A is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to a fourth embodiment, and FIG. 5B is an enlarged cross-sectional view showing a part of the semiconductor light emitting device of FIG. 5A. In Fig. 5A, the semiconductor laser Z3 has grooves Z1-Z3 instead of the steps S1-S3 of the semiconductor laser Z1 of Fig. 1A. In this case, the width WZ of each groove Z1-Z3 is formed in a portion corresponding to the steps S1-S3 in the semiconductor laser Z1 of Fig. 1 shown above, and can be set so as to remove the steps S1-S3. The grooves Z1-Z3 separate the element regions RA-RD. Other than that, the semiconductor laser Z3 can be configured similarly to the semiconductor laser Z1.

[0085] The groove Z1 is located between the element regions RA and RB, the groove Z2 is located between the element regions RB and RC, and the groove Z3 is located between the element regions RC and RD. The surface of each of the grooves Z1 to Z3 is covered with an insulating film 5. In order to improve the heat dissipation properties of the element regions RA to RD, a metal such as Cu or Al may be embedded in the grooves Z1 to Z3.

[0086] Here, the grooves Z1 to Z3 can be formed by dry etching such as RIE. The grooves Z1 to Z3 can improve the electrical isolation between the element regions RA to RD.

[0087] The arrangement period LV of the active layers 1CA, 2CB, 3CC, and 4CD can be, for example, 50 μm. The width WZ of each of the grooves Z1 to Z3 can be, for example, 6 μm. The depth FZ of each of the grooves Z1 to Z3 can be, for example, 15 μm. The thickness of each of the ridges G1 to G4 can be, for example, 1.5 μm. The width of each of the ridges G1 to G4 can be, for example, 2 μm. The distance from the top surface of each of the ridges G1 to G4 to each of the exposed surfaces K1 to K4 can be, for example, 3 μm. The film thickness of the insulating film 5 and the film thickness of the base electrodes R1 to R4 can be, for example, 0.3 μm. The film thickness of the thick film electrodes U1 to U4 can be, for example, 1 μm. The film thickness of the thick film electrodes W1 to W4 can be, for example, 4 μm. The width of the thick film electrodes U1 to U4, W1 to W4 can be, for example, 6 μm.

[0088] Fifth embodiment 6 is a cross-sectional view showing a schematic configuration example of a semiconductor light-emitting device according to the fifth embodiment. In the following description, a monolithic multi-wavelength semiconductor laser having three active layers emitting laser beams with different wavelengths is taken as an example, but a monolithic multi-wavelength semiconductor laser having m active layers (m is an integer of 2 or more) emitting laser beams with different wavelengths may be used.

[0089] 6, in this semiconductor laser Z4, each of the element regions RA to RC is located on the flat surface MB of the semiconductor substrate SB. In this case, it is not necessary to form the steps S1 to S3 in FIG. 1A in the semiconductor substrate SB, and the steps in FIG. 3A to FIG. 3D are not required.

[0090] An N-type semiconductor layer 1B, an active layer 1C, a P-type semiconductor layer 1D, an N-type semiconductor layer 2B, an active layer 2C, a P-type semiconductor layer 2D, an N-type semiconductor layer 3B, an active layer 3C, and a P-type semiconductor layer 3D are sequentially stacked on the flat surface MB of the semiconductor substrate SB. Here, in the element region RA, the active layer 1C is used as a light-emitting layer, and the active layers 2C and 3C are used as non-light-emitting layers. In the element region RB, the active layer 2C is used as a light-emitting layer, and the active layers 1C and 3C are used as non-light-emitting layers. In the element region RC, the active layer 3C is used as a light-emitting layer, and the active layers 1C and 2C are used as non-light-emitting layers.

[0091] In addition, in the element region RA, electrodes 6P1 and 6N1 are formed via insulating films 5P1 and 5N1, respectively. The electrode 6P1 penetrates the N-type semiconductor layer 2B, the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the P-type semiconductor layer 1D. The electrode 6N1 penetrates the active layer 1C, the P-type semiconductor layer 1D, the N-type semiconductor layer 2B, the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the N-type semiconductor layer 1B. This makes it possible to inject a current into the active layer 1C via the electrode 6P1 in the element region RA, and the active layer 1C can be used as a light-emitting layer to emit light at the light-emitting point P1.

[0092] In addition, in the element region RB, electrodes 6P2 and 6N2 are formed via insulating films 5P2 and 5N2, respectively. The electrode 6P2 penetrates the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the P-type semiconductor layer 2D. The electrode 6N2 penetrates the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the N-type semiconductor layer 2B. This makes it possible to inject a current into the active layer 2C via the electrode 6P2 in the element region RB, and the active layer 2C can be used as a light-emitting layer to emit light at the light-emitting point P2.

[0093] In addition, in the element region RC, electrodes 6P3 and 6N3 are formed via insulating films 5P3 and 5N3, respectively. The electrode 6P3 is connected to the P-type semiconductor layer 3D. The electrode 6N3 passes through the active layer 3C and the P-type semiconductor layer 3D, and is connected to the N-type semiconductor layer 3B. This makes it possible to inject a current into the active layer 3C via the electrode 6P3 in the element region RC, and allows the active layer 3C to function as a light-emitting layer and emit light at a light-emitting point P3.

[0094] This allows a plurality of active layers 1C-3C capable of emitting laser beams having different optical characteristics to be continuously stacked on the semiconductor substrate SB, and the active layers 1C, 2C, and 3C can then be used as independent light-emitting layers in each element region. Since the active layers 1C, 2C, and 3C can be continuously formed in this manner, it is possible to prevent the crystal plane from being contaminated or defects from occurring. Furthermore, the active layers 1C, 2C, and 3C can be stacked on the semiconductor substrate SB in the same chamber, and monolithic integration can be achieved while suppressing deterioration in the characteristics of the semiconductor laser Z4 capable of emitting laser beams having different optical characteristics.

[0095] In the semiconductor laser Z4, the gain region can be set by the positions of the electrodes 6P1, 6N1, 6P2, 6N2, 6P3, and 6N3 in the active layers 1C to 3C, and the positions of the light-emitting points P1 to P3 can be defined. In this case, grooves for separating the element regions RA to RC for defining the positions of the light-emitting points P1 to P3 are not required, and the intervals between the element regions RA to RC can be narrowed.

[0096] In order to align the horizontal positions of the light emitting points P1 to P3 when the semiconductor laser Z4 is mounted, the mounting surface of the submount on which the semiconductor laser Z4 is mounted may be inclined.

[0097] Sixth embodiment FIG. 7 is a cross-sectional view showing a schematic configuration example of a semiconductor light emitting device according to the sixth embodiment. In the semiconductor laser Z4 of Fig. 6, the element regions RA-RC are provided on the flat surface MB of the semiconductor substrate SB, whereas in the semiconductor laser Z5 of Fig. 7, the element regions RA-RC are provided on the semiconductor substrate SB on which steps S1 and S2 are provided. At this time, a step S1' corresponding to the step S1 is provided between the element regions RA and RB, and a step S2' corresponding to the step S2 is provided between the element regions RB and RC. In the semiconductor laser Z5, the positions of the active layers 1C-3C used as light emitting layers in the height direction from the mounting surface of the laser chip can be made consistent, which makes it easy to handle a plurality of laser beams having different optical characteristics.

[0098] Seventh embodiment 8A to 8D are cross-sectional views showing an example of a method for manufacturing the semiconductor light emitting device according to the seventh embodiment. 8A, steps S1 and S2 are formed on the semiconductor substrate SB. Then, an N-type semiconductor layer 1B, an active layer 1C, a P-type semiconductor layer 1D, an N-type semiconductor layer 2B, an active layer 2C, a P-type semiconductor layer 2D, an N-type semiconductor layer 3B, an active layer 3C, and a P-type semiconductor layer 3D are sequentially formed on the entire surface of the semiconductor substrate SB by epitaxial growth. The epitaxial growth of these layers can be performed successively in the same chamber.

[0099] 8B, a planarization film 7 is deposited on the entire surface of the P-type semiconductor layer 3D by a method such as plasma CVD. This planarization film 7 may be a silicon oxide film, an aluminum nitride film, or a non-doped polycrystalline semiconductor film.

[0100] 8C, the planarization film 7 is thinned by a method such as CMP (Chemical Mechanical Polishing) to planarize the planarization film 7. The thinning of the planarization film 7 may be stopped when the P-type semiconductor layer 3D is exposed, or may be stopped before the P-type semiconductor layer 3D is exposed. Alternatively, a PSG (Phosphorus Silicon Glass) film or a BPSG (Boronic Phosphoric Silicon Glass) film may be used as the planarization film 7, and the planarization may be performed by reflowing the PSG film or the BPSG film.

[0101] Next, as shown in FIG. 8D, electrodes 6P1', 6N1' are formed on the P-type semiconductor layer 3D with insulating films 5P1', 5N1' respectively interposed therebetween, and electrodes 6P2', 6N2', 6P3', 6N3' are formed on the planarization film 7 with insulating films 5P2', 5N2', 5P3', 5N3' respectively interposed therebetween.

[0102] At this time, the electrode 6P1' penetrates the N-type semiconductor layer 2B, the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the P-type semiconductor layer 1D. The electrode 6N1' penetrates the active layer 1C, the P-type semiconductor layer 1D, the N-type semiconductor layer 2B, the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, and the P-type semiconductor layer 3D, and is connected to the N-type semiconductor layer 1B. The electrode 6P2' penetrates the N-type semiconductor layer 3B, the active layer 3C, the P-type semiconductor layer 3D, and the planarization film 7, and is connected to the P-type semiconductor layer 2D. The electrode 6N2' penetrates the N-type semiconductor layer 2B, the active layer 2C, the P-type semiconductor layer 2D, the N-type semiconductor layer 3B, the active layer 3C, the P-type semiconductor layer 3D, and the planarization film 7, and is connected to the N-type semiconductor layer 2B. The electrode 6P3' penetrates the planarization film 7 and is connected to the P-type semiconductor layer 3D. The electrode 6N3' penetrates the active layer 3C, the P-type semiconductor layer 3D and the planarization film 7 and is connected to the N-type semiconductor layer 3B.

[0103] This allows the active layers 1C-3C used as light emitting layers to be aligned in the height direction from the mounting surface of the laser chip, making it easier to handle a plurality of laser beams with different optical characteristics. Even when element regions RA-RC are provided on the semiconductor substrate SB on which steps S1 and S2 are provided, the heights of the electrodes 6P1', 6N1, 6P2', 6N2', 6P3', and 6N3' can be aligned, making it possible to stabilize the junction-down mounting of the semiconductor laser Z1.

[0104] (Other embodiments) In the above-mentioned embodiment, the multi-beam semiconductor laser in which the oscillation wavelength differs for each beam position has been mainly described, but the optical characteristics that differ for each beam position are not limited to the oscillation wavelength. In the laminated structure of the light-emitting layer, it is possible to arrange the light-emitting layers having different compositions, film thicknesses, etc. for each beam position, and the ridge width can also be made different for each beam position, so that it is possible to realize a multi-beam semiconductor laser in which the optical characteristics (e.g., polarization and beam divergence angle) that can be adjusted by the design of the light-emitting layer differ for each beam position in addition to the oscillation wavelength.

[0105] For example, in the case of a GaInP active layer, the magnitude of the optical gain in the TE mode and the TM mode switch at an In composition of approximately 0.5. By adjusting the In composition for each active layer corresponding to each beam position, a multi-beam semiconductor laser that emits laser light with different polarizations can be realized, and the degradation of image quality can be suppressed by suppressing interference.

[0106] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and includes various modified examples. For example, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace a part of the configuration of each embodiment with another configuration. [Explanation of symbols]

[0107] Z1~Z6 Semiconductor laser RA~RD element area T1A~T1D, T2B~T2D, T3C, T3D, T4D bonding layer SB Semiconductor Substrate 1A~4A Etch stop layer 1B~4B N-type semiconductor layer 1CA~1CD, 2CB~2CD, 3CC, 3CD, 4CD active layer 1D~4D P-type semiconductor layer J1~J4 Current injection area H1~H4 Current outflow area

Claims

1. A semiconductor substrate; a plurality of active layers stacked on the semiconductor substrate and capable of emitting laser beams having different optical characteristics; the semiconductor substrate has three or more laser light emitting portions in regions spaced apart from each other in a surface direction thereof, and at least one of the active layers arranged in the region in which the laser light emitting portions are formed and used as a light emitting layer is stacked on an active layer used as a non-light emitting layer; an active layer used as a non-light-emitting layer is further laminated on at least one of the active layers used as a light-emitting layer, A semiconductor light-emitting device, characterized in that all of the electrodes for supplying power to the plurality of active layers are formed facing in the same direction.

2. 2 . The semiconductor light emitting device according to claim 1 , wherein the active layers used as light emitting layers capable of emitting the laser beams having different optical characteristics are stacked at different positions from the surface of the semiconductor substrate.

3. 2 . The semiconductor light emitting device according to claim 1 , wherein the active layers used as light emitting layers capable of emitting the laser beams having different optical characteristics are located at different positions in a surface direction of the semiconductor substrate.

4. The semiconductor light-emitting element according to claim 1 , wherein the optical characteristics include at least one of an emission wavelength, a polarization, and a beam divergence angle.

5. 2. The semiconductor light emitting device according to claim 1, wherein the light emitting layers capable of emitting laser beams having different optical characteristics can be driven independently.

6. 2. The semiconductor light-emitting element according to claim 1, wherein the semiconductor substrate has a step that causes active layers used as light-emitting layers capable of emitting laser light having different optical characteristics to have the same distance from a back surface of the semiconductor substrate.

7. 2. The semiconductor light-emitting element according to claim 1, wherein a thickness of the electrode is set so that a distance from a back surface of the semiconductor substrate to a top surface of the electrode formed on a current injection region that injects current into an active layer used as a light-emitting layer capable of emitting laser light having different optical characteristics is equal between the current injection regions.

8. A method for producing the semiconductor light-emitting device according to claim 1, comprising the steps of: A step of stacking a stacked structure of a plurality of active layers capable of emitting laser beams having different optical characteristics on a semiconductor substrate; forming current injection regions for injecting current into the active layer at different positions in a surface direction of the semiconductor substrate; forming an electrode on the current injection region so that current is injected into active layers that are located at different positions from the surface of the semiconductor substrate.

9. The method further includes a step of forming a step on the semiconductor substrate in accordance with a difference in the stacking position of the active layer in the stacked structure, The method for manufacturing a semiconductor light emitting device according to claim 8 , wherein the current injection region is divided by the step.

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