Switching element drive circuit

Abstract

To provide a switching element drive circuit capable of monitoring a current through rate and a voltage through rate while suppressing a processing load of detection information.SOLUTION: A control section 130U controls a current value of an electric signal applied to a control terminal of a switching element 44U based on any one of a current through rate, which is deviated based on a drain current transition period until a voltage of the control terminal extracted from control terminal voltage time-series information indicating a time change of a voltage in the control terminal of the switching element 44U achieves a mirror voltage from a gate threshold voltage of the switching element 44U and indicates a change rate of an element current of the switching element 44U, and a voltage through rate which is deviated based on a mirror period in which the voltage in the control terminal extracted from the control terminal voltage time-series information becomes the mirror voltage, and indicates a voltage change rate between input and output terminals.SELECTED DRAWING: Figure 16

Description

[Technical field]

[0001] The present invention relates to a switching element drive circuit that drives the gate of a switching element. [Background technology]

[0002] 2. Description of the Related Art In switching element drive circuits that drive the gates of switching elements such as IGBTs (insulated gate bipolar transistors) and MOSFETs (metal-oxide semiconductor field effect transistors), there is a demand for reducing switching loss and suppressing switching noise.

[0003] Figure 19 shows the gate-source voltage V gs , drain-source voltage V ds and the drain current I d When a positive gate signal is applied (ON) to the gate of an n-type MOSFET, electrons are attracted to the drain-source region facing the insulating layer made of silicon oxide directly below the gate, and the drain-source region becomes conductive. As a result, the gate-source voltage V gs As the gate threshold voltage increases, the drain current (device current) I d increases, passes a maximum value of surge current P1, and then becomes constant.

[0004] Drain current I d As the drain-source voltage (voltage between input and output terminals) V ds begins to decrease, and at the same time, the gate-source voltage V gs During the mirror period, the drain-source voltage V ds decreases to a minimum value and then becomes constant.

[0005] In Figure 19, the gate-source voltage V gs exceeds the gate threshold, the drain current I d When the gate-source voltage Vgs In other words, the gate-source voltage V gs When the drain-source voltage V exceeds the gate threshold, ds The period from when the gate-source voltage V gs The mirror period during which the drain-source voltage V ds Since this period is the period from when the current starts to decrease until it reaches a minimum value, this period is called the voltage transition period. The period consisting of the current transition period and the voltage transition period is called the turn-on period, and switching loss occurs in switching elements such as MOSFETs during this turn-on period.

[0006] When the positive gate signal applied to the gate of the n-type MOSFET is turned off, the gate-source voltage V gs The gate-source voltage V begins to decrease, and the electrons that were attracted to the drain-source region disperse, gradually insulating the drain-source region. gs When the Miller period begins, the drain-source voltage V ds becomes larger, passes through the maximum surge voltage P2, and then becomes constant. Then, at the end of the mirror period, the drain current I d begins to decrease, and the gate-source voltage V gs When the gate threshold is reached, the drain current I d decreases to a minimum value and then becomes constant.

[0007] In Figure 19, the gate-source voltage V gs The Miller period during which the drain-source voltage V ds When the drain current I d This is also the period until the gate-source voltage V gs Until it reaches the gate threshold after the Miller period, in other words, the drain current I dThe period from when the current starts to decrease until it reaches a minimum value is called the current transition period. The period consisting of the current transition period and the voltage transition period is called the turn-off period, and switching loss occurs in switching elements such as MOSFETs during the turn-off period.

[0008] Since the switching loss is proportional to the length of each of the turn-on period and the turn-off period, it is desirable to shorten each of the turn-on period and the turn-off period in order to reduce the switching loss.

[0009] To shorten the turn-on and turn-off periods, the drain current I d The current slew rate, which is the rate of change of the drain-source voltage V ds It is effective to increase the voltage slew rate, which is the rate of change of the gate charge current when the gate signal is ON, and the voltage slew rate when the gate is OFF. To increase the current and voltage slew rate at turn-on, it is possible to increase the gate charge current when the gate signal is ON. Also, to increase the current and voltage slew rate at turn-off, it is possible to increase the gate discharge current when the gate is OFF.

[0010] Therefore, in order to reduce switching loss and suppress switching noise, feedback control of the voltage slew rate and current slew rate during switching is being considered.

[0011] However, with such feedback control, if the voltage slew rate and current slew rate during switching increase, electromagnetic noise increases, and there is a risk that EMC standards will not be met. Therefore, it is necessary to adjust the voltage slew rate and current slew rate during switching so that the EMC standards are met.

[0012] Conventionally, the gate resistance value was set to ensure that the voltage slew rate and current slew rate were within the allowable range, taking into account the individual variations in MOSFETs. However, a margin was set to prevent large noise due to a high slew rate, which resulted in large switching losses.

[0013] The following Patent Document 1 discloses an invention that measures the voltage of a load during a first switching cycle and generates a profile for driving in a second switching cycle based on the measured voltage. [Prior art documents] [Patent documents]

[0014] [Patent Document 1] U.S. Patent No. 9,374,081 Summary of the Invention [Problem to be solved by the invention]

[0015] However, the invention of Patent Document 1 has a problem in that the processing load for detected information increases because the waveform is detected at a plurality of different points in time during one cycle.

[0016] The present invention has been made in view of the above problems, and has an object to provide a switching element drive circuit that can monitor a current slew rate and a voltage slew rate while suppressing the processing load of detected information. [Means for solving the problem]

[0017] In order to achieve the above-mentioned object, the switching element drive circuit of the present invention includes a control terminal voltage detection unit (124U) that detects control terminal voltage time series information indicating a change over time in the voltage of the control terminal of a switching element (44U) that has a control terminal and an input / output terminal and whose input / output terminals are switched in response to an electrical signal applied to the control terminal, and a control unit (130U) that controls a current value of the electrical signal based on either a current slew rate that is derived based on a drain current transition period from the gate threshold voltage of the switching element until the control terminal voltage extracted from the control terminal voltage time series information reaches a mirror voltage and indicates the rate of change of the element current of the switching element, or a voltage slew rate that is derived based on a mirror period during which the control terminal voltage extracted from the control terminal voltage time series information becomes the mirror voltage and indicates the rate of change of voltage between the input / output terminals.

[0018] With this configuration, it is possible to reduce the load on the switching element drive circuit related to the detection of changes in the control terminal voltage, etc., using a threshold value.

[0019] In addition, by controlling the current of the electrical signal applied to the control terminal of the switching element (44U) based on the calculated voltage slew rate and current slew rate, it is possible to suppress the occurrence of surge voltages and the like and to reduce the switching loss of the switching element (44U). [Brief description of the drawings]

[0020] [Figure 1] 1 is a block diagram showing an example of an inverter including a switching element drive circuit according to a first embodiment. [Diagram 2] FIG. 2 is a block diagram showing an example of a configuration of a gate driver provided at the gate of a switching element. [Diagram 3] FIG. 2 is a block diagram showing an example of a specific configuration of a control unit. [Figure 4] FIG. 11 is an explanatory diagram for calculating a voltage slew rate. [Diagram 5] FIG. 11 is an explanatory diagram for calculating a current slew rate. [Figure 6] 1 is an explanatory diagram showing the relationship between a voltage slew rate and a current slew rate, and the influence on a gate current. [Figure 7] FIG. 4 is an explanatory diagram of a general slew rate calculation in the present embodiment. [Figure 8] FIG. 13 is an explanatory diagram of a case where low threshold detection is limited to the first time. [Figure 9] 13 is a flowchart showing an example of a process in the case where low threshold detection is limited to the first time. [Figure 10] 13 is a flowchart for calculating a slew rate and controlling a gate current when a difference occurs between a high threshold detection and a previous high threshold detection. [Figure 11] FIG. 13 is an explanatory diagram of slew rate calculation by comparing four or more threshold values. [Figure 12] 11 is an explanatory diagram of a case where low threshold detection and high threshold detection are performed when the motor phase currents are approximately the same. FIG. [Figure 13] 11 is an explanatory diagram of a case where low threshold detection and high threshold detection are performed when the motor phase currents are substantially the same in the same electrical angle period. FIG. [Figure 14] FIG. 13 is an explanatory diagram of a case where a thinning section is provided between low threshold detection and high threshold detection. [Figure 15] 13 is an explanatory diagram of a case where a thinning section in which threshold detection is not performed is provided after gate current control. FIG. [Figure 16] FIG. 11 is a block diagram showing an example of the configuration of a gate driver provided at the gate of a switching element according to a second embodiment. [Figure 17] FIG. 11 is an explanatory diagram showing an overview of slew rate detection based on a control terminal voltage. [Figure 18] 10A and 10B are explanatory diagrams showing an example of calculation of a voltage slew rate and a current slew rate based on a control terminal voltage, and control of a gate current. [Figure 19] 1 is an explanatory diagram showing changes in gate-source voltage, drain-source voltage, and drain current due to switching of an n-type MOSFET. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] [First embodiment] Hereinafter, the present embodiment will be described with reference to the drawings. Fig. 1 is a block diagram showing an example of an inverter 10 equipped with a switching element drive circuit according to the present embodiment. The inverter 10 is a three-phase inverter that converts a DC voltage supplied from a DC power source 80, such as an on-board battery, into a three-phase AC voltage of, for example, U phase, V phase, and W phase, and outputs the three-phase AC voltage to a motor 12.

[0022] 1, inverter 10 according to this embodiment includes switching elements 42U, 42V, 42W, 44U, 44V, and 44W such as MOSFETs, and generates power to be supplied to the coils of the stator of motor 12 by switching on and off switching elements 42U, 42V, 42W, 44U, 44V, and 44W. For example, switching elements 42U and 44U switch the power to be supplied to a U-phase coil, switching elements 42V and 44V switch the power to be supplied to a V-phase coil, and switching elements 42W and 44W switch the power to be supplied to a W-phase coil.

[0023] The drains of the switching elements 42U, 42V, and 42W are connected to the positive electrode (+) of the DC power supply 80, and the sources of the switching elements 42U, 42V, and 42W are connected to the drains of the switching elements 44U, 44V, and 44W. In addition, the sources of the switching elements 44U, 44V, and 44W are connected to the negative electrode (-) of the DC power supply 80.

[0024] A node 46U, at which the source of the switching element 42U and the drain of the switching element 44U are connected, is connected to a U-phase coil of the motor 12. As an example, when the switching element 42U is turned on and the switching element 44U is turned off, power from the DC power supply 80 is supplied to the U-phase coil of the motor 12 via the node 46U. At the same time, as an example, when the switching element 42W is turned off and the switching element 44W is turned on, the current flowing through the U-phase coil flows through the W-phase coil via the neutral point of the coil of the motor 12. The current flows to the negative pole (-) of the DC power supply 80 via the node 46W, at which the source of the switching element 42W and the drain of the switching element 44W are connected, and the switching element 44W. When the U-phase coil and the W-phase coil are energized, a magnetic field is generated in the U-phase coil and the W-phase coil.

[0025] A node 46V, at which the source of switching element 42V and the drain of switching element 44V are connected, is connected to the V-phase coil of motor 12. As an example, when switching element 42V is turned on and switching element 44V is turned off, power from DC power supply 80 is supplied to the V-phase coil of motor 12 via node 46V. At the same time, as an example, when switching element 42U is turned off and switching element 44U is turned on, the current flowing through the V-phase coil flows through the U-phase coil via the neutral point of the coil of motor 12. The current flows to the negative pole (-) of DC power supply 80 via node 46U and switching element 44U. When the V-phase coil and the U-phase coil are energized, a magnetic field is generated in the V-phase coil and the U-phase coil.

[0026] Also, as an example, when switching element 42W is turned on and switching element 44W is turned off, power from DC power supply 80 is supplied to the W-phase coil of motor 12 via node 46W. At the same time, as an example, when switching element 42V is turned off and switching element 44V is turned on, the current flowing through the W-phase coil flows through the V-phase coil via the neutral point of the coil of motor 12. The current flows to the negative pole (-) of DC power supply 80 via node 46V and switching element 44V. When the W-phase coil and the V-phase coil are energized, a magnetic field is generated in the W-phase coil and the V-phase coil.

[0027] As described above, by switching the switching elements 42U, 42V, 42W, 44U, 44V, and 44W (hereinafter abbreviated as "switching elements 42U to 44W") to switch the phase in which a magnetic field is generated in the coils of motor 12, a so-called rotating magnetic field that rotates a rotor (rotor) made of a permanent magnet or the like is generated in the coils of motor 12. In actual motor rotation control, a three-phase AC-like voltage is generated and applied to the coils of each phase of motor 12 by PWM (pulse width modulation) control that turns each of the switching elements 42U to 44W on and off in short increments.

[0028] 1 may occur due to the switching of the switching elements 42U-44W. The parasitic inductances 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, and 72 may contribute to the generation of a surge voltage. In this embodiment, the generation of a surge voltage due to the switching of the switching elements 42U-44W may be suppressed by appropriately controlling the slew rate (current slew rate and voltage slew rate), so that the influence of the parasitic inductances 50-72 may be offset.

[0029] As described above, the n-type MOSFET is turned on by applying a gate signal of a positive voltage to the gate. As shown in FIG. 1, in this embodiment, the switching elements 42U to 44W are connected to gate drivers 20U, 20V, 20W, 22U, 22V, and 22W (hereinafter abbreviated as "gate drivers 20U to 22W") that control the current value of the gate signal. Each of the gate drivers 20U to 22W is connected to a higher-level control device (not shown) such as a vehicle ECU (Electronic Control Unit). Each of the gate drivers 20U to 22W amplifies a gate signal input from the higher-level control device, and applies the amplified gate signal to the gate of each of the switching elements 42U to 44W by adjusting the current value using a variable resistor.

[0030] 2 is a block diagram showing an example of the configuration of a gate driver 22U provided at the gate of a switching element 44U. As described above, gate drivers 20U to 22W are provided for each of the switching elements 42U to 44W, but only gate driver 22U will be described as a representative example and descriptions of the other gate drivers will be omitted.

[0031] As shown in FIG. 2, the gate driver 22U detects the input / output terminal voltage (drain-source voltage V ds ) in association with time information, and the element current (drain current I d The switching element 44U includes an element current detection unit 26U that detects the voltage between the input / output terminals of the switching element 44U and the element current detection unit 26U in association with time information, a detection processing unit 28U that converts the detection signals of the input / output terminal voltage detection unit 24U and the element current detection unit 26U into signals in a format processable by a control unit 30U (described later), a control unit 30U that performs a control operation for a gate signal to be applied to the gate of the switching element 44U based on a slew rate target value input from a higher-level control device and the output of the detection processing unit 28U, and an operation unit 32U that changes the gate drive capability. Each of the input / output terminal voltage detection unit 24U and the element current detection unit 26U detects time information using, for example, a control clock of the control unit 30U.

[0032] As an example, the element current detection unit 26U may detect the current value based on the potential difference between both ends of the shunt resistor, or may calculate the current value based on an induced current generated by the passage of current between the source of the switching element 44U and the ground region.

[0033] The detection processing unit 28U is a circuit including a kind of A / D converter that converts the detection signals of the input / output terminal voltage detection unit 24U and the element current detection unit 26U, when they are analog signals, into digital signals that can be processed by the control unit 30U.

[0034] The operation unit 32U is a variable resistor that changes its resistance under the control of the control unit 30U to change the current value of the gate signal applied to the gate of the switching element 44U. The operation unit 32U includes a variable resistor 32UO that changes the current value of the gate signal of a positive voltage applied to the gate of the switching element 44U, and a variable resistor 32UF that changes the current value of the gate signal of a negative voltage applied to the gate of the switching element 44U.

[0035] A gate signal is input to the operation unit 32U from a higher-level control device via an amplifier 34U and a complementary MOS 36U, which is a type of inversion circuit. The gate signal input from the higher-level control device is amplified by the amplifier, and then its positive and negative sides are inverted by the complementary MOS 36U. Depending on the positive and negative sides of the gate signal input from the higher-level control device, the complementary MOS 36U may be omitted.

[0036] 3 is a block diagram showing an example of a specific configuration of the control unit 30U. The control unit 30U is a type of computer, and includes a central processing unit (CPU) 30UB, a read only memory (ROM) 30UA, a random access memory (RAM) 30UC, and an input / output port 30UD.

[0037] In the control unit 30U, the CPU 30UB, the ROM 30UA, the RAM 30UC, and the input / output port 30UD are connected to one another via various buses such as an address bus, a data bus, and a control bus. The input / output port 30UD is connected to various input / output devices such as a detection processing unit 28U, an operation unit 32U, and a higher-level control device 400.

[0038] The ROM 30UA is installed with a calculation program for calculating a slew rate and a control command program for generating a command for operating the operation unit 32U based on the calculated slew rate. In this embodiment, the CPU 30UB executes the calculation program to calculate the slew rate. The CPU 30UB also generates a command for operating the operation unit 32U based on the control command program. The RAM 30UC is a storage unit that temporarily stores data, and holds, for example, data input from the detection processing unit 28U.

[0039] Next, various functions realized by the CPU 30UB of the control unit 30U executing the calculation program and the control command program will be described. By the CPU 30UB executing the calculation program and the control command program, the CPU 30UB functions as a calculation unit 300A that calculates a slew rate and a control command unit 300B that generates commands for operating the operation unit 32U, as shown in FIG.

[0040] 4 is an explanatory diagram for calculating the voltage slew rate. The voltage slew rate includes a turn-off voltage slew rate that is detected when the gate signal is turned off, and a turn-on voltage slew rate that is detected when the gate signal is turned on.

[0041] The calculation of the turn-off voltage slew rate will be described. To calculate the turn-off voltage slew rate, the voltage between the input / output terminals detected by the input / output terminal voltage detection unit 24U after the gate signal is turned off is equal to or lower than the first threshold voltage V th1 Time to reach T sr_off_v1In this embodiment, when the gate signal is turned off and the voltage between the input / output terminals reaches the first threshold voltage V th1 Time to reach T sr_off_v1 The period from when the gate signal is turned on until it is turned off again after the detection of the low threshold is called the low threshold detection section.

[0042] After the gate signal is turned off again, the voltage between the input / output terminals detected by the input / output terminal voltage detection unit 24U becomes equal to or lower than the first threshold voltage V th1 A second threshold voltage V th2 Time to reach T sr_off_v2 In this embodiment, when the gate signal is turned off and the voltage between the input / output terminals reaches the second threshold voltage V th2 Time to reach T sr_off_v2 The period from when the gate signal is turned on until it is turned off again after the detection of the high threshold is called the high threshold detection section.

[0043] The section following the high threshold detection section is the detected time T sr_off_v1 and time T sr_off_v2 This is the dv / dt calculation & control calculation section in which the turn-off voltage slew rate is calculated using the above formula, and the gate current, which is the current value of the gate signal, is controlled based on the calculated turn-off voltage slew rate. In the dv / dt calculation & control calculation section, the turn-off voltage slew rate is calculated using the following formula (1).

[0044] JPEG0007643616000001.jpg28164

[0045] Next, the calculation of the turn-on voltage slew rate will be described. To calculate the turn-on voltage slew rate, the voltage between the input / output terminals detected by the input / output terminal voltage detection unit 24U is equal to or lower than the first threshold voltage V th1 Time until it drops to T sr_on_v1 Detect.

[0046] In the high threshold detection section following the low threshold detection section, after the gate signal is turned on, the input / output terminal voltage detected by the input / output terminal voltage detection unit 24U becomes equal to or lower than the first threshold voltage V th1 A second threshold voltage V th2 Time until it drops to T sr_on_v2 Detect.

[0047] In the dv / dt calculation and control calculation section following the high threshold detection section, the detected time T sr_on_v1 and time T sr_on_v2 The turn-on voltage slew rate is calculated using the above formula, and the gate current, which is the current value of the gate signal, is controlled based on the calculated turn-on voltage slew rate. In the dv / dt calculation & control calculation section, the turn-on voltage slew rate is calculated using the following formula (2).

[0048] JPEG0007643616000002.jpg29164

[0049] In the operation section following the dv / dt calculation & control calculation section, the calculated turn-off voltage slew rate dv off / dt and turn-on voltage slew rate dv on Based on / dt, the gate current, which is the current value of the gate signal, is controlled.

[0050] For example, the turn-off voltage slew rate dv off When the absolute value of / dt is low, the gate current of the gate signal, which is a negative voltage, is increased in the turn-off operation section 90 of the operation section to promote the dispersion of electrons attracted between the drain and source of the switching element 44U. off When the absolute value of / dt is high, the gate current of the gate signal, which is a negative voltage, is reduced in turn-off operation section 90 of the operation section to suppress dispersion of electrons attracted between the drain and source of the switching element 44U.

[0051] For example, the turn-on voltage slew rate dv onWhen the absolute value of / dt is low, the gate current of the gate signal, which is a positive voltage, is increased in the turn-on operation section 92 of the operation section to promote the concentration of electrons between the drain and source of the switching element 44U. on When the absolute value of / dt is high, the gate current of the gate signal, which is a positive voltage, is reduced in turn-on operation section 92 of the operation section to suppress concentration of electrons between the drain and source of the switching element 44U.

[0052] 5 is an explanatory diagram for calculating the current slew rate. The current slew rate includes a turn-on current slew rate that is detected when the gate signal is turned on, and a turn-off current slew rate that is detected when the gate signal is turned off.

[0053] The calculation of the turn-on current slew rate will be described. To calculate the turn-on current slew rate, the device current detected by the device current detection unit 26U after the gate signal is turned on is equal to or smaller than the first threshold current I th1 Time to reach T sr_on_i1 In this embodiment, when the gate signal is turned on and the device current becomes equal to or exceeds the first threshold current I th1 Time to reach T sr_on_v1 The period from when the gate signal is turned off until when it is turned on again after the detection of the low threshold is called the low threshold detection section.

[0054] After the gate signal is turned on again, the device current detected by the device current detection unit 26U becomes equal to or smaller than the first threshold current I th1 A second threshold current I th2 Time to reach T sr_on_i2 In this embodiment, when the gate signal is turned on and the device current becomes the second threshold current I th2 Time to reach T sr_on_i2 The period from when the gate signal is turned off until when it is turned on again after the detection of the high threshold is called the high threshold detection section.

[0055] The section following the high threshold detection section is the detected time T sr_on_i1 and time T sr_on_i2This is the dv / dt calculation & control calculation section in which the turn-on current slew rate is calculated using the above formula, and the gate current, which is the current value of the gate signal, is controlled based on the calculated turn-on current slew rate. In the dv / dt calculation & control calculation section, the turn-on current slew rate is calculated using the following formula (3).

[0056] JPEG0007643616000003.jpg28164

[0057] Next, the calculation of the turn-off current slew rate will be described. To calculate the turn-off current slew rate, the device current detected by the device current detection unit 26U after the gate signal is turned off in the low threshold detection section is calculated by: th1 Time until it drops to T sr_off_i1 Detect.

[0058] In the high threshold detection section following the low threshold detection section, after the gate signal is turned off, the device current detected by the device current detection unit 26U becomes equal to or lower than the first threshold current I th1 A second threshold current I th2 Time until it drops to T sr_off_i2 Detect.

[0059] In the dv / dt calculation and control calculation section following the high threshold detection section, the detected time T sr_off_i1 and time T sr_off_i2 The turn-off current slew rate is calculated using the above formula, and the gate current, which is the current value of the gate signal, is controlled based on the calculated turn-off current slew rate. In the dv / dt calculation & control calculation section, the turn-off current slew rate is calculated using the following formula (4).

[0060] JPEG0007643616000004.jpg28164

[0061] In the operation section following the dv / dt calculation & control calculation section, the calculated turn-on current slew rate di on / dt and turn-off current slew rate dioff Based on / dt, the gate current, which is the current value of the gate signal, is controlled.

[0062] For example, the turn-on current slew rate di on When the absolute value of / dt is low, the gate current of the gate signal, which is a positive voltage, is increased in the turn-on operation section 94 of the operation section to promote the concentration of electrons between the drain and source of the switching element 44U. on When the absolute value of / dt is high, the gate current of the gate signal, which is a positive voltage, is reduced in turn-on operation section 94 of the operation section to suppress concentration of electrons between the drain and source of the switching element 44U.

[0063] For example, the turn-off current slew rate di off When the absolute value of / dt is low, the gate current of the gate signal, which is a negative voltage, is increased in the turn-off operation section 96 of the operation section to promote the dispersion of electrons attracted between the drain and source of the switching element 44U. off When the absolute value of / dt is high, the gate current of the gate signal, which is a negative voltage, is reduced in turn-off operation section 96 of the operation section to suppress dispersion of electrons attracted between the drain and source of the switching element 44U.

[0064] Figure 6 is an explanatory diagram showing the relationship between the voltage slew rate and the current slew rate and the effect on the gate current, combining the above-mentioned Figures 4 and 5 into one figure. As shown in Figure 6, the input / output terminal voltage waveform and the device current waveform have a complementary relationship in that if one increases, the other decreases, and if one increases, the other increases.

[0065] In addition, in the operation section, the timing at which the voltage between the input and output terminals starts to increase is earlier than the timing at which the device current starts to decrease, and the timing at which the device current that has decreased to a minimum value starts to increase again is earlier than the timing at which the voltage between the input and output terminals starts to decrease. Therefore, by dividing the operation section into four sections, such as a first section 98, a second section 100, a third section 102, and a fourth section 104 as shown in Fig. 6, it becomes possible to control the turn-off voltage slew rate in the first section 98, the turn-off current slew rate in the second section 100, the turn-on current slew rate in the third section 102, and the turn-on voltage slew rate in the fourth section 104 to be changed individually.

[0066] As described above, according to this embodiment, the current slew rate and the voltage slew rate can be monitored while suppressing the processing load of the detection information.

[0067] In this embodiment, one cycle is defined as a period from when the gate signal is turned off to when it is turned on and immediately before it is turned off again, or from when the gate signal is turned on to when it is turned off and immediately before it is turned on again. One cycle is defined as a low threshold detection section, and the cycle following the low threshold detection section is defined as a high threshold detection section. th1 or the first threshold current I th1 The detection by the second threshold voltage V th2 or the second threshold current I th2 By performing the detection using the threshold voltage in the high threshold detection section, it is possible to reduce the load on the gate drivers 20U to 22W involved in detecting changes in the control terminal voltages and the like using the threshold voltage.

[0068] Furthermore, by controlling the gate current based on the calculated turn-on voltage slew rate, turn-off voltage slew rate, turn-on current slew rate, and turn-off current slew rate, it is possible to suppress the occurrence of surge voltages and reduce the switching loss of the switching elements 42U to 44W.

[0069] FIG. 7 is an explanatory diagram of a general slew rate calculation in this embodiment. In the case shown in FIG. 7, a series of cycles consisting of low threshold detection, which is a threshold comparison by a low threshold, high threshold detection, which is a threshold comparison by a high threshold, control calculation to calculate a slew rate, and operation of a gate current based on the calculated slew rate, as shown in FIGS. 4 to 6, are repeated as a rule. However, depending on the temperature of the inverter 10, the motor phase current, and the power supply voltage of the DC power supply 80, the series of cycles of low threshold detection, high threshold detection, control calculation, and operation, or any of the low threshold detection, high threshold detection, control calculation, and operation included in such a series of cycles, may be interrupted to reduce the load of the gate drivers 20U to 22W. A modified example of this embodiment will be described below.

[0070] [First Modification] 8 is an explanatory diagram of the case where low threshold detection is limited to the first time. Low threshold detection is performed at least once while the motor 12 is being driven, and the result of the low threshold detection is stored in the RAM 30UC or the like, which is a storage unit of the control unit 30U. Thereafter, high threshold detection, control calculation, and operation are performed as a series of cycles, and in the control calculation, a voltage slew rate or a current slew rate is calculated using the stored result of the low threshold detection and the newly detected result of the high threshold detection, and in the subsequent operation, the gate current is controlled based on the calculated voltage slew rate or current slew rate.

[0071] Fig. 9 is a flow chart showing an example of processing when the low threshold detection shown in Fig. 8 is limited to the first time. In step 800, it is determined whether or not the low threshold detection is the first time. If it is the first time, the procedure proceeds to step 802, and if it is not the first time, the procedure proceeds to step 806.

[0072] In step 802, low threshold detection is performed using a low threshold and the detection result is stored. In steps 804 and 806, high threshold detection is performed using a high threshold.

[0073] In step 808, a voltage slew rate or a current slew rate is calculated using the held detection result of the low threshold detection and the detection result of the high threshold detection detected in step 804 or step 806. Then, in step 810, the gate current is controlled based on the calculated voltage slew rate or current slew rate, and the process ends.

[0074] In this modification, the low threshold detection is limited to the first time, thereby simplifying the series of processes related to the control of the gate current and reducing the load on the gate drivers 20U to 22W.

[0075] [Second modified example] 10 is a flow chart for calculating the slew rate and controlling the gate current when a difference occurs between the high threshold detection and the previous high threshold detection. In this modification, when the voltage slew rate or the current slew rate is calculated in the control calculation section, the detection result of the high threshold detection is stored in the RAM 30UC, which is the storage unit of the control unit 30U, and then the low threshold detection and the high threshold detection are newly performed, and when the difference between the detection result of the newly performed high threshold detection and the detection result of the stored high threshold detection is equal to or greater than a predetermined value, the gate current is controlled based on the voltage slew rate or the current slew rate calculated from the detection result of the newly detected low threshold detection and the detection result of the newly detected high threshold detection. The predetermined value is a value at which a significant change is observed in the voltage slew rate or the current slew rate, and is specifically determined through experiments, etc.

[0076] 10 shows a process in which the detection result of the high threshold detection is stored in advance. In step 900, low threshold detection is performed using a low threshold. In step 902, high threshold detection is performed using a high threshold.

[0077] In step 904, the detection result of the high threshold detection detected in step 902 is compared with the detection result of the high threshold detection held, and it is determined whether the difference between the two is equal to or greater than a predetermined value. If the difference between the two is equal to or greater than the predetermined value in step 904, the procedure proceeds to step 906, and if the difference between the two is not equal to or greater than the predetermined value, the procedure proceeds to step 902, where high threshold detection is performed.

[0078] In step 906, a voltage slew rate or a current slew rate is calculated using the detection result of the low threshold detection in step 900 and the detection result of the high threshold detection in step 902. Then, in step 908, the gate current is controlled based on the calculated voltage slew rate or current slew rate, and the process ends.

[0079] In this modified example, when a newly acquired high threshold detection result is found to be different from the previous value, the voltage slew rate or current slew rate is calculated and the gate current is controlled, thereby simplifying the series of processes related to the control of the gate current and reducing the load on the inverter 10 or the gate drivers 20U to 22W.

[0080] [Third modified example] 11 is an explanatory diagram of slew rate calculation by comparing four or more thresholds. In this modification, when detecting a voltage slew rate, a difference between adjacent threshold voltages for each of a plurality of different threshold voltages is divided by the difference in time from when the gate signal changes from on to off or from off to on until the voltage detected by the input / output terminal voltage detection unit 24U reaches a threshold voltage related to the difference between the threshold voltages to calculate a plurality of voltage slew rates. Then, the gate current is controlled based on the rate of change in the time series of the calculated plurality of voltage slew rates.

[0081] In the example shown in FIG. 11, the threshold voltage V th1a , V th2a , V th3a , V th4a The four threshold voltages are set as follows. The combination of adjacent threshold voltages is V th1a and V th2a , V th2a and V th3a , and V th3a and V th4a In this modified example, V th2a and V th1a Difference V th2a -V th1a The voltage detected by the input / output terminal voltage detection unit 24U is equal to the threshold voltage Vth1a , V th2a The initial slew rate is calculated by dividing the time by T2-T1, which is the difference between the time T1 and T2 until each of the inputs reaches the threshold.

[0082] JPEG0007643616000005.jpg33112

[0083] In addition, in this modified example, V th3a and V th2a Difference V th3a -V th2a The voltage detected by the input / output terminal voltage detection unit 24U is equal to the threshold voltage V th2a , V th3a The medium-term slew rate is calculated by dividing the time by T3-T2, which is the difference between the time T2 and T3 taken to reach each of these values.

[0084] JPEG0007643616000006.jpg35113

[0085] Furthermore, in this modified example, V th4a and V th3a Difference V th4a -V th3a The voltage detected by the input / output terminal voltage detection unit 24U is equal to the threshold voltage V th3a , V th4a The later slew rate is calculated by dividing the time by T4-T3, which is the difference between the times T3 and T4 taken to reach these points.

[0086] JPEG0007643616000007.jpg40112

[0087] In this modification, the change rate of the initial slew rate, the middle slew rate, and the late slew rate calculated as described above is calculated, so that the change in the slew rate from the beginning to the end of the rising edge of the waveform of the voltage between the input and output terminals when the gate current is the same can be grasped. As an example of the change rate of the initial slew rate, the middle slew rate, and the late slew rate, the difference between the initial slew rate and the middle slew rate, and the difference between the middle slew rate and the late slew rate are calculated, respectively. Furthermore, the change rate of the slew rate may be grasped by calculating the difference between the initial slew rate and the middle slew rate and the difference between the middle slew rate and the late slew rate.

[0088] FIG. 11 shows a case where a voltage slew rate is calculated, but the procedure is similar when calculating a current slew rate. When calculating a current slew rate, the threshold current I th1a , I th2a , I th3a , I th4a The four threshold currents are set as follows. The combination of adjacent threshold currents is I th1a and I th2a , I th2a and I th3a , and I th3a and I th4a In this modified example, I th2a and I th1a Difference with I th2a -I th1a The current detected by the element current detection unit 26U is the threshold current I th1a , I th2a The initial slew rate is calculated by dividing the time by T2-T1, which is the difference between the times T1 and T2 taken to reach these values.

[0089] Similarly, I th3a and I th2a Difference with I th3a -I th2a The current detected by the element current detection unit 26U is the threshold current I th2a , I th3a The medium-term slew rate is calculated by dividing the time T2 and T3 by the difference T3-T2, which is the difference between the times T2 and T3 until the th4a and I th3a Difference with I th4a -Ith3a The current detected by the element current detection unit 26U is the threshold current I th3a , I th4a The latter slew rate is calculated by dividing the latter slew rate by T4-T3, which is the difference between the times T3 and T4 taken to reach these points.

[0090] Then, the change rates of the calculated initial slew rate, intermediate slew rate, and final slew rate are calculated in the same manner as in the case of the voltage slew rate.

[0091] [Fourth Variation] 12 is an explanatory diagram of the case where low threshold detection and high threshold detection are performed when the motor phase currents are approximately the same. As described above, in actual motor rotation control, a three-phase AC-like voltage is generated and applied to the coils of each phase of the motor 12 by PWM control that turns on and off each of the switching elements 42U to 44W in short bursts, so that the motor phase currents supplied to the motor 12 change in an approximately sinusoidal shape as shown in the middle part of FIG. 12. When the motor phase currents are different, the waveform of the voltage between the input and output terminals, V ds The waveforms are also different. V at the timing when the motor phase current is high ds The waveform tends to be steep as shown in the upper part of Fig. 12. In addition, V ds As shown in the lower part of Figure 12, the waveform shows that V ds It tends to be gentler than the waveform.

[0092] As shown in Figure 12, at different timings, the motor phase currents are ds In this modification, the voltage slew rate is calculated by performing low threshold detection and high threshold detection at the timing when the motor phase currents appearing in each electrical angle period are approximately the same. ds Since the waveforms are almost the same, the voltage slew rate can be calculated with high accuracy, and as a result, the gate current can be controlled with high accuracy. The timing at which the motor phase currents become almost the same is detected as the same timing within an electrical angle period by counting the control clock of the control unit 30U, for example.

[0093] Furthermore, by detecting the timing at which the motor phase currents become substantially the same for each electrical angle period and performing low threshold detection and high threshold detection, the load on the gate drivers 20U to 22W can be reduced.

[0094] In this modification, a case where a voltage slew rate is calculated has been shown, but a current slew rate can also be calculated in a similar manner.

[0095] [Fifth Variation] 13 is an explanatory diagram of a case where low threshold detection and high threshold detection are performed when the motor phase current is approximately the same in the same electrical angle period. The motor phase current, which changes in an approximately sinusoidal manner, will have the same value twice in the same electrical angle period unless it is a maximum or minimum value. In this modification, low threshold detection and high threshold detection are performed at approximately the same timing for the motor phase current that appears twice in the same electrical angle period to calculate the voltage slew rate. As described above, at the timing when the motor phase current is approximately the same, V ds Since the waveforms are almost the same, the voltage slew rate can be calculated with high accuracy, and as a result, the gate current can be controlled with high accuracy.

[0096] The timing at which the motor phase currents become substantially the same within the same electrical angle period is detected, for example, by counting the control clocks of the control unit 30U within the electrical angle period.

[0097] Furthermore, since the timing at which the motor phase currents become approximately the same within the same electrical angle period is longer than the switching period of the switching elements 42U-44W under PWM control, the frequency of low threshold detection and high threshold detection per unit time can be reduced, and as a result, the load on the gate drivers 20U-22W can be reduced.

[0098] In this modification, a case where a voltage slew rate is calculated has been shown, but a current slew rate can also be calculated in a similar manner.

[0099] [Sixth Variation] Fig. 14 is an explanatory diagram of a case where a thinning interval is provided between low threshold detection and high threshold detection. In this embodiment, as shown in Fig. 7, low threshold detection, high threshold detection, control calculation for calculating a voltage slew rate or a current slew rate, and gate current manipulation are performed every time the switching elements 42U to 44W are switched under PWM control, but such operations pose a problem in terms of the load on the gate drivers 20U to 22W.

[0100] In this modification, as shown in Fig. 14, after low threshold detection, a thinning-out section is provided in which high threshold detection is not performed, and high threshold detection is performed following the thinning-out section. The thinning-out section is performed, for example, by the control unit 30U outputting an operation stop signal to each of the input / output terminal voltage detection unit 24U and the element current detection unit 26U. After high threshold detection, a control calculation is performed through the thinning-out section, and after the control calculation, an operation is performed through the thinning-out section. Then, after the operation, low threshold detection is performed again through the thinning-out section. The thinning-out section is a section that includes at least one switching operation, and may extend to multiple switching operations.

[0101] As shown in FIG. 14, by providing a thinning-out section in which no detection, calculation, or operation is performed, the load on the gate drivers 20U to 22W can be reduced.

[0102] [Seventh Variation] Fig. 15 is an explanatory diagram of a case where a thinning-out section in which threshold detection is not performed is provided after controlling the gate current. As shown in Fig. 15, by providing a thinning-out section in which detection, calculation, and manipulation are not performed for at least one switching operation after manipulating the gate current, the load on the gate drivers 20U to 22W can be reduced.

[0103] [Second embodiment] 16 is a block diagram showing an example of the configuration of a gate driver 122U provided at the gate of a switching element 44U according to the present embodiment. The gate driver 122U according to the present embodiment differs from the gate driver 22U according to the first embodiment in that it detects a slew rate based on the control terminal voltage of the switching element 44U. Furthermore, like the gate driver 120U, the gate driver according to the present embodiment has other gate drivers provided at each of the switching elements 42U to 44W. However, the gate driver 122U will be described as a representative example, and descriptions of the other gate drivers will be omitted.

[0104] As shown in FIG. 16, the gate driver 122U according to this embodiment controls the control terminal voltage (gate-source voltage V gs ) in association with time information, and a device current (drain current I d The second embodiment includes a load current detector 132U for detecting a load current IL when the load current IL is constant at a high level, and a power supply voltage detector 134U for detecting a power supply voltage VH of the DC power supply 80. The detection processor 128U converts the detection signals of the control terminal voltage detector 124U, the load current detector 132U, and the power supply voltage detector 134U into signals in a format that can be processed by the control unit 130U described later. The control unit 130U performs a control calculation of a gate signal to be applied to the gate of the switching element 44U based on a slew rate target value input from a higher-level control device and the output of the detection processor 128U. The second embodiment differs from the first embodiment in that the control unit 130U performs a control calculation of a gate signal to be applied to the gate of the switching element 44U based on a slew rate target value input from a higher-level control device and the output of the detection processor 128U. However, the other components are denoted by the same reference numerals as those in the first embodiment, and detailed descriptions thereof will be omitted. The configuration of the control unit 130U is also substantially the same as that of the control unit 30U shown in FIG. 3, and detailed descriptions thereof will be omitted. The control terminal voltage detector 124U detects time information using, for example, a control clock of the control unit 130U.

[0105] For example, the load current detection unit 132U may detect a current value based on a potential difference between both ends of a shunt resistor, or may calculate a current value based on an induced current generated by energization between the node 46U and the motor 12. In this embodiment, the element current detection unit 26U of the first embodiment may be provided instead of the load current detection unit 132U. This is because the load current IL is an element current detected when the switching element 44U is turned on. In addition, since the load current IL is a value specific to the switching element 44U, a constant specific to the switching element 44U may be used instead of the detection value by the load current detection unit 132U.

[0106] Detection processing unit 128U is a circuit including a type of A / D converter that converts the detection signals of control terminal voltage detection unit 124U, load current detection unit 132U, and power supply voltage detection unit 134U, for example, into digital signals that can be processed by control unit 130U when the respective detection signals are analog signals.

[0107] Instead of the power supply voltage detection unit 134U, the input / output terminal voltage detection unit 124U of the first embodiment may be provided. This is because the power supply voltage VH is the voltage between the input / output terminals that is detected when the switching element 44U is turned off. In addition, since the power supply voltage VH is a value according to the specifications of the DC power supply 80, when the output of the DC power supply 80 is stable, the nominal voltage of the DC power supply 80 may be used as the power supply voltage VH instead of the value detected by the power supply voltage detection unit 134U or the like.

[0108] Fig. 17 is an explanatory diagram showing an overview of slew rate detection using a control terminal voltage. Fig. 17 shows the time-series changes in the gate signal, the control terminal voltage, the voltage between the input / output terminals, and the element current in the same manner as Fig. 19 described above. In this embodiment, the slew rate is detected by utilizing the fact that the following information (1) and (2) appear in the control terminal voltage.

[0109] (1) Drain current transition period T1 from when the control terminal voltage reaches the gate threshold voltage to when it reaches the mirror voltage and becomes constant. (2) Drain-source voltage transition period T2, which corresponds to the Miller period.

[0110] In this embodiment, the first cycle threshold V th1c , 2nd cycle threshold V th2c , and the third cycle threshold V th3c Set the threshold voltages of the three control terminals. First cycle threshold V th1c is the gate threshold voltage V th The second cycle threshold V th2c is the mirror voltage V m is approximated by the mirror voltage V m The third cycle threshold V th3c is the mirror voltage V m is approximated by the mirror voltage V m is greater than.

[0111] The mirror voltage is calculated by the following formula: V th is the gate threshold voltage, IL is the load current at which the element current becomes constant at the high level, and gm is the mutual conductance (change in element current with respect to change in control terminal voltage). V m =V th +IL / gm

[0112] In this embodiment, the current slew rate di / dt is derived by dividing the load current IL by the drain current transition period T1, and the voltage slew rate dv / dt is derived by dividing the power supply voltage VH by the drain-source voltage transition period T2.

[0113] As explained using Figure 19, when the gate signal turns off, the voltage between the input and output terminals increases and the element current decreases, entering the turn-off period. As with the turn-on period, during the turn-off period, the current slew rate di / dt can be derived from the drain current transition period T1 and the load current IL, and the voltage slew rate dv / dt can be derived from the drain-source voltage transition period T2 and the power supply voltage VH.

[0114] In FIG. 17, when the gate signal 1 is turned on or off, the first cycle threshold V th1c , 2nd cycle threshold Vth2c , and the third cycle threshold V th3c In this embodiment, however, the first cycle threshold V th1c , 2nd cycle threshold V th2c , and the third cycle threshold V th3c The detection using each of the thresholds is performed when the gate signal is turned on or off at different timings.

[0115] 18 is an explanatory diagram showing an example of calculation of the voltage slew rate and the current slew rate by the control terminal voltage, and control of the gate current. In this embodiment, one cycle is defined as a period from when the gate signal is turned off to when it is turned on, and immediately before it is turned off again. One cycle is defined as a first threshold detection section, a cycle following the first threshold detection section is defined as a second threshold detection section, and a cycle following the second threshold detection section is defined as a third threshold detection section.

[0116] In the first threshold detection section, the control terminal voltage is the first cycle threshold V after the gate signal is turned off. th1c , the time it takes to reach T sr_off_1 In the first threshold detection section, the control terminal voltage is detected as the first cycle threshold V th1c Time required to reach T sr_on_1 Detect.

[0117] In the second threshold detection section, the control terminal voltage reaches the second cycle threshold V th2c , the time it takes to reach T sr_off_2 In the second threshold detection section, the control terminal voltage is detected as the second cycle threshold V th2c Time required to reach T sr_on_2 Detect.

[0118] In the third threshold detection section, the control terminal voltage reaches the threshold Vth3c , the time it takes to reach T sr_off_3 In the third threshold detection section, the control terminal voltage exceeds the threshold V th3c Time required to reach T sr_on_3 Detect.

[0119] In the slew rate calculation and control operation section, the turn-off voltage slew rate, the turn-on voltage slew rate, the turn-off current slew rate, and the turn-on current slew rate are calculated using the time detected in each of the first threshold detection section, the second threshold detection section, and the third threshold detection section, the power supply voltage VH detected by the power supply voltage detection unit 134U, and the load current IL detected by the load current detection unit 132U.

[0120] The turn-off voltage slew rate is calculated by the following formula (5): The denominator of formula (5) corresponds to the aforementioned drain-source voltage transition period T2.

[0121] JPEG0007643616000008.jpg26164

[0122] The turn-on voltage slew rate is calculated by the following formula (6). The denominator of formula (6) corresponds to the drain-source voltage transition period T2 described above, but the power supply voltage VH is a positive value and the turn-on voltage slew rate is a negative value, so the denominator is the time T sr_on_2 From time T sr_on_3 By subtracting, the denominator is made negative.

[0123] JPEG0007643616000009.jpg27164

[0124] The turn-off current slew rate is calculated by the following formula (7). The denominator of formula (7) corresponds to the drain current transition period T1 described above, but the load current IL is a positive value and the turn-off current slew rate is a negative value, so the denominator is the time T sr_off_2 From time T sr_off_1 By subtracting, the denominator is made negative.

[0125] JPEG0007643616000010.jpg28164

[0126] The turn-on current slew rate is calculated by the following formula (8): The denominator of formula (8) corresponds to the aforementioned drain current transition period T1.

[0127] JPEG0007643616000011.jpg28164

[0128] In the operation section, the gate current, which is the current value of the gate signal, is controlled based on the calculated turn-off voltage slew rate, turn-on voltage slew rate, turn-off current slew rate, and turn-on current slew rate. The manner of controlling the gate current is the same as in the first embodiment, so a detailed description will be omitted.

[0129] As described above, according to this embodiment, the turn-off voltage slew rate, the turn-on voltage slew rate, the turn-off current slew rate, and the turn-on current slew rate can each be calculated based on the power supply voltage VH and the load current IL, which have constant detection values ​​and can be stably detected.

[0130] The times for calculating the turn-off voltage slew rate, the turn-on voltage slew rate, the turn-off current slew rate, and the turn-on current slew rate are determined based on the first cycle threshold V th1c , 2nd cycle threshold V th2c , and the third cycle threshold V th3c The voltages are detected by applying the thresholds of the three control terminal voltages. In this embodiment, one cycle is defined as the period from when the gate signal is turned off, when it is turned on, and immediately before it is turned off again. One cycle is defined as the first threshold detection section, the cycle following the first threshold detection section is defined as the second threshold detection section, and the cycle following the second threshold detection section is defined as the third threshold detection section. The first cycle threshold V th1cThe timing to detect the change in the control terminal voltage using the first threshold detection section is defined as the first threshold detection section, and the second cycle threshold V th2c The timing to detect the change in the control terminal voltage using the second threshold detection section is set as the second threshold detection section, and the third cycle threshold V th3c By setting the timing for detecting a change in the control terminal voltage using the threshold to the third threshold detection period, it is possible to reduce the load on the gate drivers 20U to 22W involved in detecting a change in the control terminal voltage using the threshold. <Additional Notes> The features of the present invention are as follows. (Appendix 1) a voltage detection unit (24U) that detects voltage time series information indicating a time change in voltage of the input / output terminal of a switching element (44U) that includes a control terminal and an input / output terminal and switches between the input / output terminals in response to an electrical signal applied to the control terminal; a current detection unit (26U) that detects current time series information indicating a time change of an element current of the switching element (44U); a control unit (30U) that controls a current value of the electric signal based on either a voltage slew rate that is derived based on first voltage time series information detected by the voltage detection unit (24U) during a first switching of the switching element (44U) and second voltage time series information detected by the voltage detection unit (24U) during a second switching different from the first switching and indicates a voltage change rate between the input / output terminals, or a current slew rate that is derived based on first current time series information detected by the current detection unit (26U) during the first switching and second current time series information detected by the current detection unit (26U) during the second switching and indicates a change rate of the element current; A switching element drive circuit including: (Appendix 2) The control unit (30U) calculates the voltage slew rate by dividing a voltage difference between a first threshold voltage and a second threshold voltage greater than the first threshold voltage by a time difference between a first voltage time extracted from the first voltage time series information, the first voltage time being a time from the time the electrical signal changes until the voltage of the input / output terminal reaches the first threshold voltage, and a second voltage time extracted from second voltage time series information, the second voltage time being a time from the time the electrical signal changes until the voltage of the input / output terminal reaches the second threshold voltage. (Appendix 3) The control unit (30U) calculates the current slew rate by dividing a current difference between a first threshold current and a second threshold current greater than the first threshold current by a time difference between a first current time extracted from the first current time series information, the first current time being a time from the time the electrical signal changes until the element current reaches the first threshold current, and a second current time extracted from the second current time series information, the second current time being a time from the time the electrical signal changes until the element current reaches the second threshold current. (Appendix 4) The control unit (30U) stores the first voltage time in a memory unit (30UC), and then detects the second voltage time a plurality of times, and calculates a plurality of the voltage slew rates using each of the second voltage times detected a plurality of times and the first voltage time stored in the memory unit (30UC). (Appendix 5) The control unit (30U) stores the first current time in a memory unit (30UC), and then detects the second current time a plurality of times, and calculates a plurality of the current slew rates using each of the second current times detected a plurality of times and the first current time stored in the memory unit (30UC). (Appendix 6) The control unit (30U) stores the second voltage time related to the calculation of the voltage slew rate in the memory unit (30UC), and then newly detects a first voltage time and a second voltage time, and when a difference between the newly detected second voltage time and the second voltage time stored in the memory unit (30UC) is equal to or greater than a predetermined value, controls the current value of the electrical signal based on the voltage slew rate calculated using the newly detected first voltage time and second voltage time. (Appendix 7) The control unit (30U) stores the second current time related to the calculation of the current slew rate in the memory unit (30UC), and then newly detects the first current time and the second current time, and when a difference between the newly detected second current time and the second current time stored in the memory unit (30UC) is equal to or greater than a predetermined value, controls the current value of the electrical signal based on the current slew rate calculated from the newly detected first current time and the second current time. (Appendix 8) The control unit (30U) extracts, from each of a plurality of voltage time series information detected during each of different switching of the switching element (44U), a time from when the electrical signal changes until it reaches each of the plurality of different threshold voltages, corresponding to each of the plurality of different threshold voltages, calculates a plurality of voltage slew rates by dividing a difference between threshold voltages having adjacent values ​​by a difference in each of the times from when the electrical signal changes until it reaches the adjacent threshold voltage, and controls a current value of the electrical signal based on a rate of change in the time series of the plurality of voltage slew rates. (Appendix 9) The control unit (30U) extracts, from each of a plurality of current time series information detected in each of different switching of the switching element (44U), a time from when the electrical signal changes until the respective different threshold currents are reached, corresponding to a respective plurality of different threshold currents, and calculates a plurality of current slew rates by dividing a difference between threshold currents having adjacent values ​​by a difference in each time from when the electrical signal changes until the respective values ​​reach adjacent threshold currents, and controls a current value of the electrical signal based on a rate of change in the time series of the plurality of current slew rates. (Appendix 10) 4. The switching element drive circuit according to claim 1, wherein the second switching is subsequent to the first switching. (Appendix 11) The switching element drive circuit according to any one of appendix 1 to 3, wherein the second switching is switching at a timing occurring at each electrical angle period during which the current supplied from the switching element (44U) to the power load (12) is substantially the same as the current supplied from the switching element (44U) to the power load (12) during the first switching. (Appendix 12) The switching element drive circuit according to any one of appendix 1 to 3, wherein the second switching is performed at a timing when a current supplied from the switching element (44U) to the power load (12) becomes substantially the same as a current supplied from the switching element (44U) to the power load (12) during the first switching, in the same electrical angle period. (Appendix 13) The switching element drive circuit according to any one of claims 1 to 3, wherein after the first switching, a thinning-out section in which detection by each of the voltage detection unit (24U) and the current detection unit (26U) is stopped is provided for at least one switching. (Appendix 14) The switching element drive circuit according to any one of appendices 1 to 3, wherein after the calculation of the voltage slew rate and the current slew rate, a thinning-out section is provided for at least one switching operation, during which detection by each of the voltage detection unit (24U) and the current detection unit (26U) and calculation of the voltage slew rate and the current slew rate by the control unit (30U) are stopped. (Appendix 15) a control terminal voltage detection unit (124U) that includes a control terminal and an input / output terminal, and detects control terminal voltage time series information indicating a time change in a voltage of the control terminal of a switching element (44U) that is switched between the input / output terminals in response to an electrical signal applied to the control terminal; a control unit (130U) that controls a current value of the electrical signal based on either a current slew rate that is derived based on a drain current transition period during which the voltage of the control terminal extracted from the control terminal voltage time-series information reaches a mirror voltage from a gate threshold voltage of the switching element (44U) and indicates a rate of change of an element current of the switching element (44U), or a voltage slew rate that is derived based on a mirror period during which the voltage of the control terminal extracted from the control terminal voltage time-series information becomes the mirror voltage and indicates a rate of change of voltage between the input / output terminals; A switching element drive circuit including: (Appendix 16) The control unit (130U) determines as the drain current transition period a difference between a first time from a first timing at which the electrical signal changes from on to off or off to on until the voltage of the control terminal reaches the gate threshold voltage and a second time from a second timing at which the electrical signal changes from on to off or off to on after the first timing until the voltage of the control terminal reaches a control terminal threshold voltage that is greater than the gate threshold voltage and smaller than the mirror voltage and approximates the mirror voltage, and calculates the current slew rate by dividing the load current of the switching element (44U) by the drain current transition period. (Appendix 17) The control unit (130U) determines as the mirror period the difference between the second time and a third time from a third timing at which the electrical signal changes from on to off or from off to on after the second timing until the voltage of the control terminal reaches another control terminal threshold voltage that is greater than the mirror voltage and approximates the mirror voltage, and calculates the voltage slew rate by dividing the power supply voltage by the mirror period. [Explanation of symbols]

[0131] 10 inverter, 12 motor, 22U gate driver, 24U input / output terminal voltage detection unit, 26U element current detection unit, 30U control unit, 32U operation unit, 32UF, 32UO variable resistor, 44U switching element, 90 turn-off operation section, 92 turn-on operation section, 94 turn-on operation section, 96 turn-off operation section, 122U gate driver, 124U control terminal voltage detection unit, 124U input / output terminal voltage detection unit, 130U control unit, 132U load current detection unit, 134U power supply voltage detection unit, I d Drain current, I th1 First threshold current, I th2 Second threshold current, I th1a I th2a , I th3a , I th4a Threshold current, IL Load current, T1 Drain current transition period, T2 Drain-source voltage transition period, T1, T2, T3, T4, T sr_off_1 , T sr_off_2 , T sr_off_3 , T sr_on_1 , T sr_on_2 , T sr_on_3 , T sr_off_v1 , T sr_off_v2 , T sr_on_v1 , T sr_on_v2 , T sr_off_i1 , T sr_off_i2 , T sr_on_i1 , T sr_on_i2 time, V ds Drain-source voltage, V gs Gate-source voltage, V m Mirror voltage, V th Gate threshold voltage, Vth1 First threshold voltage, V th2 Second threshold voltage, V th1a , V th2a , V th3a , V th4a Threshold voltage, V th1c 1st cycle threshold, V th2c 2nd cycle threshold, V th3c 3rd cycle threshold, VH power supply voltage

Claims

1. a control terminal voltage detection unit (124U) that detects control terminal voltage time series information indicating a time change in a voltage of a control terminal of a switching element (44U) that includes a control terminal and an input / output terminal and switches between the input / output terminals in response to an electrical signal applied to the control terminal; a control unit (130U) that controls a current value of the electrical signal based on either a current slew rate that is derived based on a drain current transition period during which the voltage of the control terminal extracted from the control terminal voltage time-series information reaches a mirror voltage from a gate threshold voltage of the switching element and indicates a rate of change of the element current of the switching element, or a voltage slew rate that is derived based on a mirror period during which the voltage of the control terminal extracted from the control terminal voltage time-series information becomes the mirror voltage and indicates a rate of change of voltage between the input / output terminals; A switching element drive circuit including:

2. 2. The switching element drive circuit according to claim 1, wherein the control unit (130U) determines as the drain current transition period a difference between a first time from a first timing at which the electrical signal changes from on to off or off to on until the voltage of the control terminal reaches the gate threshold voltage and a second time from a second timing at which the electrical signal changes from on to off or off to on after the first timing until the voltage of the control terminal reaches a control terminal threshold voltage that is greater than the gate threshold voltage and smaller than the mirror voltage and approximates the mirror voltage, and calculates the current slew rate by dividing the load current of the switching element (44U) by the drain current transition period.

3. 3. The switching element drive circuit according to claim 2, wherein the control unit (130U) determines, as the mirror period, a difference between the second time and a third time from a third timing at which the electrical signal changes from on to off or from off to on after the second timing until the voltage of the control terminal reaches another control terminal threshold voltage that is greater than the mirror voltage and approximates the mirror voltage, and calculates the voltage slew rate by dividing a power supply voltage by the mirror period.

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