Filters and Multiplexers

Abstract

To provide a filter capable of stabilizing filter characteristics.SOLUTION: A filter has an input terminal Tin, an output terminal Tout, a first ground terminal Tg1, a second ground terminal Tg2, a first inductor L1 having one end connected to a first node N1 in a path between the input terminal Tin and the output terminal Tout, and the other end connected to a second node N2, a second inductor L2 having one end connected to the second node N2 and the other end connected to the first ground terminal Tg1, and a third inductor L3 having one end connected to the second node N2 and the other end connected to the second ground terminal Tg2.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to filters and multiplexers, for example filters and multiplexers having shunt-connected inductors. [Background technology]

[0002] A filter is known in which an inductor is shunt-connected in a path between an input terminal and an output terminal (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-129683 A Summary of the Invention [Problem to be solved by the invention]

[0004] When a filter is mounted on a circuit board or evaluation board, parasitic inductance occurs between the ground terminal of the filter and the board. If the method of mounting the filter on the board is different, the parasitic inductance will be different. This will result in different filter characteristics depending on the mounting method.

[0005] The present invention has been made in consideration of the above-mentioned problems, and has an object to stabilize filter characteristics. [Means for solving the problem]

[0006] The present invention is a filter comprising an input terminal, an output terminal, a first ground terminal, a second ground terminal, a first inductor having one end connected to a first node in a path between the input terminal and the output terminal and the other end connected to a second node, a second inductor having one end connected to the second node and the other end connected to the first ground terminal, and a third inductor having one end connected to the second node and the other end connected to the second ground terminal.

[0007] In the above configuration, the filter can be a high-pass filter having a pass band, and can be configured to include the first inductor, the second inductor, and the third inductor, and to have a resonant circuit that forms a local minimum of an attenuation pole at a frequency lower than the pass band.

[0008] In the above configuration, the input terminal may include a first capacitor and a second capacitor connected in series between the input terminal and the output terminal, and a capacitive element connected in parallel with the first capacitor and the second capacitor between the input terminal and the output terminal, and the first node may be a node between the first capacitor and the second capacitor and may be connected to the capacitive element via the first capacitor and the second capacitor.

[0009] In the above configuration, the filter can be a high-pass filter having a pass band, and the first inductor, the second inductor, the third inductor, the first capacitor, the second capacitor and the capacitive element can be configured to form a first minimum of a first attenuation pole at a frequency lower than the pass band.

[0010] In the above configuration, the capacitive element may be an acoustic wave resonator, and the acoustic wave resonator may form a second minimum of a second attenuation pole between the first minimum and the pass band.

[0011] In the above configuration, the amplifier may be configured to include a first capacitor and a second capacitor connected in series between the input terminal and the output terminal, and a third capacitor connected in series with the first inductor between the first node and the second node.

[0012] In the above configuration, the smaller inductance of the second inductor and the third inductor may be 0.1 or more times the larger inductance of the second inductor and the third inductor.

[0013] In the above configuration, the inductance of the first inductor may be larger than the larger inductance of the second inductor and the third inductor.

[0014] The above configuration may further include a third ground terminal, and a fourth inductor having one end connected to the second node and the other end connected to the third ground terminal.

[0015] In the above configuration, the semiconductor device may include a laminate in which a plurality of dielectric layers are stacked, the first inductor, the second inductor and the third inductor are formed within the laminate, and the first ground terminal and the second ground terminal are formed on the same surface of the laminate.

[0016] The present invention is a multiplexer including the above filter. Effect of the Invention

[0017] According to the present invention, the filter characteristics can be stabilized. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a circuit diagram of a filter in accordance with a first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of the laminate in the first embodiment mounted on a substrate. [Diagram 3] 3(a) to 3(f) are plan views of the dielectric layer in the first embodiment. [Figure 4] FIG. 4 is a circuit diagram of a filter according to a first comparative example. [Diagram 5] 5(a) and 5(b) are diagrams showing the pass characteristics of the filters A1 to A3 in the simulation 1. FIG. [Figure 6] 6(a) and 6(b) are diagrams showing the pass characteristics of the filters B1 to B4 in the simulation 2. In FIG. [Figure 7] Fig. 7(a) is a diagram showing the pass characteristics of filters A1, A3, B4 and C1 to C5 in simulation 3. Fig. 7(b) is a diagram showing the rate of change with respect to L2 / L3 in simulation 3. [Figure 8] Fig. 8(a) is a diagram showing the pass characteristics of filters A1, A2, B2 and D1 to D5 in simulation 3. Fig. 8(b) is a diagram showing the rate of change with respect to L2 / L3 in simulation 3. [Figure 9] FIG. 9 is a circuit diagram of a filter according to a first modification of the first embodiment. [Figure 10] 10(a) and 10(b) are plan views of a dielectric layer in the first modified example of the first embodiment. [Figure 11] FIG. 11 is a diagram showing the fluctuation rates for L2 / L3 and L2 / L4 in Simulation 4. [Figure 12] FIG. 12 is a circuit diagram of a filter according to a second modification of the first embodiment. [Figure 13] FIG. 13(a) is a plan view of an acoustic wave resonator according to Modification 2 of the first embodiment, and FIG. 13(b) is a cross-sectional view of another acoustic wave resonator according to Modification 2 of the first embodiment. [Figure 14] FIG. 14 is a diagram illustrating the pass characteristic of the filter according to the second modification of the first embodiment. [Figure 15] FIG. 15 is a circuit diagram of a filter according to a third modification of the first embodiment. [Figure 16] FIG. 16 is a circuit diagram of a triplexer in accordance with the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, embodiments of the present invention will be described with reference to the drawings. EXAMPLES

[0020] Example 1 is an example of a high-pass filter. FIG. 1 is a circuit diagram of the filter according to Example 1. As shown in FIG. 1, in the filter 100 according to Example 1, capacitors C1 and C2 are connected in series between the input terminal Tin and the output terminal Tout. Between the input terminal Tin and the output terminal Tout, a capacitor C3 is connected in parallel to the capacitors C1 and C2. The node between the capacitors C1 and C2 is a node N1. The node to which the capacitors C1 and C3 are connected is a node N3. The node to which the capacitors C2 and C3 are connected is a node N4. The node N1 is connected to the capacitor C3 only through the capacitors C1 and C2. That is, the node N1 is not connected to the capacitor C3 without the capacitors C1 and C2.

[0021] The inductor L1 is shunt-connected to a path between the input terminal Tin and the output terminal Tout. One end of the inductor L1 is connected to a node N1, and the other end is connected to a node N2. One end of the inductor L2 is connected to the node N2, and the other end is connected to a ground terminal Tg1. One end of the inductor L3 is connected to the node N2, and the other end is connected to a ground terminal Tg2. The ground terminal Tg1 is connected to the ground via a parasitic inductance Lg1, and the ground terminal Tg2 is connected to the ground via a parasitic inductance Lg2. The filter 100 passes signals in the pass band among the high-frequency signals input to the input terminal Tin to the output terminal Tout, and suppresses signals of other frequencies.

[0022] FIG. 2 is a cross-sectional view of the laminate in the first embodiment mounted on a substrate. As shown in FIG. 2, the laminate 10 includes a plurality of dielectric layers 11a to 11f. A terminal 14 is provided on the lower surface of the laminate 10. A terminal 22 is provided on the substrate 20. The terminal 14 and the terminal 22 are bonded by a bonding material 24. The substrate 20 is, for example, a circuit board or a testing substrate. The testing substrate is a substrate used when testing at least a part of the filter 100 formed on the laminate 10. When testing at least a part of the filter 100, for example, a conductive sheet is used as the bonding material 24. When mounting the laminate 10 on the substrate 20, for example, solder is used as the bonding material 24. A path from the terminal 14 to the terminal 22 via the bonding material 24 forms parasitic inductances Lg1 and Lg2.

[0023] Fig. 3(a) to Fig. 3(f) are plan views of the dielectric layers in Example 1. Fig. 3(a) to Fig. 3(e) are plan views of the dielectric layers 11b to 11f, respectively, as viewed from above. Fig. 3(f) is a plan view of the terminal 14 seen through the dielectric layer 11f. The dielectric layer 11a is omitted from the illustration.

[0024] As shown in Figures 3(a) to 3(f), conductor patterns 12b to 12f are provided on dielectric layers 11b to 11f, respectively, and via wirings 13b to 13f are provided penetrating the dielectric layers 11b to 11f, respectively. As shown in Figure 3(a), conductor pattern 12b provided on dielectric layer 11b forms line L1a. As shown in Figure 3(b), conductor pattern 12c provided on dielectric layer 11c forms line L1b. Lines L1a and L1b are electrically connected by via wiring 13b to form inductor L1.

[0025] As shown in Fig. 3(c), a conductor pattern 12d provided on the dielectric layer 11d forms upper electrodes C1a and C2a of the capacitors C1 and C2, respectively. As shown in Fig. 3(d), a conductor pattern 12e provided on the dielectric layer 11e forms lower electrodes C1b and C2b of the capacitors C1 and C2, respectively. The dielectric layer 11d and the electrodes C1a and C1b sandwiching the dielectric layer 11d form a capacitor C1, and the dielectric layer 11d and the electrodes C2a and C2b sandwiching the dielectric layer 11d form a capacitor C2.

[0026] As shown in FIG. 3(e), the conductor pattern 12f provided on the dielectric layer 11f forms inductors L2 and L3. As shown in FIG. 3(f), the terminals 14 provided on the lower surface of the dielectric layer 11f form an input terminal Tin', an output terminal Tout', and ground terminals Tg1 and Tg2. The laminate 10 does not include a capacitor C3, and the input terminal Tin' and the output terminal Tout' correspond to the nodes N3 and N4 in FIG. 1. The capacitor C3 may be mounted on the substrate 20 in FIG. 2, for example, or may be mounted on the laminate 10. The capacitor C3 may be provided within the laminate 10.

[0027] The dielectric layers 11a to 11f are made of, for example, a ceramic material and contain, as a main component, for example, oxides of Si, Ca, and Mg (for example, diopside crystal CaMgSiO6). The main component of the dielectric layers 11a to 11j may be oxides other than Si, Ca, and / or Mg. Furthermore, the dielectric layers 11a to 11j may contain at least one oxide of Ti, Zr, and Al as an insulating material. The dielectric layers 11a to 11f may be resins such as glass epoxy resins, or ceramics such as LTCC (Low Temperature Co-fired Ceramics) or HTCC (High Temperature Co-fired Ceramics). The conductor patterns 12b to 12f, the via wirings 13b to 13f, and the upper portion of the terminal 14 are non-magnetic metal layers mainly composed of, for example, Ag, Pd, Pt, Cu, Ni, Au, an Au-Pd alloy, or an Ag-Pt alloy. The upper part of the terminal 14 may include a non-conductive material such as TiO2, ZrO2, or Al2O3 in addition to the above metal materials. The lower part of the terminal 14 is a Ni film and a Sn film.

[0028] [Comparative Example 1] Fig. 4 is a circuit diagram of a filter according to Comparative Example 1. As shown in Fig. 4, in the filter 110 of Comparative Example 1, the inductors L2 and L3 are not provided, and the other end of the inductor L1 is connected to the ground terminal Tg. A parasitic inductance Lg is connected between the ground terminal Tg and the ground.

[0029] As shown in Fig. 2, the parasitic inductance Lg is formed in a path from the terminal 14 through the bonding material 24 to the terminal 22. The parasitic inductance Lg varies depending on the thickness and type of the bonding material 24. For example, the parasitic inductance Lg varies depending on the mounting method used when mounting the laminate 10 on the substrate 20. Furthermore, the parasitic inductance Lg differs between when a conductive sheet is used as the bonding material 24 to evaluate the laminate 10 and when solder is used as the bonding material 24 to mount the laminate 10. In this way, the parasitic inductance Lg differs due to external influences.

[0030] [Simulation 1] Therefore, the parasitic inductance Lg was changed and the pass characteristic of the filter 110 of Comparative Example 1 was simulated. The simulation was a circuit simulation. Table 1 shows the capacitances of the capacitors C1 to C3, the inductance of the inductor L1, the parasitic inductance Lg, and the frequency of the attenuation pole Att in Simulation 1. [Table 1]

[0031] As shown in Table 1, the capacitances of the capacitors C1 to C3 and the inductance of the inductor L1 were set to 0.4 pF, 0.4 pF, 0.5 pF, and 1.5 nH, respectively. The parasitic inductances Lg of the filters A1, A2, and A3 were set to 0 nH, 0.03 nH, and 0.06 nH, respectively.

[0032] 5(a) and 5(b) are diagrams showing the pass characteristics of the filters A1 to A3 in Simulation 1. FIG. 5(b) is an enlarged view of the vicinity of the attenuation pole. As shown in FIG. 5(a), the capacitors C1 and C2 and the inductors L1 to L3 are a T-type CLC high-pass filter, and the pass band is about 5.5 GHz or higher. By adding the capacitor C3, the capacitors C1 to C3 and the inductors L1 to L3 form an attenuation pole Att having a local minimum at a frequency lower than the pass band Pass. The frequency of the attenuation pole Att is about 3.9 GHz. When the node N1 is directly connected to the capacitor C3, the attenuation pole Att is not formed. When the capacitor C3 is connected to the node N1 only through the capacitors C1 and C2, the attenuation pole Att is formed.

[0033] As shown in FIG. 5(b) and Table 1, in the filter A1 without the parasitic inductance Lg, the attenuation pole Att is 3.881 GHz. In the filter A2 with the parasitic inductance Lg of 0.03 nH, the attenuation pole Att is 3.843 GHz, which is lower than that of the filter A1. In the filter A3 with the parasitic inductance Lg of 0.06 nH, the attenuation pole Att is 3.806 GHz, which is lower than that of the filter A1. In this way, in the comparative example 1, when the parasitic inductance Lg changes, the frequency of the attenuation pole Att changes, and the filter characteristics change. For this reason, when the laminate 10 is mounted on the substrate 20, the filter characteristics change when the parasitic inductance Lg changes due to manufacturing variations in the substrate 20, variations in the positions of the terminals 14 and 22, and / or variations in the amount of the bonding material 24. Furthermore, when inspecting the laminate 10, if the parasitic inductance Lg varies due to variations in the inspection board, variations in the positions of the terminals 14 and 22, and / or variations in the inclination of the terminals 14 and 22, the filter characteristics will vary. Furthermore, if the parasitic inductance Lg varies between when mounted and when inspected, the filter characteristics will vary. In this way, the filter characteristics are unstable due to the instability of the parasitic inductance Lg.

[0034] [Simulation 2] In the first embodiment, the parasitic inductances Lg1 and Lg2 were changed to simulate the pass characteristics of the filter 100. The simulation was a circuit simulation. Table 2 shows the capacitances of the capacitors C1 to C3, the inductances of the inductors L1 to L3, the parasitic inductances Lg1 and Lg2, and the frequencies of the attenuation poles Att in Simulation 2. [Table 2]

[0035] As shown in Table 2, the capacitances of capacitors C1 to C3 and the inductances of inductors L1 to L3 were set to 0.4pF, 0.4pF, 0.5pF, 1.4nH, 0.2nH, and 0.2nH, respectively. In filter B1, the parasitic inductances Lg1 and Lg2 were each set to 0nH, in filter B2, the parasitic inductances Lg1 and Lg2 were each set to 0.03nH, in filter B3, the parasitic inductances Lg1 and Lg2 were each set to 0.06nH and 0.03nH, and in filter B4, the parasitic inductances Lg1 and Lg2 were each set to 0.06nH.

[0036] Figures 6(a) and 6(b) are diagrams showing the pass characteristics of filters B1 to B4 in simulation 2. Figure 6(b) is an enlarged view of the vicinity of the attenuation pole. As shown in Figure 6(a), the pass characteristics of filters B1 to B4 are almost the same as the pass characteristics of filters A1 to A3. A pass band Pass and an attenuation pole Att are formed.

[0037] As shown in FIG. 6(b) and Table 2, in filter B1, where the parasitic inductances Lg1 and Lg2 are 0 nH, the attenuation pole Att is 3.881 GHz, which is the same as that of filter A1. In filter B2, where the parasitic inductances Lg1 and Lg2 are 0.03 nH, the attenuation pole Att is 3.862 GHz. In filter B3, where the parasitic inductances Lg1 and Lg2 are 0.06 nH and 0.03 nH, respectively, the attenuation pole Att is 3.853 GHz. In filter B4, where the parasitic inductances Lg1 and Lg2 are 0.06 nH, the attenuation pole Att is 3.843 GHz. In the filters B1 to B4 of the first embodiment, when the parasitic inductances Lg1 and Lg2 change, the minimum frequency of the attenuation pole Att changes. In Comparative Example 1, the change in the attenuation pole Att when the parasitic inductance Lg changes from 0 nH to 0.06 nH is -0.078 GHz. In contrast, in Example 1, the change in the attenuation pole Att when the parasitic inductances Lg1 and Lg2 change from 0 nH to 0.06 nH is -0.038 GHz. In this way, in Example 1, the change in the attenuation pole Att due to the parasitic inductance can be reduced to about half. In this way, in Example 1, the parasitic inductances Lg1 and Lg2 connected between the node N1 and the ground are connected in parallel. Therefore, the substantial parasitic inductance is smaller than the parasitic inductance Lg in Comparative Example 1.

[0038] [Simulation 3] In Example 1, the ratio of the inductances of inductors L2 and L3 was changed, and the pass characteristics of the filter 100 was simulated. The simulation was a circuit simulation. Tables 3 and 4 show the capacitances of the capacitors C1 to C3, the inductances of the inductors L1 to L3, the parasitic inductances Lg1 and Lg2, and the frequencies of the attenuation poles Att in Simulation 3. [Table 3]

[0039] [Table 4]

[0040] As shown in Table 3, in the filters C1 to C5, the parasitic inductances Lg1 and Lg2 were set to 0.06 nH, and the inductance of the inductor L2 was changed. The inductance of the inductor L1 was set so that the inductance between the node N1 and the ground terminals Tg1 and Tg2 was 1.5 nH. The capacitances of the capacitors C1 to C3 and the inductance of the inductor L2 were the same as those of the filters B1 to B4.

[0041] As shown in Table 4, in filters D1 to D5, the parasitic inductances Lg1 and Lg2 were set to 0.03 nH, and the inductance of inductor L2 was changed. The inductance of inductor L1 was set so that the inductance between node N1 and ground terminals Tg1 and Tg2 was 1.5 nH. The capacitances of capacitors C1 to C3 and the inductance of inductor L2 were the same as those of filters B1 to B4.

[0042] FIG. 7(a) is a diagram showing the pass characteristics of the filters A1, A3, B4, and C1 to C5 in the simulation 3. FIG. 7(b) is a diagram showing the variation rate with respect to L2 / L3 in the simulation 3. L2 / L3 is (inductance of L2) / (inductance of L3). The variation rate corresponds to the difference in the attenuation pole Att between the filter A1 and the filters B4 and C1 to C5 in the embodiment 1 relative to the difference in the frequency of the attenuation pole Att between the filters A1 and A3 in the comparative example 1. That is, the variation rate is ((frequency of the attenuation pole Att of A1)-(frequency of the attenuation pole Att of B4, C1 to C5) / ((frequency of the attenuation pole Att of A1)-(frequency of the attenuation pole Att of A3))×100[%]. The variation rate is closer to 0, the smaller the change in the frequency of the attenuation pole Att is even when the parasitic inductances Lg1 and Lg2 are added. The dots in FIG. 7(b) indicate the simulated points, and the straight lines are lines connecting the dots.

[0043] As shown in Fig. 7(a), the attenuation pole Att in filters C1-C5 and B4 is closer to the attenuation pole Att of filter A1 than to the attenuation pole Att of filter A3. As shown in Fig. 7(b), when L2 / L3=0, the regulation rate is 80%. As L2 / L3 increases, the regulation rate decreases. When L2 / L3=0.3, the regulation rate is 60%. When L2 / L3=0.5, the regulation rate is close to 50%. When L2 / L3 is 1, the regulation rate is approximately 50%.

[0044] Fig. 8(a) is a diagram showing the pass characteristics of filters A1, A2, B2, and D1 to D5 in simulation 3. Fig. 8(b) is a diagram showing the rate of change with respect to L2 / L3 in simulation 3. The rate of change is ((frequency of attenuation pole Att of A1)-(frequency of attenuation pole Att of B2, D1 to D5) / ((frequency of attenuation pole Att of A1)-(frequency of attenuation pole Att of A2)) x 100[%].

[0045] As shown in Fig. 8(a), the attenuation pole Att in filters D1-D5 and B2 is closer to the attenuation pole Att of filter A1 than to the attenuation pole Att of filter A2. As shown in Fig. 8(b), when L2 / L3=0, the regulation rate is 90%. As L2 / L3 increases, the regulation rate decreases. When L2 / L3=0.5, the regulation rate is close to 50%. When L2 / L3 is 1, the regulation rate is about 50%. As shown in Simulation 3, it is better for L2 / L3 to be closer to 1.

[0046] [Modification 1 of Example 1] Fig. 9 is a circuit diagram of a filter according to Modification 1 of the embodiment 1. As shown in Fig. 9, in a filter 102 according to Modification 1 of the embodiment 1, an inductor L4 is connected between a node N2 and a ground terminal Tg3. A parasitic inductance Lg3 is connected between the ground terminal Tg3 and the ground.

[0047] 10(a) and 10(b) are plan views of the dielectric layer in Modification 1 of Example 1. FIG. 10(a) is a plan view of the dielectric layer 11f as viewed from above. FIG. 10(b) is a plan view of the terminals 14 as viewed through the dielectric layer 11f. As shown in FIG. 10(a), the conductor patterns 12f provided on the dielectric layer 11f form inductors L2 to L4. As shown in FIG. 10(b), the terminals 14 provided under the dielectric layer 11f form the input terminal Tin', the output terminal Tout', and the ground terminals Tg1 to Tg3. The other configurations are the same as those of Example 1, and description thereof will be omitted.

[0048] [Simulation 4] In the first modification of the first embodiment, the inductance of inductors L3 and L4 was set to 0.1 nH each, and the inductance of inductor L2 was changed to simulate the pass characteristics of filter 102. The capacitances of capacitors C1 to C3 were the same as those in simulations 1 to 3, the inductance of inductor L1 was set so that the inductance between node N1 and ground terminals Tg1 to Tg3 was 1.5 nH, and parasitic inductances Lg1 to Lg3 were each set to 0.03 nH.

[0049] Fig. 11 is a diagram showing the fluctuation rate for L2 / L3 and L2 / L4 in Simulation 4. The fluctuation rate is ((frequency of attenuation pole Att of A1)-(frequency of attenuation pole Att of Modification 1 of Example 1) / ((frequency of attenuation pole Att of A1)-(frequency of attenuation pole Att of A2)) x 100[%]. The dots in Fig. 11 indicate simulated points, and the straight lines connect the dots.

[0050] As shown in Figure 11, when L2 / L3=L2 / L4=0, the fluctuation rate is about 70%. When L2 / L3=L2 / L4=0.3, the fluctuation rate is about 60%, when L2 / L3=L2 / L4=0.5, the fluctuation rate is about 50%. When L2 / L3=L2 / L4=1, the fluctuation rate is about 35%.

[0051] As in the first modification of the first embodiment, three or more inductors may be connected in parallel between the node N1 and the ground. The greater the number of inductors, the smaller the fluctuation rate can be.

[0052] [Modification 2 of Example 1] Fig. 12 is a circuit diagram of a filter according to Modification 2 of Example 1. As shown in Fig. 12, in a filter 104 according to Modification 2 of Example 1, an acoustic wave resonator 30 is provided instead of the capacitor C3. The other configurations are the same as those of Example 1, and therefore description thereof will be omitted.

[0053] FIG. 13(a) is a plan view of an acoustic wave resonator according to the second modification of the first embodiment, and FIG. 13(b) is a cross-sectional view of another acoustic wave resonator according to the second modification of the first embodiment. In the example of FIG. 13(a), the acoustic wave resonator 30 is a surface acoustic wave resonator. An IDT (Interdigital Transducer) 40 and a reflector 42 are provided on the upper surface of a substrate 41. The IDT 40 has a pair of comb-shaped electrodes 40a facing each other. The comb-shaped electrode 40a has a plurality of electrode fingers 40b and a bus bar 40c connecting the plurality of electrode fingers 40b. The reflectors 42 are provided on both sides of the IDT 40. The IDT 40 excites a surface acoustic wave in the substrate 41. The substrate 41 is, for example, a piezoelectric substrate such as a lithium tantalate substrate, a lithium niobate substrate, or a quartz substrate. The substrate 41 may be, for example, a composite substrate in which a piezoelectric substrate is bonded to a support substrate such as a sapphire substrate, a spinel substrate, an alumina substrate, a quartz substrate, or a silicon substrate. The IDT 40 and the reflector 42 are formed of, for example, an aluminum film or a copper film. A protective film or a temperature compensation film may be provided on the substrate 41 so as to cover the IDT 40 and the reflector 42.

[0054] In the example of FIG. 13(b), the acoustic wave resonator 30 is a piezoelectric thin film resonator. A piezoelectric film 46 is provided on a substrate 41. A lower electrode 44 and an upper electrode 48 are provided so as to sandwich the piezoelectric film 46. A gap 45 is formed between the lower electrode 44 and the substrate 41. A region where the lower electrode 44 and the upper electrode 48 face each other with at least a part of the piezoelectric film 46 sandwiched therebetween is a resonance region 47. The lower electrode 44 and the upper electrode 48 in the resonance region 47 excite an acoustic wave in the piezoelectric film 46 in a thickness longitudinal vibration mode or a thickness shear vibration mode. The substrate 41 is, for example, a sapphire substrate, a spinel substrate, an alumina substrate, a glass substrate, a quartz substrate, or a silicon substrate. The lower electrode 44 and the upper electrode 48 are, for example, metal films such as a ruthenium film. The piezoelectric film 46 is, for example, an aluminum nitride film, a single crystal lithium tantalate film, or a single crystal lithium niobate film. An acoustic reflection film may be provided instead of the gap 45.

[0055] 14 is a diagram showing the pass characteristic of a filter according to Modification 2 of Example 1. The pass characteristic is the same as that of filter B1 except for acoustic wave resonator 30, and acoustic wave resonator 30 has a resonant frequency of 3.893 GHz. As shown in FIG. 1, the pass band Pass is approximately 4.6 GHz or higher. At attenuation pole Att1, acoustic wave resonator 30 is capacitive. The attenuation pole Att1 is formed by capacitors C1 and C2, inductors L1 to L3, and the capacitance of acoustic wave resonator 30. Between the pass band Pass and attenuation pole Att1, an attenuation pole Att2 is formed by the resonant frequency of acoustic wave resonator 30. The attenuation pole Att2 can improve the steepness of the attenuation between the pass band Pass and the attenuation region.

[0056] In the second modification of the first embodiment, a change in the frequency of the attenuation pole Att1 also changes the characteristics of the attenuation band of the filter 104. By providing the inductors L2 and L3, the change in the attenuation pole Att1 is reduced even if the parasitic inductances Lg1 and Lg2 change, and the change in the filter characteristics can be reduced.

[0057] [Modification 3 of Example 1] Fig. 15 is a circuit diagram of a filter according to the third modification of the first embodiment. As shown in Fig. 15, in a filter 106 according to the third modification of the first embodiment, a capacitor C3 is connected in series with an inductor L1 between nodes N1 and N2. The third modification of the first embodiment can form an attenuation pole Att by a series resonant circuit of the capacitor C3 and the inductors L1 to L3 equivalent to the first embodiment. The other configurations are the same as those of the first embodiment, and therefore description thereof will be omitted.

[0058] In a filter having an inductor L1 shunt-connected to the path between the input terminal Tin and the output terminal Tout as in Fig. 4 of Comparative Example 1, the filter characteristics change when the parasitic inductance Lg changes as shown in Fig. 5(b) and Table 1. This results in a large change in the filter characteristics due to differences in the mounting method of the terminals 14 and 22 in Fig. 2, etc.

[0059] According to the first embodiment and its modified example, the inductor L1 (first inductor) has one end connected to the node N1 (first node) in the path between the input terminal Tin and the output terminal Tout, and the other end connected to the node N2 (second node). The inductor L2 (second inductor) has one end connected to the node N2, and the other end connected to the ground terminal Tg1 (first ground terminal). The inductor L3 (third inductor) has one end connected to the node N1, and the other end connected to the ground terminal Tg2 (second ground terminal). As a result, as shown in FIG. 6(b) and Table 2, the parasitic inductances Lg1 and Lg2 for connecting the terminals 14 and 22 are connected in parallel, so that the change in the inductance of the shunt-connected inductors L1 to L3 and the combined inductance of the inductances Lg1 and Lg2 when the parasitic inductances Lg1 and Lg2 change is small. Therefore, the filter characteristics can be stabilized regardless of the variations in the mounting of the terminals 14 and 22 in FIG. 2.

[0060] As shown in Fig. 6(a), the filter is a high-pass filter having a pass band Pass, and a local minimum of the attenuation pole Att is formed at a frequency lower than the pass band Pass by a resonant circuit including inductors L1 to L3. In such a filter, the frequency of the attenuation pole Att changes due to changes in the parasitic inductances Lg1 and Lg2, and the attenuation characteristics of the filter change. Therefore, it is preferable to provide inductors L2 and L3.

[0061] As shown in FIG. 1, the capacitor C1 (first capacitor) and the capacitor C2 (second capacitor) are connected in series between the input terminal Tin and the output terminal Tout, and the capacitor C3 (capacitive element) is connected in parallel with the capacitors C1 and C2 between the input terminal Tin and the output terminal Tout. This allows the attenuation pole Att to be formed. If the node N1 and the capacitor C3 are connected without the capacitors C1 and C2, it becomes a simple high-pass filter and the attenuation pole Att is not formed. Therefore, the node N1 is connected to the capacitor C3 through the capacitors C1 and C2. In such a filter, the frequency of the attenuation pole Att changes due to the change in the parasitic inductances Lg1 and Lg2, and the attenuation characteristics of the filter change. Therefore, it is preferable to provide the inductors L2 and L3.

[0062] In particular, when the inductors L1 to L3 and the capacitors C1 to C3 form a first minimum of the attenuation pole Att (first attenuation pole) lower than the passband Pass as shown in Fig. 6(a), the frequency of the attenuation pole Att changes due to the change in the parasitic inductances Lg1 and Lg2, and the attenuation characteristics of the filter change. Therefore, it is preferable to provide the inductors L2 and L3.

[0063] 12 of the second modification of the first embodiment, the capacitive element is an acoustic wave resonator 30, and the acoustic wave resonator 30 forms a second minimum of the attenuation pole Att2 (second attenuation pole) between the first minimum of the attenuation pole Att1 and the passband Pass. In this case, the frequency of the attenuation pole Att1 changes due to the change in the parasitic inductances Lg1 and Lg2, and the attenuation characteristics of the filter change. Therefore, it is preferable to provide inductors L2 and L3.

[0064] As in the third modification of the first embodiment, the capacitor C3 (third capacitor) may be connected in series with the inductor L1 between the nodes N1 and N2. In this case, the attenuation pole Att can be formed. Therefore, the frequency of the attenuation pole Att changes due to the change in the parasitic inductances Lg1 and Lg2, and the attenuation characteristics of the filter change. Therefore, it is preferable to provide the inductors L2 and L3.

[0065] As shown in Figures 7(b) and 8(b) of Simulation 3, the smaller inductance of inductors L2 and L3 is preferably 0.1 times or more than the larger inductance of inductors L2 and L3, more preferably 0.3 times or more, even more preferably 0.5 times or more, and even more preferably 0.8 times or more.

[0066] Increasing the inductance of inductors L2 and L3 results in larger inductors L2 and L3, and therefore in a larger filter. From this viewpoint, the inductance of inductor L1 is preferably larger than the larger inductance of inductors L2 and L3, and is more preferably at least twice as large as the larger inductance of inductors L2 and L3, and is even more preferably at least five times as large. If the ground terminal Tg is divided into ground terminals Tg1 and Tg2, the inductances of inductors L2 and L3 become finite. The inductance of the larger of inductors L2 and L2 is preferably at least 0.01 times as large as the inductance of inductor L1, more preferably at least 0.05 times as large, and even more preferably at least 0.1 times as large.

[0067] As in the first modification of the first embodiment, one end of the inductor L4 (fourth inductor) is connected to the node N2, and the other end is connected to the ground terminal Tg3 (third ground terminal). In this way, by increasing the number of inductors connected in parallel between the node N2 and the ground terminal, it is possible to reduce the change in filter characteristics due to the change in parasitic inductance.

[0068] As shown in FIG. 11, the smallest inductance among the inductors L2 to L4 is preferably 0.1 times or more, more preferably 0.3 times or more, even more preferably 0.5 times or more, and even more preferably 0.8 times or more, the largest inductance among the inductors L2 to L4.

[0069] 3(a) to 3(f), in the laminate 10, a plurality of dielectric layers 11a to 11f are laminated, the inductors L1 to L3 are formed within the laminate 10, and the ground terminals Tg1 and Tg2 are formed on the same surface of the laminate 10. In such a structure, the parasitic inductance is likely to change depending on the joining method between the terminals 14 and 22. Therefore, it is preferable to provide the inductors L2 and L3. EXAMPLES

[0070] The second embodiment is an example of a multiplexer in which the first embodiment and its modified examples are used. FIG. 16 is a circuit diagram of a triplexer according to the second embodiment. As shown in FIG. 16, a triplexer 32 includes filters 34, 36, and 38. The filters 34, 36, and 38 are connected between a common terminal Ant and terminals LB, MB, and HB, respectively. An antenna 35 is connected to the common terminal Ant. The filter 34 is, for example, a low-pass filter, which passes a high-frequency signal in a low band and suppresses signals of other frequencies. The filter 36 is, for example, a band-pass filter, which passes a high-frequency signal in a middle band, which is a frequency higher than the low band, and suppresses signals of other frequencies. The filter 38 is, for example, a high-pass filter, which passes a high-frequency signal in a high band, which is a frequency higher than the middle band, and suppresses signals of other frequencies. The filter 38 can be a filter according to the first embodiment and its modified examples. Although the example of a triplexer has been described as an example of a multiplexer, the multiplexer may be a diplexer, a duplexer, or a quadplexer.

[0071] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention described in the claims. [Explanation of symbols]

[0072] 10 Laminate 11a to 11f Dielectric layers 12b~12f Conductive patterns 13b~13f Via wiring 14, 22 terminals 20 Substrate 24 Bonding material 30 Elastic Wave Resonator 32 Triplexer 34, 36, 38 Filters

Claims

1. An input terminal; An output terminal; A first ground terminal; A second ground terminal; a first inductor having one end connected to a first node in a path between the input terminal and the output terminal and the other end connected to a second node; a second inductor having one end connected to the second node and the other end connected to the first ground terminal; a third inductor having one end connected to the second node and the other end connected to the second ground terminal; A filter comprising:

2. 2. The filter according to claim 1, wherein the filter is a high-pass filter having a pass band, and comprises a resonant circuit including the first inductor, the second inductor and the third inductor, and forming a local minimum of an attenuation pole at a frequency lower than the pass band.

3. a first capacitor and a second capacitor connected in series between the input terminal and the output terminal; a capacitive element connected in parallel with the first capacitor and the second capacitor between the input terminal and the output terminal; Equipped with 2. The filter of claim 1, wherein the first node is a node between the first capacitor and the second capacitor and is connected to the capacitive element via the first capacitor and the second capacitor.

4. the filter is a high-pass filter having a pass band; 4. The filter of claim 3, wherein the first inductor, the second inductor, the third inductor, the first capacitor, the second capacitor and the capacitive element form a first minimum of a first attenuation pole at a frequency lower than the passband.

5. the capacitive element is an acoustic wave resonator; 5. The filter of claim 4, wherein the acoustic wave resonator forms a second minimum of a second attenuation pole between the first minimum and the passband.

6. a first capacitor and a second capacitor connected in series between the input terminal and the output terminal; 2. The filter of claim 1, further comprising a third capacitor connected in series with the first inductor between the first node and the second node.

7. 7. The filter according to claim 1, wherein the smaller inductance of the second inductor and the third inductor is 0.1 times or more the larger inductance of the second inductor and the third inductor.

8. 8. The filter of claim 1, wherein the inductance of the first inductor is greater than the larger inductance of the second inductor and the third inductor.

9. A third ground terminal; a fourth inductor having one end connected to the second node and the other end connected to the third ground terminal; 9. A filter according to any one of claims 1 to 8, comprising:

10. A laminate in which a plurality of dielectric layers are laminated, the first inductor, the second inductor and the third inductor are formed within the laminate; The filter according to claim 1 , wherein the first ground terminal and the second ground terminal are formed on the same surface of the laminate.

11. A multiplexer comprising a filter according to any one of claims 1 to 10.

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