Method and system for high frequency securities trading
Patent Information
- Application Number
- JP2023027875
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-04-07
- Filing Date
- 2023-02-27
- Publication Date
- 2025-03-13
- Estimated Expiration
- 2043-02-27
AI Technical Summary
【0011】 本開示の一部の実施例によると、現在に受信または収集される株式データの頻度に応じて機械学習モデルの入力のためのバッチサイズを決定することによって、予測価格の正確度が向上または維持されながら、機械学習モデルでの不要な演算が最小化されるか防止され得る。
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a method and system for high frequency securities trading, and more particularly to a method and system for high frequency securities trading that generates order data based on predictive data for a target item obtained using a machine learning model. [Background technology]
[0002] High frequency trading is a trading method that takes advantage of minute price fluctuations in securities such as stocks, bonds, and derivatives, and trades at a high frequency in a short period of time (for example, hundreds to thousands of times per second). Rapid processing speed is extremely important in high frequency trading. In general, the faster it takes to process and output a trading algorithm based on input information, the more likely it is that an advantage can be gained in trading.
[0003] Meanwhile, high-frequency securities trading techniques using machine learning models analyze large amounts of data obtained from the market, and therefore can take into account more factors than those that affect the accuracy of predictions that can be obtained through existing classical algorithms when predicting the market price of a particular item. However, in order to analyze a large amount of data using a machine learning model, a large amount of storage space and processing resources may be required for machine learning calculations. However, existing processors may not be suitable for supporting such high-frequency securities trading techniques.
[0004] In addition, since a machine learning model requires complex calculations on a large amount of data, a latency may occur for placing a securities order when the machine learning model is used. This latency may cause a time lag phenomenon in which the time when the machine learning model outputs predicted data for a securities type is already in the past. For example, a machine learning model outputs predicted data for a target type at a future time T1 (T1 is a positive number), but due to the latency, the time when the predicted data is obtained becomes T1+n (n is a positive number), and the predicted data becomes data for the past. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Korean Patent Publication No. 10-2001-0016454 Summary of the Invention [Problem to be solved by the invention]
[0006] The present disclosure provides a method, a computer program, and an apparatus (system) for high frequency securities trading to solve the above problems. [Means for solving the problem]
[0007] The present disclosure may be embodied in numerous ways, including as a method, an apparatus (system), and / or a computer program stored on a computer readable storage medium.
[0008] According to one embodiment of the present disclosure, a method for high frequency securities trading executed by at least one processor may include generating input data based on market data for a target line item, inputting the generated input data into a machine learning model to generate forecast data for the target line item for each of a plurality of future time points, and generating order data for the target line item based on the generated forecast data.
[0009] A computer program for executing a method for high frequency securities trading according to an embodiment of the present disclosure on a computer may be provided.
[0010] An information processing system according to one embodiment of the present disclosure includes a first memory storing one or more instructions, a first processor configured to generate input data based on market data for a target item by executing the one or more instructions in the first memory, a second memory storing one or more instructions, and a second processor for the machine learning model configured to receive input data from the first processor, input the input data into the machine learning model to generate forecast data for the target item for each of a plurality of future times, and provide the generated forecast data to the first processor by executing the one or more instructions in the second memory, wherein the first processor may be further configured to generate order data for the target item based on the forecast data provided from the second processor. Effect of the Invention
[0011] According to some embodiments of the present disclosure, by determining a batch size for input to a machine learning model depending on the frequency of currently received or collected stock data, unnecessary calculations in the machine learning model may be minimized or prevented while improving or maintaining the accuracy of the predicted price.
[0012] According to some embodiments of the present disclosure, input data corresponding to a maximum batch size that the machine learning model can process within a time period in which no time divergence occurs may be generated, and the generated input data may be input to the machine learning model, thereby preventing time divergence and obtaining more accurate prediction data for the target event from the machine learning model.
[0013] According to some embodiments of the present disclosure, a delay time for each of a number of candidate batch sizes is predicted, and by selecting a batch size whose predicted delay time ends before a future time, unnecessary operations (e.g., operations that cause time deviations) can be prevented from being performed in the machine learning model.
[0014] According to some embodiments of the present disclosure, a single machine learning model may be used to accurately predict the price of a target item at multiple future times, and based on the predicted results, securities may be ordered at the future time that maximizes expected profits, thereby maximizing the profitability of trading securities.
[0015] According to some embodiments of the present disclosure, a dedicated accelerator that is expected to generate the highest profit may be selected from among a plurality of dedicated accelerators, and a calculation using a machine learning model may be performed through the selected dedicated accelerator. In this case, the calculation speed may be improved, and more rapid order data may be generated, thereby maximizing the profitability of securities trading.
[0016] The effects of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by a person having ordinary knowledge in the technical field to which the present disclosure pertains (referred to as an "ordinary engineer") from the description in the claims. [Brief description of the drawings]
[0017] Non-limiting embodiments of the present disclosure will be described with reference to the accompanying drawings, in which like reference numerals indicate like elements, as described below. [Figure 1] FIG. 2 is a schematic diagram illustrating an example of the operation of an information processing system according to an embodiment of the present disclosure. [Diagram 2] 1 is a block diagram showing an internal configuration of an information processing system according to an embodiment of the present disclosure. [Diagram 3] 1 is a diagram illustrating an internal configuration of a processor according to an embodiment of the present disclosure. [Figure 4] This is a visualization of the delay time that occurs between a processor and a dedicated accelerator. [Diagram 5]1 is a diagram illustrating a visualization of latency for a securities order. [Figure 6] 1 is a diagram illustrating an example of visualization of multiple future time points. [Figure 7] 11 is a diagram visually illustrating delay times calculated for each candidate batch size; [Figure 8] 13 is a diagram visually illustrating delay times calculated for each batch size of each dedicated accelerator. [Figure 9] 1 is a diagram showing an example in which a machine learning model according to an embodiment of the present disclosure outputs output data based on input data. [Figure 10] 1 is a diagram showing an example of a configuration of input data for a machine learning model according to an embodiment of the present disclosure. [Figure 11] FIG. 2 is an exemplary diagram illustrating an artificial neural network model according to an embodiment of the present disclosure. [Figure 12] 1 is a flowchart illustrating a securities trading method according to an embodiment of the present disclosure. [Figure 13] 1 is a flowchart illustrating a method for pre-processing market data according to an embodiment of the present disclosure. [Figure 14] 1 is a diagram illustrating an example of expected profits at various future points in time; [Figure 15] 11 is a flowchart illustrating a securities trading method according to another embodiment of the present disclosure. [Figure 16] 11 is a diagram illustrating an example of a process in which order data is generated based on output data. [Figure 17] FIG. 2 is a block diagram of any computing device associated with generating securities trades in accordance with one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] <Summary of the Invention> According to one embodiment of the present disclosure, the high frequency securities trading method may further include a step of calculating a delay time for a securities order, and the step of generating order data may include a step of selecting one future time point from a plurality of future time points based on the delay time, and a step of generating order data for a target item corresponding to the selected future time point.
[0019] Also, the step of selecting one future time point from the plurality of future time points may include the step of selecting the earliest future time point after the delay time from the plurality of future time points.
[0020] In addition, the step of selecting one future time point from the plurality of future time points may include the steps of selecting one or more future time points after the delay time from the plurality of future time points, calculating an expected profit for each of the selected one or more future time points, and selecting a future time point with the largest calculated expected profit.
[0021] In addition, the at least one processor may include a first processor and a second processor for the machine learning model, and the step of calculating the delay time may include a step of calculating the delay time based on at least one of a data rate, an input / output bandwidth between the first processor and the second processor, a size of the input / output data, a calculation speed of the machine learning model by the second processor, a processing speed of the first processor, or a busy state of the second processor.
[0022] The delay time may also include the time required for the market data to be pre-processed by the first processor, the time required for the pre-processed data to be transmitted from the first processor to the second processor, the time required for the second processor to complete the calculation of the machine learning model, the time required for the calculation results to be transmitted from the second processor to the first processor, and the time required for order data to be generated by the first processor based on the calculation results.
[0023] Additionally, the method for high frequency securities trading may further include transmitting the selected order data to a target securities exchange.
[0024] In addition, a machine learning model can be trained to infer predictive data for a particular item at multiple points in time in the future based on a training set that includes market data for the particular item at a particular point in time and ground truth data.
[0025] <Detailed Description of the Invention> Hereinafter, specific details for carrying out the present disclosure will be described in detail with reference to the accompanying drawings, however, in the following description, detailed descriptions of well-known functions and configurations will be omitted if there is a risk of unnecessarily obscuring the gist of the present disclosure.
[0026] In the accompanying drawings, the same or corresponding components are denoted by the same reference numerals. In addition, in the following description of the embodiments, overlapping descriptions of the same or corresponding components may be omitted. However, even if the technology related to a component is omitted, it is not intended that such a component is not included in a certain embodiment.
[0027] The advantages and features of the disclosed embodiments, and the methods for achieving the same, will become apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, and may be embodied in various different forms, and the embodiments are provided solely for the purpose of making the disclosure complete and fully conveying the scope of the invention to those skilled in the art.
[0028] The terms used in this specification will be briefly explained, and the disclosed embodiments will be specifically described. The terms used in this specification are currently common terms that are widely used as much as possible while taking into consideration the functions in this disclosure, but these terms may change depending on the intentions or precedents of engineers engaged in related fields, the emergence of new technologies, etc. In addition, in certain cases, there are terms arbitrarily selected by the applicant, and in this case, the meanings will be described in detail in the description of the relevant invention. Therefore, the terms used in this disclosure must be defined based on the meanings that the terms have and the overall content of this disclosure, rather than simply the names of the terms.
[0029] In this specification, the singular expression includes the plural expression unless the context clearly specifies otherwise. In addition, the plural expression includes the singular expression unless the context clearly specifies otherwise. In the entire specification, when a part includes some element, this does not mean excluding other elements, but may further include other elements, unless otherwise specified to the contrary.
[0030] Also, the term "module" or "unit" as used in the specification means a software or hardware component, and the "module" or "unit" performs a certain function. However, the term "module" or "unit" is not limited to software or hardware. The "module" or "unit" may be configured to be in an addressable storage medium and may be configured to execute one or more processors. Thus, by way of example, a "module" or "unit" may include components such as software components, object-oriented software components, class components, and task components, and at least one of a process, a function, an attribute, a procedure, a subroutine, a segment of program code, a driver, firmware, microcode, a circuit, data, a database, a data structure, a table, an array, or a variable. The components and "modules" or "units" may be combined into a smaller number of components and "modules" or "units" or the functions provided therein may be further separated into additional components and "modules" or "units".
[0031] According to one embodiment of the present disclosure, a "module" or "unit" may be embodied with a processor and a memory. A "processor" should be broadly construed to include a general purpose processor, a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a controller, a microcontroller, a state machine, and the like. In some circumstances, a "processor" may refer to an application specific semiconductor (ASIC), a programmable logic device (PLD), a field programmable gate array (FPGA), and the like. A "processor" may refer to a combination of processing devices, such as, for example, a combination of a DSP and a microprocessor, a combination of multiple microprocessors, a combination of one or more microprocessors in conjunction with a DSP core, or any other such configuration. Additionally, a "memory" should be broadly construed to include any electronic component capable of storing electronic information. "Memory" may refer to various types of processor-readable media, such as random access memory (RAM), read only memory (ROM), non-volatile random access memory (NVRAM), programmable read only memory (PROM), erasable programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM), flash memory, magnetic or optical data storage devices, registers, etc. Memory is said to be in electronic communication with a processor if the processor can read information from the memory and / or store information in the memory. Memory that is integrated with a processor is in electronic communication with the processor.
[0032] In this disclosure, a "system" may include, but is not limited to, at least one of a server device and a cloud device. For example, the system may be comprised of one or more server devices. As another example, the system may be comprised of one or more cloud devices. As yet another example, the system may be configured and operated by both a server device and a cloud device. As yet another example, the system may refer to a client device for high frequency securities orders.
[0033] In addition, terms such as 1, 2, A, B, (a), (b), etc. used in the following embodiments are merely used to distinguish one component from another, and do not limit the nature, order, or sequence of the corresponding components.
[0034] In addition, in the following examples, when a certain component is described as being "coupled," "coupled," or "connected" to another component, it should be understood that the component may be directly coupled or connected to the other component, but that other components may also be "coupled," "coupled," or "connected" between each component.
[0035] Additionally, the terms "comprises" and / or "comprising" used in the following examples do not exclude the presence or addition of one or more other components, steps, operations and / or elements to a referenced component, step, operation and / or element.
[0036] In the present disclosure, "each of multiple A's" or "each of multiple A's" may refer to each of all components included in the multiple A's or may refer to each of some of the components included in the multiple A's.
[0037] Prior to describing the various embodiments of the present disclosure, a brief explanation of terminology will be provided.
[0038] In this disclosure, an "item" may refer to a classification of securities, such as stocks, bonds, and derivatives (options, futures, etc.), that are traded on the securities market, based on their content and type. Items may include individual items, as well as index-related items, items related to industry sectors, items related to specific commodities (e.g., crude oil, agricultural products, gold, etc.), and exchange rate-related items.
[0039] In this disclosure, a "stock exchange" may refer to a place that distributes securities circulated in at least one country and acts as an intermediary for listing and trading securities issued by companies, governments, etc. In one embodiment, a stock exchange may include a stock exchange system.
[0040] In this disclosure, an “Order Book (OB)” may include a list that records information regarding buy or sell orders (such as bid price, quantity, buyer or seller information) of buyers and sellers in the securities market.
[0041] In this disclosure, "Top of the Book" (ToB) may include information regarding the highest bid and lowest ask prices.
[0042] In this disclosure, "market data" may include data for an item traded on a securities exchange. For example, market data may include order books, public announcements, news, etc. for (at least a portion of) an item traded on a securities exchange.
[0043] In this disclosure, a "machine learning model" may include any model used to infer an answer to a given input. According to one embodiment, the machine learning model may include an artificial neural network model including an input layer, a number of hidden layers, and an output layer, where each layer may include a number of nodes. Also, in this disclosure, the machine learning model may be referred to as an artificial neural network model, and the artificial neural network model may be referred to as a machine learning model.
[0044] In the embodiments of the present disclosure, "instructions" refers to a functionally organized sequence of computer-readable instructions that constitute a computer program and that are executed by a processor.
[0045] Various embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.
[0046] FIG. 1 is a schematic diagram illustrating an example of the operation of an information processing system 110 according to an embodiment of the present disclosure. According to an embodiment, the information processing system 110 can predict market conditions at one or more future times (near future times, for example, after a predetermined time) based on market data, and can generate and transmit orders for target items to a target stock exchange (second stock exchange) based on the market data. In high-frequency securities trading, it is very important to generate and transmit orders at a high speed based on market data. For this reason, in high-frequency securities trading, latency in microsecond units must be taken into consideration, and in order to reduce latency, the information processing system 110 can be colocated close to a server of the target stock exchange (second stock exchange).
[0047] According to one embodiment, the information processing system 110 may receive market data from a first stock exchange. The information processing system 110 may also receive market data from a website other than the first stock exchange. Here, the website may be a site that aggregates market data generated by one or more exchanges, or may be a website independently operated by a private company. The market data may include order books, announcements, news, etc. for multiple items. In one embodiment, the market data may include data for a target item. For example, the market data may include the top of the order book for the target item, a list of (active) orders for the target item, responses from the first stock exchange to previous orders for the target item, etc.
[0048] Market data may be dynamically received within a unit time. That is, the size or number of market data received by the information processing system 110 within a unit time may vary depending on the environment of the securities market. For example, when the securities market is highly volatile, the size or number of market data received within a unit time may be large. That is, when the volatility of the securities market increases, the size or number of fluctuations in the order book also increases, and accordingly, the size or number of market data received by the information processing system 110 per unit time may also increase.
[0049] Although the first stock exchange is illustrated in FIG. 1 as being a single stock exchange, this is for convenience of illustration only and the first stock exchange may include one or more stock exchanges. Also, although the first stock exchange is illustrated in FIG. 1 as being a separate and distinct exchange from the second stock exchange, this is also for convenience of illustration only and the first stock exchange may include the second stock exchange and the second stock exchange may include the first stock exchange.
[0050] According to one embodiment, the information processing system 110 may analyze market data to generate orders. For example, the information processing system 110 may analyze market data and / or data generated based on the market data to predict market conditions (e.g., the price of a target item) at one or more future times (e.g., n seconds later, where n is a positive real number) and generate orders based thereon. Here, the process of analyzing the market data and / or data generated based on the market data may be performed by a machine learning model (e.g., DNN, etc.).
[0051] Meanwhile, in high-frequency securities trading, it is very important to quickly analyze market data and generate orders, but a general processor does not have storage space and computing resources to support complex and large-scale calculations of a machine learning model, so if a general processor is used to run a machine learning model, the processing speed and / or efficiency may be reduced. In consideration of this, the information processing system 110 according to an embodiment of the present disclosure may include a dedicated accelerator (e.g., a Neural Processing Unit (NPU)) for the machine learning model, and the dedicated accelerator may be embodied as an integrated circuit (e.g., an Application-Specific Integrated Circuit (ASIC)) for the neural processing unit.
[0052] Meanwhile, when using a machine learning model, appropriate pre / post processing processes may be required. For example, a process may be required to generate input data for the machine learning model from market data, or to generate order data based on data output from the machine learning model. Such pre / post processing processes may be continuously changed due to changes in market conditions, rules, compensation regulations for market makers, etc. If a processor that processes such pre / post processing processes is implemented as a custom-made semiconductor (e.g., ASIC) for a specific purpose, there is a problem that if the pre / post processing processes are changed, a processor for performing the changed pre / post processing processes must be manufactured again since redesign is not possible. Accordingly, processes other than the operation of the machine learning model may be performed by a processor that can be reprogrammed and / or redesigned (e.g., a processor implemented as a Field Programmable Gate Array (FPGA)).
[0053] As described above, the processor driving the machine learning model is configured with a dedicated accelerator (e.g., NPU ASIC), so that the computation of the machine learning model can be processed quickly and efficiently. In addition, the pre- and post-processing processes can be flexibly changed according to continuously changing market conditions by processing the pre- and post-processing processes using a processor (e.g., FPGA) that can be reprogrammed or redesigned. In this way, by using two or more different processors suitable for processing high-frequency securities trading, it is possible to simultaneously realize the implementation of flexible pre- and post-processing processes and efficient and rapid computation of the machine learning model. The internal configuration and data flow of the information processing system 110 will be described in detail later with reference to FIGS. 2 to 4.
[0054] 2 is a block diagram illustrating an internal configuration of an information processing system 110 according to an embodiment of the present disclosure. The information processing system 110 may include a memory 210, a processor 220, a communication module 230, and an input / output interface 240. As shown in FIG. 2, the information processing system 110 may be configured to communicate information and / or data over a network using the communication module 230.
[0055] The memory 210 may include any non-transitory computer-readable recording medium. According to an embodiment, the memory 210 may include a permanent mass storage device such as a read only memory (ROM), a disk drive, a solid state drive (SSD), a flash memory, etc. As another example, a non-transitory mass storage device such as a ROM, an SSD, a flash memory, a disk drive, etc. may be included in the information processing system 110 as a separate permanent storage device separate from the memory. In addition, the memory 210 may store an operating system and at least one program code (e.g., code for computation, pre / post processing, transmission of securities orders, etc. of a machine learning model installed and operated in the information processing system 110). Although the memory 210 is illustrated as a single memory in FIG. 2, this is merely for convenience of explanation, and the memory 210 may include multiple memories.
[0056] Such software components may be loaded from a computer-readable recording medium separate from the memory 210. Such a separate computer-readable recording medium may include a recording medium directly connectable to such information processing system 110, and may include, for example, a computer-readable recording medium such as a flexible disk, a disk, a tape, a DVD / CD-ROM drive, a memory card, etc. As another example, the software components may be loaded into the memory 210 through the communication module 230 rather than a computer-readable recording medium. For example, at least one program may be loaded into the memory 210 based on a computer program (e.g., a program for market data analysis, future market forecast, securities order generation and transmission, etc.) installed by a file provided through the communication module 230 by a developer or a file distribution system that distributes an application installation file.
[0057] The processor 220 may be configured to process instructions of a computer program by performing basic arithmetic, logic, and input / output operations. The instructions may be provided to a user terminal (not shown) or other external system via the memory 210 or the communication module 230. For example, the processor 220 may utilize a machine learning model to generate forecast data for a target stock based on input data, and generate order data based on the generated forecast data. The order data thus generated may be transmitted to a target stock exchange.
[0058] The communication module 230 may provide a configuration or function for a user terminal (not shown) and the information processing system 110 to communicate with each other through a network, and may provide a configuration or function for the information processing system 110 to communicate with an external system (such as a separate cloud system, for example). For example, control signals, commands, data, etc. provided under the control of the processor 220 of the information processing system 110 may be transmitted to the user terminal and / or an external system through the communication module of the user terminal and / or the external system via the communication module 230 and the network. For example, order data, etc. may be transmitted to the external system (stock exchange system) from the information processing system 110.
[0059] In addition, the I / O interface 240 of the information processing system 110 may be a means for interfacing with a device for input or output (not shown) that may be connected to the information processing system 110 or may be included in the information processing system 110. For example, the I / O interface 240 may include at least one of a PCI express interface and an Ethernet interface. In FIG. 2, the I / O interface 240 is illustrated as an element configured separately from the processor 220, but is not limited thereto, and the I / O interface 240 may be configured to be included in the processor 220. The information processing system 110 may include more components than those shown in FIG. 2.
[0060] The processor 220 of the information processing system 110 may be configured to manage, process, and / or store information and / or data received from a plurality of user terminals and / or a plurality of external systems. According to an embodiment, the processor 220 may receive market data from a first stock exchange system and a second stock exchange system. The processor 220 may generate forecast data for one or more future times for a target item based on the received market data, and generate order data based on the generated forecast data. Although the processor 220 is illustrated as a single processor in FIG. 2, this is for convenience of explanation only, and the processor 220 may include multiple processors. For example, the processor 220 may include at least one processor embodied in an FPGA for pre-processing and post-processing, and one or more dedicated accelerators embodied in an ASIC for a machine learning model. In this case, the at least one processor embodied in an FPGA may execute one or more instructions stored in a first memory, and the one or more dedicated accelerators embodied in an ASIC may execute one or more instructions stored in a second memory.
[0061] 3 is a diagram illustrating an internal configuration of a processor according to an embodiment of the present disclosure. In FIGs. 3 and 4, a processor 300 is illustrated as being embodied in the form of a board. For example, the processor 220 of the information processing system 110 may be embodied in the form of the processor 300 of FIGs. 3 and 4. As another example, the processor 220 of the information processing system 110 may include the processor 300 of FIGs. 3 and 4.
[0062] According to one embodiment, the processor 300 may include at least one processor 320 for pre- / post-processing of data and a dedicated accelerator for the machine learning model (e.g., a dedicated accelerator implemented in an ASIC) 340. For convenience of explanation, in FIG. 3 and FIG. 4, the at least one processor 320 for pre- / post-processing is described as an FPGA 320, and the dedicated accelerator 340 for the machine learning model is described as an NPU 340.
[0063] The FPGA 320 may include a data receiving unit 322, a data preprocessing unit 324, and an order generating unit 326. Although the internal configuration of the processor is described by dividing it into functions in Fig. 3, it is clear that this does not necessarily mean that it is physically divided. In addition, the internal configuration of the FPGA 320 shown in Fig. 3 is merely an example, and does not show only the essential components.
[0064] According to one embodiment, the data receiver 322 of the FPGA 320 may receive market data from one or more stock exchanges (e.g., a first stock exchange, a second stock exchange, etc.), in one embodiment, the one or more stock exchanges may include a target stock exchange, where the target stock exchange is a destination to which the order data is transmitted and may proceed with the purchase or sale of securities based on the order data.
[0065] The market data may include data for instruments traded on one or more exchanges. For example, the market data may include order books for (at least some of) the instruments traded on the exchanges, and additionally, the market data may include data for a target instrument. For example, the market data may include the top of the order book for the target instrument, a list of (active) orders for the target instrument, responses of the target exchange to previous orders for the target instrument, etc.
[0066] The data receiving unit 322 may receive market data from the stock exchange whenever market data needs to be updated or periodically. On the other hand, if the fluctuation range of the securities market and / or the target securities is large, the number of times that market data is received may be large, and if the fluctuation range of the securities market and / or the target securities is small, the number of times that market data is received may be small. For example, if the price fluctuation range of the target securities is large, the data receiving unit 322 may receive market data including the order book of the target securities more times per unit time. Conversely, if the price fluctuation range of the target securities is small, the data receiving unit 322 may receive market data including the order book of the target securities less times per unit time.
[0067] Because high speed data processing is important in high frequency securities trading, market data may be received via the User Datagram Protocol (UDP), which has a high data transmission rate, although in some embodiments other communication protocols (e.g., TCP / IP) may be used to receive market data if desired (e.g., to ensure data reliability).
[0068] The data pre-processing unit 324 may generate input data for the machine learning model based on the received one or more market data. According to an embodiment, the data pre-processing unit 324 may select one or more input features for one or more items of the market data to configure the input data. For example, the data pre-processing unit 324 may include a feature extraction unit for extracting or selecting input features included in the input data.
[0069] In one embodiment, one or more items included in the input data may include items that may be leading indicators of market status fluctuations of the target item. For example, if the target item to be ordered is a stock (spot) item of Company A, data on a futures item related to the stock of Company A, an option item related to the stock of Company A, items related to Company A included in other exchanges, and futures items for commodities related to Company A (e.g., crude oil, etc.) may be included in the input data. In addition, in one embodiment, one or more input features included in the input data may include information that is significant for predicting the market status of the target item. For example, the input features may include various information that can be extracted from the order books of one or more items, such as the market price (transaction price), the price and quantity at the top of the order book on the buying side, the price and quantity at the top of the order book on the selling side, the number of buyers, the number of sellers, the bid price at the next stage at the top of the order book, the ask price at the next stage at the top of the order book, and the variance of the bid prices included in the order book, information processed from the information, and / or the reliability of the information. The configuration of the input data will be described in more detail below with reference to FIG. 10.
[0070] According to an embodiment, the data pre-processing unit 324 may select one of a plurality of predetermined candidate batch sizes and generate input data for the machine learning model corresponding to the selected candidate batch size. A candidate batch size list including a plurality of different batch sizes may be generated in advance, and the data pre-processing unit 324 may select one batch size from the candidate batch size list. The data pre-processing unit 324 may calculate a latency for a securities order and determine one batch size from the batch size list based on the calculated latency. A method for calculating the latency will be described in detail below with reference to FIGS. 4 and 5.
[0071] The input data generated by the data preprocessing unit 324 may be transferred to the NPU 340, which is a dedicated accelerator for the machine learning model, and input to the machine learning model (e.g., DNN). According to an embodiment, the NPU 340 may be implemented as an application specific semiconductor (ASIC) specialized for driving the machine learning model. The NPU 340 may obtain forecast data for the target item in response to inputting the input data to the machine learning model. For example, the NPU 340 may input the input data to the machine learning model and derive output data predicting the price (e.g., market price) of the target item at one or more future times. The machine learning model for deriving output data related to an order for the target item will be described in detail below with reference to FIGS. 9 to 11.
[0072] The order generating unit 326 may receive the forecast data output from the machine learning model and may generate order data at the target stock exchange based on the forecast data. For example, the order generating unit 326 may generate order data for the target item according to a predetermined rule based on the price fluctuation forecast and / or the forecast price of the target item at a future time inferred from the machine learning model. As a specific example, if the price of the target item is predicted to rise, the order generating unit 326 may immediately generate a new buy request order or revise the bid price of an existing sell request order. According to an embodiment, the order data may include information on the type of order (new order, order cancellation, order revision) for the target item, whether or not to buy or sell, the price (bid price), the quantity, etc.
[0073] A delay time may occur in the information processing system until order data is generated based on market data. The delay time may be calculated based on a data rate, a bandwidth of input / output data between the FPGA 320 and the NPU 340, a size of the input / output data, a calculation speed of the machine learning model by the NPU 340, a processing speed of the FPGA 320, or / and a busy state of the NPU 320.
[0074] The larger the batch size, the slower the computation speed of the machine learning model may be, but if the batch size is set large without considering the delay time, a time lag problem may occur in which the results of a future time predicted by the machine learning model are already in the past at the time of output. For example, in response to inputting input data corresponding to the first batch size into the machine learning model, when prediction data of a target security for a future time T1 is obtained at time T1+1, time T1 is already in the past at time T1+1 when the prediction data is obtained. In such a case, if order data is generated based on the output data at time T1, it may be difficult to predict profits based on the prediction results of the machine learning model.
[0075] Meanwhile, in order to reduce the delay time, a method of minimizing the batch size may be considered. However, the smaller the batch size, the lower the prediction accuracy of the machine learning model. Therefore, it may be advantageous to increase the batch size in order to increase the accuracy and expected profit, but if the batch size is excessively increased, a time lag problem may occur in which future data acquired from the machine learning model is already past data. Accordingly, it may be important to accurately predict the delay time for the securities order and determine a batch size (e.g., the largest possible batch size) with the highest expected profit within an allowable range in which the time lag phenomenon does not occur. Accordingly, the delay time for the securities order is accurately calculated, and a batch size with the highest expected profit as possible within a range in which the time lag phenomenon does not occur based on the calculated delay time may be selected.
[0076] 4 and 5, a method for calculating a delay time for a securities order according to one embodiment of the present disclosure will be described.
[0077] 4 is a visualization of delay times that occur in a processor and a dedicated accelerator. As illustrated in FIG. 4, when market data is received, a first sub-delay time t1 may occur in the FPGA 320 during which the market data is stored in a storage means (e.g., a receiving buffer, a memory, etc.). The first sub-delay time t1 may be calculated based on at least one of a data rate or a size of the market data. For example, the higher the data rate, the shorter the first sub-delay time t1 may be, and the larger the size of the market data, the longer the first sub-delay time t1 may be.
[0078] Additionally, a second sub-delay time t2 required for the stored market data to be pre-processed to generate input data may occur in the FPGA 320. The second sub-delay time t2 may be calculated based on the size of the batch size and / or the processing speed of the FPGA 320. That is, the data pre-processing unit 324 may select a batch size for the input data from among a plurality of candidate batch sizes, and the second sub-delay time t2 may occur until the input data corresponding to the selected batch size is generated. The larger the batch size, the longer the second sub-delay time t2. Also, the slower the processing speed of the FPGA 320, the longer the second sub-delay time t2.
[0079] A third sub-delay time t3 required for input data to be received and loaded into memory may occur in the NPU 340. The third sub-delay time t3 may be calculated based on the size of the input data and / or the input / output bandwidth between the FPGA 320 and the NPU 340. For example, the larger the input / output bandwidth is, the shorter the third sub-delay time t3 may be, and the larger the size of the input data is, the longer the third sub-delay time t3 may be.
[0080] Additionally, a fourth sub-delay time t4 required until the machine learning model is calculated based on the loaded input data may occur in the NPU 340. The fourth sub-delay time t4 may be calculated based on the calculation speed of the machine learning model by the NPU 340 and / or the size of the input data. The larger the size of the input data, the longer the fourth sub-delay time t4 may be, and the slower the calculation speed of the machine learning model, the longer the fourth sub-delay time t4 may be.
[0081] In addition, a fifth sub-delay time t5 required until the result value (i.e., predicted data) of the machine learning model is transmitted to the FPGA 320 may occur in the NPU 340. The fifth sub-delay time t5 may be calculated based on the size of the predicted data and / or the input / output bandwidth between the FPGA 320 and the NPU 340. For example, the fifth sub-delay time t5 may decrease as the input / output bandwidth between the FPGA 320 and the NPU 340 increases, and the fifth sub-delay time t5 may increase as the size of the predicted data increases.
[0082] A sixth sub-delay time t6 required for generating and transmitting order data based on the prediction data (i.e., result value) of the machine learning model received from the NPU 340 may occur in the FPGA 320. The sixth sub-delay time t6 may be calculated based on the processing speed and / or data rate of the FPGA 320. The higher the data rate, the shorter the sixth sub-delay time t6 may be, and the higher the processing speed of the FPGA 320, the shorter the sixth sub-delay time t6 may be.
[0083] The delay time for a securities order can be calculated by adding up each of the sub-delay times t1 to t6 described above.
[0084] 5 is a diagram visualizing a delay time 500 for a securities order. As shown in the figure, the delay time 500 for a securities order can be calculated by adding up the sub-delay times t1 to t6 generated in the FPGA 320 and / or the NPU 340.
[0085] On the other hand, when the FPGA 320 is busy, the sub-delay time due to the busy state of the FPGA 320 may be added to the delay time 500. Also, when the NPU 340 is busy, the sub-delay time due to the busy state of the NPU 340 may be added to the delay time 500. For example, the sub-delay time added due to the busy state of the FPGA 320 and / or the NPU 340 may be determined in consideration of the current processing status of the FPGA 320 and / or the NPU 340 and the work that must be processed in the future. As another example, the sub-delay time added due to the busy state of the FPGA 320 and / or the NPU 340 may be preset in advance.
[0086] The machine learning model may output prediction data for securities at future times based on input data. Alternatively, the machine learning model may be designed and trained to predict different future times based on input data. In this case, a number of future times based on the current time may be determined in advance.
[0087] 6 is a diagram illustrating an example of a visualization of multiple future time points. The horizontal axis of FIG. 6 may represent time. In a low data rate environment as shown in FIG. 6(a), the horizontal width of the unit time may be relatively long, and in a high data rate environment as shown in FIG. 6(b), the horizontal width of the unit time may be relatively short.
[0088] As shown in FIG. 6, the machine learning model may be designed to predict the price and / or price fluctuation of a target item at a future time. FIG. 6 illustrates an example of predicting a future time where the time interval k is a multiple of 5. According to one embodiment, a processor (e.g., an FPGA) may calculate a delay time for a securities order for each of the predetermined future times and select a candidate batch size for each of the future times based on the calculated delay time. In this case, the processor may select, for each of the plurality of predetermined future times, the largest candidate batch size among the plurality of candidate batch sizes whose end point of the delay time precedes each of the plurality of predetermined future times. That is, the processor may identify one or more candidate batch sizes whose end point of the delay time precedes the particular future time among the plurality of candidate batch sizes that can be selected for a particular future time, and select the largest candidate batch size among the identified candidate batch sizes as the candidate batch size for the particular future time.
[0089] In FIG. 6, the maximum batch size is selected for each future time point. For example, for a fifth (k=5) future time point, the candidate batch sizes whose end point of the delay time precedes the fifth future time point are "1" and "2", and thus the maximum batch size "2" may be selected as the candidate batch size for the fifth (k=5) future time point. As another example, for a tenth (k=10) future time point, the candidate batch sizes whose end point of the delay time precedes the tenth future time point are sizes equal to or smaller than "4", and thus the maximum batch size "4" may be selected as the candidate batch size for the tenth (k=10) future time point.
[0090] As described above, in order for the prediction data of the machine learning model for the k-th future time point to be used effectively, the order data based on the prediction data must be transmitted to the target stock exchange before the k-th future time point. However, if the delay time for a securities order is long, the transmission time of the order data transmitted to the target stock exchange may be after the k-th future time point. In this case, the predicted price of the securities may not be valid, and losses may occur, especially in high-frequency securities trading. Accordingly, it may be important in high-frequency securities trading to select a candidate batch size based on the delay time and the future time point, and to generate input data corresponding to the selected batch size.
[0091] FIG. 7 is a diagram visually illustrating the delay time calculated for each candidate batch size. It indicates that the batch size increases from batch 4 to batch 16, and the future time from the first future time to the third future time may be a future time farther from the present time. As illustrated in FIG. 7, a plurality of delay times (latency #1 to latency #3) may be calculated based on each candidate batch size. However, if the end time of the first delay time (latency #1) passes the first future time predicted based on batch 4 and input data corresponding to the size of batch 4 is generated, the generation time of order data based on the predicted data of the machine learning model may be after the first future time. Similarly, if the end time of the third delay time (latency #3) passes the third future time predicted based on batch 16 and input data corresponding to the size of batch 16 is generated, the generation time of order data based on the predicted data of the machine learning model may be after the third future time. Due to such a time difference, the input data corresponding to batch 4 or batch 16 may not be able to derive a valid result.
[0092] Meanwhile, since the end point of the second latency time (latency#2) does not pass the second future time predicted based on batch 8, if input data corresponding to the size of batch 8 is generated, the output data of the machine learning model becomes valid, and the order data can be transmitted to the target stock exchange at the correct timing. Accordingly, when the latency time is calculated as shown in FIG. 7, batch 8 corresponding to the maximum candidate batch size that does not cause a timing deviation phenomenon can be selected, and input data corresponding to the selected candidate batch size can be generated and input to the machine learning model.
[0093] On the other hand, the processor may include multiple dedicated accelerators. In this case, the processor may calculate the latency by taking into account the computation time of each of the multiple dedicated accelerators, and may select a candidate batch size and an NPU for computing the machine learning model based on the latency.
[0094] 8 is a diagram visually illustrating the latency calculated for each batch size of each dedicated accelerator. As shown in FIG. 8, the latency (latency #1, latency #2) for each candidate batch size for dedicated accelerator 1 (NPU1) may be calculated, and the latency (latency #3, latency #4) for each candidate batch size for dedicated accelerator 2 (NPU2) may be calculated. The reason why different latency is calculated for each dedicated accelerator even for the same batch size may be because the calculation speed and / or busy state of the machine learning model for each dedicated accelerator is different.
[0095] Based on the delay time for each candidate batch size of each dedicated accelerator, the processor may select any one of the dedicated accelerators and the candidate batch size for performing the machine learning operation. When the delay time is calculated as shown in FIG. 8, the processor may select the second dedicated accelerator (NPU2) from among the multiple dedicated accelerators as the dedicated accelerator for the operation of the machine learning model, and may select batch 8 as the candidate batch size. When the candidate batch size and the dedicated accelerator are selected in this manner, input data corresponding to the candidate batch size may be generated based on market data, and the generated input data may be provided to the selected dedicated accelerator (NPU2).
[0096] Hereinafter, a learning method for a machine learning model and prediction data acquired from the machine learning model will be described with reference to FIGS.
[0097] FIG. 9 is a diagram illustrating an example in which a machine learning model according to an embodiment of the present disclosure outputs output data 920 based on input data 910. According to an embodiment, the machine learning model 900 may output output data 920 related to an order for a target item based on the input data 910. According to an embodiment, the machine learning model may output a predicted price (e.g., a market price or a mid-price, etc.) of the target item at a specific time point in the future based on the input data 910. According to another embodiment, predicted prices of the target item at multiple future times may be output based on the input data 910. In this case, the price of the target item at each of multiple future times may be predicted based on multi-horizon forecasting using the machine learning model 900.
[0098] According to one embodiment, the input data 910 input to the machine learning model 900 may include an input feature map that includes one or more input features for one or more events at one or more time points. The input data 910 for the machine learning model 900 is described in more detail below with reference to FIG.
[0099] According to one embodiment, the machine learning model 900 may be trained to infer reference output data associated with a securities order on a target securities exchange using reference input data generated based on reference market data. For example, the machine learning model 900 may be supervised trained to infer a midpoint price of the target securities at a next time point based on the input data for a time interval including a total of M consecutive time points using reference input data from time point t to time point t+M-1 generated based on first reference market data of a first securities exchange and second reference market data of a second securities exchange.
[0100] According to one embodiment, the machine learning model 900 may be trained to infer forecast data for a specific item at a plurality of future points in time based on a training set including market data for the specific item at a particular point in time and ground truth data. Here, the ground truth data may be the price of the specific item at each of a plurality of future points in time. A difference (loss) between the inferred price for the specific item at a particular future point in time output from the machine learning model 900 and the price for the specific item at a particular future point in time included in the ground truth data may be calculated, and the calculated difference may be reflected (feedback) in the machine learning model 900 to adjust the weight value of each node included in the artificial neural network.
[0101] The output data 920 output by the machine learning model 900 may include information related to securities orders at the target securities exchange, and a processor (e.g., a processor of an information processing system) may generate order data for the target securities based on the output data 920 and based on pre-specified rules.
[0102] According to one embodiment, the machine learning model 900 of the present disclosure may be an artificial neural network model (e.g., DNN, etc.), which is described in more detail below with reference to FIG.
[0103] 10 is a diagram illustrating an example of a configuration of input data 1010 for a machine learning model according to an embodiment of the present disclosure. The information processing system may generate the input data 1010 based on market data received from one or more exchanges. The input data 1010 may have a size corresponding to a batch size. According to an embodiment, the input data 1010 may include an input feature map including one or more input features for one or more items at one or more time points.
[0104] For example, as shown in FIG. 10, the input feature map may include N (where N is a natural number) input features for K items at M (where M is a natural number) time points. In the illustrated example, data 1020 at a specific time point (time point m in FIG. 10) of the input feature map included in the input data may include one or more input features (price and quantity at the top of the buy order book, price and quantity at the top of the sell order book in FIG. 10, etc.) for one or more items (first item, second item, third item, etc. in FIG. 10) at the specific time point. Also, data 1030 for a specific input feature (n-th input feature in FIG. 10) of the input feature map included in the input data may include a specific input feature for one or more items at one or more time points (from time point t-M+1 to time point t in FIG. 10). In one embodiment, the input feature map may be generated such that one or more input features for different items intersect with each other.
[0105] According to an embodiment, one or more items included in the input data 1010 may be items that are leading indicators of the market state of the target item that is the subject of the order. For example, if the target item that is the subject of the order is a stock (spot) item of Company A, at least one of a futures item related to the stock of Company A, an option item related to the stock of Company A, an item related to Company A included in another exchange, and a futures item for a product related to Company A may be the leading indicator item. In one embodiment, the one or more items may include the target item. That is, the information processing system may predict the future market state of the target item based on the input data including data for the target item. Also, in one embodiment, information for each input item may be included in a code (symbol) associated with each input item.
[0106] According to one embodiment, one or more input features included in the input data 1010 may include information that is significant in predicting the market situation of the target item. For example, the input features may include various information that can be extracted from the order book of one or more items, such as the market price (transaction price), the price at the top of the order book on the buying side, the quantity, the price at the top of the order book on the selling side, the quantity, the number of buyers, the number of sellers, the bid price at the next stage above the top of the order book, the ask price at the next stage above the top of the order book, the variance of the bids and offers included in the order book, information that has been processed from the above, and / or the reliability of the information. In one embodiment, such one or more input features may be extracted from each of the one or more items.
[0107] As described above, the configured input data 1010 may be transmitted to a dedicated accelerator for the machine learning model by a processor (e.g., FPGA, etc.) and input to the machine learning model. According to one embodiment, a future time and a candidate batch size may be determined based on the delay time, and the input data 1010 corresponding to the determined candidate batch size may be provided to the dedicated accelerator.
[0108] 11 is an exemplary diagram illustrating an artificial neural network model 1100 according to an embodiment of the present disclosure. The artificial neural network model 1100 is an example of a machine learning model, which is a statistical learning algorithm implemented based on the structure of a biological neural network in machine learning technology and cognitive science, or a structure for executing the algorithm.
[0109] According to an embodiment, the artificial neural network model 1100 may represent a machine learning model having a problem-solving ability by learning to reduce an error between a correct output corresponding to a specific input and an inferred output by repeatedly adjusting the weights of the synapses of nodes, which are artificial neurons forming a network by synaptic connections, as in a biological neural network. For example, the artificial neural network model 1100 may include any probability model, neural network model, etc. used in artificial intelligence learning methods such as machine learning and deep learning.
[0110] According to one embodiment, the artificial neural network model 1100 may include an artificial neural network model configured to infer data associated with a securities order (e.g., data regarding price, price movement, etc.) at a target securities exchange at a future time point using input data generated based on market data for one or more securities exchanges. According to another embodiment, the artificial neural network model 1100 may include a multi horizon forecasting model to forecast data associated with a securities order (e.g., data regarding price, price movement, etc.) at multiple future time points at a target securities exchange.
[0111] The artificial neural network model 1100 is realized by a multilayer perceptron (MLP) composed of multiple nodes and connections between them. The artificial neural network model 1100 according to this embodiment can be realized using one of various artificial neural network model structures including MLP. As shown in FIG. 11, the artificial neural network model 1100 includes an input layer 1120 that receives an input signal or data 1110 from the outside, an output layer 1140 that outputs an output signal or data 1150 corresponding to the input data, and n (here, n is a positive integer) hidden layers 1130_1 to 1130_n that are located between the input layer 1120 and the output layer 1140 and receive signals from the input layer 1120, extract characteristics, and transmit them to the output layer 1140. Here, the output layer 1140 receives signals from the hidden layers 1130_1 to 1130_n and outputs them to the outside.
[0112] The learning method of the artificial neural network model 1100 includes a supervised learning method in which the model learns to optimize the solution of a problem by inputting a teacher signal (correct answer) and an unsupervised learning method in which no teacher signal is required. In one embodiment, the artificial neural network model 1100 can be supervised and / or unsupervised trained to infer data related to securities orders at a target stock exchange. For example, the artificial neural network model 1100 can be supervised trained to infer a reference price of a target item at one or more future times from reference input data.
[0113] The artificial neural network model 1100 thus trained may be stored in a memory (not shown) of the information processing system and may infer data related to securities orders at the target securities exchange in response to input of data received from the communications module and / or the memory.
[0114] According to one embodiment, input data for an artificial neural network model for inferring data related to securities orders at a target exchange may include one or more input features for one or more instruments at one or more time points. For example, the input data input to the input layer 1120 of the artificial neural network model 1100 may be a vector 1110, where each vector data element includes data containing information for one or more input features for one or more instruments at one or more time points. In response to the input of the data, the output data output by the output layer 1140 of the artificial neural network model 1100 may be a vector 1150 that indicates or characterizes data related to securities orders at the target exchange. That is, the output layer 1140 of the artificial neural network model 1100 may be configured to output a vector that indicates or characterizes data related to securities orders at the target exchange at one or more future time points. In the present disclosure, the output data of the artificial neural network model 1100 is not limited to the types described above and may include any information / data that indicates data related to securities orders at the target exchange at one or more future time points.
[0115] In this way, a plurality of input data and a corresponding plurality of output data are matched to the input layer 1120 and the output layer 1140 of the artificial neural network model 1100, respectively, and the synapse values between the nodes included in the input layer 1120, the hidden layers 1130_1 to 1130_n, and the output layer 1140 are adjusted, so that the artificial neural network model 1100 can learn to extract a correct output corresponding to a specific input. Through this learning process, characteristics hidden in the input data of the artificial neural network model 1100 can be identified, and the synapse values (or weights) between the nodes of the artificial neural network model 1100 can be adjusted so that the error between the output data calculated based on the input data and the target output is reduced. The artificial neural network model 1100 trained in this way can output data related to a securities order at a target stock exchange in response to the input data.
[0116] Hereinafter, a securities trading method using a machine learning model according to an embodiment of the present disclosure will be described with reference to FIGS.
[0117] FIG. 12 is a flowchart illustrating a securities trading method 1200 according to an embodiment of the present disclosure. The method illustrated in FIG. 12 is merely an embodiment for achieving the object of the present disclosure, and it is obvious that some steps may be added or deleted as necessary. The method illustrated in FIG. 12 may be performed by at least one processor included in an information processing system. For convenience of explanation, each step illustrated in FIG. 12 will be described as being performed by a processor included in the information processing system illustrated in FIG. 2. The processor will be described as including a first processor for data pre / post processing and a second processor including a dedicated accelerator for a machine learning model. Here, the first processor may be an FPGA, and the second processor may be an NPU.
[0118] The first processor may receive one or more market data from at least one of a stock exchange and / or a designated website (S1210), where the market data may include trading, valuation information, etc. for items traded on the stock exchange. For example, the market data may include trading, valuation information, etc. for one or more target items collected from the stock exchange and / or the website.
[0119] Subsequently, the first processor may pre-process the market data to generate input data for the machine learning model, and provide the input data to the second processor (S1220). A specific method for pre-processing the market data to generate the input data will be described with reference to FIG. 13.
[0120] Thereafter, the second processor performs calculation processing of the machine learning model using the input data, obtains forecast data for the target item in response thereto, and provides the obtained forecast data to the first processor (S1230). For example, the second processor receives input data from the first processor, inputs the input data to the machine learning model, and performs a series of calculations on the input data to obtain output data (forecast data) of the machine learning model. The forecast data of the machine learning model may include data on a future time point, a target item, and a forecast price.
[0121] Thereafter, the first processor may generate order data based on the output data (prediction data) of the machine learning model provided by the second processor, and then transmit the order data to the target stock exchange (S1240). For example, the first processor may generate order data for buying or selling the target item included in the prediction data. In this case, the first processor may monitor whether a future time included in the prediction data will arrive, and transmit the order data generated at the future time or at a time t seconds prior to the future time to the target stock exchange. As another example, the first processor may monitor whether a future time included in the prediction data will arrive, and generate order data at a future time or at a time t seconds prior to the future time, and then transmit the generated order data to the target stock exchange.
[0122] 13 is a flow chart illustrating a method 1220 for pre-processing market data according to an embodiment of the present disclosure. When market data is received, the first processor may select one of a plurality of predetermined future times as a verification target (S1310). In one embodiment, the first processor may select the nearest unselected future time from the plurality of predetermined future times.
[0123] Then, the first processor may calculate a delay time for each candidate batch size for the selected future time point (S1320). In one embodiment, the first processor may calculate a delay time for each candidate batch size based on a data rate, a bandwidth of input / output data between the first processor and the second processor, a size of the input / output data, a computation speed of the machine learning model by the second processor, a processing speed of the first processor, and / or a busy state of the second processor.
[0124] Next, the first processor may identify one or more candidate batch sizes whose end point of the calculated delay time precedes the selected future time point, and select a batch size having a maximum size among the identified candidate batch sizes as a candidate batch size for the selected (i.e., being verified) future time point (S1330). Accordingly, one candidate batch size may be selected for one future time point.
[0125] When the candidate batch size for the selected future time point is selected, the first processor may calculate an expected profit for the candidate batch size for the future time point (S1340). Here, the expected profit may be a profit expected per unit time until the order data is generated. The expected profit may be obtained based on the profit rate per query, the candidate batch size, and the computation time of the machine learning model for the candidate batch size. For example, the expected profit may be obtained according to the following Equation 1.
[0126]
number
[0127] Here, "price" represents the profit rate per query and may be defined as a predetermined constant, bs represents the batch size, and t_dnn represents the computation time in the machine learning model, which may be calculated based on the computation speed of the machine learning model (i.e., the processing speed in the NPU) or / and the size of the input data.
[0128] When the calculation of the expected profit for the candidate batch sizes for the future time points is completed, the first processor can determine whether the selection (verification) for all of the predetermined future time points is completed (S1350).
[0129] In response to determining that there remains a future time point that has not been selected (verified) among the plurality of predetermined future times, the first processor may select the future time point that was not selected as the verification target again as the verification target (S1360). Subsequently, the first processor may proceed with the process from step S1320 for the other future time points selected as the verification target.
[0130] Meanwhile, in response to the determination result of step S1350 that there is no future time point remaining that has not been selected (verified) among the predetermined future time points, the first processor may identify expected profits of the selected candidate batch sizes at each future time point, and finally select a candidate batch size for the future time point having the maximum profit among them (S1370).Then, the first processor may generate input data corresponding to the candidate batch size for the selected future time point using market data, and provide the generated input data to the second processor (S1380).
[0131] According to the present embodiment, a batch size that causes a time deviation is not selected, so that unnecessary calculations can be prevented from being performed in the machine learning model. In addition, according to the present embodiment, a future time point and a candidate batch size that can obtain a maximum profit can be selected, and input data corresponding to the selected candidate batch size can be input to the machine learning model.
[0132] Additionally or alternatively, a data precision of the input data may be preset, in which case the first processor may calculate the delay time based on the data precision of the input data. Here, the data precision may indicate a measure of how much the input data is stored without loss. For example, a data precision of 100% may mean that the input data is completely provided to the second processor without loss and input to the machine learning model. As another example, a data precision of 50% may mean that the input data is quantized at 1 / 2 the bit (e.g., from int8 to int4) or compressed by 2 times and input to the machine learning model. As yet another example, a data precision of 50% may mean that the input data is quantized at 1 / 2 the bit or the market data is compressed by 2 times, and the input data is generated based on the quantized or compressed market data.
[0133] According to an embodiment, the second processor (e.g., NPU, etc.) may include processing elements having different sizes depending on the data accuracy of the input data. For example, an NPU for processing input data having fixed point 8 may include a processing element for processing fixed point 8. As another example, an NPU for processing input data having fixed point 4 may include a processing element for processing fixed point 4. However, the size of the processing element for processing fixed point 8 may be approximately twice as large as the processing element for processing fixed point 4. Accordingly, if the NPUs are installed in the same space, the number of processing elements for processing fixed point 4 may be approximately twice as large as the number of processing elements for processing fixed point 8. For example, if the number of processing elements for processing fixed point 8 (e.g., data accuracy 100%) is twice as large as the number of processing elements for processing fixed point 4 (e.g., data accuracy 50%), the batch size of input data input to an NPU including processing elements for processing fixed point 4 may increase by two times. In this case, the size of SRAM required for calculation and the time required for calculation in an NPU including processing elements for processing fixed point 8 and an NPU including processing elements for processing fixed point 4 may be the same or similar.
[0134] When the data accuracy of the input data is reduced, the input data may not be completely input to the machine learning model, resulting in some loss. As a result, the prediction accuracy may be reduced, but the batch size of the input data may increase because there are more processing elements to process the input data with low data accuracy. That is, the reduced prediction accuracy due to the reduced data accuracy may affect the profit rate per query to decrease, but the increased batch size due to the reduced data accuracy may affect the expected profit to increase. Referring to the above equation 1, the expected profit may decrease by the amount of the decrease in the profit rate per query, but may increase by the amount of the increased batch size. For example, assuming that the data accuracy is halved, the profit rate per query is reduced to 50 percent, and the batch size is doubled, the expected profit may not change.
[0135] According to an embodiment, a plurality of dedicated accelerators may be included in the information processing system. In this case, the first processor may calculate a first delay time including a calculation time of a first dedicated accelerator and a second delay time including a calculation time of a second dedicated accelerator for each of a plurality of candidate batch sizes. The first processor may also select the largest candidate batch size for each of a plurality of predetermined future times, the end point of the shorter delay time among the first delay time and the second delay time being prior to each of the plurality of predetermined future times. The first processor may also calculate expected profits for the selected candidate batch sizes classified by dedicated accelerators, and identify and select the candidate batch size, future time, and dedicated accelerator with the highest expected profit. Input data generated corresponding to the candidate batch size with the highest expected profit may be provided to the selected dedicated accelerator (the dedicated accelerator with the highest expected profit).
[0136] Meanwhile, according to another embodiment of the present disclosure, the machine learning model may output forecast data of the target stock for each of a plurality of future time points. For example, the machine learning model may output first forecast data for the target stock at a first time point, second forecast data for the target stock at a second time point, and third forecast data for the target stock at a third time point. The forecast data may include a target security identification, a target price, and an expected return.
[0137] FIG. 14 is a diagram showing an example of expected profits for each of a plurality of future time points. As shown in FIG. 14, the machine learning model can infer expected profits for each of a plurality of future time points based on input data, and output prediction data including expected profits and target items for each of the future time points. Here, the target items at each of the future time points may be the same or different. In FIG. 14, expected profits are shown in United States dollars (USD).
[0138] The first processor can obtain forecast data including expected profits for each of a plurality of future time points as shown in FIG. 14, generate order data based on the forecast data, and transmit the order data to a target stock exchange.
[0139] FIG. 15 is a flowchart for explaining a securities trading method 1500 according to another embodiment of the present disclosure. The method shown in FIG. 15 is merely one embodiment for achieving the object of the present disclosure, and it goes without saying that some steps may be added or deleted as necessary. In addition, the method shown in FIG. 15 may be performed by at least one processor included in an information processing system. In addition, the processor will be described as including a first processor for data pre-processing and post-processing and a second processor including a dedicated accelerator for the machine learning model. Here, the first processor may be an FPGA, and the second processor may be an NPU.
[0140] The first processor may receive one or more market data from a stock exchange and / or a website (S1510), where the market data may include trading, valuation information, etc. for items traded on the stock exchange. For example, the market data may include trading, valuation information, etc. for one or more target items collected from the stock exchange and / or a website.
[0141] Next, the first processor may generate input data for the machine learning model based on the market data and provide the input data to the dedicated accelerator (S1520). For example, the first processor may generate input data corresponding to a preset batch size. As another example, the first processor may determine a batch size according to a frequency and / or a size of received market data and generate input data corresponding to the batch size.
[0142] Thereafter, the second processor may input the input data to the machine learning model and obtain prediction data of the target event for each of a plurality of future time points from the machine learning model (S1530). For example, the second processor may obtain first prediction data for the target event at a first time point, second prediction data for the target event at a second time point, and third prediction data for the target event at a third time point from the machine learning model. The prediction data may include an expected profit for the target event for each future time point.
[0143] Thereafter, the first processor may receive forecast data for each of the plurality of future time points from the second processor and select at least one of the plurality of future time points (S1540). In one embodiment, the first processor may calculate a delay time for generating order data and select at least one of the plurality of future time points based on the delay time. As an example, the first processor may select the earliest future time point after the delay time among the plurality of future time points. As another example, the first processor may identify one or more future time points after the delay time, identify or calculate an expected profit for each of the identified future time points, and select a future time point with the largest expected profit. For example, the calculation of the expected profit may be performed based on a predetermined algorithm or mathematical formula (e.g., Equation 1 above). As another example, each expected profit may be calculated and output from a machine learning model. In this case, the expected profit may be included in the forecast data.
[0144] Thereafter, the first processor may generate order data based on the forecast data for the selected future time, and then transmit the order data to the target stock exchange (S1550). For example, the first processor may generate order data for buying or selling a target item included in the forecast data for the selected future time at a target price. In this case, the first processor may monitor whether the selected future time will arrive, and transmit the order data generated at the future time or t seconds prior to the future time to the target stock exchange. As another example, the first processor may monitor whether the selected future time will arrive, and generate order data at the future time or t seconds prior to the future time, and then transmit the generated order data to the target stock exchange.
[0145] FIG. 16 is a diagram illustrating an example of a process in which order data is generated based on output data. Prediction data for a plurality of future time points (k=5, k=10, ..., k=25) may be obtained through a machine learning model. Depending on the latency, prediction data having the earliest future time point (k=5) among the prediction data may be treated as invalid because it falls outside the latency range. Second prediction data (prediction data represented by a circle in FIG. 16) having the earliest future time point (k=10) among the remaining prediction data that is valid (i.e., the end point of the latency time precedes the future time point) may be selected, and order logic may be executed based on the selected second prediction data to generate order data. As another example, a future time point at which the maximum expected profit is expected may be selected among the remaining valid prediction data, and order logic may be executed based on the prediction data for the selected future time point to generate order data.
[0146] As another example, the first processor may use each of the valid forecast data in chronological order to generate a plurality of order data and transmit them to the target stock exchange. For example, referring to FIG. 16, the first processor may transmit second order data generated based on the second forecast data to the target stock exchange at a second future time (k=10), transmit third order data generated based on the third forecast data to the target stock exchange at a third future time (k=15), transmit fourth order data generated based on the fourth forecast data to the target stock exchange at a fourth future time (k=20), and transmit fifth order data generated based on the fifth forecast data to the target stock exchange at a fifth future time (k=25).
[0147] FIG. 17 is a block diagram of any computing device 1700 associated with securities trade generation according to an embodiment of the present disclosure. For example, the computing device 1700 may be associated with the information processing system 120 and / or a user terminal (not shown). As shown, the computing device 1700 may include one or more processors 1720, a bus 1710, a communication interface 1730, a memory 1740 for loading a computer program 1760 executed by the processor 1720, and a storage 1750 for storing the computer program 1760. However, FIG. 17 shows only components related to the embodiment of the present disclosure. Therefore, a person of ordinary skill in the art to which the present disclosure pertains will understand that other general components may be included in addition to the components shown in FIG. 17.
[0148] The processor 1720 controls the overall operation of each component of the computing device 1700. The processor 1720 may include a central processing unit (CPU), a microprocessor unit (MPU), a microcontroller unit (MCU), a graphic processing unit (GPU), a neural processing unit (NPU), or any other type of processor commonly known in the technical field of the present disclosure. The processor 1720 may also perform calculations for at least one application or program for executing a method according to an embodiment of the present disclosure. The computing device 1700 may include one or more processors. For example, the computing device 1700 may include a processor implemented in an FPGA, or a dedicated accelerator (NPU ASIC) for machine learning models implemented in an ASIC.
[0149] The memory 1740 may store various data, instructions, and / or information. The memory 1740 may load one or more computer programs 1760 from the storage 1750 to execute methods / operations according to various embodiments of the present disclosure. The memory 1740 may be embodied as a volatile memory such as a RAM, although the technical scope of the present disclosure is not limited thereto. If the computing device 1700 includes multiple processors, the computing device 1700 may include a first memory for a first processor and a second memory for a second processor. In this case, the first processor may perform the above-mentioned data pre-processing and / or post-processing by executing one or more instructions stored in the first memory. The second processor may perform the operation of the machine learning model and provide prediction data to the first processor by executing one or more instructions stored in the second memory.
[0150] The bus 1710 can provide a communication function between the components of the computing device 1700. The bus 1710 can be implemented with various types of buses such as an address bus, a data bus, and a control bus.
[0151] The communication interface 1730 may support wired / wireless Internet communication of the computing device 1700. The communication interface 1730 may also support various communication methods other than Internet communication. To this end, the communication interface 1730 may be configured to include a communication module that is widely known in the technical field of the present disclosure.
[0152] Storage 1750 can non-temporarily store one or more computer programs 1760. Storage 1750 can include non-volatile memory such as a read only memory (ROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a hard disk, a removable disk, or any other form of computer-readable recording medium commonly known in the art to which the present disclosure pertains.
[0153] The computer program 1760, when loaded into the memory 1740, may include one or more instructions that cause the processor 1720 to perform operations / methods according to various embodiments of the present disclosure. That is, the processor 1720 may execute the one or more instructions to perform operations / methods according to various embodiments of the present disclosure.
[0154] The above flow chart and description are merely examples and may be implemented differently in some embodiments, for example, the order of steps may be changed, some steps may be repeated, some steps may be omitted, or some steps may be added.
[0155] The above-mentioned method may be provided as a computer program stored in a computer-readable recording medium for execution by a computer. The medium may be a medium for continuously storing a computer-executable program or a medium for temporarily storing the program for execution or download. The medium may be a variety of recording or storage means in the form of a single or multiple pieces of hardware combined, and is not limited to a medium directly connected to a computer system, but may be a medium distributed on a network. Examples of the medium include magnetic media such as hard disks, flexible disks, and magnetic tapes, optical recording media such as CD-ROMs and DVDs, magneto optical media such as floptical disks, and media configured to store program instructions, including ROMs, RAMs, and flash memories. Other examples of the medium include recording or storage media managed by app stores that distribute applications, and sites and servers that supply or distribute various other software.
[0156] The methods, operations, or techniques of the present disclosure may be embodied by a variety of means. For example, such techniques may be embodied in hardware, firmware, software, or a combination thereof. Those of ordinary skill in the art will appreciate that the various exemplary logical blocks, modules, circuits, and algorithmic steps described in connection with the present disclosure may be embodied in electronic hardware, computer software, or a combination of both. To clearly illustrate such interchangeability between hardware and software, the various exemplary components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is embodied in hardware or software will depend on the particular application and design requirements imposed on the overall system. Those of ordinary skill in the art may implement the described functionality in various ways for each particular application, but such implementation should not be interpreted as causing a departure from the scope of the present disclosure.
[0157] In a hardware implementation, the processing units used to perform the techniques may be embodied within one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, electronic devices, other electronic units designed to perform the functions described in this disclosure, computers, or any combination thereof.
[0158] Thus, the various example logic blocks, modules, and circuits described in connection with this disclosure may be embodied or performed as a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination designed to perform the functions described herein. A general purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be embodied as a combination of computing devices, such as a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other configuration.
[0159] In a firmware and / or software implementation, the techniques may be embodied with instructions stored on a computer-readable medium such as random access memory (RAM), read-only memory (ROM), non-volatile random access memory (NVRAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable PROM (EEPROM), flash memory, compact disc (CD), magnetic or optical data storage devices, etc. The instructions may be executable by one or more processors and may cause the processor(s) to perform certain aspects of the functions described in this disclosure.
[0160] If embodied in software, the techniques described above may be stored on or transmitted through a computer-readable medium as one or more instructions or code. Computer-readable media includes both computer storage media and communication media, including any medium that facilitates transfer of a computer program from one place to another. Storage media may be any available medium that can be accessed by a computer. By way of non-limiting example, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to transport or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Additionally, any connection may be used with a computer-readable medium as appropriate.
[0161] For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted wire, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted wire, digital subscriber line, or wireless technologies such as infrared, radio, and microwave are included within the definition of media. As used herein, disk and disc include CDs, laser discs, optical disks, digital versatile discs (DVDs), flexible disks, and Blu-ray discs, where disks typically reproduce data magnetically while discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.
[0162] A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium may be coupled to the processor such that the processor can read information from, and record information on, the storage medium. Alternatively, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. Alternatively, the processor and the storage medium may reside as discrete components in a user terminal.
[0163] Although the embodiments described above have been described as utilizing aspects of the presently disclosed subject matter on one or more stand-alone computer systems, the present disclosure is not limited thereto and may be implemented in connection with any computing environment, such as a network or distributed computing environment. Moreover, aspects of the subject matter in the present disclosure may be implemented on multiple processing chips or devices, and storage may be affected equally across multiple devices. Such devices may include PCs, network servers, and handheld devices.
[0164] Although the present disclosure has been described in relation to some embodiments, various modifications and changes may be made within the scope of the present disclosure that can be understood by those of ordinary skill in the art to which the present disclosure pertains, and such modifications and changes should be understood to fall within the scope of the claims appended hereto. [Explanation of symbols]
[0165] 110 Information Processing Systems 120 First Stock Exchange 130 Second Stock Exchange
Claims
1. 1. A method of high frequency securities trading performed by at least one processor, comprising: generating input data based on market data for a target line item; inputting the generated input data into a machine learning model to generate prediction data for the target event for each of a plurality of future time points; generating order data for the target item based on the generated forecast data; calculating a delay time for the securities order; The step of generating order data comprises: selecting one of the plurality of future time points based on the delay time; generating order data for the target item corresponding to the selected future time.
2. The step of selecting one future time point from the plurality of future time points comprises:
2. The method of claim 1, further comprising the step of selecting, from among said plurality of future times, the earliest future time after said delay time.
3. The step of selecting one future time point from the plurality of future time points comprises: selecting one or more future time points after the delay time from among the plurality of future time points; calculating an expected return for each of the one or more selected future times; and selecting a future time point at which the calculated expected return is maximum.
4. the at least one processor includes a first processor and a second processor for the machine learning model; The step of calculating the delay time includes:
2. The method of claim 1, further comprising: calculating the delay time based on at least one of a data rate, an input / output bandwidth between the first processor and the second processor, a size of the input / output data, a calculation speed of the machine learning model by the second processor, a processing speed of the first processor, or a busy state of the second processor.
5. The delay time is 5. The high frequency securities trading method of claim 4, including a required time for the market data to be pre-processed by the first processor, a required time for the pre-processed data to be transmitted from the first processor to the second processor, a required time for the second processor to complete the operation of the machine learning model, a required time for the second processor to transmit an operation result from the second processor to the first processor, and a required time for the order data to be generated by the first processor based on the operation result.
6. 2. The method of claim 1, further comprising transmitting the selected order data to a target securities exchange.
7. The machine learning model is 2. The method of claim 1, wherein the method is trained to infer forecast data for a particular item at a plurality of time points in the future from a particular time point based on a training set including market data and ground truth data for the particular item at a particular time point.
8. A computer readable computer program for executing the method according to any one of claims 1 to 7 on a computer.
9. In an information processing system, a first memory storing one or more instructions; a first processor configured to generate input data based on market data for a target item by executing one or more instructions in the first memory; a second memory storing one or more instructions; a second processor for the machine learning model configured to receive the input data from the first processor, input the input data into a machine learning model to generate forecast data for the target event for each of a plurality of future time points, and provide the generated forecast data to the first processor by executing one or more instructions in the second memory; The first processor, further configured to generate order data for the target item based on the forecast data provided by the second processor; The first processor, further configured to calculate a delay time for the securities order; Generating the order data includes: selecting a future time point from among the plurality of future time points based on the delay time; generating order data for the target item corresponding to the selected future time point.
10. Selecting one future time point from the plurality of future time points The information processing system according to claim 9 , further comprising selecting, from among the plurality of future times, the earliest future time after the delay time.
11. Selecting one future time point from the plurality of future time points selecting one or more future time points after the delay time from among the plurality of future time points; calculating an expected return for each of the one or more selected future times; and selecting a future time point at which the calculated expected profit is maximum.
12. Calculating the delay time 10. The information processing system of claim 9, further comprising: calculating the delay time based on at least one of a data rate, an input / output bandwidth between the first processor and the second processor, a size of the input / output data, a calculation speed of the machine learning model by the second processor, a processing speed of the first processor, or a busy state of the second processor.
13. The machine learning model is 10. The information processing system of claim 9, which is trained to infer forecast data for a specific item at a plurality of points in time future to a specific point in time based on a training set including market data and ground truth data for the specific item at a specific point in time.
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