Imaging device

Abstract

This imaging device of a mode of the present disclosure comprises a pixel unit, and a peripheral circuit unit provided around the pixel unit. The pixel unit includes: a photoelectric conversion film; an upper electrode positioned above the photoelectric conversion film; a lower electrode facing the upper electrode with the photoelectric conversion film sandwiched between; and an electrically conductive first light shielding film that overlaps a portion of the top surface of the photoelectric conversion film in the plan view, and is electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit, and a second light shielding film overlapping at least a portion of the peripheral circuit in the plan view. The first light shielding film and the second light shielding film are separated.

Description

[Technical field]

[0001] The present disclosure relates to an imaging device. [Background technology]

[0002] An image sensor includes a photodetector element that generates an electric signal according to the amount of incident light, and has a number of pixels arranged one-dimensionally or two-dimensionally. A stacked image sensor is an image sensor that has photodetector elements as pixels, each of which has a structure in which a photoelectric conversion film is stacked on a substrate. Examples of such image sensors are disclosed in Patent Documents 1 to 4. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4729275 [Patent Document 2] JP 2019-016667 A [Patent Document 3] JP 2005-328068 A [Patent Document 4] Patent No. 5735318 Summary of the Invention [Problem to be solved by the invention]

[0004] Patent Document 3 discloses a photodetector array having a structure in which a voltage is applied to a transparent electrode through a metal film formed so as to cover the side of a layer forming the photodetector. However, in the structure disclosed in Patent Document 3, if a control circuit is arranged on the periphery, the voltage applied to the transparent electrode may adversely affect the control circuit. In other words, the conventional technology has a problem in that the operation of the control circuit becomes unstable.

[0005] In view of this, the present disclosure provides an imaging device capable of stabilizing circuit operation. [Means for solving the problem]

[0006] An imaging device according to an embodiment of the present disclosure includes a pixel unit and a peripheral circuit unit provided around the pixel unit. The pixel unit includes a photoelectric conversion film, an upper electrode located above the photoelectric conversion film, a lower electrode facing the upper electrode with the photoelectric conversion film sandwiched therebetween, and a conductive first light-shielding film overlapping a portion of an upper surface of the photoelectric conversion film in a plan view and electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit and a second light-shielding film overlapping at least a portion of the peripheral circuit in a plan view. The first light-shielding film and the second light-shielding film are separated from each other. Effect of the Invention

[0007] According to the present disclosure, it is possible to stabilize the circuit operation of an imaging device. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing a circuit configuration of an imaging device according to the first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of a device structure of a pixel of the imaging device according to the first embodiment. [Diagram 3] FIG. 3 is a plan view of the imaging device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view of the imaging device according to the first embodiment taken along line IV-IV in FIG. [Diagram 5] FIG. 5 is a cross-sectional view of the imaging device according to the second embodiment. [Figure 6] FIG. 6 is a cross-sectional view of an imaging device according to the third embodiment. [Figure 7] FIG. 7 is a cross-sectional view of an imaging device according to the fourth embodiment. [Figure 8] FIG. 8 is a cross-sectional view of an imaging device according to the fifth embodiment. [Figure 9] FIG. 9 is a cross-sectional view of an imaging device according to the sixth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] (Summary of the Disclosure) An imaging device according to an embodiment of the present disclosure includes a pixel unit and a peripheral circuit unit provided around the pixel unit. The pixel unit includes a photoelectric conversion film, an upper electrode located above the photoelectric conversion film, a lower electrode facing the upper electrode with the photoelectric conversion film sandwiched therebetween, and a conductive first light-shielding film overlapping a portion of an upper surface of the photoelectric conversion film in a plan view and electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit and a second light-shielding film overlapping at least a portion of the peripheral circuit in a plan view. The first light-shielding film and the second light-shielding film are separated from each other.

[0010] As a result, the first light-shielding film used to supply power to the upper electrode and the second light-shielding film included in the peripheral circuit section are separated, so that even if the potential of the first light-shielding film fluctuates, the effect on the second light-shielding film is sufficiently suppressed. Therefore, the peripheral circuit covered by the second light-shielding film can operate stably regardless of the potential of the first light-shielding film. In this way, the imaging device according to this embodiment can stabilize the circuit operation.

[0011] Also, for example, the peripheral circuit section may include a spacer layer that includes the same material as the photoelectric conversion film and overlaps at least a portion of the peripheral circuit in a planar view, and the second light-shielding film may be located above the spacer layer.

[0012] This allows the distance between the second light-shielding film and the peripheral circuitry to be increased, so that even if the second light-shielding film is conductive and the potential of the second light-shielding film fluctuates due to some influence, the influence on the peripheral circuitry can be suppressed, thereby stabilizing the circuit operation of the imaging device.

[0013] Also, for example, the thickness of the photoelectric conversion film and the thickness of the spacer layer may be the same.

[0014] This allows the photoelectric conversion film and the spacer layer to be formed in the same process, thereby simplifying the manufacturing process by reducing the number of steps required to manufacture the imaging device, etc. By simplifying the manufacturing process, it is possible to realize an imaging device with high reliability and less manufacturing variation.

[0015] Also, for example, the peripheral circuit section may further include an insulating layer located between the second light-shielding film and the spacer layer.

[0016] This ensures electrical insulation between the second light-shielding film and the spacer layer. Even if the potential of the second light-shielding film fluctuates, the influence on the peripheral circuits can be suppressed. Therefore, the circuit operation of the imaging device can be stabilized.

[0017] Also, for example, the peripheral circuit may include a sample-and-hold circuit, and the second light-shielding film may overlap the sample-and-hold circuit in a plan view.

[0018] This makes it possible to prevent light from entering the sample-and-hold circuit by the second light-shielding film, thereby suppressing fluctuations in the amount of charge held in the sample-and-hold circuit, and thus suppressing deterioration in the quality of the image generated by the imaging device.

[0019] Also, for example, the peripheral circuit may include a sample-and-hold circuit, and the sample-and-hold circuit may not be disposed between the first light-shielding film and the second light-shielding film in a plan view.

[0020] This makes it possible to prevent light from entering the sample-and-hold circuit by the first light-shielding film or the second light-shielding film, thereby suppressing fluctuations in the amount of charge held in the sample-and-hold circuit and thus suppressing deterioration in the quality of the image generated by the imaging device.

[0021] Also, for example, the material of the first light-shielding film may be the same as the material of the second light-shielding film, or the first light-shielding film and the second light-shielding film may be formed using the same material.

[0022] This allows the first light-shielding film and the second light-shielding film to be formed in the same process, thereby simplifying the manufacturing process by reducing the number of processes required to manufacture the imaging device, etc. By simplifying the manufacturing process, it is possible to realize an imaging device with less manufacturing variation and high reliability.

[0023] Also, for example, the second light-shielding film may be conductive, and a constant voltage or a ground voltage may be applied to the second light-shielding film.

[0024] This makes it possible to fix the potential of the second light-shielding film at a predetermined value, thereby enabling the peripheral circuits covered by the second light-shielding film to operate stably.

[0025] Also, for example, a variable voltage may be applied to the first light-shielding film.

[0026] This makes it possible, for example, to change the value at which the potential of the second light-shielding film is fixed depending on the situation, thereby enabling the peripheral circuits covered by the second light-shielding film to operate stably.

[0027] Also, for example, the first light-shielding film and the second light-shielding film may have the same thickness.

[0028] This allows the first light-shielding film and the second light-shielding film to be formed in the same process, thereby simplifying the manufacturing process by reducing the number of processes required to manufacture the imaging device, etc. By simplifying the manufacturing process, it is possible to realize an imaging device with less manufacturing variation and high reliability.

[0029] Also, for example, in a plan view, a transistor may not be disposed between the first light-shielding film and the second light-shielding film, and in a plan view, the transistor may overlap at least one of the first light-shielding film and the second light-shielding film.

[0030] This makes it possible to prevent light from being incident on the transistor by the first light-shielding film or the second light-shielding film, thereby preventing generation of electric charges in the transistor, thereby preventing the operation of the transistor from becoming unstable and stabilizing the operation of the imaging device.

[0031] Also, for example, the pixel portion may further include an insulating layer located between the first light-shielding film and the upper electrode.

[0032] This allows the insulating layer to be used as a protective layer for the upper electrode.

[0033] Hereinafter, the embodiment will be specifically described with reference to the drawings.

[0034] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component arrangements and connection forms, steps, and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components that are not described in the independent claims are described as optional components.

[0035] In addition, each figure is a schematic diagram and is not necessarily illustrated precisely. Therefore, for example, the scales in each figure do not necessarily match. In addition, in each figure, substantially the same configurations are given the same reference numerals, and duplicated explanations are omitted or simplified.

[0036] Furthermore, in this specification, terms indicating relationships between elements, such as "identical," terms indicating the shapes of elements, such as "rectangle," and numerical ranges are not expressions that only express a strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0037] In this specification, the terms "upper" and "lower" do not refer to the upper direction (vertically upward) and lower direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. The terms "upper" and "lower" are applied not only to the case where two components are arranged with a gap between them and another component exists between the two components, but also to the case where two components are arranged closely together and are in contact with each other.

[0038] (Embodiment 1) [Circuit configuration of imaging device] First, the circuit configuration of the imaging device according to the present embodiment will be generally described with reference to FIG.

[0039] 1 is a schematic diagram showing a circuit configuration of an image pickup device 100 according to the present embodiment. As shown in FIG.

[0040] A plurality of pixels 110 are arranged two-dimensionally, i.e., in row and column directions, on a semiconductor substrate to form a pixel region. The plurality of pixels 110 may be arranged in a line. That is, the imaging device 100 may be a line image sensor. In this specification, the row direction and column direction refer to the directions in which the rows and columns extend, respectively. Specifically, the vertical direction is the column direction, and the horizontal direction is the row direction.

[0041] Each pixel 110 includes a photodetector 10 and a charge detection circuit 25. The photodetector 10 includes a pixel electrode 50, a photoelectric conversion film 51, and a transparent electrode 52. A specific configuration of the photodetector 10 will be described later. The charge detection circuit 25 includes an amplification transistor 11, a reset transistor 12, and an address transistor 13.

[0042] The imaging device 100 includes a voltage control element for applying a predetermined voltage to the transparent electrode 52. The voltage control element includes, for example, a voltage control circuit, a voltage generation circuit such as a constant voltage source, and a voltage reference line such as a ground line. The voltage applied by the voltage control element is called a control voltage. In this embodiment, the imaging device 100 includes a voltage control circuit 30 as the voltage control element.

[0043] The voltage control circuit 30 may generate a constant control voltage, or may generate a plurality of control voltages with different values. For example, the voltage control circuit 30 may generate a control voltage with two or more different values, or may generate a control voltage that changes continuously within a predetermined range. The voltage control circuit 30 determines the value of the control voltage to be generated based on a command from an operator who operates the imaging device 100, or a command from another control unit or the like included in the imaging device 100, and generates a control voltage of the determined value. The voltage control circuit 30 is provided outside the photosensitive region as a part of the peripheral circuit 120. The photosensitive region is substantially the same as the pixel region.

[0044] 1, in this embodiment, the voltage control circuit 30 applies a control voltage to the transparent electrodes 52 of the pixels 110 arranged in the row direction via the counter electrode signal lines 16. As a result, the voltage control circuit 30 changes the voltage between the pixel electrodes 50 and the transparent electrodes 52, and switches the spectral sensitivity characteristics in the light detection section 10.

[0045] When light is irradiated onto the photodetection unit 10, in order to accumulate electrons as signal charges in the pixel electrode 50, the pixel electrode 50 is set to a higher potential than the transparent electrode 52. At this time, the direction of movement of electrons is opposite to the direction of movement of holes, so a current flows from the pixel electrode 50 to the transparent electrode 52. Also, when light is irradiated onto the photodetection unit 10, in order to accumulate holes as signal charges in the pixel electrode 50, the pixel electrode 50 is set to a lower potential than the transparent electrode 52. At this time, a current flows from the transparent electrode 52 to the pixel electrode 50.

[0046] The pixel electrode 50 is connected to the gate electrode of the amplifier transistor 11, and the signal charge collected by the pixel electrode 50 is stored in a charge storage node 24 located between the pixel electrode 50 and the gate electrode of the amplifier transistor 11. In this embodiment, the signal charge is a hole. Alternatively, the signal charge may be an electron.

[0047] The signal charge stored in the charge storage node 24 is applied to the gate electrode of the amplifying transistor 11 as a voltage according to the amount of the signal charge. The amplifying transistor 11 is included in the charge detection circuit 25 and amplifies the voltage applied to the gate electrode. The address transistor 13 selectively reads out the amplified voltage as the signal voltage. The address transistor 13 is also called a row selection transistor. The reset transistor 12 has one of its source electrode and drain electrode connected to the pixel electrode 50 and resets the signal charge stored in the charge storage node 24. In other words, the reset transistor 12 resets the potentials of the gate electrode of the amplifying transistor 11 and the pixel electrode 50.

[0048] In order to selectively perform the above-mentioned operations in the multiple pixels 110, the imaging device 100 includes a power supply wiring 21, a vertical signal line 17, an address signal line 26, and a reset signal line 27. These wirings and signal lines are connected to the pixels 110, respectively. Specifically, the power supply wiring 21 is connected to one of the source electrode and the drain electrode of the amplification transistor 11. The vertical signal line 17 is connected to the other of the source electrode and the drain electrode of the address transistor 13, that is, the one not connected to the amplification transistor 11. The address signal line 26 is connected to the gate electrode of the address transistor 13. In addition, the reset signal line 27 is connected to the gate electrode of the reset transistor 12.

[0049] The peripheral circuit 120 includes a vertical scanning circuit 15, a horizontal signal readout circuit 20, a plurality of column signal processing circuits 19, a plurality of load circuits 18, a plurality of differential amplifiers 22, and a voltage control circuit 30. The vertical scanning circuit 15 is also called a row scanning circuit. The horizontal signal readout circuit 20 is also called a column scanning circuit. The column signal processing circuit 19 is also called a row signal storage circuit. The differential amplifier 22 is also called a feedback amplifier.

[0050] The vertical scanning circuit 15 is connected to an address signal line 26 and a reset signal line 27, and selects a plurality of pixels 110 arranged in each row on a row-by-row basis, reads out the signal voltage, and resets the potential of the pixel electrode 50. The power supply wiring 21 supplies a predetermined power supply voltage to each pixel 110. The horizontal signal readout circuit 20 is electrically connected to a plurality of column signal processing circuits 19. The column signal processing circuits 19 are electrically connected to the pixels 110 arranged in each column via vertical signal lines 17 corresponding to each column. The load circuits 18 are electrically connected to each vertical signal line 17. The load circuits 18 and the amplifying transistors 11 form a source follower circuit.

[0051] A plurality of differential amplifiers 22 are provided corresponding to each column. The negative input terminals of the differential amplifiers 22 are connected to the corresponding vertical signal lines 17. The output terminals of the differential amplifiers 22 are connected to the pixels 110 via the feedback lines 23 corresponding to each column.

[0052] The vertical scanning circuit 15 applies a row selection signal, which controls the on and off of the address transistor 13, to the gate electrode of the address transistor 13 via the address signal line 26. This causes the row to be read out to be scanned and selected. A signal voltage is read out from the pixels 110 in the selected row to the vertical signal line 17. The vertical scanning circuit 15 also applies a reset signal, which controls the on and off of the reset transistor 12, to the gate electrode of the reset transistor 12 via the reset signal line 27. This causes the row of the pixels 110 to be subjected to the reset operation to be selected. The vertical signal line 17 transmits the signal voltage read out from the pixels 110 selected by the vertical scanning circuit 15 to the column signal processing circuit 19.

[0053] The column signal processing circuit 19 performs noise suppression signal processing, such as correlated double sampling, and analog-to-digital conversion (AD conversion). Specifically, the column signal processing circuit 19 includes a sample-and-hold circuit. The sample-and-hold circuit includes a capacitor, a transistor, and the like. The sample-and-hold circuit samples and temporarily holds the signal voltage read out via the vertical signal line 17. A digital value corresponding to the held voltage value is read out to the horizontal signal readout circuit 20.

[0054] The horizontal signal read circuit 20 sequentially reads out signals from the multiple column signal processing circuits 19 to a horizontal common signal line .

[0055] The differential amplifier 22 is connected to the other of the drain electrode and source of the reset transistor 12, which is not connected to the pixel electrode 50, via a feedback line 23. Therefore, when the address transistor 13 and the reset transistor 12 are in a conductive state, the differential amplifier 22 receives the output value of the address transistor 13 at its negative input terminal. The differential amplifier 22 performs a feedback operation so that the gate potential of the amplifying transistor 11 becomes a predetermined feedback voltage. At this time, the output voltage value of the differential amplifier 22 is 0V or a positive voltage close to 0V. The feedback voltage means the output voltage of the differential amplifier 22.

[0056] [Pixel configuration] A detailed device structure of the pixel 110 of the imaging device 100 will be described below with reference to Fig. 2. Fig. 2 is a cross-sectional view that typically illustrates a cross-section of the device structure of the pixel 110 of the imaging device 100 according to the present embodiment.

[0057] 2, the pixel 110 includes a semiconductor substrate 31, a charge detection circuit 25 (not shown), and a photodetector 10. The semiconductor substrate 31 is, for example, a p-type silicon substrate. The charge detection circuit 25 detects a signal charge captured by the pixel electrode 50 and outputs a signal voltage. The charge detection circuit 25 includes an amplification transistor 11, a reset transistor 12, and an address transistor 13, and is formed on the semiconductor substrate 31.

[0058] Each of the amplification transistor 11, the reset transistor 12, and the address transistor 13 is an example of an electric element formed on the semiconductor substrate 31. Each of the amplification transistor 11, the reset transistor 12, and the address transistor 13 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Specifically, each of the amplification transistor 11, the reset transistor 12, and the address transistor 13 is an n-channel MOSFET, but may be a p-channel MOSFET.

[0059] The amplifier transistor 11 has n-type impurity regions 41C and 41D, a gate insulating layer 38B, and a gate electrode 39B. The n-type impurity regions 41C and 41D are formed in the semiconductor substrate 31, and function as a drain or a source, respectively. The gate insulating layer 38B is located on the semiconductor substrate 31. The gate electrode 39B is located on the gate insulating layer 38B.

[0060] The reset transistor 12 has n-type impurity regions 41A and 41B, a gate insulating layer 38A, and a gate electrode 39A. The n-type impurity regions 41A and 41B are formed in the semiconductor substrate 31, and function as a drain and a source, respectively. The gate insulating layer 38A is located on the semiconductor substrate 31. The gate electrode 39A is located on the gate insulating layer 38A.

[0061] The address transistor 13 has n-type impurity regions 41D and 41E, a gate insulating layer 38C, and a gate electrode 39C. The n-type impurity regions 41D and 41E are formed in the semiconductor substrate 31, and function as a drain or a source, respectively. The gate insulating layer 38C is located on the semiconductor substrate 31. The gate electrode 39C is located on the gate insulating layer 38C.

[0062] The gate insulating layers 38A, 38B, and 38C are formed using an insulating material. For example, the gate insulating layers 38A, 38B, and 38C have a single-layer structure of a silicon oxide film or a silicon nitride film, or a laminate structure thereof.

[0063] The gate electrodes 39A, 39B, and 39C are each formed using a conductive material. For example, the gate electrodes 39A, 39B, and 39C are formed using polysilicon to which impurities are added to make them conductive. Alternatively, the gate electrodes 39A, 39B, and 39C may be formed using a metal material such as copper.

[0064] The n-type impurity regions 41A, 41B, 41C, 41D, and 41E are formed by doping the semiconductor substrate 31 with an n-type impurity such as phosphorus (P) by ion implantation or the like. In the example shown in FIG. 2, the n-type impurity region 41D is shared by the amplification transistor 11 and the address transistor 13. This connects the amplification transistor 11 and the address transistor 13 in series. The n-type impurity region 41D may be separated into two n-type impurity regions. These two n-type impurity regions may be electrically connected via a wiring layer.

[0065] In the semiconductor substrate 31, an element isolation region 42 is provided between adjacent pixels 110 and between the amplification transistor 11 and the reset transistor 12. The element isolation region 42 electrically isolates adjacent pixels 110. Furthermore, by providing the element isolation region 42, leakage of signal charges accumulated in the charge accumulation node 24 is suppressed. The element isolation region 42 is formed by, for example, doping the semiconductor substrate 31 with a high concentration of p-type impurities.

[0066] A multi-layer wiring structure is provided on the upper surface of the semiconductor substrate 31. The multi-layer wiring structure includes a plurality of interlayer insulating layers, one or more wiring layers, one or more plugs, and one or more contact plugs. Specifically, an interlayer insulating layer 43 is laminated on the upper surface of the semiconductor substrate 31. Contact plugs 45A and 45B, wirings 46A and 46B, and conductive plugs 47A and 47B are embedded in the interlayer insulating layer 43. The interlayer insulating layer 43 is formed by sequentially laminating a plurality of insulating layers. The upper surface of the interlayer insulating layer 43 is, for example, flat and parallel to the upper surface of the semiconductor substrate 31.

[0067] The contact plug 45A is connected to the n-type impurity region 41B of the reset transistor 12. The contact plug 45B is connected to the gate electrode 39B of the amplification transistor 11. The wiring 46A connects the contact plug 45A and the contact plug 45B. This electrically connects the n-type impurity region 41B of the reset transistor 12 to the gate electrode 39B of the amplification transistor 11.

[0068] Moreover, the wiring 46A is connected to the pixel electrode 50 via the conductive plugs 47A and 47B, and the wiring 46B. As a result, the n-type impurity region 41B, the gate electrode 39B, the contact plugs 45A and 45B, the wirings 46A and 46B, the conductive plugs 47A and 47B, and the pixel electrode 50 configure the charge storage node 24.

[0069] The light detection section 10 is provided on the interlayer insulating layer 43. The light detection section 10 includes a transparent electrode 52, a photoelectric conversion film 51, and a pixel electrode 50 located closer to the semiconductor substrate 31 than the transparent electrode 52.

[0070] The photoelectric conversion film 51 photoelectrically converts light incident from the transparent electrode 52 side to generate a signal charge according to the intensity of the incident light. The photoelectric conversion film 51 is made of, for example, an organic semiconductor. The photoelectric conversion film 51 may include one or more organic semiconductor layers. For example, the photoelectric conversion film 51 may include, in addition to a photoelectric conversion layer that generates hole-electron pairs, a carrier transport layer that transports electrons or holes, and a blocking layer that blocks carriers. These organic semiconductor layers may use organic p-type semiconductors and organic n-type semiconductors made of known materials. The photoelectric conversion film 51 may be, for example, a mixed film of organic donor molecules and acceptor molecules, a mixed film of semiconducting carbon nanotubes and acceptor molecules, or a quantum dot-containing film. The photoelectric conversion film 51 may be formed using an inorganic material such as amorphous silicon.

[0071] The photoelectric conversion film 51 is sandwiched between the transparent electrode 52 and the pixel electrode 50. In this embodiment, the photoelectric conversion film 51 is continuously formed across a plurality of pixels 110. Specifically, the photoelectric conversion film 51 is formed in a flat plate shape so as to cover most of the imaging area in a plan view. Note that the photoelectric conversion film 51 may be provided separately for each pixel 110.

[0072] The transparent electrode 52 is an example of an upper electrode located above the photoelectric conversion film 51. The transparent electrode 52 is formed using a material that is transparent to the light to be detected and has electrical conductivity. For example, the transparent electrode 52 is formed using a transparent conductive semiconductor oxide film such as indium tin oxide (ITO), aluminum doped zinc oxide (AZO), or gallium doped zinc oxide (GZO). The transparent electrode 52 may be formed using another transparent conductive semiconductor, or may be formed using a thin metal film that is thin enough to transmit light.

[0073] The transparent electrode 52 is formed continuously across the pixels 110, similar to the photoelectric conversion film 51. Specifically, the transparent electrode 52 is formed in a flat plate shape so as to cover most of the imaging area in a plan view. The transparent electrode 52 continuously covers the entire upper surface of the photoelectric conversion film 51.

[0074] The pixel electrode 50 is an example of a lower electrode facing an upper electrode with a photoelectric conversion film 51 sandwiched therebetween. The pixel electrode 50 is provided for each pixel 110. The pixel electrode 50 is formed using a conductive material such as a metal such as aluminum or copper, or polysilicon doped with impurities to provide conductivity.

[0075] The light detection unit 10 also includes an insulating layer 53 formed on at least a part of the upper surface of the transparent electrode 52. The light detection unit 10 further includes a protective film 54. The insulating layer 53 is formed so as to cover at least a part of the upper surface of the transparent electrode 52. The protective film 54 is provided above the insulating layer 53.

[0076] The insulating layer 53 and the protective film 54 are formed using a material having insulating properties. For example, the insulating layer 53 is formed of silicon oxide, silicon nitride, silicon oxynitride, or an organic or inorganic polymer material. The insulating layer 53 and the protective film 54 are transparent to light of a wavelength to be detected by the imaging device 100, for example.

[0077] 2, the pixel 110 includes a color filter 55 above the transparent electrode 52 of the light detection unit 10. Furthermore, the pixel 110 includes a microlens 56 on the color filter 55. Note that the pixel 110 does not necessarily need to include the insulating layer 53, the protective film 54, the color filter 55, and the microlens 56.

[0078] [Structure of the end of the imaging device] Next, the structure of the end portion of the imaging device 100 according to the present embodiment will be described with reference to FIGS.

[0079] Fig. 3 is a plan view of the imaging device 100 according to the present embodiment. Fig. 4 is a cross-sectional view of the imaging device 100 according to the present embodiment taken along line IV-IV in Fig. 3.

[0080] 3 and 4, the imaging device 100 includes a pixel unit 101 and a peripheral circuit unit 102 provided around the pixel unit 101. The imaging device 100 also includes a separation unit 103 that separates the pixel unit 101 and the peripheral circuit unit 102.

[0081] 3 and 4, the protective film 54, the color filter 55, and the microlens 56 shown in FIG. 2 are omitted. The protective film 54 is provided so as to cover, for example, the insulating layer 53, the first light-shielding film 81, the second light-shielding film 82, and the insulating layer 70. The color filter 55 and the microlens 56 are each provided directly above the pixel 110. The color filter 55 and the microlens 56 are not provided directly above the first light-shielding film 81, nor in the separation unit 103 or the peripheral circuit unit 102.

[0082] The pixel unit 101 is located at the center of the imaging device 100 in a plan view, and corresponds to a pixel region in which a plurality of pixels 110 are arranged. The peripheral circuit unit 102 is provided in an annular shape so as to surround the periphery of the pixel unit 101. Therefore, the separation unit 103 is also provided in an annular shape so as to surround the periphery of the pixel unit 101. The separation unit 103 is a ring-shaped region located between the pixel unit 101 and the peripheral circuit unit 102.

[0083] The peripheral circuit section 102 may be provided only in a part of the periphery of the pixel section 101. For example, in the case of the pixel section 101 having a rectangular shape in a plan view as shown in FIG. 3, the peripheral circuit section 102 may not be provided in a portion along at least one side of the outline of the pixel section 101. For example, the peripheral circuit section 102 may be provided in a portion along only one side of the outline of the pixel section 101. Alternatively, the peripheral circuit section 102 may be provided along two opposing sides or two adjacent sides of the outline of the pixel section 101. The same applies to the separation section 103.

[0084] 3 and 4, the pixel section 101 includes a first light-shielding film 81. The first light-shielding film 81 has two functions: supplying power to the transparent electrode 52 and blocking light from the pixel 110BM.

[0085] Specifically, the first light-shielding film 81 is conductive and is electrically connected to the transparent electrode 52. In the present embodiment, the first light-shielding film 81 is in contact with an end surface 52A of the transparent electrode 52, as shown in FIG.

[0086] The first light-shielding film 81 is electrically connected to an electrode terminal 60 provided so as to be exposed on the upper surface of the interlayer insulating layer 43. The electrode terminal 60 is electrically connected to the counter electrode signal line 16 (see FIG. 1) within the interlayer insulating layer 43. As a result, the transparent electrode 52 is electrically connected to the voltage control circuit 30 (see FIG. 1) via the first light-shielding film 81, the electrode terminal 60, and the counter electrode signal line 16. That is, the first light-shielding film 81 constitutes a part of the electrical wiring for applying a predetermined voltage to the transparent electrode 52. A predetermined voltage is applied to the first light-shielding film 81, and the value of the voltage can vary depending on the operating state of the imaging device 100. That is, a variable voltage is applied to the first light-shielding film 81. The variable voltage includes, for example, a first voltage applied during exposure and a second voltage applied during pixel readout. The first voltage and the second voltage are selectively applied to the transparent electrode 52 via the first light-shielding film 81 depending on the operating state of the imaging device 100.

[0087] The first light-shielding film 81 covers a pixel 110BM, which is a part of the pixels 110 included in the pixel unit 101. The pixel 110BM is the pixel 110 that is closest to an end of the pixel unit 101, specifically, closest to the peripheral circuit unit 102 or the separation unit 103, among the pixels 110 included in the pixel unit 101. The pixel 110BM is provided in a ring shape along the contour of the pixel unit 101 in a plan view. Alternatively, the pixel 110BM may be provided only in a part of the end of the pixel unit 101. For example, the pixel 110BM may not be provided in a portion along at least one side of the contour of the pixel unit 101. For example, the pixel 110BM may be provided in a portion along only one side of the contour of the pixel unit 101. Alternatively, the pixel 110BM may be provided along two opposing sides or two adjacent sides of the contour of the pixel unit 101.

[0088] The pixel 110BM is a pixel for black correction processing of the imaging device 100, and is covered by a first light-shielding film 81 so as not to allow light to enter. That is, in a plan view, the entire pixel 110BM is located inside the first light-shielding film 81. Specifically, the first light-shielding film 81 overlaps a part of the upper surface of the photoelectric conversion film 51 in a plan view. More specifically, the first light-shielding film 81 covers the end face 51A and the upper surface end 51B of the photoelectric conversion film 51. The upper surface end 51B is a part of the upper surface of the photoelectric conversion film 51, and is a part including the pixel 110BM in a plan view. The upper surface end 51B does not include the pixel 110 in a plan view. The shape of the pixel 110BM in a plan view corresponds to the shape of the pixel electrode 50 in a plan view, for example.

[0089] 4, in this embodiment, the first light-shielding film 81 contacts and covers the upper surface end 53B of the insulating layer 53, the end face 53A of the insulating layer 53, the end face 52A of the transparent electrode 52, the end face 51A of the photoelectric conversion film 51, the electrode terminal 60, and a part of the upper surface of the interlayer insulating layer 43 that is in the vicinity of the electrode terminal 60. Note that the upper surface end 53B of the insulating layer 53 is a portion that includes the pixel 110BM and does not include the pixel 110 in plan view, similar to the upper surface end 51B of the photoelectric conversion film 51.

[0090] 3, the first light-shielding film 81 is provided in a ring shape along the outer periphery of the pixel unit 101 in a plan view. The region inside the inner periphery of the first light-shielding film 81 is a photosensitive region. That is, in a plan view, photoelectric conversion is performed by a plurality of pixels 110 arranged inside the inner periphery of the first light-shielding film 81, and an image is captured based on the generated signal charges.

[0091] The first light-shielding film 81 may not be provided in a portion where the pixels 110BM are not provided. For example, when the pixels 110BM are provided only in a portion along one side of the pixel unit 101, the first light-shielding film 81 may be provided along that side. In other words, the shape of the first light-shielding film 81 in a plan view does not have to be annular, and may be an elongated rectangle along one side of the outline of the pixel unit 101, or an L-shape along two sides.

[0092] 3 and 4, the peripheral circuit section 102 includes a second light-shielding film 82. The second light-shielding film 82 overlaps at least a part of the peripheral circuit 120 in a planar view. Specifically, the second light-shielding film 82 overlaps a sample-and-hold circuit (not shown in FIG. 4) included in the peripheral circuit 120 in a planar view. The second light-shielding film 82 may also overlap a transistor or a diode included in a circuit other than the sample-and-hold circuit included in the peripheral circuit 120 in a planar view. For example, the second light-shielding film 82 may overlap the entire peripheral circuit 120 in a planar view.

[0093] A transistor included in a sample-and-hold circuit or the like has, as a source or drain, an impurity region formed in a semiconductor substrate 31. Since the impurity region is an n-type impurity region formed in a p-type semiconductor substrate 31, a pn junction is formed at the boundary of the impurity region. Similarly, a diode included in a sample-and-hold circuit also has a pn junction.

[0094] If light is incident on these pn junctions, charges are generated by the incident light, and the generated charges may cause leakage current or fluctuations in potential. In particular, since the sample and hold circuit temporarily holds the signal charges generated in the pixels 110, the image quality of the image generated by the imaging device 100 may be degraded if charges other than the signal charges are generated in the sample and hold circuit.

[0095] According to the present embodiment, the transistors and diodes are covered with the second light-shielding film 82, so that it is possible to prevent light from entering the pn junction. This allows the peripheral circuit 120 to operate stably. In addition, it is possible to prevent charges other than the signal charges from being generated by light in the sample-and-hold circuit, so that it is possible to prevent deterioration of image quality.

[0096] 3, the second light-shielding film 82 is provided in a ring shape along the inner circumference of the peripheral circuit section 102 in a plan view. Note that the shape of the second light-shielding film 82 in a plan view does not have to be ring-shaped, and may be an elongated rectangle along one side of the inner circumference of the peripheral circuit section 102, or an L-shape along two sides.

[0097] The first light-shielding film 81 and the second light-shielding film 82 are formed, for example, using the same material. Therefore, the second light-shielding film 82 has electrical conductivity similar to the first light-shielding film 81. The first light-shielding film 81 and the second light-shielding film 82 are, for example, metal films such as titanium (Ti) or molybdenum (Mo), or metal nitride films such as titanium nitride (TiN) or tantalum nitride (TaN).

[0098] 4, the peripheral circuit section 102 further includes an insulating layer 70. The second light-shielding film 82 is provided above the insulating layer 70. Specifically, the second light-shielding film 82 is located above the upper surface of the interlayer insulating layer 43 and at least at a position higher than the lower surface of the photoelectric conversion film 51. In the present embodiment, the second light-shielding film 82 is provided in contact with the upper surface of the insulating layer 70.

[0099] The insulating layer 70 is an insulating layer located between the second light-shielding film 82 and the interlayer insulating layer 43. In a plan view, the insulating layer 70 overlaps the upper surface of the interlayer insulating layer 43. This makes it possible to prevent the exposed part of the wiring structure from coming into contact with the second light-shielding film 82 and becoming electrically conductive, even if a part of the wiring structure is exposed on the upper surface of the interlayer insulating layer 43.

[0100] The insulating layer 70 is formed, for example, using the same material as the insulating layer 53. Therefore, the insulating layer 70 has light-transmitting properties similar to the insulating layer 53. Specifically, the insulating layer 70 is a silicon oxide film or a silicon nitride film. The insulating layer 70 can be formed in the same process as the insulating layer 53. For example, after the photoelectric conversion film 51 and the transparent electrode 52 are patterned into a predetermined shape, an insulating film is formed on the entire surface including the upper surface of the transparent electrode 52, and patterning is performed by photolithography and etching, so that the insulating layer 53 and the insulating layer 70 can be formed simultaneously. As a result, the thickness of the insulating layer 70 becomes the same as the thickness of the insulating layer 53. Of course, the insulating layer 70 may be formed using a material that does not have light-transmitting properties.

[0101] Moreover, in this embodiment, the first light-shielding film 81 and the second light-shielding film 82 can be formed in the same process. For example, after forming the insulating layer 53 and the insulating layer 70, a conductive light-shielding film is formed so as to cover the upper surfaces of the insulating layer 53 and the insulating layer 70, and then patterning is performed by photolithography and etching, so that the first light-shielding film 81 and the second light-shielding film 82 can be formed simultaneously. As a result, the thickness of the first light-shielding film 81 becomes the same as the thickness of the second light-shielding film 82.

[0102] As shown in FIG. 3 and FIG. 4, the first light-shielding film 81 and the second light-shielding film 82 are separated. That is, the first light-shielding film 81 and the second light-shielding film 82 are not physically connected. A separation portion 103 is included between the first light-shielding film 81 and the second light-shielding film 82 in a plan view. The separation portion 103 is, for example, a region between the outer peripheral end of the first light-shielding film 81 and the insulating layer 70. Note that, for convenience of illustration, FIG. 3 shows an example in which the inner peripheral end of the insulating layer 70 and the inner peripheral end of the second light-shielding film 82 coincide with each other, but as shown in FIG. 4, the second light-shielding film 82 is provided outside the inner peripheral end of the insulating layer 70.

[0103] 3, the inner peripheral end of the second light-shielding film 82 and the inner peripheral end of the insulating layer 70 may coincide with each other. That is, the separation portion 103 may be a region between the outer peripheral end of the first light-shielding film 81 and the inner peripheral end of the second light-shielding film 82. For example, when the insulating layer 70 is not provided, the separation portion 103 corresponds to a region between the outer peripheral end of the first light-shielding film 81 and the inner peripheral end of the second light-shielding film 82.

[0104] Since the first light-shielding film 81 and the second light-shielding film 82 are separated, fluctuations in the potential of the first light-shielding film 81 have almost no effect on the second light-shielding film 82. In other words, even if the potential of the first light-shielding film 81 fluctuates, the potential of the second light-shielding film 82 is kept constant, so that the effect on the peripheral circuit 120 covered by the second light-shielding film 82 is also sufficiently suppressed. Therefore, according to this embodiment, the peripheral circuit 120 can be operated stably regardless of fluctuations in the potential of the first light-shielding film 81.

[0105] In this embodiment, no sample and hold circuit is provided in the separation unit 103. That is, in plan view, no sample and hold circuit is disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all the sample and hold circuits included in the imaging device 100 are provided in the peripheral circuit unit 102. For example, all the sample and hold circuits are disposed directly below the second light-shielding film 82. Note that at least one of all the sample and hold circuits may be included in the pixel unit 101, and may be disposed directly below the first light-shielding film 81, for example.

[0106] In addition, in a plan view, no transistors are disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all of the transistors included in the imaging device 100 are provided in either the pixel unit 101 or the peripheral circuit unit 102.

[0107] In addition, in a plan view, a diode does not have to be disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all of the diodes included in the imaging device 100 may be provided in either the pixel unit 101 or the peripheral circuit unit 102.

[0108] As shown in FIG. 4, the separation portion 103 is provided with only the wiring 48 included in the interlayer insulating layer 43. Note that the separation portion 103 may be provided with a conductive plug that connects a plurality of wirings 48 arranged in different layers. For example, the separation portion 103 is not provided with any circuit elements other than the electrical wiring. In other words, the separation portion 103 can be defined as a region in which no circuit elements other than the electrical wiring are arranged in a plan view. Furthermore, the separation portion 103 is not provided with any impurity region formed in the semiconductor substrate 31.

[0109] This makes it possible to suppress the generation of charges caused by light in the separation section 103 through which light can reach the semiconductor substrate 31, thereby suppressing adverse effects on the operation of the peripheral circuit 120. In addition, the separation section 103 makes it possible to define the areas of the pixel section 101 and the peripheral circuit section 102, thereby clarifying the layout area of ​​each circuit element and simplifying the circuit design.

[0110] (Embodiment 2) Next, the second embodiment will be described with reference to FIG.

[0111] Fig. 5 is a cross-sectional view of an imaging device 100A according to the present embodiment. Like Fig. 4, Fig. 5 shows a cross section corresponding to the line IV-IV in Fig. 3. In the following, differences from the first embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0112] 5, in the imaging device 100A, a contact hole 53H is formed in the insulating layer 53. The contact hole 53H is a through-hole that penetrates the insulating layer 53 to expose the upper surface of the transparent electrode 52. The contact hole 53H is provided, for example, in a ring shape along the outline of the pixel unit 101 in a plan view.

[0113] In the present embodiment, the first light-shielding film 81 is provided so as to fill the contact hole 53H. That is, the first light-shielding film 81 is in contact with the end face 52A of the transparent electrode 52 and the portion exposed in the contact hole 53H. Since the contact area between the first light-shielding film 81 and the transparent electrode 52 is increased, the contact resistance between the first light-shielding film 81 and the transparent electrode 52 can be reduced.

[0114] (Embodiment 3) Next, a third embodiment will be described with reference to FIG.

[0115] Fig. 6 is a cross-sectional view of an imaging device 100B according to the present embodiment. Like Fig. 4, Fig. 6 shows a cross section corresponding to the line IV-IV in Fig. 3. In the following, differences from the first embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0116] 6, in the imaging device 100B, the peripheral circuit section 102 does not include the insulating layer 70. That is, the second light-shielding film 82 is provided directly on the upper surface of the interlayer insulating layer 43. In this case, the lower surface of the second light-shielding film 82 and the lower surface of the first light-shielding film 81 are located at the same height, for example, when the upper surface of the semiconductor substrate 31 is used as a reference. The second light-shielding film 82 is at the same height and has the same thickness as the outer peripheral end of the first light-shielding film 81, i.e., the portion covering the electrode terminals 60.

[0117] In the present embodiment, in the peripheral circuit section 102, the wiring structure is not exposed at least in the region of the upper surface of the interlayer insulating layer 43 that is in contact with the second light-shielding film 82. That is, insulation between the upper surface of the interlayer insulating layer 43 and the second light-shielding film 82 is ensured. Therefore, even if a potential is applied to the second light-shielding film 82, the effect on the operation of the peripheral circuit 120 can be sufficiently suppressed.

[0118] (Embodiment 4) Next, a fourth embodiment will be described with reference to FIG.

[0119] Fig. 7 is a cross-sectional view of an imaging device 100C according to the present embodiment. Like Fig. 4, Fig. 7 shows a cross section corresponding to the line IV-IV in Fig. 3. In the following, differences from the first embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0120] 7, in the imaging device 100C, the pixel section 101 and the peripheral circuit section 102 have the same film configuration on the interlayer insulating layer 43. Specifically, the peripheral circuit section 102 further includes a spacer layer 91 and a transparent conductive film 92.

[0121] The spacer layer 91 includes the same material as the photoelectric conversion film 51, and overlaps at least a part of the peripheral circuit 120 in plan view. In the present embodiment, the spacer layer 91 is provided in contact with the upper surface of the interlayer insulating layer 43. The spacer layer 91 has the same configuration as the photoelectric conversion film 51. Specifically, the spacer layer 91 is made of the same material and has the same thickness as the photoelectric conversion film 51, and is formed by the same process. The photoelectric conversion film 51 is formed, for example, by applying a photoelectric conversion material to the entire upper surface of the interlayer insulating layer 43 and patterning it. In the first embodiment, the photoelectric conversion material arranged in the peripheral circuit section 102 is removed, whereas in the present embodiment, the spacer layer 91 is formed by leaving the photoelectric conversion material arranged in the peripheral circuit section 102 as it is without removing it.

[0122] The transparent conductive film 92 contains the same material as the transparent electrode 52, and overlaps at least a portion of the peripheral circuit 120 in a plan view. In the present embodiment, the transparent conductive film 92 is provided in contact with the upper surface of the spacer layer 91. The transparent conductive film 92 has the same configuration as the transparent electrode 52. Specifically, the transparent conductive film 92 is made of the same material and has the same thickness as the transparent electrode 52, and is formed by the same process.

[0123] In the present embodiment, the second light-shielding film 82 is provided above the spacer layer 91. Specifically, the insulating layer 70 is provided between the second light-shielding film 82 and the spacer layer 91. The insulating layer 70 is provided in contact with the upper surface of the transparent conductive film 92.

[0124] 7, the height of the upper surface of the insulating layer 70 is equal to the height of the upper surface of the insulating layer 53. Note that the height here is based on the upper surface of the interlayer insulating layer 43. In other words, the total value of the thicknesses of the photoelectric conversion film 51, the transparent electrode 52, and the insulating layer 53 is equal to the total value of the thicknesses of the spacer layer 91, the transparent conductive film 92, and the insulating layer 70.

[0125] Therefore, the height of the lower surface of the inner circumferential end portion of the first light-shielding film 81 is equal to the height of the lower surface of the second light-shielding film 82. As shown in Fig. 7, the inner circumferential end portion of the first light-shielding film 81 and the second light-shielding film 82 are formed to have the same height and the same thickness t.

[0126] In this way, the configuration of the film formed on the upper surface of the interlayer insulating layer 43 is the same at the end of the pixel section 101 and the peripheral circuit section 102. This provides an advantage in terms of the manufacturing method. Specifically, the photoelectric conversion film 51 and the spacer layer 91, the transparent electrode 52 and the transparent conductive film 92, and the insulating layer 53 and the insulating layer 70 can be separated into the pixel section 101 and the peripheral circuit section 102 by performing photolithography and etching after the respective films are formed collectively. This allows the photoelectric conversion film 51, the transparent electrode 52, and the insulating layer 53 to have the same planar shape. In addition, the spacer layer 91, the transparent conductive film 92, and the insulating layer 70 to have the same planar shape.

[0127] After each film is separated, the first light-shielding film 81 and the second light-shielding film 82 can also be formed as conductive light-shielding films in one go and then patterned to separate the pixel section 101 and the peripheral circuit section 102.

[0128] (Embodiment 5) Next, a fifth embodiment will be described with reference to FIG.

[0129] Fig. 8 is a cross-sectional view of an imaging device 100D according to the present embodiment. Like Fig. 4, Fig. 8 shows a cross section corresponding to the line IV-IV in Fig. 3. In the following, differences from the first embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0130] As shown in Fig. 8, the structure of the imaging device 100D is the same as the structure of the imaging device 100 shown in Fig. 4. In this embodiment, a constant voltage is applied to the second light-shielding film 82. The constant voltage is, for example, a negative voltage, but may also be a ground voltage (i.e., 0 V).

[0131] This allows the potential of the second light-shielding film 82 to be kept constant, allowing the second light-shielding film 82 to function as a shield electrode. Specifically, the second light-shielding film 82 can block an external electric field or magnetic field that affects the peripheral circuit 120, and can stabilize the operation of the peripheral circuit 120. This allows the realization of a more reliable imaging device 100D.

[0132] (Embodiment 6) Next, a sixth embodiment will be described with reference to FIG.

[0133] Fig. 9 is a cross-sectional view of an imaging device 100E according to the present embodiment. Like Fig. 4, Fig. 9 shows a cross section corresponding to the line IV-IV in Fig. 3. In the following, differences from the first embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0134] As shown in Fig. 9, the structure of the imaging device 100E is the same as the structure of the imaging device 100 shown in Fig. 4. In this embodiment, a variable voltage is applied to the second light-shielding film 82. The variable voltage includes, for example, two voltages V1 and V2 as shown in Fig. 9. The two voltages V1 and V2 are switched by a switch SW, and two voltages of different magnitudes are selectively applied to the second light-shielding film 82.

[0135] The variable voltage may include three or more different voltage values. For example, a voltage that always matches the potential of the vertical signal line 17 may be applied to the second light-shielding film 82 by an operational amplifier. This allows the second light-shielding film 82 to function as a guard electrode that suppresses the fluctuation of the potential of the vertical signal line 17. This makes it possible to realize a more reliable imaging device 100E.

[0136] (Other embodiments) Although the imaging device according to one or more aspects has been described based on the embodiments, the present disclosure is not limited to these embodiments. As long as it does not deviate from the gist of the present disclosure, various modifications conceived by a person skilled in the art to each embodiment and forms constructed by combining components of different embodiments are also included within the scope of the present disclosure.

[0137] For example, in the third to sixth embodiments, a contact hole 53H may be provided similarly to the second embodiment. Also, for example, in the fifth and sixth embodiments, the peripheral circuit section 102 may include a spacer layer 91 and a transparent conductive film 92 similarly to the fourth embodiment.

[0138] Furthermore, for example, the second light-shielding film 82 may not have electrical conductivity. That is, the second light-shielding film 82 may be formed using a material different from that of the first light-shielding film 81. For example, the second light-shielding film 82 may be formed using an insulating resin material. The second light-shielding film 82 may contain carbon black. The thickness of the second light-shielding film 82 and the thickness of the first light-shielding film 81 may be different from each other.

[0139] Furthermore, for example, the first light-shielding film 81 may not be in contact with the end face 51A of the photoelectric conversion film 51, the end face 52A of the transparent electrode 52, or the end face 53A of the insulating layer 53. For example, an insulating member may be provided between each of the end face 51A, the end face 52A, and the end face 53A and the first light-shielding film 81. When the first light-shielding film 81 is not in contact with the end face 52A, the first light-shielding film 81 is in contact with the upper surface of the transparent electrode 52 via the contact hole 53H, as shown in the second embodiment.

[0140] Moreover, the insulating layer 53 may be slightly smaller than the transparent electrode 52 in a plan view. This exposes the end of the upper surface of the transparent electrode 52, making it possible to increase the contact area with the first light-shielding film 81 and reduce the contact resistance.

[0141] Furthermore, for example, the insulating layer 70 and the insulating layer 53 may be formed using different materials. Furthermore, for example, the insulating layer 70 and the insulating layer 53 may have different thicknesses.

[0142] Also, for example, the spacer layer 91 may be formed using a material different from that of the photoelectric conversion film 51. In this case, the thickness of the spacer layer 91 and the thickness of the photoelectric conversion film 51 may be the same as or different from each other.

[0143] Furthermore, each of the above embodiments can be modified, substituted, added, omitted, and the like in various ways within the scope of the claims or their equivalents. [Industrial Applicability]

[0144] The present disclosure can be used as an imaging device capable of stabilizing circuit operation, and can be used in, for example, a camera or a distance measuring device. [Explanation of symbols]

[0145] 10 Light detection section 11 Amplifying transistor 12 Reset transistor 13 Address transistor 15 Vertical scanning circuit 16 Counter electrode signal line 17 Vertical signal line 18 Load circuit 19 Column signal processing circuit 20 Horizontal signal readout circuit 21 Power wiring 22 Differential Amplifier 23 Feedback Line 24 Charge Storage Node 25 Charge detection circuit 26 Address signal line 27 Reset signal line 28 Horizontal common signal line 30 Voltage control circuit 31 Semiconductor Substrate 38A, 38B, 38C Gate insulating layer 39A, 39B, 39C Gate electrode 41A, 41B, 41C, 41D, 41E n-type impurity region 42 Element isolation region 43 Interlayer insulation layer 45A, 45B contact plug 46A, 46B, 48 Wiring 47A, 47B Conductive plug 50 pixel electrode 51 Photoelectric conversion film 51A, 52A, 53A end face 51B, 53B Top edge 52 Transparent electrode 53 Insulating layer 53H Contact Hole 54 Protective film 55 Color Filter 56 Micro Lens 60 electrode terminal 70 Insulating layer 81 1st light shielding film 82 Second light shielding film 91 Spacer layer 92 Transparent conductive film 100, 100A, 100B, 100C, 100D, 100E Imaging device 101 Pixel section 102 Peripheral circuit section 103 Separation section 110, 110BM pixels 120 Peripheral Circuits

Claims

1. An imaging device including a pixel unit and a peripheral circuit unit provided around the pixel unit, The pixel unit includes: A photoelectric conversion film; an upper electrode located above the photoelectric conversion film; a plurality of lower electrodes facing the upper electrode with the photoelectric conversion film interposed therebetween; a conductive first light-shielding film that overlaps a portion of the photoelectric conversion film in a plan view and is electrically connected to the upper electrode; Including, The peripheral circuit section includes: Peripheral circuitry; a second light-shielding film overlapping at least a portion of the peripheral circuit in a plan view; Including, the first light-shielding film and the second light-shielding film are separated from each other, In a plan view, the first light-shielding film and the upper electrode do not overlap the peripheral circuit. Imaging device.

2. The peripheral circuit section includes: a spacer layer including the same material as the photoelectric conversion film and overlapping at least a portion of the peripheral circuit in a plan view; The second light-shielding film is located above the spacer layer. The imaging device according to claim 1 .

3. The thickness of the photoelectric conversion film and the thickness of the spacer layer are the same. The imaging device according to claim 2 .

4. The peripheral circuit section further includes an insulating layer located between the second light-shielding film and the spacer layer. The imaging device according to claim 2 or 3.

5. the peripheral circuit includes a sample and hold circuit; The second light-shielding film overlaps the sample-and-hold circuit in a plan view. The imaging device according to claim 1 .

6. the peripheral circuit includes a sample and hold circuit; In a plan view, the sample-and-hold circuit is not disposed between the first light-shielding film and the second light-shielding film. The imaging device according to claim 1 .

7. The material of the first light-shielding film is the same as the material of the second light-shielding film; The imaging device according to claim 1 .

8. the second light-shielding film is conductive; A constant voltage or a ground voltage is applied to the second light-shielding film; The imaging device according to claim 1 .

9. A variable voltage is applied to the first light-shielding film. The imaging device according to claim 1 .

10. The first light-shielding film and the second light-shielding film have the same thickness. The imaging device according to claim 1 .

11. In a plan view, no transistor is disposed between the first light-shielding film and the second light-shielding film. The imaging device according to claim 1 .

12. The pixel portion further includes an insulating layer located between the first light-shielding film and the upper electrode. The imaging device according to claim 1 .

13. The first light-shielding film does not overlap the peripheral circuit in a plan view. The imaging device according to claim 1 .

14. The first light-shielding film does not overlap the second light-shielding film in a plan view. The imaging device according to claim 1 .

15. The first light-shielding film overlaps with a portion of the lower electrodes in a plan view. The imaging device according to claim 1 .

16. The peripheral circuit does not overlap the upper electrode in a plan view. The imaging device according to claim 1 .

17. The upper electrode is a transparent electrode. The imaging device according to claim 1 .

18. An end portion of the first light-shielding film is disposed in the same layer as the second light-shielding film. The imaging device according to claim 1 .

Images