Image sensor and camera using the same

Abstract

To provide a technique that prevents the influence of threshold voltage shift ΔVth in an amplification transistor included in a pixel circuit in an image sensor using a SiCMOSFET.SOLUTION: An image sensor composed of a SiC element including a SiCMOSFET has: a pixel circuit 10 including a photodiode PD, an amplification transistor MD that converts electric charges generated in the photodiode into voltage signals, first and second transfer transistors M1, M2 that output the voltage signals, and a reset transistor MRST that has a source-drain path between a power supply potential and the amplification transistor. The reset transistor is turned on prior to a first read-out timing to read out reference voltage, and a period during which the reset transistor is turned on is set based on the time required for shift of a threshold voltage of the SiCMOSFET to be saturated.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to an image sensor constituted by SiC elements including SiC MOSFETs, and a camera using the same. [Background technology]

[0002] Patent Document 1 discloses a solid-state imaging device capable of setting a reset level so as to reduce a margin for in-plane characteristic fluctuations in a two-dimensional array of unit pixels. Patent Document 2 discloses a solid-state imaging device capable of high-speed pixel signal readout while suppressing column fixed pattern noise and shading that degrade image quality. A specific application example of these devices is envisioned to be a CMOS image sensor using a SiMOSFET.

[0003] SiC elements have higher radiation resistance than Si elements, so by constructing an image sensor using SiC elements, it is possible to create a camera that can be used in environments with strong radiation. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-229120 A [Patent Document 2] International Publication No. 2012 / 144218 Summary of the Invention [Problem to be solved by the invention]

[0005] 1 shows a circuit diagram of a pixel circuit 10 and a readout circuit 11 that constitute an image sensor using SiC MOSFETs. As will be described later, in the image sensor, pixel circuits are arranged in a matrix, and a readout circuit is provided in common to a plurality of pixel circuits. For ease of understanding, a state in which the pixel circuit 10 and the readout circuit 11 are connected one-to-one is shown here.

[0006] The pixel circuit 10 and the readout circuit 11 are composed of SiC elements formed on a SiC substrate. DD The magnitude of is not particularly limited, but is, for example, 4 V. The pixel circuit 10 includes a photodiode PD. When light is irradiated onto the photodiode PD, an electric charge is generated in the photodiode PD by photoelectric conversion. The amount of generated electric charge depends on the amount of light irradiated onto the photodiode PD. The pixel circuit 10 converts the electric charge generated in the photodiode PD into a voltage signal, and the readout circuit 11 detects the amount of light irradiated for each pixel by selectively reading out the voltage converted by the pixel circuit 10.

[0007] 2 shows a schematic diagram of the readout waveforms of the pixel circuit 10 and the readout circuit 11 shown in FIG. 2. FIG. 2 shows the voltages applied to the gates of the transistors shown in FIG. 1. A waveform 21 indicates the voltages applied to the gates of the amplifier transistor M D The waveform 21a shows the change when the amount of light is large (bright), and the waveform 21b shows the change when the amount of light is small (dark). DD The SiC MOSFET operates in analog mode, but in Figure 2, the amplifier transistor M D The waveform 21 is drawn with the magnitude of the voltage emphasized as compared with the waveforms of other transistors that perform on / off operations (switching operations).

[0008] First, the reset transistor M RST When the amplifier transistor M D The gate potential is the power supply potential V DD At this time, the amplifier transistor M D The drain potential and gate potential of the reset transistor M are equal, and the source-drain path is in a conductive state. RST is turned off (non-conductive), and the row selection transistor M1 is turned on. The row selection transistor M1 is kept on continuously during the period in which the readout process is performed on the pixel circuit 10. The period in which the row selection transistor M1 is turned on is called the readout period.

[0009] At the beginning of the readout period, the first transfer transistor M2 is turned on for a predetermined period, so that the power supply potential V DD From transistor M D , M1, and M2 through the source-drain paths of the capacitor C1. The voltage generated in the capacitor C1 is called the reference voltage, and the timing at which the first transfer transistor M2 is turned on is called the reference voltage read timing T r On the other hand, at the end of the readout period, the second transfer transistor M3 is turned on for a predetermined period, so that the power supply potential V DD From transistor M D The charge is stored in the capacitor C2 via the source-drain paths of the second transfer transistor M1, M2, and M3. The voltage generated in the capacitor C2 is called a signal voltage, and the timing at which the second transfer transistor M3 is turned on is called the signal voltage read timing T S He said.

[0010] The difference between the reference voltage and the signal voltage is determined by the amplifier transistor M D When the amount of light is large, the amount of charge generated in the photodiode PD is large, so that the gate potential of the amplifier transistor M D The gate potential of the amplifier transistor M D As the resistance value of the source-drain path of the amplifier transistor M increases, the difference voltage between the reference voltage and the signal voltage increases. D The gate potential is the power supply potential V DD The amplifier transistor M D The resistance value of the source-drain path of the differential circuit 12 is kept low, so that the difference between the reference voltage and the signal voltage is small. After the readout period ends, the column selection transistors M4 and M5 are turned on, the reference voltage and the signal voltage are input to the two input terminals (+, -) of the differential circuit 12, respectively, and the differential voltage is output from the output terminal OUT.

[0011] In a strong radiation environment, exposure to strong gamma rays causes the threshold voltage of the SiCMOSFET to shift. This causes the threshold voltage of the SiCMOSFET to vary greatly for each pixel circuit that constitutes the image sensor. In the circuit configuration shown in Figure 1, both the reference voltage and the signal voltage are generated by the amplification transistor M D The difference between the threshold voltages of the amplifier transistor M D Therefore, the effect of the threshold voltage of the amplifier transistor M D This has the advantage that the amount of light can be detected without being affected by variations in the threshold voltage.

[0012] However, as a result of the study by the inventors, in the pixel circuit 10 of FIG. r and the signal voltage readout timing T s And the amplifier transistor M D A large shift in threshold voltage Vth was observed. Figures 3A and 3B show the threshold voltage shift ΔVth of the SiC MOSFET prototyped by the inventors.

[0013] FIG. 3A shows an example of the threshold voltage shift ΔVth of a SiCMOFET. The source and drain potentials of a prototype SiCMOFET are set to 0V, and the gate potential is set to 4V. The threshold voltage shift ΔVth is measured while changing the time for which the gate voltage is applied. The horizontal axis shows time (logarithmic), and the vertical axis shows the threshold voltage shift ΔVth (linear). In this example, the reference voltage read timing T r and the signal voltage readout timing T s When there is a difference of about 0.5 ms between them, the threshold voltage shifts by about 7.9 mV.

[0014] Figure 3B shows the cumulative frequency distribution of the threshold voltage shift ΔVth for 30 SiC MOSFET samples measured in this way. Comparing the most outlying value of the samples with the median value, the threshold voltage shift ΔVth was equivalent to 8 gray levels in the case of a 256-gray level image sensor.

[0015] Thus, in image sensors using SiC MOSFETs, the SiC MOSFETs have a relatively large threshold voltage shift ΔVth, and the variation is large. Therefore, the amplification transistor M D As a circuit configuration that is less susceptible to the effects of threshold voltage variations in the D ) may result in a decrease in the accuracy of detecting the amount of light. [Means for solving the problem]

[0016] According to one embodiment of the present invention, there is provided an image sensor including a SiC element including a SiCMOSFET, the image sensor comprising: a pixel circuit including a photodiode, an amplifying transistor that converts charges generated in the photodiode into a voltage signal, first and second transfer transistors that output the voltage signal, and a reset transistor having a source-drain path between a power supply potential and a gate of the amplifying transistor; and a readout circuit including a first capacitor that holds a voltage signal read out from the pixel circuit as a reference voltage by turning on the first transfer transistor at a first readout timing, a second capacitor that holds the voltage signal read out from the pixel circuit as a signal voltage by turning on the second transfer transistor at a second readout timing that is later than the first readout timing, and a differential circuit that outputs a difference voltage between the reference voltage and the signal voltage, the reset transistor being turned on prior to the first readout timing, and a period during which the reset transistor is turned on: The saturation time is defined as the gate voltage application time at the intersection of a first relational expression showing the correlation between the gate voltage application time in a time period immediately after the start of gate voltage application to the SiCMOSFET and the shift in the threshold voltage of the SiCMOSFET, and a second relational expression showing the correlation between the gate voltage application time in a time period in which the change in the threshold voltage shift of the SiCMOSFET per unit time becomes small and the shift in the threshold voltage of the SiCMOSFET. . Effect of the Invention

[0017] In an image sensor using a SiC MOSFET, the effect of a threshold voltage shift ΔVth of an amplifier transistor included in a pixel circuit is suppressed.

[0018] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Brief description of the drawings]

[0019] [Figure 1] FIG. 2 is a circuit diagram of a pixel circuit and a readout circuit. [Diagram 2] 4 shows readout waveforms of a pixel circuit and a readout circuit. [Figure 3A] This is an example of the threshold voltage shift ΔVth of a SiC MOSFET. [Figure 3B] FIG. 1 is a diagram showing variations in threshold voltage shift ΔVth of SiCMOSFETs. [Figure 4] FIG. 2 is a circuit diagram of an image sensor. [Diagram 5] 4 is a waveform read out from an image sensor. [Figure 6A] FIG. 11 is a diagram for explaining the effect of the present embodiment. [Figure 6B] FIG. 11 is a diagram for explaining the effect of the present embodiment. [Figure 7A] This is an example of the threshold voltage shift ΔVth of a SiC MOSFET at room temperature. [Figure 7B] This is an example of the threshold voltage shift ΔVth of a SiC MOSFET at 50° C. [Figure 8A] FIG. 4 is a diagram showing a first relational expression. [Figure 8B] FIG. 11 is a diagram showing a second relational expression. [Figure 9] FIG. 1 is a diagram showing the saturation time of a SiCMOSFET. [Figure 10] FIG. 1 is a diagram illustrating the configuration of a camera. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] FIG. 4 shows a circuit diagram of the image sensor of this embodiment. The configurations of the pixel circuits and readout circuit are the same as those shown in FIG. 1, so duplicated explanations will be omitted. The pixel circuits 10 are arranged in an n×n matrix, and FIG. 4 shows an example where n=4. Note that the number of pixel circuits arranged in the vertical and horizontal directions may differ. The column selection transistors M4, M5 and capacitors C1, C2 of the readout circuit 11 are provided in common for each column of the pixel matrix, and further, the column selection transistors M4, M5 are each connected in parallel to two input terminals of the differential circuit 12.

[0021] The vertical scanning circuit 31 and the horizontal scanning circuit 32 are collectively called a driver circuit. The vertical scanning circuit 31 is a driver circuit for detecting the reset transistor M included in the pixel circuit 10. RST , row selection transistor M1, and transfer transistors M2 and M3. To avoid complicating the drawing, the number of control lines is omitted, but since the control lines are shared for pixel circuits in the same row, pixel circuits 10 in the same row operate at the same timing. The horizontal scanning circuit 32 controls column selection transistors M4 and M5 included in the readout circuit.

[0022] Figure 5 shows the operating waveforms of the image sensor in Figure 4. The circuit operation is as explained using Figures 1 and 2, but the readout circuit is shared by the pixel circuits arranged in a matrix, and the timing is adjusted so that the output from each pixel circuit is continuously output from the differential circuit 12 in order to operate the image sensor at a high speed.

[0023] That is, the interval between the control timing for the i-th row and the control timing for the (i+1)-th row by the vertical scanning circuit 31 is adjusted so that output from the pixel circuit in the first column of the (i+1)-th row starts immediately following output from the pixel circuit in the first column to the n-th column of the i-th row (1≦i≦(n-1)). Also, the interval between the start timing of the j-th cycle (1≦j) and the start timing of the (j+1)-th cycle by the vertical scanning circuit 31 is adjusted so that output from the pixel circuit in the first column of the first row starts again immediately following output from the pixel circuit in the first column to the n-th column of the n-th row.

[0024] In this embodiment, in order to suppress the variation in the threshold voltage shift ΔVth of the SiC MOSFET, before the start of the readout period of each pixel circuit, the amplification transistor M D Specifically, an electrical stress is applied to the gate of the reset transistor M RST Time t to turn on RST (referred to as stress application time) is set to a predetermined time or more. Reset transistor M RST The function of the amplifier transistor M D The gate potential is the power supply potential V DD From this point of view, the reset transistor M RST In contrast, in this embodiment, the time for turning on the amplifying transistor M in each pixel circuit is the same as the time for turning on the other transistors in the pixel circuit (see FIG. 2). D In order to suppress the variation in the threshold voltage shift ΔVth of the reset transistor M RST Time t to turn on RST Extend.

[0025] The cause of the threshold voltage shift ΔVth in SiCMOSFETs is thought to be PBTI (Positive Bias Temperature Instability). PBTI is a phenomenon that occurs when the gate voltage of a MOSFET is positively biased at high temperatures, and it is said that the threshold voltage shift ΔVth occurs due to the behavior of charges trapped in the gate insulating film. PBTI is not a phenomenon limited to SiCMOSFETs, but its effects are more pronounced in SiCMOSFETs than in SiMOSFETs. The reasons are as follows. First, the gate insulating film of a SiCMOSFET has more defects than the gate insulating film of a SiMOSFET, making it more likely for charges to be trapped. Furthermore, because the drive time of SiC elements is slow, in order to properly detect changes in the cathode potential of the photodiode PD, the readout time must be longer (for example, about 0.5 ms) than in an image sensor composed of a SiMOSFET.

[0026] Before the start of the readout period of the pixel circuit, the amplifying transistor M D The effect of applying electrical stress to the gate of the semiconductor device will be explained with reference to FIGS. 6A and 6B.

[0027] The shift in threshold voltage ΔVth of the SiCMOS FET shown in FIG. 3A versus the stress application time t RST is set to 0.5 ms, and the reference voltage read timing T r and the signal voltage readout timing T s FIG. 6A shows the threshold voltage shift ΔVth when the reference voltage read timing T r and the signal voltage readout timing T s The threshold voltage shift ΔVth between is suppressed to 0.4 mV.

[0028] Figure 6B shows a cumulative frequency distribution 42 of threshold voltage shift ΔVth for 30 SiCMOSFET samples measured in Figure 3B when the read timing is the same as in Figure 6A. For comparison, it is also shown together with cumulative frequency distribution 41 of threshold voltage shift ΔVth shown in Figure 3B. It can be seen that while in the case of cumulative frequency distribution 41, the maximum variation was equivalent to eight gradations, in the case of cumulative frequency distribution 42, the maximum variation is suppressed to the equivalent of one gradation.

[0029] Reset transistor M RST Even if the time for which transistor M1 is turned on is extended, as long as it falls within the period between the end point of the readout time of cycle i (the period during which transistor M1 is turned on) and the start point of the readout time of cycle (i+1) shown in FIG. 5, it will not lead to an operational delay in the entire image sensor, and it is therefore possible to improve the detection accuracy without degrading the operating speed of the image sensor.

[0030] Reset transistor M RST By increasing the stress application time t, the effect of suppressing the variation in the threshold voltage shift ΔVth can be obtained. However, if a voltage is continuously applied to the gate of the SiCMOSFET, the change in the threshold voltage shift ΔVth per unit time becomes small (saturates). RST is desirably set to at least the time required for the threshold voltage shift ΔVth to saturate.

[0031] 7A and 7B show the measurement of the threshold voltage shift ΔVth for each different gate voltage for the prototype SiCMOSFET. The measurement method is the same as that of FIG. 3A. In FIG. 7A and 7B, the gate voltage application time is linearly displayed. FIG. 7A shows the measurement at room temperature (25°C), and FIG. 7B shows the measurement at 50°C. In both cases, the threshold voltage shift ΔVth increases significantly immediately after the start of gate voltage application, and as the application time passes, the increase in the threshold voltage shift ΔVth is suppressed. Therefore, a first relational expression showing the correlation between the gate voltage application time and the threshold voltage shift ΔVth in the time period immediately after the start of gate voltage application as shown in FIG. 8A, and a second relational expression showing the correlation between the gate voltage application time and the threshold voltage shift ΔVth in the time period when the threshold voltage shift ΔVth is considered to be saturated (around 1 ms in FIG. 8B) as shown in FIG. 8B are obtained. The gate voltage application time at the intersection of the first and second relational expressions is defined as the saturation time of the SiCMOSFET, and the stress application time t RST is set to be equal to or greater than the saturation time of the SiC MOSFET.

[0032] FIG. 9 shows the saturation time of the SiCMOSFET calculated based on the measurement results shown in FIG. 7A and B. RST is set based on the image sensor specifications. For example, when the saturation time of a SiCMOSFET at 50°C with a gate voltage of 3.3V is set as the standard, the stress application time t RST is set to be greater than or equal to 8.4 μs.

[0033] Fig. 10 shows the configuration of a camera to which an image sensor 50 of this embodiment is applied. Image sensor 50 includes a pixel circuit 51, a readout circuit 52, and a driver circuit 53, and corresponds to Fig. 4. Image sensor 50 is composed of SiCMOSFETs, and the other circuit blocks are composed of SiMOSFETs.

[0034] The power supply circuit 71 supplies the power supply voltage V DD5. The control unit 60 outputs a control signal. The pulse generating unit 61 outputs a pulse signal to the driver circuit 53 according to the control signal from the control unit 60 so that the driver circuit 53 operates the pixel circuit 51 and the readout circuit 52 at the timing shown in FIG. 5. The output signal from the readout circuit 52 is amplified by an amplifier 62 and converted into a digital signal by an analog-to-digital converter (ADC) 63. A field programmable gate array (FPGA) 64 receives the output from the ADC 63 according to the control signal from the control unit 60 and calculates luminance information for each pixel position. An encoder 65 encodes the luminance information for each pixel position calculated by the FPGA 64 and outputs it as an image. [Explanation of symbols]

[0035] 10: pixel circuit, 11: readout circuit, 12: differential circuit, 21: waveform, 31: vertical scanning circuit, 32: horizontal scanning circuit, 41, 42: cumulative frequency distribution, 50: image sensor, 51: pixel circuit, 52: readout circuit, 53: driver circuit, 60: control unit, 61: pulse generating unit, 62: amplifier, 63: AD converter, 64: FPGA, 65: encoder, 71: power supply circuit, 72: step-down regulator.

Claims

1. An image sensor including a SiC device including a SiC MOSFET, a pixel circuit including a photodiode, an amplifying transistor that converts a charge generated in the photodiode into a voltage signal, first and second transfer transistors that output the voltage signal, a reset transistor having a source-drain path between a power supply potential and a gate of the amplifying transistor, and a row selection transistor that is connected in series with the amplifying transistor and the first transfer transistor or the second transfer transistor, the pixel circuit being arranged in a matrix; a first capacitor that holds the voltage signal read out from the pixel circuit as a reference voltage by turning on the first transfer transistor at a first readout timing, a second capacitor that holds the voltage signal read out from the pixel circuit as a signal voltage by turning on the second transfer transistor at a second readout timing that is later than the first readout timing, a differential circuit that outputs a difference voltage between the reference voltage and the signal voltage, a pair of the first and second capacitors provided for each of the pixel circuits arranged in the same column, a first column selection transistor that is provided corresponding to the pair of the first and second capacitors and that selects the first capacitor connected to a first input of the differential circuit and a second column selection transistor that selects the second capacitor connected to a second input of the differential circuit, wherein a period during which the first transfer transistor is turned on and a period during which the second transfer transistor is turned on are included in a period during which the row selection transistor is turned on; a first scanning circuit that controls the first and second transfer transistors, the reset transistor, and the row selection transistor for each of the pixel circuits arranged in the same row; a second scanning circuit that controls the first and second column selection transistors and connects one of the first and second capacitor pairs to the differential circuit; a timing for controlling the pixel circuits arranged in the same row of the first scanning circuit is adjusted so that a differential voltage between the reference voltage and the signal voltage is continuously output from the differential circuit from the pixel circuits arranged in a matrix, the reset transistor is turned on prior to the first read timing, a period during which the reset transistor is turned on is set to be equal to or longer than a saturation time of the SiC MOSFET and is set between an end point of a period during which the row selection transistor is turned on and a start point of a period during which the row selection transistor is next turned on; The saturation time is defined as the gate voltage application time at the intersection of a first relational expression showing the correlation between the gate voltage application time in a time period immediately after start of application of a gate voltage to the SiCMOSFET and a shift in the threshold voltage of the SiCMOSFET, and a second relational expression showing the correlation between the gate voltage application time in a time period during which a change in the shift in the threshold voltage of the SiCMOSFET per unit time can be considered to be saturated and the shift in the threshold voltage of the SiCMOSFET.

2. The image sensor according to claim 1 ; a voltage circuit for supplying the power supply potential to the image sensor; an amplifier for amplifying an output from the readout circuit; an analog-to-digital converter that converts an output from the amplifier into a digital signal; A control unit that generates a control signal; a pulse generating unit that outputs a pulse signal that provides timing for the first scanning circuit to control the pixel circuit and for the second scanning circuit to control the readout circuit according to the control signal; an FPGA that receives an output from the analog-to-digital converter in accordance with the control signal and calculates luminance information for each pixel position; and an encoder that encodes the luminance information for each pixel position calculated by the FPGA and outputs the encoded luminance information as an image.

Images