Optoelectronic devices and methods for processing same

Abstract

The optoelectronic device includes a semiconductor body having a layer stack, the layer stack including a first region and a surrounding second region extending to a sidewall of the layer stack. The layer stack includes a first n-doped layer, a quantum well structure disposed in the first n-doped layer, and a p-doped layer disposed in the quantum well structure. The quantum well structure extends along a side within the first region of the layer stack. Furthermore, the quantum well structure extends into the second region at an inclined surface of one of the n-doped layer and the p-doped layer relative to the sidewall of the layer stack, the thickness of the quantum well structure within the second region being smaller than the thickness of the quantum well structure within the first region.

Description

[Technical field]

[0001] The present invention relates to optoelectronic devices and methods for their processing. [Background technology]

[0002] During the manufacture of miniature and ultra-miniature optoelectronic devices, called μ-LEDs, mesa structures are defined and created to separate the various optoelectronic components from each other. Along these mesa structures, the devices can be separated. In miniature and ultra-miniature devices, the area between the surrounding mesa and the perimeter of the mesa itself results in a small area / perimeter ratio, i.e., the edge of the optoelectronic component is relatively large compared to the surrounding area.

[0003] As a result, a relatively large amount of non-radiative recombination centers occurs along the edges due to crystal damage, surface effects, and other effects. Thus, the internal quantum efficiency (IQE), given by the ratio of radiative / non-radiative recombination, decreases as the device dimensions decrease. Red-emitting μ-LEDs based on the InGaAlP material system suffer most from this problem, since the surface recombination velocity and carrier diffusion length are much higher than for InGaN. Thus, highly efficient μ-LEDs with dimensions less than 30 μm have proven difficult to achieve.

[0004] To counter the above effects, it has been proposed to enhance the efficiency of ultra-compact InGaAlP optoelectronic devices by diffusing Zn to achieve quantum well intermixing (QWI).

[0005] Such QWI occurs in areas that belong to the outer region of the optoelectronic device that will be defined in subsequent process steps. The QWI widens the bandgap of the quantum wells in this outer region near the mesa edges and device sidewalls such that charge carriers in the quantum wells can no longer reach the outer device surface in the vicinity of the quantum wells, resulting in improved efficiency of ultra-compact InGaAlP LEDs.

[0006] QWI has led to significant improvements in the efficiency of μ-LEDs, especially at low drive currents. However, it has been shown that surface recombination is reduced but not completely suppressed.

[0007] It is therefore an object of the present disclosure to further improve the efficiency of optoelectronic components. Summary of the Invention

[0008] The concept proposed by the inventors is to prevent carriers in the quantum wells with respect to the surface by growing a mesa structure or a thinner graded quantum well near the sidewall. The graded quantum well is thinner than the center of the μ-LED and therefore contains a higher bandgap. Thus, charge carriers are prevented with respect to the sidewall surface by a barrier created by the difference in bandgap between the central quantum well and the graded thin quantum well. This approach reduces surface recombination and achieves high efficiency of μ-LEDs. When combined with additional Zn diffusion near the sidewall to create QWI in such areas, even higher improved efficiency is achieved.

[0009] In an aspect, an optoelectronic device is provided that includes a semiconductor body having a layer stack. A first region extending to a sidewall of the layer stack and a surrounding second region are defined. The layer stack also includes a first n-doped layer, a quantum well structure disposed in the first n-doped layer, and a p-doped layer disposed in the quantum well structure.

[0010] According to the invention, the quantum well structure extends along the side of the top of the first n-doped layer within the first region and laterally in the second region of the inclined surface of one of the n-doped and p-doped layers to the sidewall of the layer stack. In other words, the quantum well structure follows the inclined surface of one of the doped layers, in particular the n-doped layer. As a result, due to the inclination, the thickness of the quantum well structure within the second region is smaller than the thickness of the quantum well structure within the first region.

[0011] In some embodiments, the bandgap of the quantum well structure in the first region is smaller than the bandgap of the quantum well structure in the second region, such that charge carriers encounter a larger bandgap in the second region adjacent the mesa and sidewalls and are effectively inhibited from reaching that area.

[0012] A quantum well structure may include a first quantum well and a second quantum well separated by a quantum well barrier. In this regard, a quantum well structure may include multiple quantum wells, with multiple quantum wells and multiple quantum well barriers stacked on top of each other.

[0013] In some embodiments, the quantum well structure includes an intrinsic layer in at least a first region adjacent to the n-doped layer and / or the p-doped layer, or in other words, an intrinsic layer can be disposed within the first region between each doped layer and the quantum well structure.

[0014] The thickness of the resulting quantum well structure varies with the grading of the doped layers. The thickness of the quantum well structure inside the second region is based on the grading angle between the grading surface and the side surface. In this regard, the diameter of the grading surface changes and increases with increasing distance to the quantum well structure. In particular, the diameter of the grading surface parallel to the side surface increases with increasing distance toward the quantum well structure inside the first region.

[0015] In some other embodiments, the dopant concentration within the sloped n-doped layer may vary. In this regard, it may be useful to ensure a high concentration close to the flat top surface, since the quantum well structure is favorable for radiative recombination. Thus, the sloped n-doped region within the second region and / or the area adjacent to the sloped n-doped region may include a dopant concentration that is lower than the dopant concentration of the n-doped layer adjacent to the quantum well structure of the first region.

[0016] In some other aspects, the sidewalls of the layer stack include a mesa structure. The doped layers can include different or the same base material, and can be selected from one or more of GaN, AlGaN, AlGaInP, AlGaInN, and AlGaP, as non-limiting examples. Other materials can also be used. The width of the second region needs to be adjusted according to the different materials.

[0017] Some further embodiments relate to additional QWI, thus further improving the desired effect of preventing charge carriers from reaching the outer edge. In some embodiments, a p-type dopant is deposited in the quantum well structure inside the second region, causing quantum well intermixing thereof. The p-dopant may be Zn diffused onto the quantum well structure forming the p-doped layer side. In some further embodiments, the p-type dopant extends partially into the n-doped layer, causing a shift of the depletion region towards the n-doped layer.

[0018] Some other aspects relate to a method for processing optoelectronic devices. In a first step of the proposed method, a growth substrate is provided. A first doped, in particular n-doped, layer stack is then deposited on the growth substrate. The first doped layer stack is mesa structured to provide an upper part bounded by sloping sidewalls having an angle of less than 90°, in particular in the range of 40° to 75°. A quantum well structure is then deposited on the first doped layer of the mesa structure, such that the thickness of the quantum well structure on the sloping sidewalls is smaller than the thickness of the quantum well structure on the upper part.

[0019] During the deposition of the quantum well structure, material is placed on the top layer and on the inclined surface, so that the deposition rate on the top surface of the first layer stack is higher than on the sidewalls. The thickness of the quantum well structure on the inclined sidewalls is therefore reduced compared to the thickness on the top. A second doped, in particular p-doped, layer stack is provided on the quantum well structure. The p-doped layer stack may include a flat surface or its surface may be planarized after deposition. A structured mask is subsequently deposited on the second doped layer stack, which is then mesa-structured to provide its sidewalls exposing the edge portions of the quantum well structure on the inclined surface.

[0020] The resulting structure provides an efficient change in the band gap of the quantum well at the sloped surface, preventing charge carriers from reaching the edge of the mesa. In some further aspects, mesa structuring the first doped layer stack includes depositing a first mask layer on the first doped layer stack, and then structuring the first mask layer such that an area of ​​the first doped layer stack surrounding the top portion is exposed. Material in the exposed area is then removed to form the sloped surface. The removal may be non-uniform in that more material is removed at a greater distance from the remaining structured mask material. This process produces sloped sidewalls of the first doped layer.

[0021] Similarly, a second mesa structure defining the shape of the optoelectronic device can be processed. In an embodiment, depositing a structured mask on the second doped layer stack includes depositing a second mask layer on the second doped layer stack. The second mask layer is then structured such that an area of ​​the second doped layer stack surrounds the top at the protrusion and the area surrounding the top is exposed. Finally, material is removed in the exposed area.

[0022] The production of the doped layers can use different deposition methods, for example MOCVD or MOVPE processes. During the deposition of the base material for each doped layer, the concentration of the respective dopant can be varied, allowing the adjustment of the doping tape and its concentration.

[0023] In this regard, the step of depositing the first doped layer stack and / or the second doped layer stack may include depositing an intrinsic layer of a base material of the respective first and / or second doped layer stack, the intrinsic layer adjacent the quantum well structure.

[0024] Some further aspects relate to producing a quantum well structure. For example, depositing the quantum well structure can include depositing one or more quantum well layers between respective quantum well barrier layers, the quantum well barrier layers having a larger bandgap than the quantum well layers.

[0025] As already pointed out, the thickness of the quantum well layer structure is based on the tilt angle between the sidewalls of the first doped layer stack and the top plane of the first doped layer stack. As a result, the band gap difference between the top quantum well structure of the first doped layer stack and the quantum well structure of the sidewalls can be adjusted by the tilt angle, which in turn can be controlled during the first mesa structuring.

[0026] Further to this aspect, an angle between the sidewalls of the optoelectronic device and the top surface of the first doped layer stack is greater than an angle between the sloped sidewalls of the first doped layer stack and the top surface of the first doped layer stack, in other words, the optoelectronic device has sidewalls that are steeper than the sidewalls of the first doped layer on which the sloped quantum well structure is disposed.

[0027] Some further aspects relate to a process for generating additional supporting QWIs adjacent to the mesa of the device. In some aspects, the step of depositing the second doped layer stack includes depositing a third mask layer on top of the second doped layer stack. The third mask layer is structured such that an area of ​​the second doped layer stack surrounding the top in a protruding portion is exposed. In other words, the mask can cover the top protruding portion including the planar quantum well structure. A p-type dopant, for example Zn, is then deposited in the exposed area such that the p-type dopant induces QWIs inside the quantum well structure on the sloped sidewall.

[0028] To this end, and to achieve better control of the QWI process, the diffusing step includes depositing a p-type dopant in the exposed areas at a first temperature, and then subsequently diffusing the deposited p-type dopant in the exposed areas at a second temperature, the second temperature being optionally higher than the first temperature.

[0029] Further aspects and embodiments according to the proposed principles will become apparent in connection with the various embodiments and examples described in detail in conjunction with the accompanying drawings. [Brief description of the drawings]

[0030] [Figure 1] FIG. 1 shows a schematic diagram of an optoelectronic device. [Diagram 2] FIG. 2 shows a detailed diagram of an optoelectronic device according to some aspects of the present disclosure. [Figure 3A] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3B] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3C] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3D]1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3E] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3F] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3G] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3H] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. [Figure 3I] 1 illustrates various steps of a method for processing an optoelectronic device according to some aspects of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] The following embodiments and examples disclose different aspects and their combinations according to the proposed principles. The embodiments and examples are not necessarily drawn to scale. Similarly, different elements may be shown enlarged or reduced in size to highlight individual aspects. It is self-evident that individual aspects of the embodiments and examples shown in the figures can be combined with each other without further description, without this being inconsistent with the principles according to the invention. Some aspects show regular structures or forms. It should be noted that in practice, slight differences and deviations from the ideal form may occur without being inconsistent with the idea of ​​the invention.

[0032] Additionally, the individual figures and aspects are not necessarily drawn to scale, nor are the proportions between the individual elements necessarily correct in nature. Some aspects are emphasized by showing them enlarged. However, terms such as "top", "upper", "lower", "greater", "lesser", etc. are properly expressed with respect to the elements in the figures. Thus, such relationships between elements can be inferred based on the figures.

[0033] FIG. 1 shows an optoelectronic device that illustrates some of the problems of conventional optoelectronic devices. The optoelectronic device is grown on a substrate 10 and includes an n-doped layer stack 11 and a p-doped layer stack 13. A quantum well structure 12 is disposed between the n-doped layer stack 11 and the p-doped layer stack 13. Most of the layer stacks 11 and 13 can include different individual layers of the same dopant type with different concentrations. For example, the n-doped layer stack 11 can include several n-doped layers of different concentrations, including a highly n-doped current distribution layer adjacent to the substrate 10. Similarly, the p-doped layer stack 13 can include a current distribution layer, not shown here, adjacent to an upper transparent layer 14. The upper transparent layer 14 can be implemented as a conductive transparent layer, for example made of ITO, suitable for transporting charge carriers towards the current distribution layer inside the layer stack 13.

[0034] Quantum well structure 12 includes a multiple quantum well having multiple quantum well layers separated by corresponding barrier layers. Depending on the implementation, p-doped layer stacks 11 and 13 may be disposed directly adjacent to quantum well structure 12. In alternative embodiments, the quantum well layer structure may include one or more intrinsic layers adjacent to each layer stack 11 or 13, respectively. In this regard, the intrinsic layers may include the same base material layers as the respective layer stacks.

[0035] Such optoelectronic devices become mesa structures during their fabrication process, thereby forming sidewalls 15. Sidewalls 15 may in some instances be covered by an insulating layer or otherwise treated to provide a smooth surface and reduce impurities near the surface. In some embodiments, the outer portions of each device near sidewalls 15 may also include additional material to provide a quantum well intermixed region near the edge of quantum well structure 12 of area 120. However, the surface portions of each quantum well structure 12 of area 120 include impurities and non-saturated crystal bonds.

[0036] Thus, the surface structure may cause non-radiative recombination of charge carriers inserted into the quantum well structure 12. The area 120 with impurities and surfaces affects the periphery of the optoelectronic device. In small devices, the portion of the periphery area 120 increases relative to the central portion of the quantum well structure 12. As a result, the amount of non-radiative recombination relative to radiative recombination also increases, lowering the internal quantum efficiency of the device.

[0037] The inventors now propose the idea of ​​preventing charge carriers from reaching the respective surface regions and areas 120, thus reducing non-radiative recombination and increasing the internal quantum efficiency. Figure 2 shows a respective example showing a part of an optoelectronic device according to the proposed principle.

[0038] The optoelectronic device is divided into a first central region 100 and a peripheral region 101 surrounding the first region 100. The peripheral region 101 is limited by a mesa 102. The device comprises a substrate 10 on which an n-doped layer stack is deposited, forming an n-doped layer stack 11 in the central region and an n-doped layer stack 110' in the peripheral region 101. As in the embodiment in a conventional optoelectronic device, the n-doped layer stacks in both regions 11 and 110' can include different layers with different dopant concentrations in order to provide a uniform current distribution and injection into the active region 12. However, in contrast to the conventional device, the optoelectronic device according to the proposed principle is separated into a central first part 100 and a peripheral second part 101. The second part 101 surrounds the central part and is located between the mesa 102 and the respective central part 100 of the optoelectronic device.

[0039] 2, portion 110' of n-doped layer stack 110' includes the same concentration of dopant as the adjacent layer stack in the central portion, but also includes an inclined surface that is inclined at an angle α, defined as the angle between the surface of portion 110' of layer stack 11 in the central region and top surface 115.

[0040] The central portion 100 includes a quantum well structure 12 as an active region, which includes a number of quantum well layers 121, 123 and 125 separated by respective quantum well barrier layers 122 and 124. The thicknesses d of the quantum well layers 121, 123 and 125 are set equal, but different values ​​can also be chosen. The thicknesses of the quantum barriers 120-124 are slightly larger than the thickness d of each quantum well layer, and can also be chosen differently. The material of the quantum barriers is different from the material of the quantum layers. A given thickness d of the quantum well layers 121, 123 and 125 results in a constant band gap for each quantum well layer. It has been shown that the thickness of the quantum well layers has a direct effect on the respective band gap. The smaller the thickness d, the larger the respective band gap of the layers.

[0041] This effect is now used according to the proposed principle to generate and create an artificial increase in the band gap of each quantum well layer in the second peripheral portion 101 of the optoelectronic device. For this purpose, the quantum well structure and the quantum well layers of the active region 12 are continuous along the peripheral portion and inclined at the same angle relative to the top panel surface 115.

[0042] As a result, the first quantum well layer 121 on the top surface of the layer stack 11 extends on the inclined surface of the portion 110' as quantum well layer 121'. Similarly, the quantum well barrier 121 extends on the inclined surface as quantum well barrier 121'. In simple terms, the quantum well structure 12 on the top layer surface of the n-doped layer stack 11 is continuous in the inclined surface along the portion 110' of the layer stack. However, due to the angle α, the thickness d' of the respective quantum wells and quantum well barriers on the inclined surface changes and becomes thinner. The thinner thickness of the quantum well layers on the inclined surface, i.e., quantum layers 121', 123' and 125', causes an increase in the respective band gap. The thickness d' (as well as the total thickness of the structure 12 on the inclined surface) depends on the angle α and can be expressed to the first order as d'=dxcos(α).

[0043] Thus, charge carriers approaching the peripheral portion 101 now face a larger bandgap and can only reach the surface area close to the mesa structure 102 by overcoming the additional bandgap difference caused by the inclined surface. This difference is accommodated to some extent by the angle and slope of the surface of the portion 110' of the peripheral region 101. The greater the slope, the greater the difference.

[0044] Finally, the cone of region 101 is first filled with a lightly p-doped material, then a highly p-doped material is grown in layer 13 at the central portion 100 and at the sides 101. As mentioned before, the p-doped layer may include a current distribution layer (not shown here). However, it is preferred that the current distribution layer is located mainly at the top (upward protrusion) of active region 12 in the central portion 100.

[0045] Figures 3A-3I are various fabrication and processing steps for providing an optoelectronic device according to some aspects of the proposed principles. In Figure 3A, a growth substrate 10 is provided. In the illustration, the growth substrate is divided into separate portions 10a, 10b, for illustrative purposes showing the boundaries and subsequent separation lines between different optoelectronic devices being fabricated on the substrate.

[0046] The growth substrate is selected to suit the base material. The growth substrate 10 further comprises several smoothing and pretreatment layers for the subsequent growth of the base material. In the next step, shown in FIG. 3B, a layer stack 11 is deposited on the growth substrate. The layer stack 11 comprises different concentrations of n-type dopants, for example to provide current distribution and injection layers. For this purpose, the deposition process is carried out by a chemical vapor deposition process, in which additional metal atoms or ions as dopants are introduced. For example, Selene or Telluric or other suitable materials can be used as n-type dopants. The dopant concentration can be adjusted by varying the dopant material throughout the deposition process.

[0047] In some embodiments, the layer stack 11 includes an intrinsic layer of the base material as the top layer as the last deposited layer.

[0048] In Fig. 3C, a mask layer 19 is disposed on top of the n-doped layer stack 11. The mask layer 90 is then structured in Fig. 3D to form a structured mask layer having a central portion 90, surrounded by an exposed portion 91. The structured mask having the central portion 90 thus defines the first and second regions of each of the optoelectronic devices grown on the substrate. The surrounding exposed mask portion 91 is then removed to expose the underlying portion of the n-doped layer.

[0049] In a subsequent step shown in FIG. 3E, the first shallow mesa structure 95 is etched in the exposed area, thus defining an inclined surface in the second region 101 of the surrounding portion 110′ of the n-doped layer stack. The result is shown in FIG. 3D. Thus, in this process, a photolithography step is used to provide an inclined surface in the second region of the n-doped layer stack and to partially remove material from said stack. The shallow mesa structure 95 surrounds the respective layer stacks 11 and 11a that will later form the optoelectronic device, according to some aspects of the proposed principles. The inclination angle of the surface of the portion 110′ depends on the etchant used and on the various etching parameters. As shown in FIG. 3E, the mesa structure 95 does not reach the substrate surface 10, and a small portion of the n-doped material remains unetched.

[0050] After forming the shallow mesa structure 95, the remaining mask layers 90, 90a are removed. In a next step, a first layer of the quantum well structure 12, which will form the active region, is deposited on the n-doped layer stack. During the deposition process, material grows on the top surface of the layer stack 11 and on the sidewalls of the portion 110. However, as shown in FIG. 3F, the growth rate on the top surface is faster than that on the sidewalls, so that the thickness d of the top surface of the layer stack 11 in the central region 100 is larger compared to the sidewall portions 110 and 110a. The thickness difference is given by the angle of the inclined surface. Generally speaking, the thickness difference is larger the larger the angle subtended by the inclined surface and the flat top surface. In a first approximation, the thickness d' is proportional to the cosine of said angle.

[0051] During the deposition process, the shallow mesa structure is at least partially filled with material of the first layer of the quantum well structure, slowly filling the gap.

[0052] After deposition of the first quantum well layer material, barrier layer material is deposited over the first quantum well layer material, both over the top layer and into shallow mesa structure 95. As with the previous deposition process, the growth rate on the top layer is greater than on the sidewalls, resulting in a greater thickness thereover. Again the result is shown in FIG. 3G. The process of depositing barrier layer material and quantum layer material on top of each other and slowly filling the mesa structure can be repeated until the desired multiple quantum well layer structure is formed in the top layer and mesa structure 95.

[0053] In this regard, it should be noted that the depth of the mesa structure and its lateral size determine the tilt angle and therefore the thickness of each layer material deposited within the mesa structure. If the number of quantum well layers and quantum well area layers becomes too large relative to the depth of each mesa, the mesa structure may overgrow, reducing the effect of the tilted surface and the resulting bandgap increase.

[0054] In a subsequent process step shown in Figure 3H, a p-doped layer stack 13 is deposited on the final quantum well layer 123 forming quantum well structure 12. As shown in Figure 3H, quantum well structure 12 includes two quantum well layers 121 and 123 separated by quantum well barrier layer 122. The thickness of each quantum well layer is reduced within shallow mesa structure 95 compared to the thickness of each layer at the top surface of layer stack 11 in the central region.

[0055] Similar to the deposition of n-doped layer stack 11, p-doped layer stack 13 includes several different layers with varying dopant concentrations to provide current distribution layers for charge injection into central region quantum well structure 12. The p-doped layer 13 is deposited until a substantially planar surface is reached and until at least shallow mesa portion 95 is completely covered with base material of p-doped layer 13. The p-doped layer is reduced to smooth the surface.

[0056] In some cases, p-dopants can be introduced, especially in the central part, to provide current and injection distribution in the active region 12. In addition, Zn as a dopant can be implanted in the surrounding second region to provide quantum well intermixing in the graded quantum well structure in the second region. For this purpose, not shown here, a mask layer is deposited on the p-doped layer stack 13, with the first region covered by the mask material and the area of ​​the second region adjacent to the first region exposed. Zn as a dopant is then deposited in the exposed area and then diffused into the second region until quantum well intermixing of the graded quantum well layer is achieved. The deposition and diffusion of Zn into the graded quantum well layer are performed at different temperatures. The additional step further increases the band gap and thus the difference between the band gap in the second region and the band gap in the first region.

[0057] In a next step, a hard mask is deposited on top of the p-doped layer covering the respective central portion of each optoelectronic device, partially extending to adjacent areas, and also covering a portion of the shallow mesa structure. The hard mask is illuminated and the exposed portions are removed to expose areas within the shallow mesa structure. The exposed areas of the shallow mesas are subsequently etched to provide deep mesas 96 until the substrate surface is reached and the individual optoelectronic devices are separated. The resulting arrangement is shown in FIG. 3I, where a central region 100 with layer stack 11 is surrounded by a peripheral portion 101. The hard mask is then removed, the optoelectronic devices can be rebonded to remove the growth substrate 10, and the n-doped layer can be processed to provide n-contacts thereon. [Explanation of symbols]

[0058] 1 Optoelectronic devices 10 Substrate 11, 11a, 11b n-doped layer stack 12 Quantum well structure, active region 13 p-doped layer 14 Transparent layer 15 Side wall 90, 90a mask layer 91, 91a, Exposure mask 95 Shallow Mesa 96 Deep Mesa 100 First Area 101 Second Area 102 Mesa 110', 110a' Surrounding parts 120 Area 121, 134, 125 Quantum well layer 122, 124 Quantum well barrier 121', 123', 125' quantum well layers 122', 124' quantum well barrier

Claims

1. 1. An optoelectronic device comprising: A semiconductor body having a layer stack, the layer stack having a first region and a surrounding second region extending to a sidewall of the layer stack, the layer stack comprising: a first n-doped layer; and a quantum well structure disposed in the first n-doped layer; a p-doped layer disposed in the quantum well structure; the semiconductor body comprising the quantum well structure extends along a lateral surface within the first region of the layer stack; the quantum well structure extends into the second region at an inclined surface of one of the n-doped layer and the p-doped layer with respect to the lateral surface relative to the sidewall of the layer stack, the thickness of the quantum well structure within the second region being less than the thickness of the quantum well structure within the first region; the first n-doped layer having a dopant concentration within the second region that is less than a dopant concentration within the first region;

2. The optoelectronic device of claim 1 , wherein a bandgap of the quantum well structure in the first region is smaller than a bandgap of the quantum well structure in the second region.

3. the quantum well structure includes a first quantum well and a second quantum well separated by a quantum well barrier; or The optoelectronic device of claim 1 or 2, wherein the quantum well structure includes a first quantum well disposed between two quantum well barriers.

4. An optoelectronic device according to any one of claims 1 to 3, further comprising an intrinsic layer in at least the first region between the quantum well structure and at least one of the n-doped layer and the p-doped layer.

5. The optoelectronic device of any one of claims 1 to 4, wherein a thickness of the quantum well structure within the second region is based on a tilt angle between the tilted surface and the lateral surface.

6. An optoelectronic device according to any one of claims 1 to 5, further comprising a p-type dopant deposited in the quantum well structure within the second region, causing quantum well intermixing thereof.

7. The optoelectronic device of claim 6 , wherein the p-type dopant extends partially into the n-doped layer, causing a shift of the depletion region toward the n-doped layer.

8. The n-doped layer and / or the p-doped layer are - GaN, -AlGaN, - AlGaInP, -AlGaInN, and An optoelectronic device according to any one of the preceding claims, comprising a base material selected from the group consisting of: - AlGaP.

9. 1. A method for processing an optoelectronic device, comprising: providing a growth substrate; - depositing a first doped, in particular n-doped, layer stack on said growth substrate; mesa structuring the first doped layer stack to provide an upper portion surrounded by sloping sidewalls having an angle of less than 90°, the upper portion being provided in a first region and the sloping sidewalls being provided in a second region; depositing a quantum well structure on the mesa structuring first doped layer stack such that a thickness of the quantum well structure on the sloping sidewalls is less than a thickness of the quantum well structure on the top portion; depositing a second doped, in particular p-doped, layer stack onto said quantum well structure; depositing a structured mask on the second doped layer stack; and mesa structuring the optoelectronic device to provide a sidewall thereof exposing an edge portion of the quantum well structure at the sloping sidewall; The method, wherein the step of depositing a first doped layer stack on the growth substrate provides a higher dopant concentration in the first region of the first doped layer stack than in the second region of the first doped layer stack.

10. The step of mesa structuring the first doped layer stack comprises: depositing a first mask layer onto the first doped layer stack; - structuring the first mask layer such that an area of ​​the first doped layer stack surrounding the upper portion is exposed; and removing material in the exposed areas to form the sloped sidewalls.

11. depositing a structured mask on the second doped layer stack, depositing a second mask layer onto the second doped layer stack; - structuring the second mask layer such that an area of ​​the second doped layer stack surrounds the upper portion at a protrusion and an area surrounding the upper portion is exposed; and removing material in the exposed areas.

12. depositing the first doped layer stack or the second doped layer stack comprises: A method according to any one of claims 9 to 11, comprising depositing the semiconductor-based materials using a MOCVD or MOVPE process, in particular with the respective different dopant concentrations.

13. 13. The method according to claim 9, wherein the step of depositing the first and / or the second doped layer stack comprises depositing an intrinsic layer of a base material of the respective first and / or second doped layer stack, the intrinsic layer being located between the quantum well structure and at least one of the first and second doped layer stacks.

14. depositing the quantum well structure; 14. The method of claim 9, comprising depositing one or more quantum well layers between respective quantum well barrier layers, the quantum well barrier layers having a larger bandgap than the quantum well layers.

15. The method of any one of claims 9 to 12, wherein a thickness of the quantum well structure is based on a slope angle between the sidewalls of the first doped layer stack and a top plane of the first doped layer stack.

16. 14. The method of claim 9, wherein an angle between the sidewall of the optoelectronic device and a top surface of the first doped layer stack is greater than an angle between the sloping sidewall of the first doped layer stack and the top surface of the first doped layer stack.

17. depositing a second doped layer stack; depositing a third mask layer on top of the second doped layer stack; - structuring the third mask layer such that an area of ​​the second doped layer stack surrounding the upper portion in a protrusion is exposed; Diffusing a p-type dopant into the exposed areas, the p-type dopant inducing QWI within the quantum well structure on the sloped sidewalls.

18. The diffusing step further comprises: depositing the p-type dopant in the exposed areas at a first temperature; 20. The method of claim 17, comprising: diffusing the deposited p-type dopant into the exposed areas at a second temperature, the second temperature optionally being higher than the first temperature.

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