Display device

Abstract

To provide a display apparatus that can prevent penetration of external moisture by improving a stacked structure of an insulation layer and a protective layer in a first pattern portion of a first area formed for disposing a camera of a hole-in-display.SOLUTION: A display apparatus comprises: a substrate including a display area and a non-display area; a first area disposed in the display area; a hole area, a first pattern portion, a first dam portion and a second pattern portion in the first area; an encapsulation layer, a first insulating layer and a second insulating layer on at least a part of the first area; and a plurality of first patterns disposed in the first pattern portion. The first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns. The first insulating layer and the second insulating layer are in contact with each other on at least a part of an upper surface of the plurality of first patterns.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present specification relates to a display device, and more particularly to a display device capable of preventing penetration of external moisture. [Background technology]

[0002] 2. Description of the Related Art Recently, display devices capable of displaying various information and interacting with a user viewing the information are required to have various sizes, shapes and functions.

[0003] Such display devices include liquid crystal display devices (LCDs), electrophoretic display devices (FPDs), and organic light emitting diode display devices (OLEDs).

[0004] Organic light emitting display devices are self-emitting displays that do not require a separate light source, unlike liquid crystal displays (LCDs), and can be manufactured in a lightweight and thin form. In addition, organic light emitting diode displays are advantageous in terms of power consumption due to their low voltage operation, and are also excellent in color realization, response speed, viewing angle, and contrast ratio (CR), and are therefore being researched as next-generation displays.

[0005] An OLED display uses a number of thin film transistors (TFTs) to control the current flowing through the OLED to display images.

[0006] The display device is being developed with the addition of cameras, speakers, sensors, etc.

[0007] In particular, a hole-in-display structure in which a hole is formed in the display device in order to place a sensor such as a camera in the display device is applied.

[0008] Forming holes in the display device causes a problem that moisture from the outside penetrates into the display area inside the display panel. Summary of the Invention [Problem to be solved by the invention]

[0009] This specification allows for the formation of a through hole in an area for placing a camera within the display area of ​​the display device.

[0010] The through-holes may be formed by removing the substrate and a layer above the substrate.

[0011] A first region including a hole region, a first pattern portion, a first dam portion, and a second pattern portion can be disposed to form a through-hole in the display region.

[0012] The first pattern portion adjacent to the hole region of the first region may have a plurality of first patterns including a columnar lower pattern and a trapezoidal upper pattern disposed on the lower pattern to disconnect the light emitting layer.

[0013] The insulating layer disposed on the plurality of first patterns may not be filled in reverse taper regions formed between the plurality of first patterns, and an empty space (ES) may be formed.

[0014] A seam may be formed due to an empty space (ES) and the end of the trapezoidal upper pattern.

[0015] In the hole region formed by removing the substrate and the layer on the substrate, the side surface of the layer on the substrate can be exposed to the outside.

[0016] External moisture that has entered the organic insulating layer, which is made of organic material among the layers on the substrate exposed to the outside, can seep into the panel display area through a seam formed in the first pattern part adjacent to the hole area, resulting in a problem of degraded quality of the display device.

[0017] Therefore, this specification invents a display device that can prevent the penetration of external moisture by improving the laminated structure of an insulating layer and a protective layer on a first pattern portion of a first region formed to place a Hole In Display camera.

[0018] The problem to be solved by the embodiments of the present specification is to provide a display device and a manufacturing method thereof that can prevent penetration of external moisture by disposing a protective layer between insulating layers on a first pattern portion of a first region formed for arranging a camera.

[0019] The problems to be solved by the embodiments of the present specification are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0020] A display device according to an embodiment of the present specification includes a substrate including a display region and a non-display region, and a first region disposed in the display region, and includes a hole region, a first pattern portion, a first dam portion, and a second pattern portion in the first region, a sealing layer on at least a portion of the first region, a first insulating layer and a second insulating layer, and a plurality of first patterns disposed in the first pattern portion, wherein the first insulating layer and the second insulating layer are spaced apart from each other between the plurality of first patterns, and the first insulating layer and the second insulating layer are in contact with each other on at least a portion of the upper surfaces of the plurality of first patterns.

[0021] Further details of the embodiments are included in the detailed description and the drawings.

[0022] The display device according to the embodiments of the present specification is provided with an insulating layer and a protective layer structure on a first pattern portion of a first region formed for arranging a camera within a display area, thereby making it possible to provide a display device and a manufacturing method thereof that can effectively prevent external moisture from penetrating the panel and improve degradation of panel quality due to moisture permeation.

[0023] The effects of the present specification are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

[0024] In the above, the contents of the invention described in the problem to be solved, the means for solving the problem, and the effects do not specify the essential features of the claims, so the scope of the claims is not limited by the matters described in the contents of the invention. [Brief description of the drawings]

[0025] [Figure 1] 1 is a plan view illustrating a display device according to an embodiment of the present specification; [Diagram 2] 1 is a three-dimensional view illustrating a display device according to an embodiment of the present specification; [Diagram 3] 1 is a three-dimensional view illustrating a display device according to an embodiment of the present specification; [Figure 4] 2 is an enlarged view illustrating a first region PH portion of FIG. 1. [Diagram 5] 2 is a cross-sectional view illustrating an example of a cross section taken along line AA' in FIG. [Figure 6] 2 is a cross-sectional view illustrating an example of a cross section taken along line BB' in FIG. 1. [Figure 7] FIG. 7 is an enlarged view illustrating a PT1 portion of FIG. 6. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] The advantages and features of the present specification, and the methods for achieving them, will become clear from the detailed description of the embodiments with accompanying drawings. However, the present specification is not limited to the embodiments disclosed below, but may be embodied in various different forms, and the embodiments are provided to complete the disclosure of the present specification and to fully inform those skilled in the art of the invention, and the present specification is defined only by the scope of the claims.

[0027] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are illustrative only, and this specification is not limited to the matters shown in the drawings. The same reference symbols indicate the same components throughout the specification. In addition, in the description of this specification, if it is determined that a specific description of related known technology may unnecessarily obscure the gist of this specification, the detailed description will be omitted. When the terms "include", "have", "consist of", etc. are used in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, it includes a plural unless otherwise explicitly stated.

[0028] In interpreting elements, the error range is interpreted as being included even if there is no separate explicit description of the error range.

[0029] In describing a positional relationship, for example, when the positional relationship between two parts is described using terms such as "above," "upper," "lower," "beside," etc., one or more other parts may be located between the two parts, unless, for example, "immediately" or "directly" is used.

[0030] In the case of an explanation of a temporal relationship, when the temporal sequence is explained using "after," "following," "next," "before," etc., it can also include cases where the sequence is not consecutive, since "immediately" or "directly" is not used.

[0031] Although the terms "first", "second", etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may be a second component within the technical concept of this specification.

[0032] In describing components in this specification, terms such as first, second, A, B, (a), (b), etc. may be used. Such terms are merely intended to distinguish the components from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "coupled," "connected," or "connected" to another component, it should be understood that the component may be directly connected or connected to the other component, but unless otherwise expressly stated, other components may be "intervened" between each component that may be indirectly connected or connected.

[0033] "At least one" should be understood to include all combinations of one or more of the associated components. For example, "at least one of a first, second, and third component" means not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0034] In this specification, the term "apparatus" may include display devices such as liquid crystal modules (LCMs) and organic light emitting display modules (OLED modules) that include a display panel and a driver for driving the display panel, and may also include set electronic apparatuses or set devices or set apparatuses such as notebook computers, televisions, computer monitors, automotive apparatuses, and mobile electronic apparatuses such as smartphones or electronic pads that are complete or final products that include LCMs or OLED modules.

[0035] Therefore, the device in this specification can include a display device itself such as an LCM, an OLED module, etc., and a set device which is an application product or a final consumer device including an LCM, an OLED module, etc.

[0036] In some embodiments, an LCM or OLED module including a display panel and a driver may be referred to as a "display device," and a completed electronic device including the LCM or OLED module may be referred to as a "set device." For example, the display device may include a liquid crystal (LCD) or organic light emitting diode (OLED) display panel and a source PCB serving as a controller for driving the display panel. The set device may further include a set PCB serving as a set controller electrically connected to the source PCB and driving the entire set device.

[0037] The display panel used in the embodiments of the present specification may be any type of display panel such as a liquid crystal display panel, an organic light emitting diode (OLED) display panel, and an electroluminescent display panel, and the embodiments are not limited thereto. For example, the display panel may be a display panel that can generate sound by vibrating with a vibration device according to the embodiments of the present specification. The display panel applied to the display device according to the embodiments of the present specification is not limited to the shape or size of the display panel.

[0038] The features of the various embodiments of this specification may be partially or fully combined or combined with each other, and various technical interlocking and driving mechanisms may be possible, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0039] The present invention will be described in detail with reference to the accompanying drawings and examples as follows: The scales of the components illustrated in the drawings are different from the actual scales for the convenience of explanation, and therefore the present invention is not limited to the scales illustrated in the drawings.

[0040] Various embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0041] FIG. 1 is a plan view that illustrates a schematic example of a display device according to an embodiment of the present specification.

[0042] The display device 10 may include a plurality of regions. For example, the display device 10 may include one or more display areas AA in which an image is displayed, and a pixel PXL array is formed inside the display area AA. One or more non-display areas NA in which no image is displayed may include a driving circuit section and a dam section, and may be provided on one side of the display area AA. For example, the non-display area NA may be adjacent to one or more sides of the display area AA.

[0043] 1, the non-display area NA may be located outside and surround the substantially rectangular display area AA. However, it should be understood that the shape of the display area AA and the arrangement of the non-display area NA adjacent to the display area AA are not specifically limited to the exemplary display device 10 illustrated in FIG. The display area AA and the non-display area NA may be any shape of the display device 10. Examples of such shapes may include pentagons, hexagons, circles, ellipses, etc., and examples herein are not limited thereto.

[0044] Each pixel PXL in the display area AA includes a sub-pixel, which can display colors such as red (R), green (G), blue (B), and white (W). Each pixel PXL and sub-pixel may also be associated with a pixel circuit including one or more transistors (TFT: Thin Film Transistor) fabricated on a substrate of the display device 10. Each pixel circuit may be electrically coupled to gate lines and data lines for communication with one or more driving circuits, such as a gate driver GIP and a data driver D-IC located in the non-display area NA of the display device 10.

[0045] One or more driving circuits may be implemented with TFTs arranged in the non-display area NA as shown in Fig. 1. For example, the gate driver GIP may be implemented using a plurality of TFTs on the substrate of the display device 10. Non-limiting examples of circuits that may be implemented with the TFTs on the substrate may include an inverter circuit, a multiplexer, and an ESD (electro static discharge) circuit, and the embodiments of the present specification are not limited thereto.

[0046] Some of the driving circuits may be provided as an integrated circuit (IC) chip and mounted in the non-display area NA of the display device 10 using chip-on-glass (COG) or other similar methods, or some of the driving circuits may be mounted on another substrate and coupled to connection interfaces (pads / bumps, pins) disposed in the non-display area NA using a printed circuit such as a flexible printed circuit board (PCB), chip-on-film (COF), tape-carrier-package (TCP), or other suitable technology.

[0047] In the embodiments herein, at least two different types of TFTs are used in the TFT substrate for the display. The types of TFTs employed in the pixel circuit part and the driving circuit part may vary depending on the requirements of the display.

[0048] For example, the pixel circuit may be implemented with a TFT having an oxide active layer (oxide TFT), and the driving circuit may be implemented with a TFT having a low temperature polysilicon active layer (LTPS TFT) and a TFT having an oxide active layer. Unlike LTPS TFTs, oxide TFTs do not have the problem of threshold voltage Vth variation from the pixel-to-pixel. A uniform threshold voltage Vth may also be obtained in an array of pixel circuits for a display. The problem of uniformity of threshold voltage Vth among TFTs implementing the driving circuit will have less direct impact on pixel brightness uniformity.

[0049] The driving circuit (eg, GIP) incorporates a gate driving IC inside the display panel, thereby reducing the number of driving ICs and reducing costs, and providing a high-speed scan signal to the display area of ​​the display panel.

[0050] By using a driving circuit on a substrate realized with LTPS TFTs, signals and data can be provided to pixels at a higher clock than when all TFTs in a TFT panel are formed with oxide TFTs. Therefore, a display capable of high speed operation can be provided uniformly. For example, the advantages of oxide TFTs and LTPS TFTs can be combined with the design of a TFT panel, and oxide TFTs and LTPS TFTs can be selected and used according to their respective advantages.

[0051] The display area AA can include a first area PH, which includes a hole area H and a first pattern portion PT1, a first dam portion DM, a second pattern portion PT2, and a routing wiring area RK surrounding the hole area H in order to arrange a camera within the display area AA, and the configurations of these will be described in detail below.

[0052] 2 and 3 are three-dimensional diagrams that diagrammatically illustrate an example of a display device according to an embodiment of the present specification.

[0053] A display device according to an embodiment of the present specification may be applied to a foldable display device.

[0054] A foldable display device may include at least one display area AA.

[0055] A foldable display device may be arranged such that one display area of ​​the display device is folded along a folding line to be divided into a first display area AA1 and a second display area AA2, or may have multiple display areas inside and outside the display device. Pixels PXL are formed in the display areas.

[0056] Referring to FIG. 3, the foldable display device may further include a first display area AA1 and a second display area AA2 disposed inside the display device, and a third display area AA3 disposed outside the display device.

[0057] Referring to Figures 2 and 3, the first area PH for placing a camera within the display area AA may be arranged in one or more of the first display area AA1 arranged inside the display device, the second display area AA2, or the third display area AA3 arranged outside the display device.

[0058] FIG. 4 is an enlarged view that illustrates a schematic view of the first region PH of the display device 10 of this specification.

[0059] The first area PH includes a hole area H for arranging a camera within the display area AA, and a first pattern portion PT1, a first dam portion DM, a second pattern portion PT2, and a routing wiring area RK surrounding the hole area H.

[0060] FIG. 5 is a cross-sectional view that diagrammatically illustrates an example of a cross section taken along line AA' of FIG.

[0061] Referring to FIG. 5, a substrate 100 of a display device according to an embodiment of the present specification may include a first substrate, a second substrate, and an intermediate layer between the first substrate and the second substrate.

[0062] The first and second substrates may be made of at least one of polyimide, polyethersulfone, polyethylene terephthalate, and polycarbonate, and the embodiments of the present specification are not limited thereto. When the substrate is made of a plastic material, a manufacturing process of the display device may be performed in a state where a supporting substrate made of glass is disposed under the substrate, and the supporting substrate may be released after the manufacturing process of the display device is completed. In addition, after the supporting substrate is released, a back plate (or plate) for supporting the substrate may be disposed under the substrate. When the substrate is made of a plastic material, moisture may penetrate the substrate and the moisture may penetrate to the thin film transistor or the light emitting element layer, thereby degrading the performance of the display device. The display device according to the embodiments of the present specification may be composed of two substrates, a first substrate and a second substrate, made of a plastic material, in order to prevent the performance of the display device from degrading due to moisture penetration. In addition, by forming an intermediate layer, which is an inorganic film, between the first substrate and the second substrate, moisture may be prevented from penetrating the substrate, thereby improving the performance reliability of the product. The intermediate layer may be an inorganic film, for example, but not limited to, a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof.

[0063] The display device formed on the substrate 100 may include a plurality of regions. In this specification, the display device is configured with a display region AA and a non-display region NA, but is not limited thereto.

[0064] A buffer layer consisting of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof may be disposed on one side of the display area AA and the non-display area NA on the substrate 100. The buffer layer may improve the adhesion between the substrate 100 and layers formed on the buffer layer, and may block various types of defect factors such as alkaline components that flow out from the substrate 10. The buffer layer may also delay the diffusion of moisture or oxygen that has penetrated into the substrate 100.

[0065] The buffer layer may be omitted depending on the type and material of the substrate, the structure and type of the thin film transistor, and so on.

[0066] Transistors in the display area AA and the non-display area NA may be formed on the substrate 100 and the buffer layer. The transistors in the display area AA may include a switching transistor SW Tr and a driving transistor DR Tr for driving the subpixel, and the transistors in the non-display area NA may include a first gate driving transistor GT1 and a second gate driving transistor GT2 for driving the gate driver GIP.

[0067] In the drive transistor DRTr, a light-shielding layer 200 may be disposed on a substrate 100 or a buffer layer.

[0068] The light-shielding layer 200 blocks light toward the first semiconductor layer 210 of the driving transistor DRTr, and is connected to the first drain electrode 230D to prevent a phenomenon in which parasitic carriers are accumulated in the first semiconductor layer 210, causing a sudden increase in drain current, and a change in threshold voltage due to this phenomenon.

[0069] The light-shielding layer 200 may be formed of a single layer or multiple layers having at least one of titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), gold (Au), neodymium (Nd) and nickel (Ni), and the embodiments of the present specification are not limited thereto.

[0070] A first insulating layer 110 may be disposed above the light blocking layer 200 .

[0071] The first insulating layer 110 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of other insulating inorganic or organic materials, but the embodiments of the present specification are not limited thereto.

[0072] The first semiconductor layer 210 of the driving transistor DRTr in the display area AA and the second semiconductor layer 400 of the first gate driving transistor GT1 in the non-display area NA may be disposed on the first insulating layer 110, and the first semiconductor layer 210 may overlap the light-shielding layer 200.

[0073] The first semiconductor layer 210 and the second semiconductor layer 400 may be made of a metal oxide semiconductor, for example, any one of IGZO (Indium-gallium-zinc-oxide), IZO (Indium-zinc-oxide), IGTO (Indium-gallium-tin-oxide), and IGO (Indium-gallium-oxide), but are not limited thereto.

[0074] The metal oxide semiconductor may have improved conductive properties through a doping process of injecting impurities, and may include a channel region in which a channel through which electrons and holes move is formed, and a source region and a drain region which are conductive regions on both sides of the channel region. A source electrode and a drain electrode may be connected to the source region and the drain region.

[0075] A first gate insulating layer 120 may be disposed on the first semiconductor layer 210 and the second semiconductor layer 400. The first gate insulating layer 120 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating inorganic or organic material, but the embodiments of the present specification are not limited thereto.

[0076] A first gate electrode 220 and a second gate electrode 410 may be disposed on the first gate insulating layer 120, overlapping the first semiconductor layer 210 and the second semiconductor layer 400, and the first gate electrode 220 and the second gate electrode 410 may be formed of any one or more materials selected from the group consisting of silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and gold (Au), but the embodiments of the present specification are not limited thereto.

[0077] In the same process as the first gate electrode 220 and the second gate electrode 410, the first capacitor electrode Cst1 of the capacitance PXL Cst included in the subpixel, the first metal layer 300 overlapping the switching transistor SW Tr of the subpixel, and the second metal layer 500 overlapping the second gate driving transistor GT2 can be formed and arranged.

[0078] The first metal layer 300 and the second metal layer 500 may be driven by the lower gate electrodes of the switching transistor SW Tr and the second gate driving transistor GT2, respectively, or may be used as a light blocking layer to block light reflected by the third semiconductor layer 310 and the fourth semiconductor layer 510 of the switching transistor SW Tr and the second gate driving transistor GT2, and the embodiments of this specification are not limited thereto.

[0079] A second insulating layer 130 may be disposed on the first gate electrode 220, the second gate electrode 410, the first metal layer 300, the second metal layer 500, and the first capacitor electrode Cst1.

[0080] The second insulating layer 130 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of other insulating inorganic or organic materials, but the embodiments of the present specification are not limited thereto.

[0081] A second capacitor electrode Cst2 of the sub-pixel capacitance PXL Cst may be disposed on the second insulating layer 130. The second capacitor electrode Cst2 may be disposed to overlap the first capacitor electrode Cst1 and may be formed of the same material as the first capacitor electrode Cst1.

[0082] A third insulating layer 140 may be disposed on the second capacitor electrode Cst2.

[0083] The third insulating layer 140 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but the embodiments of the present specification are not limited thereto.

[0084] On the third insulating layer 140, the third semiconductor layer 310 of the switching transistor SWTr in the display area AA and the fourth semiconductor layer 510 of the second gate driving transistor GT2 in the non-display area NA may be disposed.

[0085] The third semiconductor layer 310 and the fourth semiconductor layer 510 may be formed of low temperature polycrystalline silicon (LTPS).

[0086] A second gate insulating layer 150 may be disposed on the third semiconductor layer 310 and the fourth semiconductor layer 510. The second gate insulating layer 150 may be disposed between the third semiconductor layer 310 and the fourth semiconductor layer 510 and the third gate electrode 320 and the fourth gate electrode 520 to insulate the third semiconductor layer 310 and the fourth semiconductor layer 510 from the third gate electrode 320 and the fourth gate electrode 520.

[0087] The LPTS semiconductor layer may be doped to form a channel region and source / drain regions connected to source / drain electrodes.

[0088] The second gate insulating layer 150 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0089] The third gate electrode 320 and the fourth gate electrode 520 may be disposed to overlap the third semiconductor layer 310 and the fourth semiconductor layer 510 .

[0090] The third gate electrode 320 and the fourth gate electrode 520 may be formed of a single layer or multiple layers of any one of silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and gold (Au), or an alloy thereof, but is not limited thereto.

[0091] A fourth insulating layer 160 may be disposed on the third gate electrode 320 and the fourth gate electrode 520 .

[0092] The fourth insulating layer 160 may be formed of an insulating inorganic material such as silicon nitride (SiNx) and silicon oxide (SiOx), or may be formed of one or more organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, but the embodiments of the present specification are not limited thereto.

[0093] A first source electrode 230S and a first drain electrode 230D connected to the first semiconductor layer 210, a second source electrode 420S and a second drain electrode 420D connected to the second semiconductor layer 400, a third source electrode 330S and a third drain electrode 330D connected to the third semiconductor layer 310, and a fourth source electrode 530S and a fourth drain electrode 530D connected to the fourth semiconductor layer 510 may be arranged on the fourth insulating layer 160.

[0094] The first source electrode 230S, the first drain electrode 230D, the second source electrode 420S and the second drain electrode 420D are connected to the first semiconductor layer 210 and the second semiconductor layer 400 through contact holes formed in the first gate insulating layer 120, the second insulating layer 130, the third insulating layer 140, the second gate insulating layer 150 and the fourth insulating layer 160.

[0095] The third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S and the fourth drain electrode 530D are connected to the third semiconductor layer 310 and the fourth semiconductor layer 510 through contact holes formed in the second gate insulating layer 150 and the fourth insulating layer 160.

[0096] The first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S and the fourth drain electrode 530D may be formed through the same process and may be made of any one or more materials selected from the group consisting of silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W) and gold (Au).

[0097] The first wiring 630 can be formed and arranged in the non-display area NA in the same process as the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S and the fourth drain electrode 530D.

[0098] The first wiring 630 may be a wiring for transmitting a voltage to be applied to the cathode electrode 620 .

[0099] A first planarization layer 170 may be disposed on the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S and the fourth drain electrode 530D.

[0100] The first planarization layer 170 is formed of an organic insulating layer such as polyacrylate or polyimide, and can reduce steps due to wiring and contact holes formed thereunder.

[0101] A connection electrode 240 for connecting the first drain electrode 230D and the anode electrode 600 may be disposed on the first planarization layer 170.

[0102] The connecting electrode 240 may be electrically connected to the first drain electrode 230D through a hole formed in the first planarization layer 170.

[0103] The connecting electrode 240 may be made of at least one of titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), gold (Au), neodymium (Nd), and nickel (Ni), or an alloy thereof, but the embodiments of the present specification are not limited thereto.

[0104] A second planarization layer 180 may be disposed on the connecting electrode 240. The second planarization layer 180 may be formed of an organic insulating layer such as polyacrylate and polyimide, but the embodiments of the present specification are not limited thereto.

[0105] An anode electrode 600 may be disposed on the second planarization layer 180. The anode electrode 600 may be electrically connected to the connecting electrode 240 through a hole formed in the second planarization layer 180.

[0106] The second wiring 640 may be formed in the non-display area NA in the same process as forming the anode electrode 600. The second wiring 640 may be disposed to overlap a portion of the first gate driving transistor GT1 and the second gate driving transistor GT2, and may be connected to the first wiring 630 disposed in the non-display area NA to apply a voltage to the cathode electrode 620.

[0107] The anode electrode 600 and the second wiring 640 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), lead (Pd), indium tin oxide (ITO), indium zinc oxide (IZO), or an alloy thereof, but the embodiments of the present specification are not limited thereto.

[0108] A bank 190 may be disposed on the anode electrode 600 , the second wiring 640 , and the second planarization layer 180 .

[0109] The bank 190 can divide a plurality of sub-pixels SP, and can minimize the light bleeding phenomenon and prevent color mixing that occurs at various viewing angles.

[0110] The bank 190 exposes the anode electrode 600 corresponding to the light emitting area and may overlap the terminal end of the anode electrode 600 .

[0111] The bank 190 may be made of at least one of inorganic insulating materials such as silicon nitride (SiNx) or silicon oxide (SiOx) or organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, but is not limited thereto.

[0112] A spacer 191 may be further disposed on the bank 190. The spacer 191 supports a gap between the substrate 100 on which the light emitting element layer 610 is formed and an upper substrate, thereby minimizing damage to elements inside the display panel when a physical impact occurs from the outside. The spacer 191 may be formed of the same material as the bank 190 and may be formed simultaneously with the bank 190, but is not limited thereto.

[0113] A light emitting element layer 610 may be disposed on the opening of the bank 190 exposing the anode electrode 600. The light emitting element layer 610 may include one or more organic light emitting layers selected from a red light emitting layer, a green light emitting layer, a blue light emitting layer, and a white light emitting layer to emit light of a specific color. In addition to the organic light emitting layer, the light emitting element layer 610 may further include, but is not limited to, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

[0114] The hole injection layer, hole transport layer, electron transport layer, and electron injection layer may be disposed in each subpixel with different thicknesses and materials, or may be disposed in common on the front surface.

[0115] If the light emitting device layer 610 includes a white organic light emitting layer, the light emitting device layer 610 can be disposed over the openings in the banks 190 and the substrate.

[0116] A color filter for converting light emitted from the white organic light emitting layer into light of a different color may be disposed on top of the light emitting element layer 610 .

[0117] A cathode electrode 620 may be disposed on the light emitting element layer 610. The cathode electrode 620 supplies electrons to the light emitting element layer 610 and may be made of a conductive material with a low work function.

[0118] When the display device 10 is a top emission type, the cathode electrode 620 may be disposed using a transparent conductive material through which light can pass, for example, at least one of indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0119] Also, the conductive material may be disposed using a semi-transparent material through which light can pass, for example, at least one of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag, but is not limited thereto.

[0120] When the display device 10 is a bottom emission type, the cathode electrode 620 may be a reflective electrode that reflects light and may be disposed using an opaque conductive material. For example, the cathode electrode 620 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.

[0121] In the non-display area NA of the display device 10, a driving circuit section and a terminal section including a second dam section in which a plurality of dams are arranged are disposed.

[0122] The end portion of the non-display area NA may be a connection portion electrically connected to the cathode electrode 620 and a wiring for applying a voltage to the cathode electrode 620, and may be an area where the display device 10 is sealed using a plurality of dams.

[0123] At the termination portion, a first insulating layer 110, a first gate insulating layer 120, a second insulating layer 130, and a third insulating layer 140 disposed on a substrate 100 may be extended.

[0124] Wires may be disposed at the end portions so that the power supply voltage and touch signals applied to the FPCB of the display device 10 are connected to the display panel through the wires.

[0125] The first wiring 630 may be disposed on the fourth insulating layer 160 and in contact with the sides of the fourth insulating layer 160 and the second gate insulating layer 150, and may be disposed extending between the first dam DM1 and the third insulating layer 140 in the non-display area NA.

[0126] The first dam DM1 can be formed of the same material and in the same process as the first planarization layer 170 and the bank 190 and can be stacked thereon.

[0127] The second dam DM2 may be formed of the same material and in the same process as the first planarization layer 170, the second planarization layer 180, the bank 190, and the spacer 191, and may be stacked thereon.

[0128] The first dam DAM1 and the second dam DAM2 may have a first height and a second height, respectively, and may surround the display area AA.

[0129] The second height may be greater than the first height. Even if the second encapsulation layer 720 exceeds the first dam DM1 of the second dam portion, it may not be formed on the outer periphery of the second dam portion due to the second dam DM2.

[0130] The first sealing layer 710 and the third sealing layer 730 may be disposed to extend beyond the second dam DM2 to the outer shell.

[0131] The second wiring 640 may be disposed to extend between the first planarization layer 170 and the bank 190 of the first dam DM1 and between the second planarization layer 180 and the bank 190 of the second dam DM2.

[0132] The cathode electrode 620 may extend to a region between the first dam DM1 and the second dam DM2 and be electrically connected to the first wiring 630 and the second wiring 640.

[0133] A sealing layer 700 may be disposed on the cathode electrode 620 in the display area AA and the cathode electrode 620 in the non-display area NA and the second dam DM2.

[0134] The encapsulation layer 700 can protect the display device 10 from external moisture, oxygen, or foreign matter. For example, the encapsulation layer 700 can prevent the penetration of external oxygen and moisture to prevent oxidation of the light emitting material and the electrode material.

[0135] The encapsulation layer 700 may be made of a transparent material so that light emitted from the light emitting device layer 610 can pass through it.

[0136] The sealing layer 700 may include a first sealing layer 710, a second sealing layer 720, and a third sealing layer 730 that block the penetration of moisture and oxygen, but the embodiment of the present specification is not limited thereto. The first sealing layer 710, the second sealing layer 720, and the third sealing layer 730 may have a structure in which they are sequentially stacked, but the embodiment of the present specification is not limited thereto.

[0137] The first encapsulation layer 710 and the third encapsulation layer 730 may be made of at least one inorganic material selected from the group consisting of silicon nitride (SiNx), silicon oxide (SiOx) and aluminum oxide (AlyOz), but are not limited thereto.

[0138] The second encapsulation layer 720 can cover foreign matter or particles that may be generated during a manufacturing process, and can flatten the surface of the first encapsulation layer 710.

[0139] The second encapsulation layer 720 may be an organic material, for example, but is not limited to, silicon oxycarbon (SiOCz), epoxy, polyimide, and polyethylene, acrylate series polymers.

[0140] A touch buffer layer 800 may be disposed on the third sealing layer 730. The touch buffer layer 800 may be disposed in front of the display area AA and the non-display area NA, and may be disposed extending to the pad portion. The touch buffer layer 800 may be a first insulating layer, and is not limited to the term.

[0141] The touch buffer layer 800 may be made of at least one inorganic material selected from the group consisting of silicon nitride (SiNx), silicon oxide (SiOx) and aluminum oxide (AlyOz), but is not limited thereto.

[0142] A first touch electrode 810 may be disposed on the touch buffer layer 800 .

[0143] The touch drive may be performed by a plurality of sensing electrodes and a plurality of driving electrodes arranged in the display area AA. The sensing electrodes extend along a first direction and include a plurality of sub-sensing electrodes Rx arranged to have a certain interval from each other along a second direction. The plurality of sensing electrodes may be formed continuously without being interrupted in the first direction.

[0144] The plurality of driving electrodes extend in a second direction and include a plurality of sub-driving electrodes Tx arranged at regular intervals from each other in the first direction. The sub-driving electrodes Tx may be electrically connected to each other in the second direction.

[0145] When a plurality of sub-sensing electrodes Rx and a plurality of sub-driving electrodes Tx are formed in the same layer, the plurality of sub-driving electrodes Tx may be electrically connected by a bridge pattern.

[0146] The plurality of sub-sense electrodes Rx and the plurality of sub-drive electrodes Tx may have a metal mesh structure.

[0147] In addition, the plurality of sub-sensing electrodes Rx may be electrically connected by a bridge pattern, and the plurality of sub-driving electrodes Tx may be continuously formed without being cut off and electrically connected.

[0148] The first touch electrode 810 may electrically connect the plurality of sub-sensing electrodes Rx or the plurality of sub-driving electrodes Tx to each other.

[0149] The first touch electrode 810 may have a single layer or multi-layer structure made of a metal material such as molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Ti), titanium / aluminum / titanium (Ti / Al / Ti), molybdenum / aluminum / molybdenum (Mo / Al / Mo), etc., but is not limited thereto.

[0150] A touch insulating layer 820 may be disposed on the first touch electrode 810. The touch insulating layer 820 may be disposed on the front surface of the display area AA and the non-display area NA, and may be disposed extending to the pad portion. The touch insulating layer 820 may be a second insulating layer, and is not limited to the term.

[0151] The touch insulating layer 820 may be made of at least one inorganic material selected from the group consisting of silicon nitride (SiNx), silicon oxide (SiOx) and aluminum oxide (AlyOz), but is not limited thereto.

[0152] A second touch electrode 830 may be disposed on the touch insulation layer 820. The second touch electrode 830 may be a plurality of sub-sensing electrodes Rx or a plurality of sub-driving electrodes Tx for touch drive.

[0153] In the same process in which the second touch electrode 830 is formed, a touch line 840 for transmitting a touch driving signal to the non-display area NA may be disposed.

[0154] The touch line 840 may overlap the first gate driving transistor GT1 or the second gate driving transistor GT2 and may be arranged to extend to the pad portion.

[0155] The second touch electrode 830 and the touch line 840 may have a single layer or multi-layer structure made of a metal material such as, but not limited to, molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Ti), titanium / aluminum / titanium (Ti / Al / Ti), molybdenum / aluminum / molybdenum (Mo / Al / Mo), etc.

[0156] A third planarization layer 850 may be disposed over the second touch electrode 830 and the touch line 840.

[0157] The third planarization layer 850 may cover and planarize the second touch electrode 830, the touch line 840, and the touch insulating layer 820. In addition, the third planarization layer 850 may be made of one or more organic insulating materials, such as, but not limited to, BCB (BenzoCycloButene), an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0158] An adhesive layer 900 and a cover window 910 may be disposed on the third planarization layer 850 .

[0159] The first region PH shown in FIG. 4 will be specifically described with reference to FIG. 6 and FIG.

[0160] In order to arrange a camera within the display area AA, the first area PH includes a hole area H, a first pattern portion PT1 surrounding the hole area H, a first dam portion DM, a second pattern portion PT2, and a routing wiring area RK.

[0161] The hole region H may be located in the center of the first region PH and may be formed to physically penetrate from the substrate 100 to the third planarization layer 850. The hole region H may include a camera, a sensor, and a light source, and the hole region H may allow light to easily pass through above the camera or sensor.

[0162] In the routing wiring region RK, routing wiring is arranged for electrically connecting the sub-pixels in the display area AA to each other between the first regions PH.

[0163] The first routing wiring 20 may be formed in the same process as the process of forming the first gate electrode 220, the second gate electrode 410, the first metal layer 300, the second metal layer 500 and the first capacitor electrode Cst1 on the first gate insulating layer 120 extending into the first region PH, and the embodiments of this specification are not limited thereto.

[0164] The second routing wire 30 may be formed in the same process as the process of forming the second capacitor electrode Cst2 on the second insulating layer 130 arranged to extend in the first region PH, but the embodiments of the present specification are not limited thereto.

[0165] The third routing wiring 40 may be formed in the same process as the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S and the fourth drain electrode 530D on the fourth insulating layer 160 extending into the first region PH, and the embodiments of the present specification are not limited thereto.

[0166] The fourth routing wire 50 may be formed in the same process as the connecting electrode 240 on the first planarization layer 170 disposed to extend in the first region PH, but the embodiment of the present specification is not limited thereto.

[0167] In the routing wiring area RK, the first touch electrode 810 and the second touch electrode 830 are formed as wiring for routing wiring, and may electrically connect touch driving signals in the display area AA.

[0168] The gate lines of the subpixels in the display area AA may be connected to the first routing wiring 20 and the second routing wiring 30 and thus electrically connected in the first region PH, and the data lines of the subpixels may be connected to the third routing wiring 40 and the fourth routing wiring 50 and thus electrically connected in the first region PH.

[0169] The first pattern portion PT1 and the second pattern portion PT2 are disposed to surround the hole region H. The first pattern portion PT1 and the second pattern portion PT2 include a plurality of patterns PT, and each of the plurality of patterns PT may include a lower pattern PTa and an upper pattern PTb. The lower pattern PTa may be formed of the same material as the fourth insulating layer 160 at the same time. The upper pattern PTb may be formed of the same material as the second planarization layer 180 at the same time. However, the material and number of layers of the insulating layers of the plurality of patterns PT are not limited thereto.

[0170] Furthermore, the multiple patterns PT can be arranged to be spaced apart from each other by a certain distance.

[0171] The patterns PT can prevent moisture from penetrating into the display area AA through the light emitting element layer 610 which is vulnerable to moisture penetration.

[0172] The width of the lower surface of the upper pattern PTb disposed on the lower pattern PTa is wider than the width of the upper surface of the lower pattern PTa.

[0173] The light emitting device layer 610 arranged on the upper and side surfaces of the upper pattern PTb may be disconnected by multiple patterns PT because the light emitting device layer 610 is not formed on the side surface of the lower pattern PTa due to the separation space between the lower surface of the upper pattern PTb and the side surface of the lower pattern PTa.

[0174] In addition, the first sealing layer 710 arranged in the routing wiring region RK, the first pattern portion PT1, the first dam portion DM, and the second pattern portion PT2 of the first region PH may be formed on the upper surface and side surfaces of the upper pattern PTb and part of the lower surface of the upper pattern PTb, and may not be formed on part of the side surfaces of the lower pattern PTb, so that an empty space (ES) may be formed.

[0175] A hold dam HDM may be disposed in the first dam portion DM between the first pattern portion PT1 and the second pattern portion PT2.

[0176] The hole dam HDM can prevent the second sealing layer 720 from overflowing into the hole region H. One or more hole dams HDM may be arranged in series and may be arranged within the first pattern portion PT1 and the second pattern portion PT2.

[0177] The holder dam HDM may be formed by stacking patterns formed of the same material and in the same process when forming the fourth insulating layer 160, the second planarization layer 180, and the bank 190, but the embodiments of the present specification are not limited thereto.

[0178] The second sealing layer 720 may be disposed only on the second pattern portion PT2 and a portion of the hole dam HDM by the hole dam HDM.

[0179] The third sealing layer 730 may be disposed in the routing wiring region RK, the first pattern portion PT1, the dam portion DM, and the second pattern portion PT2 of the first region PH, and may contact or be in contact with the first sealing layer 710 on the top and side surfaces of the multiple patterns PT of the first pattern portion PT1.

[0180] The touch buffer layer 800 may be disposed to extend on the third encapsulation layer 730 in the routing wiring region RK, the first pattern portion PT1, the dam portion DM, and the second pattern portion PT2 of the first region PH.

[0181] The touch insulation layer 820 is arranged to extend over the routing wiring region RK, the first pattern portion PT1, the dam portion DM and the second pattern portion PT2 of the first region PH, and can be arranged in contact with the upper surface of the touch buffer layer 800 on the second pattern portion PT2 and the hole dam HDM.

[0182] In an area between the patterns PT of the first pattern unit PT1, a passivation layer 60 may be disposed between the touch buffer layer 800 and the touch insulation layer 820, so that the touch buffer layer 800 and the touch insulation layer 820 may be spaced apart from each other.

[0183] The protective layer 60 may have an end portion partially overlapping with the patterns PT between the patterns PT of the first pattern portion PT1.

[0184] The protective layer 60 may be made of at least one of organic insulating materials such as, but not limited to, acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0185] Moisture input through the hole region H may permeate into the voids (ES) formed in the pattern PT of the first pattern portion PT1 through the third planarization layer 850 made of an organic material and move to the display area AA, thereby degrading the quality of the display panel.

[0186] The protective layer 60 may be disposed between the multiple patterns PT, and the touch buffer layer 800 and the touch insulating film 820 on the upper surfaces of the multiple patterns PT may be in contact with each other.

[0187] Even if the protective layer 60 is made of an organic material, it is not connected to the touch buffer layer 800 and the touch insulating layer 820 on the upper surfaces of the patterns PT, so that the protective layer 60 can prevent moisture from being transferred.

[0188] In addition, since the protective layer 60 is formed, the distance between the voids (ES) and seams and the third planarization layer 850 becomes large, so that moisture in the third planarization layer 850 is not transferred.

[0189] A first height H1 from the lower surface of the lower pattern PTa to the upper surface of the upper pattern PTb of the multiple patterns PT of the first pattern portion PT1 and a second height H2 from the lower surface of the lower pattern PTa to the upper surface of the protective layer 60 may be different from each other, and the second height H2 may be higher than the first height H1.

[0190] The first pattern part PT1 is adjacent to the hole region H, and the sides of insulating layers such as the pattern PT, the first encapsulating layer 710, the third encapsulating layer 730, the touch buffer layer 800 and the touch insulating layer 820 arranged at the end portion Ed of the first pattern part PT1 may be exposed to the hole region H.

[0191] A support plate 70 of the display device 10 may be disposed on the lower part of the substrate 100, and a hole may be formed in the hole region H so that the support plate 70 corresponds to the hole region H, and an optical unit 101 including a camera, a sensor, a light source, etc. may be disposed in the hole.

[0192] A display device according to an embodiment of the present specification can be described as follows.

[0193] A display device according to an embodiment of the present specification includes a substrate including a display area and a non-display area, a first area disposed in the display area and a hole area in the first area, a first pattern portion, a first dam portion, and a second pattern portion, and includes a sealing layer on at least a portion of the first area, a first insulating layer and a second insulating layer, and a plurality of first patterns disposed in the first pattern portion, wherein the first insulating layer and the second insulating layer are spaced apart from each other between the plurality of first patterns, and the first insulating layer and the second insulating layer are in contact with each other on at least a portion of the upper surfaces of the plurality of first patterns.

[0194] According to some embodiments of the present specification, the device may include a plurality of second patterns arranged in the second pattern portion, the sealing layer being on the plurality of second patterns, and the first insulating layer and the second insulating layer may be in contact with each other in the second pattern portion.

[0195] According to some embodiments herein, a protective layer may be disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

[0196] According to some embodiments herein, a first height from a lower surface to an upper surface of the plurality of first patterns and a second height from the lower surface of the first patterns to the upper surface of the protective layer may be different from each other.

[0197] According to some embodiments herein, the second height may be greater than the first height.

[0198] According to some embodiments herein, an end of the protective layer may overlap the first patterns.

[0199] According to some embodiments of the present disclosure, a display device may include a plurality of pixels disposed in a display area and a plurality of transistors disposed in the plurality of pixels.

[0200] According to some embodiments of the present disclosure, the light emitting device may include an anode electrode, a light emitting layer, and a cathode electrode electrically connected to the plurality of transistors.

[0201] According to some embodiments herein, a sealing layer may be disposed on the cathode electrode.

[0202] According to some embodiments herein, a touch panel may include a first touch electrode disposed on a first insulating layer, a second insulating layer, and a second touch electrode.

[0203] According to some embodiments herein, the encapsulation layer can include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer.

[0204] According to some embodiments herein, sides of the first encapsulation layer, the third encapsulation layer, the first insulating layer, and the second insulating layer may be exposed in the first region.

[0205] According to some embodiments of the present disclosure, the device may further include a camera, a sensor, and a light source disposed in the first area.

[0206] According to some embodiments of the present disclosure, the display device may further include a driving circuit unit and a second dam unit disposed in the non-display area.

[0207] A display device according to an embodiment of the present specification includes a substrate having a display area and a non-display area, a first area and a plurality of pixels arranged in the display area, and a plurality of transistors arranged in the plurality of pixels, a planarization layer arranged on the plurality of transistors, an anode electrode, a light-emitting layer, and a cathode electrode arranged on the planarization layer, a sealing layer arranged on the cathode electrode, a first insulating layer arranged on the sealing layer, a first touch electrode, a second insulating layer, and the second touch electrode, and a first pattern portion, a first dam portion, and a second pattern portion in the first area, the first insulating layer and the second insulating layer being arranged to extend to the first pattern portion, the first dam portion, and the second pattern portion.

[0208] According to some embodiments of the present disclosure, the first pattern may include a plurality of first patterns disposed in the first pattern portion.

[0209] According to some embodiments of the present disclosure, the first insulating layer and the second insulating layer may contact each other on a portion of the upper surfaces of the first patterns.

[0210] According to some embodiments herein, the first insulating layer and the second insulating layer may be spaced apart between the plurality of first patterns.

[0211] According to some embodiments herein, a protective layer may be disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

[0212] According to some embodiments herein, a first height from a lower surface to an upper surface of the plurality of first patterns and a second height from the lower surface of the first patterns to the upper surface of the protective layer may be different from each other.

[0213] According to some embodiments herein, the second height may be greater than the first height.

[0214] According to some embodiments herein, an end of the protective layer may overlap the first patterns.

[0215] According to some embodiments of the present disclosure, the second pattern may include a plurality of second patterns disposed in the second pattern portion.

[0216] According to some embodiments herein, a sealing layer, a first insulating layer and a second insulating layer may be disposed extending over the plurality of second patterns.

[0217] According to some embodiments herein, the first insulating layer and the second insulating layer may be in contact on the second pattern portion.

[0218] According to some embodiments herein, the encapsulation layer can include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer.

[0219] According to some embodiments herein, sides of the first encapsulation layer, the third encapsulation layer, the first insulating layer, and the second insulating layer may be exposed in the first region.

[0220] According to some embodiments of the present disclosure, the hall area disposed in the first area may further include a camera, a sensor, and a light source.

[0221] According to some embodiments of the present disclosure, the display device may further include a driving circuit unit and a second dam unit disposed in the non-display area.

[0222] Although the embodiments of the present specification have been described in detail above with reference to the attached drawings, the present specification is not necessarily limited to these embodiments, and various modifications can be made within the scope of the technical idea of ​​the present specification. Therefore, the embodiments disclosed in the present specification are intended to illustrate, not to limit, the technical idea of ​​the present specification, and the scope of the technical idea of ​​the present specification is not limited by these embodiments. Therefore, the above-described embodiments should be understood to be illustrative and not limiting in all respects. The scope of protection of the present specification should be interpreted by the scope of the claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present specification. [Explanation of symbols]

[0223] PH: 1st area RK: Routing area PT1: First pattern section PT2: Second pattern section H: Hole area 101:Optics Department 70: Support plate HDM:Holdam 60:Protective layer 710: First sealing layer 720: Second sealing layer 730: 3rd sealing layer 800: Touch buffer layer 820: Touch insulation layer

Claims

1. Display area; a first region disposed in the display region, the first region having a hole region and a first pattern portion adjacent to the hole region; A plurality of first patterns disposed in the first pattern portion; and a first insulating layer and a second insulating layer disposed on the plurality of first patterns; A display device comprising: the first insulating layer and the second insulating layer are spaced apart from each other between the first patterns; the first insulating layer and the second insulating layer are in contact with each other on an upper surface of each of the first patterns; A display device, wherein a height of the first insulating layer above each of the plurality of first patterns is greater than a height of the first insulating layer between the plurality of first patterns.

2. The first region further includes a second pattern portion adjacent to the first pattern portion and a plurality of second patterns disposed in the second pattern portion; A sealing layer is disposed on the plurality of second patterns without extending to the first pattern portion; The display device according to claim 1 , wherein the first insulating layer and the second insulating layer are disposed on the sealing layer in the second pattern portion.

3. The display device as described in claim 1, wherein the first insulating layer and the second insulating layer are separated from each other by a protective layer between the multiple first patterns.

4. A display device as described in claim 3, wherein an upper surface of each of the plurality of first patterns is lower than an upper surface of the protective layer.

5. The display device described in claim 3, wherein the protective layer partially overlaps the plurality of first patterns.

6. A display device as described in claim 2, wherein the first region further includes a first dam portion between the first pattern portion and the second pattern portion, and a hole dam disposed in the first dam portion.

7. A display device as described in claim 6, wherein an upper surface of the hole dam is higher than an upper surface of each of the plurality of second patterns.

8. Each of the plurality of first patterns includes a lower pattern and an upper pattern disposed on the lower pattern; The display device of claim 1 , wherein a lower surface of the upper pattern is wider than an upper surface of the lower pattern.

9. The display device of claim 8, wherein an open space is formed between a side surface of the lower pattern and a lower surface of the upper pattern.

10. The display device of claim 2, further comprising an anode electrode, a light-emitting layer and a cathode electrode arranged in the display area.

11. The display device of claim 10 , wherein the sealing layer is disposed on the cathode electrode.

12. A display device as described in claim 1, further comprising a first touch electrode disposed on the first insulating layer, and a second touch electrode disposed on the second insulating layer.

13. A display device as described in claim 1, wherein a side of the first insulating layer and a side of the second insulating layer are exposed to a hole region.

14. A display device as described in claim 1, further comprising a camera, a sensor or a light source positioned in the hall area.

15. The display device of claim 6, further comprising a non-display area and a second dam portion disposed in the non-display area.

16. A display device as described in claim 1, wherein the height of the first insulating layer between the plurality of first patterns is lower than the height of each of the plurality of first patterns.

17. Display area; a first region and a plurality of pixels disposed in the display area; an anode electrode, a light-emitting layer, and a cathode electrode disposed in each of the plurality of pixels; a sealing layer disposed on the cathode electrode; a first insulating layer disposed on the encapsulation layer; a first touch electrode disposed on the first insulating layer; a second insulating layer disposed on the first touch electrode; and a second touch electrode disposed on the second insulating layer; A display device comprising: the first region includes a first pattern portion, a second pattern portion, and a first dam portion between the first pattern portion and the second pattern portion, the first insulating layer and the second insulating layer extend to the first pattern portion, the second pattern portion, and the first dam portion; the first pattern portion includes a plurality of first patterns, A display device, wherein a height of the first insulating layer above each of the plurality of first patterns is greater than a height of the first insulating layer between the plurality of first patterns.

18. The display device of claim 17 , wherein the first insulating layer and the second insulating layer are in contact with each other on an upper surface of each of the first patterns.

19. The display device of claim 17 , wherein the first insulating layer and the second insulating layer are spaced apart from each other between the first patterns.

20. The display device as described in Claim 19, wherein the first insulating layer and the second insulating layer are separated from each other by a protective layer between the plurality of first patterns.

21. A display device as described in claim 20, wherein an upper surface of each of the plurality of first patterns is lower than an upper surface of the protective layer.

22. The display device described in claim 20, wherein the protective layer partially overlaps the plurality of first patterns.

23. The display device according to claim 17 , wherein the second pattern portion includes a plurality of second patterns.

24. The display device described in Claim 23, wherein the sealing layer is positioned on the plurality of second patterns without extending into the first pattern portion.

25. The display device of claim 24 , wherein the first insulating layer and the second insulating layer are in contact with each other in the second pattern portion.

26. A display device as described in Claim 17, wherein the first region further includes a hole region adjacent to the first pattern portion, and a camera, a sensor or a light source is arranged in the hole region.

27. The display device of claim 26 , wherein a side surface of the first insulating layer and a side surface of the second insulating layer are exposed in the hole region.

28. The display device of claim 17, further comprising a non-display area and a second dam portion disposed in the non-display area.

29. A display device as described in claim 17, wherein the height of the first insulating layer between the plurality of first patterns is lower than the height of each of the plurality of first patterns.

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