Photoelectric conversion device, imaging device, control method, and computer program
Patent Information
- Application Number
- JP2021155378
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-24
- Publication Date
- 2025-04-14
- Estimated Expiration
- 2041-09-24
AI Technical Summary
Existing photoelectric conversion devices with both photon and time counters for each pixel result in an increased circuit scale, which is inefficient and costly.
A photoelectric conversion device with a shared time counter among multiple pixels, where each pixel has a photon counter and a judgment mechanism to determine when the photon count reaches a threshold, triggering the shared time counter to measure the time until the threshold is reached.
This configuration allows for efficient pixel readout processing while maintaining a reduced circuit scale, thereby improving the device's performance and cost-effectiveness.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present invention relates to a photoelectric conversion device including a photoelectric conversion unit that outputs a signal according to incident photons, an imaging device, a control method, a computer program, and the like. [Background technology]
[0002] In recent years, a photoelectric conversion device has been proposed that digitally counts the number of photons incident on an avalanche photodiode and outputs the counted value from a pixel as a photoelectrically converted digital signal. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] U.S. Patent Publication 2015 / 0163429 Summary of the Invention [Problem to be solved by the invention]
[0004] Patent Document 1 proposes a structure that includes a time counter that measures time in addition to a photon counter that counts photons. The time counter measures the time from when the photon counter starts measuring until the number of photons reaches a predetermined value, and calculates a pixel value from the measured time. However, Patent Document 1 has a photon counter and a time counter for each pixel, which increases the circuit size.
[0005] The present invention has been made in view of the above problems, and has an object to provide a technique for performing pixel readout processing appropriately while suppressing an increase in circuit scale. [Means for solving the problem]
[0006] The photoelectric conversion device of the present invention that solves the above problem is a photoelectric conversion device having a pixel equipped with a photoelectric conversion unit that outputs a signal in response to incident photons, and includes a first measurement means that measures the number of photons incident on the pixel, a determination means that determines whether any measurement value among the multiple first measurement means has reached a first threshold, and a second measurement means that measures the time from when the first measurement means starts the measurement to when any measurement value among the multiple first measurement means reaches the first threshold. Effect of the Invention
[0007] The present invention provides a technique for appropriately performing pixel readout processing while suppressing an increase in circuit scale. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is a diagram illustrating an example of a hardware configuration of a photoelectric conversion device. [Diagram 2] FIG. 1 is a diagram showing an example of a sensor chip of a photoelectric conversion device. [Diagram 3] FIG. 1 is a diagram showing an example of a circuit chip of a photoelectric conversion device. [Figure 4] FIG. 1 is a diagram showing an example of an equivalent circuit of a pixel and a signal processing unit in a photoelectric conversion device; [Diagram 5] FIG. 1 is a block diagram showing an example of a functional configuration of an imaging device including a photoelectric conversion device. [Figure 6] FIG. 1 is a diagram showing an example of a sensor chip of a photoelectric conversion device. [Figure 7] 1 is a flowchart illustrating an example of an operation of a photoelectric conversion device. [Figure 8] FIG. 1 is a diagram illustrating an example of the operation of a photoelectric conversion device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] The following describes in detail the embodiments for carrying out the present invention. Note that the embodiments described below are examples for realizing the present invention, and should be appropriately modified or changed depending on the configuration of the device to which the present invention is applied and various conditions, and the present invention is not limited to the following embodiments. Also, in all the drawings, parts having the same functions are given the same numbers, and repeated explanations are omitted.
[0010] <Embodiment 1: Basic form> 1 is a diagram showing an example of the configuration of a photoelectric conversion device according to this embodiment. The photoelectric conversion device 100 is configured by stacking and electrically connecting two chips, a sensor chip 11 and a circuit chip 21. The sensor chip 11 includes a pixel region 12 having a plurality of pixels. The circuit chip 21 includes a pixel circuit region 22 that processes signals detected by each pixel in the pixel region 12 in parallel, and a peripheral circuit region 23 that reads out signals from the pixel circuit region 22 and controls the pixel circuit region 22.
[0011] <Pixel substrate> FIG. 2 is a diagram showing a configuration example of the sensor chip 11. The pixel region 12 of the sensor chip 11 includes a plurality of pixels 201 arranged two-dimensionally across a plurality of rows and columns. The pixels 201 include a photoelectric conversion unit 202 including an avalanche photodiode (hereinafter, APD) that outputs a signal in response to incident photons. FIG. 2 shows 48 pixels 201 arranged in six rows from the 0th row to the 5th row and eight columns from the 0th column to the 7th column, together with reference numbers indicating row numbers and column numbers. For example, the unit pixel 11 arranged in the 1st row and the 4th column is given the reference number "P14". The number of rows and columns of the pixel array forming the pixel region 12 is not particularly limited.
[0012] <Circuit board> 3 is a diagram showing an example of the configuration of the circuit chip 21. The circuit chip 21 includes a pixel circuit region 22 and a peripheral circuit region .
[0013] <Pixel circuit area> The pixel circuit region 22 includes a plurality of signal processing units 301 arranged two-dimensionally across a plurality of rows and columns, and corresponding to the pixels 201 of the sensor chip. In FIG. 3, 12 signal processing units 301 arranged in three rows from the 0th row to the 2nd row and four columns from the 0th column to the 3rd column are shown with reference numbers indicating row numbers and column numbers. For example, the signal processing unit 301 arranged in the 2nd row and the 2nd column is given the reference number "S22". The number of rows and the number of columns of the signal processing unit array constituting the pixel circuit region 22 are not particularly limited. The signal processing unit is provided with a photon counter 403 (first measurement means) that counts the number of photons, and a time counter 406 (second measurement means) that measures time. The time counter circuit 406 measures the time from when the photon counter 403 starts measurement until the measured value (measured value) reaches a first threshold value Cx, and outputs the measured time as a pixel value. In the photoelectric conversion device of this embodiment, a photon counter is provided for each pixel, but a time counter is configured to be shared by multiple pixels. That is, a set of multiple pixels having different spectral sensitivities in the pixel region 12 is regarded as one partial pixel region, and photon counters 403a, b, c, and d are provided for each pixel having a different spectral sensitivities, while a time counter 406 is provided for each partial pixel region. With this configuration, the circuit scale can be reduced. Details will be described later.
[0014] <Peripheral circuit area> The peripheral circuit region 23 includes a vertical scanning circuit 302, a column circuit 303, a horizontal scanning circuit 304, a control pulse generating unit 305, a signal restoring unit 306, and a signal output circuit 307. A vertical selection line 311VSEL is arranged in each row of the signal processing unit array of the pixel circuit region 22, extending in a first direction (horizontal direction in FIG. 3). The vertical selection line 311VSEL is connected to each of the signal processing units 301 arranged in the first direction, forming a signal line. The first direction in which the vertical selection line 311VSEL extends may be expressed as a row direction or a horizontal direction. In FIG. 3, the control line VSEL is shown together with a symbol indicating the row number. For example, the control line in the first row is given the symbol "VSEL[1]". The vertical selection line 311VSEL in each row is connected to the vertical scanning circuit 302. The vertical scanning circuit 302 supplies a vertical selection signal for selectively driving the signal processing unit 301 to the signal processing unit 301 via a vertical selection line 311VSEL. In this embodiment, the vertical selection line 311 is divided into a readout vertical selection line for reading out signals of the multiple signal processing units 301 in each row and a reset vertical selection line for resetting signals of the multiple signal processing units 301 in each row.
[0015] In each column of the signal processing unit array of the pixel circuit region 22, a vertical signal line 310 is arranged to extend in a second direction (vertical direction in FIG. 3) intersecting the first direction. The vertical signal line 310 is connected to each of the signal processing units 301 arranged in the second direction, forming a common signal line. The second direction in which the vertical signal line 310 extends may be referred to as the column direction or vertical direction. In FIG. 3, the vertical signal line 310 is shown together with a symbol indicating the column number. For example, the signal line 310 in the third column is marked with the symbol "POUT[3]". Each of the vertical signal lines 310 in each column includes n signal lines for outputting an n-bit digital signal.
[0016] The horizontal scanning circuit 304 supplies the column circuits 303 with horizontal selection signals for reading out signals from the column circuits 303. The horizontal scanning circuit 304 supplies control signals to the horizontal selection circuits 303 of each column via horizontal selection lines 313HSEL. The column circuits 303 that receive control signals from the horizontal scanning circuit 304 sequentially output the signals they hold to the horizontal output circuit 307 via signal lines 312HSIG and the signal restoration unit 306. Note that in FIG. 3, the horizontal selection lines HSEL are shown together with symbols indicating the column numbers. For example, the horizontal selection line of the third column is given the symbol "HSEL[3]".
[0017] The control pulse generating unit 305 supplies control pulse signals that control the operations and timings of the vertical scanning circuit 302, the horizontal scanning circuit 304, and the column circuit 303. At least some of the control pulse signals that control the operations and timings of the vertical scanning circuit 302, the horizontal scanning circuit 304, and the column circuit 303 may be supplied from outside the photoelectric conversion device. The signal restoring unit 306 calculates a pixel value from the value of the time counter 406 and outputs it to the horizontal output circuit 307. The horizontal output circuit 307 outputs a signal corresponding to the pixel value restored by the signal restoring unit 306 as an output signal SOUT of the photoelectric conversion device. The signal restoring unit 306 may be configured to output the value of the time counter as it is, that is, the signal restoring unit 306 may be configured to be provided outside the photoelectric conversion device.
[0018] <Pixel circuit> Fig. 4 is an example of an equivalent circuit and a block diagram of the pixel 201 in Fig. 2 and the signal processing unit 301 in Fig. 3. Fig. 4 shows one signal processing unit 301 and four corresponding pixels 201a, 201b, 201c, and 201d. Here, a set of multiple pixels is regarded as one partial pixel region, and photon counters 403a, b, c, and d are arranged for each pixel, while a time counter 406 is arranged for each partial pixel region. In the following, when it is necessary to distinguish between the four pixels, the symbols a, b, c, and d are given, and when it is not necessary to distinguish between them, the symbols are omitted.
[0019] The pixel 201 in the sensor chip 11 includes the APD 202 which is a photoelectric conversion unit. When light is incident on the APD 202, a charge pair is generated by photoelectric conversion according to the incident light. A voltage VL (first voltage) is supplied to the anode of the APD 202. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD 202 via a switch element 408. A reverse bias voltage that causes the APD 202 to perform an avalanche multiplication operation is supplied to the anode and cathode. By supplying such a voltage, the charge generated by the incident light undergoes avalanche multiplication, generating an avalanche current.
[0020] When a reverse bias voltage is supplied, there are two modes: Geiger mode, which operates with the potential difference between the anode and cathode greater than the breakdown voltage, and linear mode, which operates with the potential difference between the anode and cathode close to or less than the breakdown voltage. APDs that operate in Geiger mode are called SPADs (Single Photon Avalanche Diodes). For example, the voltage VL (first voltage) is -30V, and the voltage VH (second voltage) is 1V.
[0021] The signal processing unit 301 in the sensor chip 21 includes a quench element 401 , a waveform shaping unit 402 , a photon counter 403 , a logical sum circuit 404 , a decision circuit 405 , a time counter 406 , and a selection circuit 407 .
[0022] The quench element 401 is connected to a power supply that supplies a voltage VH and the APD 202. The quench element 401 has a function of converting a change in avalanche current occurring in the APD 202 into a voltage signal. The quench element 401 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 202 (quench operation).
[0023] The waveform shaping unit 402 shapes the potential change of the cathode of the APD 202 obtained upon photon detection, and outputs a pulse signal. The waveform shaping unit 402 may be, for example, an inverter circuit or a buffer circuit.
[0024] The photon counter 403 is a photon counter that measures the number of photons incident on a pixel, and counts the pulse signal output from the waveform shaping unit 402 up to, for example, a first threshold value Cx. Furthermore, the photon counter 403 resets the measurement value when a predetermined control signal is supplied via the vertical selection line 311.
[0025] The APD 202, quenching element 401, waveform shaping section 402, and photon counter 403 described above are provided for each pixel. Meanwhile, the logical sum circuit 404, decision circuit 405, and time counter 406 described below are provided for four pixels (i.e., one partial pixel region). Also, one selection circuit 407 is arranged for each photon counter 403, and one selection circuit 407 is provided for the time counter 406.
[0026] The OR circuit unit 404 and the decision circuit 405 decide whether any of the four photon counters 403a, 403b, 403c, and 403d has reached a predetermined threshold (first threshold). For example, the OR circuit 404 may be a circuit that outputs the OR of the most significant bits of the four photon counters 403a, 403b, 403c, and 403d, and the decision circuit 405 may be a circuit that outputs "1" when the output value of the OR circuit 404 is "1" and "0" when the output value is "0". With this configuration, it is possible to decide whether any of 403a, 403b, 403c, and 403d has reached the saturation level of the pixel.
[0027] The predetermined threshold (first threshold) can be changed by changing the bit position of the photon counter referenced by the OR circuit from the most significant bit. For example, if the OR circuit 404 references the most significant 2 bits and the judgment circuit 405 judges whether the most significant 2 bits have become "0" or "1", the predetermined threshold can be set to half the saturation level. In other words, the OR circuit 404 may be a circuit that outputs the logical sum of some of the bits of the photon counters provided in each pixel.
[0028] The time counter circuit 406 measures the time from when the photon counter 403 starts measuring until the measured value (measured value) reaches a first threshold value Cx, and outputs the measured time as a pixel value. That is, the time counter circuit 406 continues counting the time from when the photon counter 403 starts measuring until the decision circuit 405 outputs "1". Then, at the point in time when the decision circuit 405 outputs "1", that is, when any of the four photon counters 403a, 403b, 403c, and 403d reaches a predetermined threshold value (first threshold value), the time counter 406 immediately stops counting the time and holds the time measurement value at that point in time. In addition, the output of the decision circuit 405 is also connected to the four photon counters 403a, 403b, 403c, and 403d, and at the point in time when the decision circuit 405 outputs "1", photon counting is stopped in all four photon counters and each photon measurement value is held.
[0029] <Explanation of effect> The time counter 406 measures the time from when light starts to be incident on the pixel to when the pixel becomes saturated at the pixel that receives the largest amount of light per unit time among the pixels 201a, 201b, 201c, and 201d. The shorter the time until saturation, the greater the amount of light (brighter) that is incident on the pixel per unit time. Therefore, by measuring the time until saturation, it is possible to obtain brightness information of the brightest pixel among the four pixels from the measurement value of the time counter 406.
[0030] Of the four photon counters, the measurement value of the brightest pixel is always a predetermined threshold value, but the other three photon counters are their respective photon measurement values at the time when the measurement value of the brightest pixel reaches the predetermined threshold value. Therefore, from the measurement value of the photon counter 403, it is possible to obtain brightness information of the three pixels other than the brightest pixel among the four pixels relative to the brightest pixel. Therefore, by combining the measurement value of the time counter 406 and the measurement value of the photon counter, it is possible to obtain all brightness information of the four pixels. A specific pixel signal restoration process will be described later.
[0031] <Selection circuit> The selection circuit 407 switches between electrical connection and disconnection between the photon counter 403 and the time counter 406 and the vertical signal line 310 in response to a vertical selection signal VSEL for reading out the n-th row, which is supplied from the vertical scanning circuit 302 in Fig. 3 via the vertical selection line 311. The pixel measurement values and time measurement values that are sequentially read out are sent to the column circuit 303 via the vertical signal line 310 and output to the outside of the photoelectric conversion device 100 via the signal restoration unit 306 and the output circuit 307. After the pixel measurement values and time measurement values are read out by the selection circuit 407 in response to a selection signal for reading out supplied from the vertical selection line 311, the photon counter 403 and the time counter 406 are reset by a reset signal supplied via the vertical selection line 311. The photon counter 403 and the time counter 406 restart their respective counts at the timing when the next image is acquired.
[0032] <Variation 1> In addition, in FIG. 4, a signal line 310 for a time counter is provided in addition to the signal line 310 for the photon counter of each column, but a different configuration may be used.
[0033] For example, since the photon measurement value of the brightest pixel among the four pixels should always match a predetermined threshold, the time measurement value may be read out instead of the photon measurement value of the brightest pixel. Specifically, a configuration having a circuit that determines which pixel among the pixels has reached a predetermined threshold and a switch that can connect the output of the time counter to one of the outputs of the four photon counters may be provided. Then, when a control signal for reading out the photon measurement value of the brightest pixel is received by the vertical selection signal VSEL, the time measurement value may be read out. With such a configuration, the amount of signals to be read out can be reduced, and power consumption can be reduced.
[0034] In addition, a flag signal for identifying which of the four pixels has reached a predetermined threshold, the time measurement value of the pixel that has reached the predetermined threshold, and the photon measurement values of the three pixels that have not reached the predetermined threshold may be output together on a single signal line using a multiplexer circuit or the like.
[0035] <Signal restoration section> The signal restoration unit 306 restores the time measurement value counted by the time counter 406 and the photon measurement value counted by the photon counter 403 into a pixel signal representing brightness information of the subject. When the time measurement value is T0 and the photon measurement values of the four pixels 201a, 201b, 201c, and 201d are P1, P2, P3, and P4, respectively, the pixel signal values C1, C2, C3, and C4 can be calculated by the following formulas. C1 = K × P1 / T0, C2 = K × P2 / T0 C3 = K × P3 / T0, C4 = K × P4 / T0 K is a natural number, and is preferably determined to be a value that prevents C1, C2, C3, and C4 from becoming less than 1 LSB. Specifically, K may be set to the maximum value of the time measurement value.
[0036] <Output photon measurement value after a certain period of time: Claim 9> In addition, the determination circuit unit 405 may be configured to stop the time counter 406 and output the photon measurement value at that time when the output value of the OR circuit does not become "1" even after a predetermined time has elapsed, even if the measurement value of the photon counter 403 has not reached a predetermined threshold value. With such a configuration, it is possible to solve the problem that the frame rate becomes slow when the brightness of the subject is very dark. The predetermined time is preferably set to, for example, the maximum value of the time count.
[0037] <Spectral sensitivity, Bayer array> 3 and 4 show an example in which one signal processing unit 301 is connected to four pixels 201, but the circuit scale can be reduced if two or more pixels are connected to one signal processing unit 301. Specifically, a photon counter may be provided for each pixel, and a time counter may be shared by multiple pixels.
[0038] Each pixel 201 may have an on-chip color filter and may be configured to be able to acquire spectral information. For example, assuming a Bayer array color filter, it is preferable to provide one signal processor 301 for four pixels (2x2) so that brightness information can be acquired for each Bayer pixel. In other words, it is preferable that at least some of the pixels sharing the time counter have different spectral sensitivities. For example, it is sufficient to have at least two of the white, red, green, and blue pixels, and to share the time counter with these four pixels.
[0039] <Imaging device> FIG. 5 is a block diagram of an imaging device 500 using the photoelectric conversion device 100. As shown in FIG.
[0040] The imaging device 500 is, for example, a digital camera, and is an imaging device including the photoelectric conversion device 100, and includes a lens 501, an image processing unit 502, an optical control unit 503, a storage unit 504, and a wireless I / F (Interface) unit 505 as a communication unit.
[0041] The lens 501 forms an optical image of a subject, and the formed optical image is incident on the imaging surface of the photoelectric conversion device 100, which is equipped with a focus lens, a zoom lens, an aperture, and the like. The photoelectric conversion device 100 captures the optical image formed by the lens 501. The signal read from the photoelectric conversion device 100 is output to an image processing unit 502. The image processing unit 502 processes the signal output from the photoelectric conversion device 100 by rearranging the signal, correcting defective pixels, noise reduction, color conversion, white balance correction, gamma correction, data compression, and the like, to generate an image. The image processing unit 502 has a built-in CPU as a computer, and functions as a control unit that controls the operation of each part of the entire imaging device 500 based on a computer program stored in a memory as a storage medium. The optical control unit 503 controls the focus lens, zoom lens, aperture, and the like provided in the lens 501. A recording medium (not shown) is attached to the recording unit 504, and the image output from the image processing unit is stored in the recording medium. As such a recording medium, for example, a memory card or the like is used. Note that a hard disk or the like may also be used as the recording medium. A wireless I / F (Interface) unit 505 as a communication unit outputs the image signal generated by the image processing unit 502 to the outside of the imaging device 500. 506 is a network, which is composed of a plurality of routers, switches, cables, etc. that satisfy a communication standard such as Ethernet (registered trademark), and a client controls the imaging device 500 via the network 506.
[0042] <Embodiment 2: High-order bit sharing> The photoelectric conversion device 200 of the second embodiment shown in FIG. 6 differs from the first photoelectric conversion device 100 of the first embodiment only in the configuration of the photon counter 403. Specifically, in addition to the photon counters 403 connected to each pixel, it has a photon counter 413 (third measurement means) shared between the pixels and a measurement value comparison circuit 414. The measurement value comparison circuit 414 can delay the saturation of all pixels by changing the connection destination of the shared counter 403 based on the measurement values of the four photon counters 403a, 403b, 403c, and 403d, and allocating a large number of bits to the photon counter that is likely to saturate. As a result, the signal-to-noise ratio of the pixel signal is improved, the difference in accumulation time between pixels is reduced, thereby suppressing motion artifacts, and the accumulation time is effectively extended, thereby reducing the effect of flicker. The following description will be given.
[0043] FIG. 7 is a flowchart for explaining the operation of changing the bit number allocation of the shared counter 413, which is executed by the photoelectric conversion device 200 of the second embodiment. In the following explanation, each process (step) is represented by adding S to the beginning, and the notation of the process (step) is omitted. In S700, the shared counter 413 that measures photons for a plurality of pixels is initially connected to one of the plurality of pixels. The allocation of the shared counter at this time is arbitrary. For example, if the shared counter is 4 bits, one bit may be assigned to each of the photon counters of the four pixels, all four bits may be assigned to the photon counter of one pixel, or all the shared counters may be left unconnected. Then, in S701, the shared counter 413 starts counting photons incident on each pixel.
[0044] In S702, the shared counter 413 judges whether it is the comparison timing to assign the number of bits to a plurality of pixels. Whether it is the comparison timing may be judged based on the time that has elapsed since the start of photon counting (for example, whether a second predetermined time has elapsed), or the comparison may be performed when the measured number of photons is equal to or greater than a certain value. For example, the upper two bits of each photon counter may be monitored, and the point in time when any pixel reaches "0" or "1" may be regarded as the comparison timing.
[0045] In S703, the shared counter 413 compares the measurement values of the four photon counters 403a, 403b, 403c, and 403d. Based on the comparison result in S703, the shared counter 413 changes the connection destination of the shared counter 713 in S704. Specifically, among the photon counters of the four pixels, the number of bits is preferentially allocated to a pixel that is likely to be saturated, i.e., a pixel with a large measurement value. When the photon measurement values of the four pixels are P1, P2, P3, and P4, the number of bits of each photon counter is M, and the number of bits of the shared counter is N×4, the number of bits allocated to each pixel, N1, N2, N3, and N4, may be determined by the following formula (1).
number
[0046] where i is any value between 1 and 4, j is any value other than i, and the bit number allocation is determined so that this formula is valid for all combinations of i and j. The numerator of each term in formula (1) is the number of saturation bits after the allocation change, and the denominator is the photon measurement value at the comparison timing, so each term in formula (1) represents the time until a pixel becomes saturated.
[0047] In other words, equation (1) means that the bit number allocation of the shared counter is determined so that the difference in the time until each pixel reaches saturation is minimized. As a result, the signal-to-noise ratio of the pixel signal is improved, the difference in accumulation time between pixels is reduced, which suppresses motion artifacts, and the effect of flicker is reduced by effectively lengthening the accumulation time. It is most preferable to satisfy equation (1), but this is not necessary. It is sufficient to allocate the bit number so that the difference in the time until saturation is small. Figure 8 is an image of the bit number allocation. Priority is given to allocating bits of the shared counter to pixels with a large number of photon measurements per unit time.
[0048] In S705, the shared counter 413 determines whether any of the four photon counters has reached a predetermined threshold after the connection destination of the shared counter has been changed. Then, at the point in time when any of the four photon counters has reached the predetermined threshold in S706, the time counter 406 stops counting time and outputs the photon measurement value and the time measurement value.
[0049] <Other embodiments> In the embodiment, the imaging device is, for example, a digital camera. However, the imaging device may include electronic devices having an imaging function, such as a digital movie camera, a smartphone with a camera, a tablet computer with a camera, an in-vehicle camera, a drone camera, a camera mounted on a robot, and a network camera.
[0050] The present invention has been described in detail above based on its preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications are possible based on the gist of the present invention, and these modifications are not excluded from the scope of the present invention.
[0051] A computer program that realizes all or part of the control in this embodiment may be supplied to a photoelectric conversion device, an imaging device, or the like via a network or various storage media. Then, a computer (or a CPU, MPU, or the like) in the photoelectric conversion device, imaging device, or the like may read and execute the program. In this case, the program and the storage medium storing the program constitute the present invention. [Explanation of symbols]
[0052] 100 Photoelectric conversion device 500 Imaging device 501 Lens 502 Image processing section 503 Optical control section 504 Storage section 505 I / F section
Claims
1. A photoelectric conversion device having pixels each including a photoelectric conversion unit that outputs a signal in response to an incident photon, a first measuring means for measuring the number of the photons incident on the pixel; a determination means for determining whether any one of the measurement values of the first measurement means has reached a first threshold value; and a second measurement means for measuring the time from when the first measurement means starts the measurement until when any measurement value of the plurality of first measurement means reaches the first threshold value.
2. 2. The photoelectric conversion device according to claim 1, wherein the determination means determines whether or not at least some of the measurement values of the first measurement means corresponding to each of the plurality of pixels exceed the first threshold value.
3. The photoelectric conversion device according to claim 2 , wherein the determination means determines whether or not a maximum measurement value among the measurement values of the first measurement means corresponding to each of the plurality of pixels exceeds the first threshold value.
4. 4. The photoelectric conversion device according to claim 1, wherein the second measurement means outputs a measurement value of time when the determination means determines that any one of the measurement values of the plurality of first measurement means exceeds the first threshold value.
5. 5. The photoelectric conversion device according to claim 1, further comprising an output unit that outputs the measurement value of the first measurement unit or the measurement value of the second measurement unit.
6. The photoelectric conversion device according to claim 5, characterized in that the output means outputs the measurement values of the first measurement means corresponding to each of the multiple pixels, excluding the measurement values of the first measurement means that have reached the first threshold, and the measurement values of the second measurement means.
7. The photoelectric conversion device according to claim 5 or 6, characterized in that the output means outputs a single signal including the measurement value of the first measurement means and the measurement value of the second measurement means included in a partial pixel area consisting of a plurality of the pixels.
8. the second measuring means is disposed for each partial pixel region made up of a plurality of the pixels having different spectral sensitivities, 8. The photoelectric conversion device according to claim 1, wherein the first measurement unit is disposed in each of a plurality of the pixels constituting the partial pixel region.
9. 9. The photoelectric conversion device according to claim 1, further comprising a signal restoration means for restoring a pixel signal based on a measurement value by the first measurement means corresponding to each pixel or a measurement value over time by the second measurement means.
10. a third measuring means for counting the number of photons in any one of the plurality of pixels included in the partial pixel region, 10. The photoelectric conversion device according to claim 1 , wherein the third measurement means determines the pixel to be measured based on the measurement values of the first measurement means corresponding to each of the plurality of pixels.
11. 11. The photoelectric conversion device according to claim 10, wherein the third measurement means changes the pixel to be measured every predetermined period.
12. 12. The photoelectric conversion device according to claim 10, wherein the third measurement means changes the pixel to be measured when the measurement value of the first measurement means corresponding to each of the plurality of pixels becomes equal to or greater than a certain value.
13. 13. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion unit includes an avalanche photodiode that detects incidence of photons.
14. An imaging device comprising the photoelectric conversion device according to claim 1 .
15. A control method for controlling a photoelectric conversion device having a pixel having a photoelectric conversion unit that outputs a signal in response to an incident photon, a first measurement means that measures the number of the photons incident on the pixel, and a second measurement means that is shared by a plurality of the pixels and measures a time from when the first measurement means starts the measurement in each of the plurality of pixels to when a measurement value of any of the plurality of first measurement means reaches a first threshold, A control method comprising: a determination step of determining whether any one of the measurement values of the plurality of first measurement means has reached a first threshold value.
16. A computer program for controlling each unit of the photoelectric conversion device according to any one of claims 1 to 13 or the imaging device according to claim 14 by a computer.
Citation Information
Patent Citations
Solid-state imaging device, imaging apparatus, and imaging method
JP2018201155A
Imaging device, imaging apparatus, and imaging method
JP2019103121A
Imaging apparatus and control method of the same
JP2020127123A
Low power imaging system with single photon avalanche diode photon counters and ghost image reduction
US20150163429A1
Solid-state imaging element, imaging device, and control method for solid-state imaging element
WO2019150785A1