Light receiving element and light receiving device

Abstract

The present invention reduces the reset time of a light-receiving element. This light-receiving element comprises a photoelectric conversion section, a coupling region, a charge holding section, a charge transfer section, a potential adjusting section, and a light-receiving signal generating section. The photoelectric conversion section generates charges by subjecting incident light to photoelectric conversion. The coupling region is formed in a semiconductor substrate and is coupled with the photoelectric conversion section to have the generated charges transferred thereto. The charge holding section holds the charges. The charge transfer section forms a potential barrier between the coupling region and the charge holding section to control the transfer to the charge holding section of the charges transferred to the coupling region. The potential adjusting section adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer section on the basis of a transfer reference potential, which is a reference potential during transfer of the charges transferred to the charge holding section. The light-receiving signal generating section generates a light-receiving signal on the basis of the charges held by the charge holding section.

Description

[Technical field]

[0001] The present disclosure relates to a light receiving element and a light receiving device, and more particularly to a light receiving element in which charge generated by an element that performs photoelectric conversion is transmitted to a circuit formed on a semiconductor substrate, and to a light receiving device in which the light receiving element is arranged. [Background technology]

[0002] Conventionally, photodetectors are used that perform photoelectric conversion of incident light to generate electric charges, detect the amount of the generated electric charges, and convert them into a light-receiving signal. An example of such a photodetector is an image sensor that detects incident light from a subject and generates an image signal. This image sensor includes a plurality of pixels in which a photoelectric conversion unit that performs photoelectric conversion of the incident light is arranged, and each pixel performs photoelectric conversion of the incident light irradiated during a light-receiving period (exposure period). The electric charges generated by this photoelectric conversion are converted into a light-receiving signal (image signal) by a pixel circuit, which is a circuit for each pixel arranged on a semiconductor substrate.

[0003] This photoelectric conversion unit can be disposed on a semiconductor substrate on which the pixel circuits are disposed. In this case, the photoelectric conversion unit and the pixel circuits can be formed on a semiconductor substrate made of, for example, silicon (Si). Specifically, the photoelectric conversion unit is configured with a photodiode configured with a semiconductor region formed on the semiconductor substrate, and is disposed for each pixel. Before the exposure period, the pixel circuit performs a reset to drain all the electric charge in the semiconductor region that constitutes the photodiode. Next, the pixel circuit accumulates the electric charge generated by the photoelectric conversion unit during the exposure period. After the exposure period has elapsed, the pixel circuit generates an image signal according to the electric charge accumulated during the exposure period.

[0004] On the other hand, a photoelectric conversion unit made of a material other than Si can also be used. For example, in an imaging element that detects light of a specific wavelength such as infrared light, a photoelectric conversion unit made of a compound semiconductor or an organic material is used. In this case, the photoelectric conversion unit is disposed adjacent to a semiconductor substrate, and the charge generated by the photoelectric conversion unit is transmitted to a pixel circuit of the semiconductor substrate. The pixel circuit accumulates the charge transmitted during the exposure period, and generates an image signal according to the accumulated charge after the exposure period has elapsed. However, since the photoelectric conversion unit is not disposed on the semiconductor substrate on which the pixel circuit is disposed, there is a problem that it is difficult to reset the photoelectric conversion unit to discharge all the charge. This increases the error in the image signal.

[0005] Imaging elements that perform this resetting have been proposed. For example, a solid-state imaging element has been proposed in which a photoelectric conversion film that performs photoelectric conversion, a contact section that injects charges generated by this photoelectric conversion film into a semiconductor substrate, and a storage section that accumulates the charges are arranged in a pixel (see, for example, Patent Document 1). In the pixel of this solid-state imaging element, a barrier section that is arranged between the injection section and the storage section and forms a potential barrier between the injection section and the storage section, a discharge section that discharges and injects charges from the injection section, and a transfer transistor that transfers charges from the storage section are further arranged.

[0006] In this solid-state image sensor, the reset is as follows: To First, the discharge transistor injects an excessive amount of charge (electrons) into the injection section. This excessively injected charge overcomes the potential barrier and flows into the storage section, where it is stored. Next, the discharge transistor stops injecting charge, and the transfer transistor transfers and discharges the charge in the storage section. As a result, the excess charge injected into the storage section by the discharge transistor is discharged, and the charge injected into the contact section by the photoelectric conversion film is also discharged via the potential barrier and the storage section. Thereafter, the charge in the contact section decreases, and the potential of the contact section becomes equal to the potential barrier. That is, the storage section is in a state where only the charge injected from the photoelectric conversion film flows into it and is discharged to the transfer transistor. This causes a reset, after which the transfer transistor is transitioned to a non-conducting state, whereby exposure can be started. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2011-130364 A Summary of the Invention [Problem to be solved by the invention]

[0008] The above-mentioned conventional technology has a problem that it takes a long time to reset. As described above, when resetting, the discharge transistor injects excess charge that exceeds the potential barrier into the contact section, so it takes a long time for the potential of the contact section to match the potential barrier. This causes a problem that the start of exposure is delayed and high-speed image signal generation is not possible.

[0009] The present disclosure has been made in consideration of the above-mentioned problems, and aims to shorten the reset time. [Means for solving the problem]

[0010] The present disclosure has been made to solve the above-mentioned problems, and a first aspect thereof is a light-receiving element comprising a photoelectric conversion unit that performs photoelectric conversion of incident light to generate charges, a coupling region that is formed on a semiconductor substrate and coupled to the photoelectric conversion unit to which the generated charges are transferred, a charge holding unit that holds the charges, a charge transfer unit that forms a potential barrier between the coupling region and the charge holding unit to control the transfer of the charges transferred to the coupling region to the charge holding unit, a potential adjustment unit that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer unit based on a transfer reference potential that is a reference potential when transferring the charges transferred to the charge holding unit, and a light-receiving signal generation unit that generates a light-receiving signal based on the charges held in the charge holding unit.

[0011] In addition, in this first aspect, the charge transfer unit may be provided with a control input terminal and form the potential barrier in response to a control voltage applied to the control input terminal, and the potential adjustment unit may adjust the potential barrier by generating a control voltage based on the transfer reference potential and applying the generated control voltage to the control input terminal.

[0012] In the first aspect, the charge transfer section may be configured by a MOS transistor having a gate serving as the control input terminal.

[0013] In the first aspect, the charge transfer section may have a source connected to the coupling region and a drain connected to the charge retention section.

[0014] In this first aspect, the potential adjustment section may generate the control voltage based on a difference between a potential of the coupling region and the transfer reference potential.

[0015] In the first aspect, the potential adjustment section may be configured with a MOS transistor and a load section connected to the drain of the MOS transistor and configured to convert a change in current into a change in voltage.

[0016] In the first aspect, the potential adjustment section may apply the potential of the coupling region to the gate of the MOS transistor and the transfer reference potential to the source of the MOS transistor.

[0017] In addition, in this first aspect, the device may further include a bonding region initialization section that initializes the bonding region to a predetermined initial potential by injecting charge into the bonding region, and a reset section that resets the charge holding section by discharging the charge held in the charge holding section, wherein the potential adjustment section adjusts the potential barrier during the initialization to transfer the charge injected into the bonding region to the charge holding section, the reset section resets the charge holding section when adjustment by the potential adjustment section begins after the initialization, and the light receiving signal generation section generates the light receiving signal based on the charge transferred to and held in the charge holding section during a predetermined exposure period after the initialization.

[0018] In the first aspect, the combined region initialization section may further discharge electric charges from the combined region after the predetermined exposure period has elapsed.

[0019] In addition, in this first aspect, the device may further include a second charge holding section that holds the charge, and a second charge transfer section that transfers the charge held in the charge holding section to the second charge holding section, and the light receiving signal generating section may generate the light receiving signal based on the charge held in the second charge holding section.

[0020] In the first aspect, the photoelectric conversion section may be made of a compound semiconductor.

[0021] In the first aspect, the photoelectric conversion section may include an organic photoelectric conversion film.

[0022] Moreover, a second aspect of the present disclosure is a light receiving device including a photoelectric conversion unit that performs photoelectric conversion of incident light to generate charges, a coupling region that is formed on a semiconductor substrate and coupled to the photoelectric conversion unit to which the generated charges are transferred, a charge holding unit that holds the charges, a charge transfer unit that forms a potential barrier between the coupling region and the charge holding unit to control the transfer of the charges transferred to the coupling region to the charge holding unit, a potential adjustment unit that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer unit based on a transfer reference potential that is a reference potential when transferring the charges transferred to the charge holding unit, a light receiving signal generation unit that generates a light receiving signal based on the charges held in the charge holding unit, and a processing circuit that processes the generated light receiving signal.

[0023] The present disclosure provides an effect of adjusting the potential barrier between the coupling region and the charge storage, and is intended to adjust the amount of charge diffusing from the coupling region to the charge storage upon reset. [Brief description of the drawings]

[0024] [Figure 1] 1 is a diagram illustrating a configuration example of a light receiving element according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a diagram illustrating an example of a pixel configuration according to a first embodiment of the present disclosure. [Diagram 3] 1 is a cross-sectional view showing a configuration example of a pixel according to a first embodiment of the present disclosure. [Figure 4] FIG. 2 is a diagram illustrating an example of generation of an image signal according to the first embodiment of the present disclosure. [Diagram 5] FIG. 4 is a diagram illustrating an example of a potential according to the first embodiment of the present disclosure. [Figure 6] FIG. 4 is a diagram illustrating an example of a potential according to the first embodiment of the present disclosure. [Figure 7] FIG. 4 is a diagram illustrating an example of a potential according to the first embodiment of the present disclosure. [Figure 8] FIG. 11 is a diagram illustrating an example of a pixel configuration according to a second embodiment of the present disclosure. [Figure 9]FIG. 13 is a diagram illustrating an example of a pixel configuration according to a third embodiment of the present disclosure. [Figure 10] FIG. 11 is a cross-sectional view showing a configuration example of a pixel according to a third embodiment of the present disclosure. [Figure 11] 1 is a plan view illustrating a configuration example of a light receiving element according to an embodiment of the present disclosure. [Figure 12] 1 is a cross-sectional view illustrating a configuration example of a light receiving element according to an embodiment of the present disclosure. [Figure 13] FIG. 11 is a cross-sectional view illustrating another configuration example of a light receiving element according to an embodiment of the present disclosure. [Figure 14] 1 is a block diagram showing a schematic configuration example of a camera that is an example of an imaging device to which the present technology can be applied. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] Next, a mode for carrying out the present disclosure (hereinafter, referred to as an embodiment) will be described with reference to the drawings. In the following drawings, the same or similar parts are given the same or similar reference numerals. The embodiment will be described in the following order. 1. First embodiment 2. Second embodiment 3. Third embodiment 4. Fourth embodiment 5. Camera application example

[0026] <1. First embodiment> [Image sensor configuration] 1 is a diagram showing a configuration example of a light receiving element according to an embodiment of the present disclosure. The figure shows a configuration example of an image sensor 1, which is an example of a light receiving element. Taking the image sensor 1 as an example, the light receiving element according to the embodiment of the present disclosure will be described. The image sensor 1 in the figure includes a pixel array section 10, a vertical drive section 20, a column signal processing section 30, and a control section 40.

[0027] The pixel array section 10 is configured by arranging pixels 100 in a two-dimensional lattice. Here, the pixel 100 generates an image signal according to irradiated light. The pixel 100 has a photoelectric conversion section that generates an electric charge according to irradiated light. The pixel 100 further has a pixel circuit. The pixel circuit generates an image signal based on the electric charge generated by the photoelectric conversion section. The generation of the image signal is controlled by a control signal generated by a vertical driving section 20 described later. In the pixel array section 10, signal lines 11 and 12 are arranged in an XY matrix. The signal line 11 is a signal line that transmits a control signal for the pixel circuit in the pixel 100, is arranged for each row of the pixel array section 10, and is commonly wired to the pixels 100 arranged in each row. The signal line 12 is a signal line that transmits an image signal generated by the pixel circuit of the pixel 100, is arranged for each column of the pixel array section 10, and is commonly wired to the pixels 100 arranged in each column. As described later, the pixel circuits are formed on a semiconductor substrate, and the photoelectric conversion units are disposed adjacent to the semiconductor substrate.

[0028] The vertical driving unit 20 generates a control signal for the pixel circuit of the pixel 100. The vertical driving unit 20 transmits the generated control signal to the pixel 100 via a signal line 11 in the figure. The column signal processing unit 30 processes an image signal generated by the pixel 100. The column signal processing unit 30 processes an image signal transmitted from the pixel 100 via a signal line 12 in the figure. The processing in the column signal processing unit 30 corresponds to, for example, analog-to-digital conversion that converts an analog image signal generated in the pixel 100 into a digital image signal. The image signal processed by the column signal processing unit 30 is output as an image signal of the image sensor 1. The control unit 40 controls the entire image sensor 1. The control unit 40 controls the image sensor 1 by generating and outputting a control signal that controls the vertical driving unit 20 and the column signal processing unit 30. The control signal generated by the control unit 40 is transmitted to the vertical driving unit 20 and the column signal processing unit 30 via signal lines 41 and 42, respectively.

[0029] The imaging element 1 is an example of a light receiving element as recited in the claims. The image signal is an example of a light receiving signal as recited in the claims. The imaging element 1 is also an example of a light receiving device as recited in the claims. In this case, the pixel array section 10 is an example of a light receiving element as recited in the claims, and the column signal processing section 30 is an example of a processing circuit as recited in the claims.

[0030] [Pixel configuration] FIG. 2 is a diagram showing a configuration example of a pixel according to the first embodiment of the present disclosure. The figure is a circuit diagram showing a configuration example of a pixel 100. The pixel 100 in the figure includes a photoelectric conversion unit 101, a coupling region initialization unit 104, a charge transfer unit 105, a second charge transfer unit 106, a reset unit 107, a coupling region 119, a potential adjustment unit 110, a charge retention unit 102, and a second charge retention unit 103. The pixel 100 in the figure further includes an image signal generation unit 115. Among these, the elements other than the photoelectric conversion unit 101 constitute the pixel circuit described above. That is, the coupling region initialization unit 104, the charge transfer unit 105, the second charge transfer unit 106, the reset unit 107, the coupling region 119, the potential adjustment unit 110, the charge retention unit 102, the second charge retention unit 103, and the image signal generation unit 115 constitute the pixel circuit. This pixel circuit is disposed on a semiconductor substrate (a semiconductor substrate 120 described later).

[0031] Signal lines Vini, INI, TR, RST, SEL, and 12 are connected to the pixel 100. The signal lines Vini, INI, TR, RST, and SEL configure a signal line 11. In addition, the pixel 100 is provided with power lines Vdd, Vtop, Vrst, and Vref that supply various types of power.

[0032] In the figure, the coupling region 119 is represented by a node on the circuit diagram. The coupling region initialization section 104, the charge transfer section 105, the second charge transfer section 106, and the reset section 107 can be configured with p-channel MOS transistors. The image signal generation section 115 can be configured with MOS transistors 108 and 109. The MOS transistors 108 and 109 can be n-channel MOS transistors.

[0033] The cathode of the photoelectric conversion unit 101 is connected to the power supply line Vtop. The anode of the photoelectric conversion unit 101 is connected to the drain of the coupling region initialization unit 104, the source of the charge transfer unit 105, and the inverting input of the potential adjustment unit 110. The source of the coupling region initialization unit 104 is connected to the signal line Vini, and the gate is connected to the signal line INI. The non-inverting input of the potential adjustment unit 110 is connected to the power supply line Vref, and the inverting input is connected to the gate of the charge transfer unit 105. The drain of the charge transfer unit 105 is connected to the source of the second charge transfer unit 106 and one end of the charge holding unit 102. The other end of the charge holding unit 102 is grounded. The gate of the second charge transfer unit 106 is connected to the signal line TR. The drain of the second charge transfer unit 106 is connected to the source of the reset unit 107, the gate of the MOS transistor 108, and one end of the second charge holding unit 103. The other end of the second charge holding unit 103 is grounded. The drain of the reset unit 107 is connected to a power supply line Vrst. The drain of the MOS transistor 108 is connected to a power supply line Vdd, and the source is connected to the drain of the MOS transistor 109. The gate of the MOS transistor 109 is connected to a signal line SEL, and the source is connected to a signal line 12.

[0034] The photoelectric conversion unit 101 is an element that performs photoelectric conversion of incident light. The photoelectric conversion unit 101 in the figure is made of a compound semiconductor and is arranged on a semiconductor substrate different from the semiconductor substrate on which the pixel circuits are arranged. As described above, a power supply line Vtop is connected to the cathode of the photoelectric conversion unit 101. This power supply line Vtop is a power supply line that supplies a cathode voltage to the photoelectric conversion unit 101. Of the charges generated by photoelectric conversion of the photoelectric conversion unit 101, holes are output from the anode and transmitted to the coupling region 119.

[0035] The coupling region 119 is a semiconductor region of the semiconductor substrate 120 where the photoelectric conversion unit 101 is coupled to the semiconductor substrate 120 on which the pixel circuits are arranged. Holes generated by the photoelectric conversion unit 101 are transmitted to the pixel circuits via the coupling region 119. The potential of the coupling region 119 changes in response to the transmitted charges.

[0036] The charge transfer unit 105 is an element that transfers the charge in the coupling region 119 to the charge holding unit 102 described below. This charge transfer unit 105 is disposed between the coupling region 119 and the charge holding unit 102 to form a potential barrier. By adjusting this potential barrier, the transfer of charges from the coupling region 119 to the charge holding unit 102 can be controlled. The potential barrier can be adjusted by adjusting the voltage applied to the gate of the charge transfer unit 105. The charge transfer unit 105 transfers the charges transmitted from the photoelectric conversion unit 101 to the coupling region 119 during the exposure period.

[0037] The charge holding section 102 holds electric charges. The charge holding section 102 is configured of a semiconductor region of the semiconductor substrate 120, and holds the electric charges transferred by the charge transfer section 105. As described above, the charge transfer section 105 transfers the electric charges from the photoelectric conversion section 101 during the exposure period, and therefore the charge holding section 102 holds the electric charges transferred from the photoelectric conversion section 101 to the coupling region 119 during the exposure period.

[0038] The second charge transfer unit 106 is an element that transfers the charge in the charge holding unit 102 to the second charge holding unit 103 described below. The second charge transfer unit 106 is controlled by a control signal transmitted by a signal line TR, and transfers the charge by establishing electrical continuity between the charge holding unit 102 and the second charge holding unit 103. The second charge transfer unit 106 transfers the charge held in the charge holding unit 102 during the exposure period to the second charge holding unit 103 after the exposure period.

[0039] The second charge holding unit 103 holds the charge. The second charge holding unit 103 is formed of a semiconductor region of the semiconductor substrate 120, and holds the charge transferred by the charge transfer unit 105.

[0040] The image signal generating unit 115 is a circuit that generates an image signal. The image signal generating unit 115 generates an image signal based on the charge held in the second charge holding unit 103. As shown in the figure, the image signal generating unit 115 is composed of MOS transistors 108 and 109. The MOS transistor 108 is a MOS transistor that generates an image signal. The MOS transistor 108 forms a source follower circuit and generates an image signal based on the charge held in the second charge holding unit 103 by amplifying the voltage of the second charge holding unit 103 connected to the gate. The MOS transistor 109 is a MOS transistor that outputs the image signal generated by the MOS transistor 108 to the signal line 12. The MOS transistor 109 is controlled by a control signal transmitted by a signal line SEL. The image signal generating unit 115 is an example of a light receiving signal generating unit described in the claims.

[0041] The bonded region initialization unit 104 is an element that initializes the bonded region 119. The bonded region initialization unit 104 injects electric charges into the bonded region 119 to initialize the bonded region 119 to a predetermined initial potential. The bonded region initialization unit 104 is controlled by a control signal transmitted by a signal line INI, and causes electrical continuity between the signal line Vini and the bonded region 119. At this time, an initialization voltage is output to the signal line Vini by the vertical drive unit 20, and the initialization voltage from the signal line Vini is applied to the bonded region 119. This initializes the bonded region 119 to the initial potential. This initialization of the bonded region 119 is performed before the start of an exposure period. The initial potential can be, for example, a potential of 2.4V.

[0042] The bonded region initialization unit 104 can further discharge the electric charge of the bonded region 119. This can be done by the vertical drive unit 20 outputting a reset voltage of the bonded region 119 to a signal line Vini and inputting a control signal to the bonded region initialization unit 104 via a signal line INI to make it conductive. The reset voltage of the bonded region 119 is a voltage lower than the initialization voltage, and is a voltage that makes the potential of the bonded region 119 lower than the potential during the exposure period described below. This discharge of the electric charge of the bonded region 119 can stop the exposure. The reset potential (voltage) of the bonded region 119 can be, for example, the ground potential.

[0043] The reset unit 107 is an element that resets the second charge holding unit 103. The reset unit 107 performs resetting by discharging the charge in the second charge holding unit 103. The reset unit 107 is controlled by a control signal transmitted by a signal line RST, and causes electrical continuity between the power supply line Vrst and the second charge holding unit 103. The power supply line Vrst is a power supply line that transmits a reset voltage. The reset voltage from the power supply line Vrst is applied to the second charge holding unit 103. This resets the second charge holding unit 103. In addition, when resetting the second charge holding unit 103, the charge in the charge holding unit 102 can be further discharged by making the second charge transfer unit 106 conductive. This allows the reset unit 107 to reset the charge holding unit 102.

[0044] The potential adjustment section 110 adjusts the potential of the coupling region 119. The potential adjustment section 110 adjusts the potential of the coupling region 119 by adjusting the potential barrier of the charge transfer section 105. At this time, the potential adjustment section 110 performs the adjustment based on a transfer reference potential. This transfer reference potential is a potential that serves as a reference when transferring the charge of the coupling region 119 to the charge holding section 102. The potential adjustment section 110 performs the adjustment by generating a control voltage based on the transfer reference potential and applying it to the gate, which is the control input terminal of the charge transfer section 105. This transfer reference potential is supplied by a power supply line Vref. The transfer reference potential can be set to, for example, a potential of 1.7V.

[0045] As described above, the potential of the binding region 119 changes depending on the charge transferred from the photoelectric conversion unit 101. The photoelectric conversion unit 101 constantly transfers charge corresponding to incident light to the binding region 119. When this transferred charge remains in the binding region 119, the potential rises. By transferring an amount of charge equal to this transferred charge from the binding region 119 to the charge holding unit 102, the potential of the binding region 119 can be kept constant. The potential adjustment unit 110 can keep the potential of the binding region 119 at a constant potential by controlling the charge transferred from the binding region 119 via the charge transfer unit 105. This constant potential corresponds to the transfer reference potential.

[0046] The power supply line Vref supplies a transfer reference voltage, which is a voltage equivalent to the transfer reference potential. The potential adjustment unit 110 generates a control voltage based on the difference between the supplied transfer reference potential and the potential of the coupling region 119, and applies it to the gate of the charge transfer unit 105. The potential adjustment unit 110 in the figure is configured as a differential amplifier, and the transfer reference potential is input to the non-inverting input, and the potential of the coupling region 119 is input to the inverting input. The difference between these input potentials is amplified and output as a control voltage. In this way, the potential adjustment unit 110 operates as a negative feedback amplifier. This makes it possible to improve the accuracy of adjustment of the potential of the coupling region 119.

[0047] In addition, the potential adjustment unit 110 can improve the detection accuracy of the charge transferred from the photoelectric conversion unit 101. As described above, the potential of the binding region 119 changes according to the balance between the charge transferred from the photoelectric conversion unit 101 and the charge transferred to the charge holding unit 102. The charge in the binding region 119 is transferred to the charge holding unit 102 by diffusing through the potential barrier of the charge transfer unit 105. That is, the charge overflowing from the potential barrier of the binding region 119 moves to the charge holding unit 102. If the potential of the binding region 119 fluctuates significantly, this affects the diffusion of the charge, and the amount of charge transferred from the binding region 119 to the charge holding unit 102 fluctuates, causing an error. By using the potential adjustment unit 110 to keep the potential barrier of the charge transfer unit 105 at a constant potential (transfer reference potential), it is possible to reduce the fluctuation in the potential of the binding region 119 and improve the detection accuracy of the charge.

[0048] It should be noted that the configuration of the pixel 100 is not limited to this example. For example, the MOS transistors 108 and 109 may be p-channel MOS transistors.

[0049] [Cross-sectional structure of pixel] 3 is a cross-sectional view showing a configuration example of a pixel according to the first embodiment of the present disclosure. The figure is a schematic cross-sectional view showing a configuration example of a pixel 100. The pixel 100 in the figure includes an on-chip lens 179, a protective film 172, a transparent electrode 171, a compound semiconductor chip 192, and a silicon chip 191.

[0050] The compound semiconductor chip 192 is a semiconductor chip including a compound semiconductor substrate. The compound semiconductor chip 192 performs photoelectric conversion of incident light, and transmits holes of the charges generated by the photoelectric conversion to a silicon chip 191 described later. The compound semiconductor chip 192 includes a compound semiconductor substrate 150, a first compound semiconductor layer 151, a second compound semiconductor layer 152, a separation region 153, a protective layer 154, an electrode 155, an insulating layer 161, and a bump electrode 162.

[0051] The compound semiconductor substrate 150 is a substrate made of a compound semiconductor. The compound semiconductor substrate 150 can be made of, for example, indium phosphide (InP). The compound semiconductor substrate 150 can be made of an n-type with a relatively high impurity concentration.

[0052] The first compound semiconductor layer 151 is a compound semiconductor layer formed on the compound semiconductor substrate 150. The first compound semiconductor layer 151 can be made of, for example, indium gallium arsenide (InGaAs). The first compound semiconductor layer 151 can be configured as an n-type. Photoelectric conversion of incident light is performed in the first compound semiconductor layer 151. Of the charges generated by the photoelectric conversion, electrons diffuse to the n-type compound semiconductor substrate 150, and holes diffuse to a p-type second compound semiconductor layer 152 described later. The first compound semiconductor layer 151 is disposed in common to a plurality of pixels 100. Such a compound semiconductor has high sensitivity in the infrared light region.

[0053] The second compound semiconductor layer 152 is a semiconductor layer disposed for each pixel 100 and joined to the first compound semiconductor layer 151. The second compound semiconductor layer 152 may be made of, for example, InP. The second compound semiconductor layer 152 may be made of a p-type having a relatively high impurity concentration. A photodiode formed by a pn junction of the first compound semiconductor layer 151 and the second compound semiconductor layer 152 corresponds to the photoelectric conversion unit 101 described in FIG. 2.

[0054] The isolation region 153 separates the pixels 100. The isolation region 153 is disposed on the boundary of the pixels 100, and separates adjacent second compound semiconductor layers 152. The isolation region 153 can be made of n-type InP.

[0055] The protective layer 154 protects the surface of the compound semiconductor layer. This protective layer 154 can be made of an inorganic material, such as silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), and hafnium oxide (HfO2).

[0056] The electrode 155 is an electrode disposed adjacent to the second compound semiconductor layer 152. The electrode 155 can be made of, for example, titanium (Ti) or tungsten (W).

[0057] The insulating layer 161 insulates and protects the surface of the compound semiconductor chip 192. This insulating layer 161 can be made of, for example, SiO2.

[0058] The bump electrode 162 is a bump disposed on the surface of the insulating layer 161. The bump electrode 162 is disposed so as to penetrate the insulating layer 161, and is connected to the electrode 155. The bump electrode 162 is also joined to a bump electrode 145 of a silicon chip 191, which will be described later, and transmits holes generated by photoelectric conversion. The bump electrode 162 can be made of, for example, copper (Cu).

[0059] The silicon chip 191 is a semiconductor chip including a substrate made of silicon (Si). The silicon chip 191 generates an image signal based on holes generated by a compound semiconductor chip 192. The pixel circuit described in FIG. 2 is disposed on the silicon chip 191. The vertical drive unit 20 described in FIG. 1 and the like can also be disposed on the silicon chip 191. The silicon chip 191 includes a semiconductor substrate 120 and a wiring region 140.

[0060] The semiconductor substrate 120 is a semiconductor substrate made of Si. A diffusion region for elements of the pixel 100 and the like is disposed in a well region formed in the semiconductor substrate 120. In the figure, a well region 121 configured as an n-type is shown. In this n-type well region 121, a p-channel MOS transistor as described in FIG. 2 can be disposed. Specifically, a p-channel MOS transistor can be disposed by disposing a p-type semiconductor region in the n-type well region 121.

[0061] In the figure, p-type semiconductor regions 122 to 126 are shown. The p-type semiconductor region 122 constitutes the coupling region 119. As will be described later, a contact plug 143 is connected to the coupling region 119. The p-type semiconductor regions 122 and 123 constitute the drain region and source region of the coupling region initialization section 104, and a gate electrode 131 is disposed adjacent to the n-type well region 121 between the p-type semiconductor regions 122 and 123. A channel is formed in the n-type well region 121 between the p-type semiconductor regions 122 and 123. In addition, the p-type semiconductor regions 122 and 124 constitute the source region and drain region of the charge transfer section 105, and the p-type semiconductor regions 122 and 124 form the source region and drain region of the charge transfer section 105. 4 A gate electrode 132 is disposed adjacent to the n-type well region 121 between the gate electrodes 132 and 132. In this manner, the p-type semiconductor region 122 constitutes the coupling region 119, as well as the drain region of the coupling region initialization section 104 and the source region of the charge transfer section 105.

[0062] Moreover, the p-type semiconductor region 124 constitutes the charge holding unit 102. The p-type semiconductor regions 124 and 125 constitute the source region and drain region of the second charge transfer unit 106, and a gate electrode 133 is disposed adjacent to the n-type well region 121 between the p-type semiconductor regions 124 and 125. Moreover, the p-type semiconductor region 125 constitutes the second charge holding unit 103. The p-type semiconductor regions 125 and 126 constitute the source region and drain region of the reset unit 107, and a gate electrode 134 is disposed adjacent to the n-type well region 121 between the p-type semiconductor regions 125 and 126.

[0063] An input signal line of the potential adjustment section 110 is connected to the p-type semiconductor region 122 constituting the coupling region 119, and an output signal line of the potential adjustment section 110 is connected to the gate electrode 132 of the charge transfer section 105. An input signal line of the image signal generation section 115 is connected to the p-type semiconductor region 125 constituting the second charge holding section 103. The image signal generation section 115 in the figure can be formed in a p-type well region (not shown). These signal lines are formed by a wiring layer 142, which will be described later.

[0064] The wiring region 140 is a wiring region formed on the front surface side of the semiconductor substrate 120, and is a region where wiring connected to the above-mentioned bonding region 119 etc. is formed. This wiring region 140 includes an insulating layer 141, a wiring layer 142, a contact plug 143, a via plug 144, and a bump electrode 145.

[0065] The wiring layer 142 transmits signals to the coupling region 119 and the like. The wiring layer 142 can be made of a metal such as Cu. The insulating layer 141 insulates the wiring layer 142. The insulating layer 141 can be made of an insulating material such as SiO2. The wiring layer 142 and the insulating layer 141 can be made of multiple layers. The insulating layer 141 between the gate electrodes 131 to 134 and the semiconductor substrate 120 corresponds to a gate insulating film. The contact plug 143 connects the semiconductor region of the semiconductor substrate 120 and the wiring layer 142. The contact plug 143 can be made of, for example, W or the like. The via plug 144 connects the wiring layers 142 to each other or connects the wiring layer 142 to a bump electrode 145. The via plug 144 can be made of, for example, Cu or the like.

[0066] The bump electrode 145 is a bump disposed on the surface of the insulating layer 141. The bump electrode 145 is connected to the wiring layer 142 by a via plug 144. As described above, the bump electrode 145 is bonded to the bump electrode 162 of the compound semiconductor chip 192. The image sensor 1 including the pixel 100 in the figure is configured by bonding together a compound semiconductor chip 192 and a silicon chip 191 that are individually manufactured. During this bonding, the bump electrodes 145 and 162 are bonded to transmit signals between the respective chips. The bump electrode 145, like the bump electrode 162, can be configured from Cu.

[0067] The transparent electrode 171 is a transparent electrode disposed on the back surface of the compound semiconductor chip 192. The transparent electrode 171 is connected to the power supply line Vtop described in Fig. 2 and supplies a bias voltage to the compound semiconductor substrate 150. The transparent electrode 171 can be made of, for example, ITO (Indium Tin Oxide).

[0068] The protective film 172 is a film that protects the rear surface of the compound semiconductor chip 192 and the transparent electrode 171 .

[0069] The on-chip lens 179 is a lens that focuses incident light on a photoelectric conversion unit. The on-chip lens 179 focuses incident light on the first compound semiconductor layer 151. The on-chip lens 179 can be made of an inorganic material such as silicon nitride (SiN) or an organic material such as an acrylic resin.

[0070] Holes generated by photoelectric conversion in the first compound semiconductor layer 151 of the compound semiconductor chip 192 are transmitted to the silicon chip 191 via the second compound semiconductor layer 152, the electrode 155, and the bump electrode 162. The transmitted holes are transmitted to the semiconductor region 122 constituting the coupling region 119 via the bump electrode 145, the via plug 144, the wiring layer 142, and the contact plug 143.

[0071] [Image signal generation] 4 is a diagram showing an example of generation of an image signal according to the first embodiment of the present disclosure. The figure is a time chart showing an example of generation of an image signal in the pixel 100.

[0072] In the figure, "SEL", "RST", "TR" and "INI" represent binarized control signals transmitted by the signal lines SEL, RST, TR and INI, respectively. The signal line SEL corresponding to "SEL" outputs a control signal equivalent to the gate-source voltage Vgs that transitions the MOS transistor 109 to a conductive state when the signal line SEL has a value of "1". Hereinafter, the control signal that transitions the MOS transistor to a conductive state is referred to as an ON signal. The signal lines RST, TR and INI corresponding to "RST", TR and INI output an ON signal when the signal line RST has a value of "0". "Vini" in the figure represents the voltage output by the signal line Vini. "Coupling region 119", "charge transfer unit 105 gate" and "charge holding unit 102" represent the potential of the coupling region 119, the voltage applied to the gate of the charge transfer unit 105 and the potential of the charge holding unit 102, respectively.

[0073] In the initial state (T0), no on signal is input to the signal line SEL, the signal line RST, and the signal line TR, and the MOS transistor 109, the reset unit 107, and the second charge transfer unit 106 are in a non-conductive state. On the other hand, an on signal is input to the signal line INI, and the coupling region initialization unit 104 is in a conductive state. A reset potential Vr of the coupling region 119 is output to the signal line Vini. Therefore, the potential of the coupling region 119 is reset to the reset potential Vr. As described in FIG. 2, the potential adjustment unit 110 compares the potential of the coupling region 119 with the transfer reference potential supplied by the power supply line Vref, and therefore outputs the maximum positive voltage when the potential of the coupling region 119 is low. Therefore, the potential barrier of the charge transfer unit 105 becomes deep, and the charge transferred from the photoelectric conversion unit 101 to the coupling region 119 is discharged by the coupling region initialization unit 104. Note that in the initial state, the charge holding unit 10 2 is reset to the reset potential Vrst.

[0074] At T1, the signal line Vini outputs an initialization voltage (2.4 V). This causes the potential of the coupling region 119 to rise to 2.4 V. Because the potential of the coupling region 119 becomes higher than the transfer reference potential, the potential barrier of the charge transfer unit 105 becomes shallower due to the action of the potential adjustment unit 110, holes flow in from the coupling region 119, and the potential of the charge holding unit 102 also rises to 2.4 V.

[0075] At T2, the input of the ON signal from the signal line INI is stopped, and the coupled region initialization unit 104 is brought into a non-conductive state.

[0076] At T3, an ON signal is input to signal line RST, causing reset unit 107 to become conductive. Also, an ON signal is input to signal line TR, causing second charge transfer unit 106 to become conductive. This causes the charge in charge holding unit 102 to be discharged via second charge transfer unit 106 and second charge holding unit 103. At this time, the potential of coupling region 119 becomes 1.7 V, which is the transfer reference potential, due to the action of potential adjustment unit 110.

[0077] At T4, the input of the ON signal to the signal line TR is stopped, and the second charge transfer unit 106 transitions to a non-conductive state. This causes the charge transferred from the photoelectric conversion unit 101 to be accumulated in the charge holding unit 102. The potential of the charge holding unit 102 rises in response to the accumulation of the charge.

[0078] At T5, an ON signal is input from the signal line INI, and the coupling region initialization unit 104 becomes conductive. At the same time, the signal line Vini outputs a reset potential Vr. Therefore, the charge in the coupling region 119 is discharged by the coupling region initialization unit 104. In addition, the action of the potential adjustment unit 110 deepens the potential barrier of the charge transfer unit 105, and the charge in the charge retention unit 102 is retained.

[0079] At T6, the input of the on signal from the signal line RST is stopped, and the reset unit 107 is put into a non-conductive state. Also, an on signal is input from the signal line SEL, and the MOS transistor 109 is put into a conductive state. As a result, the image signal generated by the image signal generation unit 115 is output from the pixel 100. The image signal output at this time corresponds to the image signal at the time of reset.

[0080] At T7, the input of the ON signal from the signal line SEL is stopped. Also, an ON signal is input from the signal line TR, and the second charge transfer unit 106 becomes conductive. As a result, the charge held in the charge holding unit 102 is transferred to the second charge holding unit 103.

[0081] At T8, an ON signal is input from the signal line SEL, and the MOS transistor 109 becomes conductive. The image signal generation unit 115 outputs an image signal based on the charges held in the second charge holding unit 103.

[0082] At T9, the input of the ON signal from the signal line SEL is stopped. Also, an ON signal is input from the signal line RST, and the reset unit 107 becomes conductive. As a result, the charge held in the second charge holding unit 103 is discharged.

[0083] At T10, the input of the ON signal from the signal line RST is stopped, and the reset unit 107 is brought into a non-conducting state.

[0084] The image signal can be generated by the above procedure. In the figure, the period T4 corresponds to the exposure period. Moreover, the processes of T1 to T5 are simultaneously performed on all the pixels 100 arranged in the pixel array section 10 described in FIG. 1. Next, the processes of T6 to T9 are sequentially performed on each of the pixels 100 arranged in the rows of the pixel array section 10. Such an imaging method is called a global shutter method. Note that the image signal generated at T6 at the time of reset is subtracted from the image signal generated at T8. This makes it possible to remove the influence of the charge remaining in the second charge holding section 103 at the time of reset. Such a method of generating an image signal is called correlated double sampling (CDS). This CDS can be performed, for example, by the column signal processing section 30 described in FIG. 1.

[0085] 5 to 7 are diagrams showing an example of potential according to the first embodiment of the present disclosure. FIG. 5 to 7 are diagrams showing an example of potential in the pixel 100 corresponding to the process of FIG. 4. FIG. 5 to 7 are diagrams showing changes in potential of the signal line Vini, the coupling region initialization unit 104, the coupling region 119, the charge transfer unit 105, the charge holding unit 102, the second charge transfer unit 106, the second charge holding unit 103, the reset unit 107, and the power line Vrst. In FIG. 5 to 7, the rectangles with hatching represent the potential barriers of the coupling region initialization unit 104 and the charge transfer unit 105. In FIG. 5 to 7, the areas with dot hatching represent accumulated charges.

[0086] 5A, the coupling region initialization unit 104 becomes conductive and outputs a reset potential Vr to the signal line Vini. The charge in the coupling region 119 is discharged to the signal line Vini by the coupling region initialization unit 104 (T0 in FIG. 4).

[0087] At B in Fig. 5, an initial potential (2.4 V) is output to the signal line Vini. The potential of the coupling region 119 rises to the initialization voltage. The potential barrier of the charge transfer unit 105 becomes shallower due to the action of the potential adjustment unit 110, charges flow in, and the potential of the charge holding unit 102 also becomes the initial potential (T1 in Fig. 4).

[0088] At C in FIG. 5, the coupling region initialization unit 104 becomes non-conductive (T2 in FIG. 4).

[0089] At D in Fig. 5 and E in Fig. 6, the second charge transfer unit 106 and the reset unit 107 are turned on. The charges in the coupling region 119 and the charge holding unit 102 are discharged to the power supply line Vrst. Immediately after this discharge, the potential of the coupling region 119 is relatively high, and therefore the barrier of the charge transfer unit 105 becomes relatively shallow due to the action of the potential adjustment unit 110. As a result, a large amount of charge flows out of the coupling region 119 (D in Fig. 5).

[0090] When the charge in the coupling region 119 is discharged and the potential of the coupling region 119 drops, the potential barrier of the charge transfer section 105 gradually deepens due to the action of the potential adjustment section 110. Thereafter, when the potential of the coupling region 119 reaches the transfer reference potential (1.7 V), the potential barrier of the charge transfer section 105 converges to a constant value. In this state, only the charge transferred from the photoelectric conversion section 101 to the coupling region 119 overflows the potential barrier of the charge transfer section 105, diffuses to the charge holding section 102, and is discharged. This completes the reset of the coupling region 119 (E in FIG. 6, T3 in FIG. 4).

[0091] At F in Fig. 6, the second charge transfer unit 106 becomes non-conductive. The charge that overflows from the potential barrier of the charge transfer unit 105 and diffuses into the charge holding unit 102 is held therein. As a result, accumulation of the charge transferred from the photoelectric conversion unit 101 to the combination region 119 by the charge holding unit 102 begins, and the exposure period begins (T4 in Fig. 4).

[0092] At G in Fig. 6, the predetermined exposure period ends, the coupling region initialization unit 104 becomes conductive, and the reset potential Vr is output to the signal line Vini. The charge in the coupling region 119 is discharged to the signal line Vini. Meanwhile, the potential barrier of the charge transfer unit 105 becomes deeper, and the charge in the charge holding unit 102 is held (T5 in Fig. 4).

[0093] At H in FIG. 6, the reset unit 107 is turned off, and the image signal generating unit 115 generates an image signal at the time of reset (T6 in FIG. 4).

[0094] At I in FIG. 7, the second charge transfer unit 106 becomes conductive, and the charge held in the charge holding unit 102 is transferred to the second charge holding unit 103 (T7 in FIG. 4).

[0095] At J in Fig. 7, the second charge transfer section 106 is turned off. An image signal is generated by the image signal generation section 115 (T8 in Fig. 4).

[0096] At K in Fig. 7, the reset unit 107 is turned on. The charge held in the second charge holding unit 103 is discharged (T9 in Fig. 4).

[0097] As described above in D in FIG. 5 and E in FIG. 6, the height of the potential barrier of the charge transfer section 105 changes depending on the potential of the binding region 119. When the potential of the binding region 119 is close to the initial potential, a large amount of charge flows out of the binding region 119, and a large current flows. This makes it possible to shorten the time required for the potential of the binding region 119 to converge to the transfer reference potential. In the binding region 119 to which the charge generated by the photoelectric conversion section 101 made of a semiconductor different from the semiconductor substrate 120 is transferred, the reset time can be shortened.

[0098] In addition, when the amount of incident light increases during the exposure period, the photoelectric conversion unit 101 increases sharply. Even in such a case, the potential adjustment unit 110 adjusts the potential barrier of the charge transfer unit 105 to stabilize the potential of the coupling region 119, thereby reducing errors in the image signal and achieving a high-speed response.

[0099] In addition, since the potential adjusting unit 110 adjusts the height of the potential barrier of the charge transfer unit 105 based on the difference between the potential of the coupling region 119 and the transfer reference potential, it is possible to adjust the potential of the coupling region 119 with relatively high accuracy. It is possible to reduce the occurrence of errors in the image signal due to fluctuations in the potential of the coupling region 119.

[0100] 3 shows an example of pixel 100 configured by bonding compound semiconductor chip 192 and silicon chip 191 that are manufactured separately. This pixel 100 (imaging element 1) can be manufactured by bonding compound semiconductor chip 192 and silicon chip 191 that are cut from a wafer. It is also possible to manufacture the pixels 100 (imaging element 1) by performing bonding in the state of a wafer on which a plurality of compound semiconductor chips 192 and silicon chips 191 are arranged, and then by dicing the wafer after bonding.

[0101] Each of the compound semiconductor chip 192 and the silicon chip 191 can also be called a substrate. The compound semiconductor chip 192 can also be called a semiconductor part in which the electrodes 155 and the insulating layer 161 are arranged on the compound semiconductor substrate 150 or the like. Similarly, the silicon chip 191 can be called a semiconductor part in which the wiring region 140 is arranged on the semiconductor substrate 120. In this way, different names can be used for the compound semiconductor chip 192 and the silicon chip 191.

[0102] 3 shows an example in which bump electrodes 162 and bump electrodes 145 are bonded together when compound semiconductor chip 192 and silicon chip 191 are bonded together. However, the bonding of compound semiconductor chip 192 and silicon chip 191 is not limited to this example. For example, bump electrodes 162 and bump electrodes 145 can be assumed to be wiring arranged on the surfaces of the wiring regions of the respective chips, and bonding can be performed by directly bonding these wirings.

[0103] As described above, the image sensor 1, which is a light receiving element according to the first embodiment of the present disclosure, is provided with the potential adjustment section 110 that adjusts the potential barrier of the charge transfer section 105 in accordance with the potential of the binding region 119. During resetting, the potential adjustment section 110 quickly converges the potential of the binding region 119 from the initial potential to the transfer reference potential. This makes it possible to shorten the time required for resetting.

[0104] <2. Second embodiment> The image sensor 1 of the first embodiment described above includes a potential adjustment section 110 to adjust the potential barrier of the charge transfer section 105. In contrast, in the second embodiment of the present disclosure, a specific circuit configuration of the potential adjustment section 110 will be proposed.

[0105] [Pixel configuration] Fig. 8 is a diagram showing a configuration example of a pixel according to a second embodiment of the present disclosure. Similar to Fig. 2, this figure is a circuit diagram showing a configuration example of a pixel 100. This pixel differs from the pixel 100 in Fig. 2 in that it includes a potential adjustment unit 110 configured with a MOS transistor.

[0106] The potential adjustment unit 110 in the figure includes MOS transistors 111 and 112. A p-channel MOS transistor can be used as the MOS transistor 111. An n-channel MOS transistor can be used as the MOS transistor 112. A power supply line Vb is also provided in the pixel 100 in the figure.

[0107] The source of the MOS transistor 111 is connected to a power supply line Vref, and the gate is connected to the coupling region 119. The drain of the MOS transistor 111 is connected to the drain of the MOS transistor 112 and the gate of the charge transfer unit 105. The gate of the MOS transistor 112 is connected to a power supply line Vb, and the source is grounded.

[0108] The power supply line Vb is a power supply line that supplies a gate bias voltage Vb of the MOS transistor 112. The MOS transistor 112 constitutes a constant current load of the MOS transistor 111. The MOS transistor 111 constitutes a source-grounded circuit and amplifies the potential of the coupling region 119 applied to the gate. Since the source of the MOS transistor 111 is connected to the power supply line Vref, a current corresponding to the difference between the transfer reference potential supplied by the power supply line Vref and the potential of the coupling region 119 applied to the gate is output to the drain. This current is converted into a voltage by the MOS transistor 112 that constitutes the load, and is output to the gate of the charge transfer unit 105. Note that a voltage drop based on the threshold voltage Vgs occurs between the source and gate of the MOS transistor 111. For this reason, the voltage supplied by the power supply line Vref needs to be a high voltage that takes this voltage drop into account. Specifically, a voltage of 2.4V can be supplied by the power supply line Vref with respect to the transfer reference potential of 1.7V.

[0109] It should be noted that the configuration of the potential adjustment unit 110 is not limited to this example. For example, a resistive load may be disposed in place of the MOS transistor 112.

[0110] Other than this, the configuration of the imaging element 1 is similar to the configuration of the imaging element 1 described in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0111] As described above, the image sensor 1 according to the second embodiment of the present disclosure uses the potential adjustment section 110 configured by the MOS transistors 111 and 112, thereby making it possible to simplify the configuration of the pixel 100.

[0112] <3. Third embodiment> The image sensor 1 according to the first embodiment described above uses a photoelectric conversion unit 101 made of a compound semiconductor. In contrast, the image sensor 1 according to the third embodiment of the present disclosure differs from the image sensor 1 according to the first embodiment described above in that it uses a photoelectric conversion unit made of an organic photoelectric conversion film.

[0113] [Pixel configuration] 9 is a diagram showing a configuration example of a pixel according to the third embodiment of the present disclosure. The figure is a circuit diagram showing the configuration example of a pixel, similar to FIG. 2. In the pixel 200 in the figure, a photoelectric conversion unit 201 is arranged instead of the photoelectric conversion unit 101, and a combined region initialization unit 104, a charge transfer unit 105, and the like are not included. 、 2 in that the second charge transfer section 106 and the reset section 107 are configured by n-channel MOS transistors.

[0114] The photoelectric conversion unit 201 is a photoelectric conversion unit composed of an organic photoelectric conversion film. This photoelectric conversion unit 201 is composed of an organic photoelectric conversion film sandwiched between an upper electrode and a lower electrode. This upper electrode is connected to a power supply line Vtop, and the lower electrode is connected to the coupling region 119. The photoelectric conversion unit 201 generates charges by photoelectric conversion of incident light. Also, the power supply line Vtop in the same figure supplies a power supply voltage to the upper electrode that is lower than that of the lower electrode. As a result, electrons of the generated charges are transmitted to the coupling region 119.

[0115] The lower electrode (lower electrode 282 described later) of the photoelectric conversion unit 201 is connected to the coupling region 119, and the upper electrode (upper electrode 284 described later) is connected to the power supply line Vtop. The wiring of the other elements is similar to that of the pixel 100 in FIG. 2, and therefore the description thereof will be omitted.

[0116] [Pixel configuration] 10 is a cross-sectional view showing a configuration example of a pixel according to the third embodiment of the present disclosure. The same figure is a schematic cross-sectional view showing a configuration example of a pixel 200. The pixel 200 differs from the pixel 200 in that a semiconductor substrate 220 and a wiring region 240 are arranged instead of the semiconductor substrate 120 and the wiring region 140, and a photoelectric conversion unit 201 is arranged instead of the photoelectric conversion unit 101.3 This is different from pixel 100.

[0117] The pixel 200 in the figure includes a semiconductor substrate 220, a wiring region 240, an insulating film 229, an insulating layer 281, a photoelectric conversion unit 201, a through electrode 244, a protective film 172, and an on-chip lens 179.

[0118] The semiconductor substrate 220 is made of Si, similar to the semiconductor substrate 120, and is a semiconductor substrate on which pixel circuits are arranged. In the semiconductor substrate 220, a p-type well region 221 is formed, and an n-type semiconductor region is arranged. The n-type semiconductor region 222 constitutes the coupling region 119. As will be described later, a through electrode 244 is connected to the coupling region 119. The n-type semiconductor regions 222 and 223 constitute the drain region and source region of the coupling region initialization unit 104, and the gap between the n-type semiconductor regions 222 and 223 p A gate electrode 231 is disposed adjacent to the n-type well region 221. The n-type semiconductor regions 222 and 224 constitute the source region and the drain region of the charge transfer unit 105. p A gate electrode 232 is disposed adjacent to the mold well region 221 .

[0119] Moreover, the n-type semiconductor region 224 constitutes the charge holding unit 102. The n-type semiconductor regions 224 and 225 constitute the source region and drain region of the second charge transfer unit 106, and a gate electrode 233 is disposed adjacent to the p-type well region 221 between the n-type semiconductor regions 224 and 225. Moreover, the n-type semiconductor region 225 constitutes the second charge holding unit 103. The n-type semiconductor regions 225 and 226 constitute the source region and drain region of the reset unit 107, and a gate electrode 234 is disposed adjacent to the p-type well region 221 between the n-type semiconductor regions 225 and 226.

[0120] The wiring region 240 is a wiring region formed on the front surface side of the semiconductor substrate 220 , and includes an insulating layer 241 , a wiring layer 242 , and a contact plug 243 .

[0121] The insulating film 229 is a film that protects the rear surface side of the semiconductor substrate 220. The insulating layer 281 is an insulating layer that is disposed between the semiconductor substrate 220 and the photoelectric conversion section 201 described later.

[0122] The photoelectric conversion section 201 includes an upper electrode 284 , a photoelectric conversion film 283 , and a lower electrode 282 .

[0123] The upper electrode 284 is a transparent electrode disposed adjacent to the upper layer of the photoelectric conversion film 283. The upper electrode 284 can be made of, for example, ITO.

[0124] The photoelectric conversion film 283 is made of an organic photoelectric conversion film and performs photoelectric conversion of incident light. The photoelectric conversion film 283 can be made of an organic photoelectric conversion material including, for example, rhodamine-based dyes, melacyanine-based dyes, quinacridone, phthalocyanine-based dyes, coumarin-based dyes, and tris-8-hydroxyquinoline Al. The photoelectric conversion film 283 can be configured to absorb light of a specific wavelength among the incident light and perform photoelectric conversion.

[0125] The lower electrode 282 is disposed adjacent to the lower layer of the photoelectric conversion film 283, and is a film that transmits charges generated by the photoelectric conversion film 283. The lower electrode 282 can be made of, for example, a metal such as Ti.

[0126] The through electrode 244 is an electrode that penetrates the semiconductor substrate 220. The through electrode 244 is disposed between the lower electrode 282 and the wiring layer 242 of the wiring region 240, and transmits charges generated by the photoelectric conversion unit 201. The charges (electrons) generated by the photoelectric conversion unit 201 are transmitted to the coupling region 119 via the through electrode 244, the wiring layer 242, and the contact plug 243.

[0127] In the pixel 200 shown in the figure, the action of the potential adjustment section 110 can also reduce the time required for the potential of the coupling region 119 to converge to the transfer reference potential.

[0128] Other than this, the configuration of the imaging element 1 is similar to the configuration of the imaging element 1 described in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0129] As described above, the imaging element 1 according to the third embodiment of the present disclosure can reduce the time required to reset the imaging element 1 that uses the photoelectric conversion unit 201 formed of an organic photoelectric conversion film.

[0130] <4. Fourth embodiment> In the above-mentioned embodiment, a description has been given of the configuration of the pixel 100 having the potential adjustment section 110. In the fourth embodiment, a description will be given of the overall configuration of the image sensor 1 including the pixel 100.

[0131] [Image sensor configuration] 11 is a plan view showing a configuration example of a light receiving element according to an embodiment of the present disclosure. The figure is a plan view showing a configuration example of an image sensor 1, which is an example of a light receiving element. The figure also shows the configuration of the image sensor 1 as viewed from the light receiving surface side, which is the surface onto which incident light is irradiated.

[0132] 3 is disposed on the light receiving surface side of the imaging element 1. In addition, a plurality of pad electrodes 149 are disposed on the light receiving surface of the imaging element 1. These pad electrodes 149 are disposed on the periphery of the light receiving surface of the imaging element 1, and are electrodes for electrical connection to the outside. As will be described later, the pad electrodes 149 are disposed at the bottoms of holes 184 formed in the compound semiconductor chip 192 and the silicon chip 191.

[0133] A conductive film 183 having an opening 185 in the center is disposed inside the pad electrode on the light receiving surface of the compound semiconductor chip 192. The hatched area in the figure represents the area of ​​the conductive film 183. A plurality of holes 181 are disposed under the conductive film 183. The plurality of holes 181 are disposed on the periphery of the area in which the conductive film 183 is disposed. The dashed rectangle in the figure represents the holes 181. The wiring layer 148 described later is disposed at the bottom of these holes 181. The conductive film 183 is disposed along the bottom and sidewall of the hole 181, and is electrically connected to the wiring layer 148. In addition, the opening 174 of the protective film 172 described in FIG. 3 is disposed inside the hole 181 on the light receiving surface of the compound semiconductor chip 192. The annular area surrounded by the dashed line in the figure represents the opening 174. This opening 174 is an opening for electrically connecting the conductive film 183 and the transparent electrode 171 described in FIG. 3 by contacting them. The conductive film 183 is disposed along the bottom and sidewalls of the opening 174 .

[0134] In addition, the dotted rectangle in the figure represents an element region 90. This element region 90 corresponds to the pixel array section 10 described in FIG.

[0135] [Cross-sectional structure of the image sensor] Fig. 12 is a cross-sectional view showing a configuration example of a light receiving element according to an embodiment of the present disclosure. The figure is a cross-sectional view showing the configuration example of the imaging element 1, and is a cross-sectional view taken along line a-a' in Fig. 11. As described in Fig. 3, the imaging element 1 in the figure is formed by bonding a compound semiconductor chip 192 and a silicon chip 191 together.

[0136] The compound semiconductor chip 192 in the figure includes an element region 90 , a protective layer 154 , a buried layer 180 , a conductive film 183 , and an insulating layer 161 .

[0137] The element region 90 is disposed in the center of the compound semiconductor chip 192. In this element region 90, the compound semiconductor substrate 150, the first compound semiconductor layer 151, the second compound semiconductor layer 152, the separation region 153, and the electrode 155 described in FIG. 3 are disposed. That is, the element region 90 in the figure is composed of a compound semiconductor, an electrode, and the like. In addition, a transparent electrode 171 and a protective film 172 are disposed adjacent to the compound semiconductor substrate 150.

[0138] The buried layer 180 is a region configured to have a shape in which the element region 90 is buried. This buried layer 180 is disposed around the element region 90 and configured to have a thickness greater than that of the element region 90. The buried layer 180 can be configured of an insulating material. Specifically, the buried layer 180 can be configured of SiO2, SiN, silicon oxynitride (SiON), silicon oxide containing carbon (SiOC), and silicon carbide (SiC). By disposing this buried layer 180, it is possible to suppress the intrusion of moisture and the like from the side surface of the element region 90. In addition, the buried layer 180 is disposed so as to surround the periphery of the element region 90 on the light receiving surface, and provides a region for disposing the above-mentioned pad electrode 149 and the like.

[0139] The protective layer 154 in this figure is disposed between the element region 90 and the buried layer 180. The insulating layer 161 in this figure is disposed adjacent to the back surface side of the buried layer 180.

[0140] The conductive film 183 is a conductive film that supplies power to the transparent electrode 171. The conductive film 183 can be made of a metal. Specifically, the conductive film 183 can be made of a metal including tungsten (W), aluminum (Al), titanium (Ti), molybdenum (Mo), tantalum (Ta), Cu, and the like.

[0141] As shown in the figure, the above-mentioned hole 181 is arranged in the embedded layer 180. The hole 181 is formed in a shape that reaches the wiring layer 148 arranged in the wiring region 140 of the silicon chip 191 from the light receiving surface of the compound semiconductor chip 192. The conductive film 183 is arranged adjacent to the wiring layer 148 on the inner wall and bottom of the hole 181, and is electrically connected to the wiring layer 148. In addition, the above-mentioned opening 174 is arranged in the protective film 172 arranged adjacent to the transparent electrode 171. The conductive film 183 is arranged adjacent to the transparent electrode 171 in the opening 174, and is electrically connected to the transparent electrode 171. As a result, a cathode voltage is supplied as a power source from the wiring layer 148 of the silicon chip 191 to the transparent electrode 171 through the conductive film 183. In the figure, the wiring layer 148 and the conductive film 183 correspond to the power line Vtop described in FIG. 2.

[0142] Moreover, the conductive film 183 further blocks incident light. As described above, an opening 185 is disposed in the center of the conductive film 183. A pixel 100 is disposed directly below this opening 185, and photoelectric conversion of the incident light is performed. Meanwhile, a pixel 190 is disposed directly below the conductive film 183. This pixel 190 is shielded from light by the conductive film 183. Such a pixel 190 is called an OPB (Optical Black) pixel, and is a pixel disposed to obtain the black level of an image signal output by the imaging element 1. A protective film 173 is disposed on the surface of the conductive film 183.

[0143] Moreover, a hole 184 is further arranged in the embedded layer 180. This hole 184 is formed in a shape that reaches from the light receiving surface of the compound semiconductor chip 192 to a pad electrode 149 arranged in the wiring region 140 of the silicon chip 191. By performing wire bonding to the pad electrode 149 via this hole 184, the image sensor 1 can be connected to an external circuit.

[0144] The silicon chip 191 includes the semiconductor substrate 120 and the wiring region 140 described in Fig. 3. In the figure, a pixel circuit 116 is illustrated in place of the potential adjustment unit 110 and the like. The pixel circuit 116 corresponds to the circuits other than the photoelectric conversion unit 101 of the pixel 100 in Fig. 2. The pixel circuit 116 is connected to the wiring layer 142 in the figure.

[0145] Other than this, the configuration of the image sensor 1 is similar to that of the image sensor 1 in the first embodiment, and therefore a description thereof will be omitted.

[0146] [Other configurations of the cross section of the image sensor] 13 is a cross-sectional view showing another example of the configuration of a light receiving element according to an embodiment of the present disclosure. The figure is a cross-sectional view showing another example of the configuration of the image sensor 1. The image sensor 1 in the figure is configured by bonding a compound semiconductor chip 193 and a silicon chip 191 together.

[0147] The compound semiconductor chip 193 includes an element region 90, an embedded layer 180, an anti-reflection film 177, a color filter 178, and an on-chip lens 179. A pixel 100 is disposed in the element region 90. A cathode voltage is supplied to the compound semiconductor substrate 150 of the pixel 100 via an electrode (not shown).

[0148] The anti-reflection film 177 prevents reflection of incident light. The anti-reflection film 177 can be made of, for example, SiN, hafnium oxide (HfO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), and titanium oxide (TiO2).

[0149] The color filter 178 is an optical filter that is arranged for each pixel 100 and transmits incident light of a predetermined wavelength. Three types of color filters that transmit red light, green light, and blue light can be used as the color filter 178. One of the three types of color filters 178 is arranged for each pixel 100.

[0150] The compound semiconductor chip 193 is attached to the silicon chip 191 via bumps 194. Specifically, the bump electrodes 162 of the compound semiconductor chip 193 and the bump electrodes 145 of the silicon chip 191 are joined by the bumps 194. For example, solder bumps can be used as the bumps 194. An insulating layer 195 is disposed around the bumps 194.

[0151] <5. Camera application example> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the present technology may be realized as an imaging element mounted in an imaging device such as a camera.

[0152] 14 is a block diagram showing a schematic configuration example of a camera, which is an example of an imaging device to which the present technology can be applied. The camera 1000 in the figure includes a lens 1001, an imaging element 1002, an imaging control unit 1003, a lens driving unit 1004, an image processing unit 1005, an operation input unit 1006, a frame memory 1007, a display unit 1008, and a recording unit 1009.

[0153] A lens 1001 is a photographing lens of the camera 1000. This lens 1001 collects light from a subject and causes it to enter an image sensor 1002 (described later) to form an image of the subject.

[0154] The image sensor 1002 is a semiconductor element that captures an image of light from a subject collected by the lens 1001. The image sensor 1002 generates an analog image signal according to the irradiated light, converts it into a digital image signal, and outputs it.

[0155] The imaging control unit 1003 controls the imaging of the imaging element 1002. The imaging control unit 1003 controls the imaging element 1002 by generating a control signal and outputting it to the imaging element 1002. The imaging control unit 1003 can also perform autofocus in the camera 1000 based on an image signal output from the imaging element 1002. Here, autofocus is a system that detects the focal position of the lens 1001 and automatically adjusts it. As this autofocus, a method (image plane phase difference autofocus) can be used in which an image plane phase difference is detected by a phase difference pixel arranged in the imaging element 1002 to detect the focal position. Also, a method (contrast autofocus) can be applied in which a position where the contrast of an image is the highest is detected as the focal position. The imaging control unit 1003 adjusts the position of the lens 1001 via the lens driving unit 1004 based on the detected focal position, and performs autofocus. The imaging control unit 1003 can be configured, for example, by a DSP (Digital Signal Processor) equipped with firmware.

[0156] The lens driving unit 1004 drives the lens 1001 under the control of the imaging control unit 1003. The lens driving unit 1004 can drive the lens 1001 by changing the position of the lens 1001 using a built-in motor.

[0157] The image processing unit 1005 processes the image signal generated by the image sensor 1002. This processing includes, for example, demosaic for generating image signals of missing colors among the image signals corresponding to red, green, and blue for each pixel, noise reduction for removing noise from the image signal, and encoding of the image signal. The image processing unit 1005 can be configured, for example, by a microcomputer equipped with firmware.

[0158] The operation input unit 1006 receives an operation input from a user of the camera 1000. For example, a push button or a touch panel can be used for this operation input unit 1006. The operation input received by the operation input unit 1006 is transmitted to the imaging control unit 1003 and the image processing unit 1005. After that, a process according to the operation input, such as a process of capturing an image of a subject, is started.

[0159] The frame memory 1007 is a memory for storing frames, which are image signals for one screen. The frame memory 1007 is controlled by the image processing unit 1005, and holds frames during the image processing process.

[0160] The display unit 1008 displays the image processed by the image processing unit 1005. For this display unit 1008, for example, a liquid crystal panel can be used.

[0161] The recording unit 1009 records the image processed by the image processing unit 1005. For this recording unit 1009, for example, a memory card or a hard disk can be used.

[0162] The above describes a camera to which the present disclosure can be applied. The present technology can be applied to the imaging element 1002 among the configurations described above. Specifically, the imaging element 1 described in FIG. 1 can be applied to the imaging element 1002. By applying the imaging element 1 to the imaging element 1002, the time required for resetting can be shortened, and high-speed imaging by the camera 1000 becomes possible. Note that the image processing unit 1005 is an example of a processing circuit described in the claims. The camera 1000 is an example of a light receiving device described in the claims.

[0163] Although a camera has been described as an example here, the technology according to the present disclosure may be applied to other devices, such as a monitoring device. The present disclosure may also be applied to a semiconductor device in the form of a semiconductor module, in addition to electronic devices such as a camera. Specifically, the technology according to the present disclosure may be applied to an imaging module, which is a semiconductor module in which the imaging element 1002 and the imaging control unit 1003 in FIG. 14 are enclosed in a single package.

[0164] The configuration of the pixel 100 according to the second embodiment can be combined with the third embodiment. Specifically, the potential adjustment unit 110 in FIG.

[0165] Finally, the above-mentioned embodiments are merely examples of the present disclosure, and the present disclosure is not limited to the above-mentioned embodiments. Therefore, even if the embodiments are different from the above-mentioned embodiments, various modifications can be made depending on the design, etc., as long as they do not deviate from the technical idea of ​​the present disclosure.

[0166] In addition, the effects described in this specification are merely examples and are not limiting, and other effects may also be obtained.

[0167] In addition, the drawings in the above-mentioned embodiments are schematic, and the dimensional ratios of the various parts do not necessarily correspond to the actual ones. In addition, the drawings may include parts whose dimensional relationships and ratios differ from one another.

[0168] The present technology can also be configured as follows. (1) a photoelectric conversion unit that performs photoelectric conversion of incident light to generate electric charges; a coupling region formed on a semiconductor substrate and coupled to the photoelectric conversion unit to transmit the generated charges; A charge holding section that holds the charge; a charge transfer section that forms a potential barrier between the coupling region and the charge storage section and controls transfer of the charges transferred to the coupling region to the charge storage section; a potential adjusting section that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer section based on a transfer reference potential that is a reference potential when the charges transferred to the charge holding section are transferred; a light-receiving signal generating unit that generates a light-receiving signal based on the charges held in the charge holding unit; A light receiving element comprising: (2) the charge transfer unit includes a control input terminal and forms the potential barrier in response to a control voltage applied to the control input terminal; The potential adjustment unit adjusts the potential barrier by generating a control voltage based on the transfer reference potential and applying the generated control voltage to the control input terminal. The light receiving element according to (1) above. (3) The light receiving element according to (2), wherein the charge transfer section is constituted by a MOS transistor having a gate as the control input terminal. (4) The light-receiving element according to (3), wherein the charge transfer section has a source connected to the coupling region and a drain connected to the charge storage section. (5) The light receiving element according to any one of (2) to (4), wherein the potential adjusting section generates the control voltage based on a difference between a potential of the coupling region and the transfer reference potential. (6) The light receiving element according to (5), wherein the potential adjustment section includes a MOS transistor and a load section connected to a drain of the MOS transistor and configured to convert a change in current into a change in voltage. (7) The light receiving element according to (6), wherein the potential adjusting section applies the potential of the coupling region to a gate of the MOS transistor and applies the transfer reference potential to a source of the MOS transistor. (8) a binding region initialization unit that initializes the binding region to a predetermined initial potential by injecting electric charges into the binding region; a reset unit that resets the charge retention unit by discharging the charge retained in the charge retention unit; the potential adjusting unit adjusts the potential barrier during the initialization to transfer the charge injected into the coupling region to the charge holding unit; the reset unit resets the charge holding unit when the potential adjusting unit starts adjusting the potential after the initialization; The light reception signal generating section generates the light reception signal based on the charges transferred to and held in the charge holding section during a predetermined exposure period after the initialization. The light receiving element according to any one of (1) to (7). (9) The light receiving element according to (8), wherein the binding region initialization section further discharges electric charges from the binding region after the predetermined exposure period has elapsed. (10) a second charge holding unit that holds the charge; a second charge transfer section that transfers the charges held in the charge holding section to the second charge holding section; Further comprising: The light-receiving signal generating section generates the light-receiving signal based on the charge held in the second charge holding section. The light receiving element according to any one of (1) to (9). (11) The light-receiving element according to any one of (1) to (10), wherein the photoelectric conversion section is made of a compound semiconductor. (12) The light-receiving element according to any one of (1) to (10), wherein the photoelectric conversion section includes an organic photoelectric conversion film. (13) a photoelectric conversion unit that performs photoelectric conversion of incident light to generate electric charges; a coupling region formed on a semiconductor substrate and coupled to the photoelectric conversion unit to transmit the generated charges; A charge holding section that holds the charge; a charge transfer section that forms a potential barrier between the coupling region and the charge storage section and controls transfer of the charges transferred to the coupling region to the charge storage section; a potential adjusting section that adjusts the potential of the coupling region by adjusting the potential barrier of the charge transfer section based on a transfer reference potential that is a reference potential when the charges transferred to the charge holding section are transferred; a light receiving signal generating unit that generates a light receiving signal based on the charges held in the charge holding unit; a processing circuit for processing the generated light receiving signal; A light receiving device comprising: [Explanation of symbols]

[0169] 1, 1002 Image sensor 10 Pixel array section 30 Column signal processing section 100, 200 pixels 101, 201 Photoelectric conversion unit 102 Charge holding part 103 Second charge storage unit 104 Combined area initialization section 105 Charge transfer section 106 Second charge transfer section 107 Reset section 108, 109, 111, 112 MOS transistors 110 Potential adjustment section 115 Image signal generator 119 Combined area 120, 220 Semiconductor substrate 150 Compound Semiconductor Substrate 151 First compound semiconductor layer 152 Second compound semiconductor layer 171 Transparent electrode 282 Lower electrode 283 Photoelectric conversion film 284 Upper electrode 1000 Cameras 1005 Image processing section

Claims

1. A pixel circuit disposed on a semiconductor substrate; a photoelectric conversion unit disposed adjacent to the semiconductor substrate and configured to perform photoelectric conversion of incident light to generate electric charges; The pixel circuit includes: a coupling region which is a semiconductor region of the semiconductor substrate and is coupled to the photoelectric conversion unit so that charges generated by the photoelectric conversion unit are transferred; a charge retention portion configured by a semiconductor region of the semiconductor substrate and retaining the charge; a charge transfer section which is configured by a MOS transistor having a gate connected to a control input terminal, a source connected to the coupling region, and a drain connected to the charge holding section, and which forms a potential barrier between the coupling region and the charge holding section in response to a control voltage applied to the control input terminal, thereby controlling the transfer of the charge transferred to the coupling region to the charge holding section; a potential adjusting section that adjusts the potential of the coupling region by applying to the control input terminal a control voltage generated based on a transfer reference potential, which is a reference potential when the charges transmitted to the charge holding section are transferred; and a coupling region initialization unit configured with a MOS transistor and initializing the coupling region to a predetermined initial potential by injecting charges into the coupling region; a second charge holding portion configured by a semiconductor region of the semiconductor substrate and holding the charge; a reset unit configured with a MOS transistor, which resets the charge retention unit by discharging the charge retained in the charge retention unit and resets the second charge retention unit by discharging the charge retained in the second charge retention unit; a second charge transfer section configured with a MOS transistor and configured to transfer the charge held in the charge holding section to the second charge holding section; a light receiving signal generating unit that generates a light receiving signal based on the charge held in the second charge holding unit, the light reception signal generating unit includes a first MOS transistor that generates a light reception signal, and a second MOS transistor that outputs the light reception signal generated by the first MOS transistor; the charge holding unit has one end connected to a source of the second charge transfer unit; the second charge transfer unit has a drain connected to a source of the reset unit, a gate of the first MOS transistor, and one end of the second charge holding unit; the potential adjustment unit is configured as a differential amplifier that amplifies a difference between a potential of the coupling region and the transfer reference potential and outputs the amplified difference as the control voltage, By controlling the generation of the received light signal, In an initial state in which the second MOS transistor, the reset unit, and the second charge transfer unit are in a non-conductive state and the coupling region initialization unit is in a conductive state, the potential of the coupling region is set to a reset potential, thereby deepening the potential barrier with the potential adjustment unit and discharging charges transferred from the photoelectric conversion unit to the coupling region via the coupling region initialization unit; At a first timing in the initial state, a potential of the coupling region is increased to the initial potential, thereby making the potential barrier shallower by the potential adjusting unit and setting the potential of the charge holding unit to the initial potential; After the first timing, the coupling region initialization unit is made non-conductive and the second charge transfer unit and the reset unit are made conductive, thereby discharging charges in the coupling region and the charge holding unit via the second charge transfer unit and the second charge holding unit, the potential adjustment unit deepens the potential barrier, and the potential of the coupling region is set to the transfer reference potential, thereby converging the potential barrier to the transfer reference potential, thereby resetting the coupling region; After the potential barrier converges to the transfer reference potential, the second charge transfer unit is brought into a non-conductive state, thereby starting accumulation by the charge holding unit of the charge that has been transferred from the photoelectric conversion unit to the coupling region and overflowed from the potential barrier; by making the coupling region initialization section conductive from the start of charge accumulation by the charge holding section to the end of a predetermined exposure period, the charge of the coupling region is discharged via the coupling region initialization section, and by making the potential adjustment section deepen the potential barrier to hold the charge of the charge holding section, the reset section is made non-conductive and the second MOS transistor is made conductive, thereby outputting the light reception signal generated by the light reception signal generation section as the light reception signal at the time of reset; after outputting the light reception signal at the time of reset, the second charge transfer unit is brought into a conductive state to transfer the charge held in the charge holding unit to the second charge holding unit, and the second MOS transistor is brought into a conductive state to output a light reception signal based on the charge held in the second charge holding unit by the light reception signal generation unit; After outputting a light receiving signal based on the charge held in the second charge holding unit, the reset unit is brought into a conductive state to discharge the charge held in the second charge holding unit. Photodetector.

2. The light receiving element according to claim 1 ; a processing circuit for processing a light receiving signal generated by the light receiving element; A light receiving device comprising:

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