Light emitting diode device with bonding and / or ohmic contacts-reflective material

Abstract

A metal stack of layers in contact with an N-type layer of a light emitting diode (LED) device includes an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer, a reflective layer in electrical contact with the ohmic contact layer, a first material barrier layer in electrical contact with the reflective layer, a current carrying layer in electrical contact with the first material barrier layer, and a second material barrier layer in electrical contact with the current carrying layer. An LED device incorporates the metal stack of layers as a bonding material and / or an ohmic contact-reflective material. Methods of making, using, and LED devices are also provided.

Description

[Technical field]

[0001] The present application relates to light emitting diode devices having bonding and / or ohmic contact-reflective materials. [Background technology]

[0002] The embodiments of the present disclosure generally relate to a light emitting diode (LED) device and a method for manufacturing the same. More specifically, the embodiments relate to a metal stack and an LED device incorporating the same. The metal stack contacts an N-type layer of the device. The metal stack has an ohmic contact layer, a reflective layer, a first material barrier layer, a current carrying layer, and a second material barrier layer.

[0003] A light emitting diode (LED) is a semiconductor light source that emits visible light when an electric current passes through it. LEDs are made up of a combination of p-type and n-type semiconductors. III-V compound semiconductors are commonly used in LEDs. III-V compound semiconductors provide more stable operation at higher temperatures than devices using other semiconductors. III-V compounds are usually fabricated on a sapphire aluminum oxide (Al 2 O 3 ) or silicon carbide (SiC).

[0004] High intensity / brightness light emitting devices capable of operation across the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. Typically, Ill-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a growth substrate, such as sapphire, silicon carbide, III-nitride, or other suitable substrate, by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as the growth substrate because of its wide commercial availability and relative ease of use. The stack grown on the growth substrate typically has one or more n-type layers formed on the substrate and doped, for example, with Si, a light emitting region or active region formed on the one or more n-type layers, and one or more p-type layers formed on the active region and doped, for example, with Mg. Summary of the Invention [Problem to be solved by the invention]

[0005] Typically, low work function metals are used to form ohmic contacts with n-GaN. Currently, the current ohmic contact materials for n-GaN are aluminum (Al) and titanium (Ti) metals, which provide low contact resistance to n-GaN, due to the low work functions of Al and Ti materials. Al is widely used as n-GaN ohmic contact metal for high power LED devices, since Al has better optical reflectivity and electrical conductivity compared to Ti. The optical reflectivity of Al is significantly lower than reflective materials such as silver (Ag) and gold (Au), especially at low incident light angles and long wavelengths. However, Ag or Au are not good ohmic contact materials to n-GaN due to their high material work functions, which results in extremely high contact resistance to n-GaN.

[0006] There is a need in the art to provide a metal stack suitable for providing ohmic contact and reflectivity to N-type layers. [Means for solving the problem]

[0007] SUMMARY OF THE DISCLOSURE Provided herein are light emitting diode (LED) devices, methods of making same, and methods of using same.

[0008] In one embodiment, a light emitting diode (LED) device includes a semiconductor layer including an N-type layer, an active region, and a P-type layer, a metal stack of layers in contact with the N-type layer, and a dielectric material insulating the P-type layer and the active region from an N-bonding material. The metal stack of layers includes an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer, a reflective layer in electrical contact with the ohmic contact layer, a first material barrier layer in electrical contact with the reflective layer, a current carrying layer in electrical contact with the first material barrier layer, and a second material barrier layer in electrical contact with the current carrying layer.

[0009] Another aspect is a method of fabricating a metal stack for a light emitting diode (LED) device, the method comprising depositing an ohmic contact layer in electrical contact with an N-type layer of the LED device, the ohmic contact layer having a work function value less than or equal to a work function value of the N-type layer, depositing a reflective layer in electrical contact with the ohmic contact layer, depositing a first material barrier layer in electrical contact with the reflective layer, depositing a current carrying layer in electrical contact with the first material barrier layer, and depositing a second material barrier layer in electrical contact with the current carrying layer.

[0010] In another aspect, a light emitting diode (LED) device includes a semiconductor layer including an N-type layer, an active region, and a P-type layer, an N-bonding material in electrical contact with the N-type layer, a P-bonding material in electrical contact with the P-type layer and insulated from the N-bonding material, and a first dielectric material insulating the P-type layer and the active region from the N-bonding material. The N-bonding material is a multi-layer structure including an ohmic contact layer in electrical contact with the N-type layer and having a work function value equal to or less than a work function value of the N-type layer, a reflective layer in electrical contact with the ohmic contact layer, a first material barrier layer in electrical contact with the reflective layer, a current carrying layer in electrical contact with the first material barrier layer, and a second material barrier layer in electrical contact with the current carrying layer. In some embodiments, the LED device is in the form of a chip scale package. In some embodiments, the LED device is in the form of a micro LED monolithic array.

[0011] Another aspect is a method of manufacturing a light emitting diode (LED) device comprising preparing a plurality of semiconductor layers including an N-type layer, an active region, and a P-type layer, exposing the N-type layer, preparing a bonding material in contact with the N-type layer, and depositing a dielectric material insulating the P-type layer and the active region from the N-type bonding material, the bonding material being formed by the following steps: depositing an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer, depositing a reflective layer in electrical contact with the ohmic contact layer, depositing a first N-type bonding material barrier layer in electrical contact with the reflective layer, depositing a current carrying layer in electrical contact with the first material barrier layer, and depositing a second N-type bonding material barrier layer in electrical contact with the current carrying layer.

[0012] In one aspect, a light emitting diode (LED) device includes a plurality of mesas, each mesa including a semiconductor layer including an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall; a plurality of trenches between the mesas defined by respective mesa sidewalls, each having a bottom surface, each trench including an N-ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas; an N-electrode metal included near the N-ohmic contact-reflective material; a dielectric material insulating the P-type layer and the active region from the N-ohmic contact-reflective material; and a P-electrode metal in electrical contact with the P-type layer of each mesa. The N-ohmic contact-reflective material is a multi-layer structure having an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to the work function value of the N-type layer, a reflective layer in electrical contact with the ohmic contact layer, a first material barrier layer in electrical contact with the reflective layer, a current carrying layer in electrical contact with the first material barrier layer, and a second material barrier layer in electrical contact with the current carrying layer.

[0013] Another aspect is a method of manufacturing a light emitting diode (LED) device, the method comprising the steps of preparing a plurality of mesas and trenches, each of the mesas having a semiconductor layer, the semiconductor layer including an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall, the trenches being defined by respective mesa sidewalls and each having a bottom surface; exposing the N-type layer; preparing an N ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas; depositing and patterning an N electrode metal contained near the N ohmic contact-reflective material and a P electrode metal in electrical contact with the P-type layer of each mesa; and depositing and patterning a dielectric material insulating the P-type layer and the active region from the N ohmic contact-reflective material. The N ohmic contact-reflective material is prepared by the following steps: depositing an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer, depositing a reflective layer in electrical contact with the ohmic contact layer, depositing a first material barrier layer in electrical contact with the reflective layer, depositing a current carrying layer in electrical contact with the first material barrier layer, and depositing a second material barrier layer in electrical contact with the current carrying layer.

[0014] In order that the above features of the present disclosure may be understood in detail, a more particular description of the present disclosure briefly summarized above can be obtained by reference to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings merely illustrate exemplary embodiments of the present disclosure, and therefore the present disclosure is not limited in scope to other equally effective embodiments. The embodiments described in this application are presented by way of example and are not limited to the description of the accompanying drawings. In the drawings, like reference numerals indicate like elements. In the present application, the drawings are not drawn to scale. [Brief description of the drawings]

[0015] [Figure 1]1 is a cross-sectional view of a metal layer stack according to one or more embodiments. [Diagram 2] FIG. 1 illustrates a cross-section of an LED device, particularly a chip-scale package, according to one or more embodiments. [Diagram 3] FIG. 2 illustrates a cross-section of an LED device, in particular a monolithic uLED array, according to one or more embodiments. [Figure 4] FIG. 2 illustrates a cross-section of an LED device, in particular an array of uLEDs on a substrate, according to one or more embodiments. [Diagram 5] 1 is a transmission electron microscope (TEM) image of a selection of an example embodiment produced by the method of the present application. [Figure 6] FIG. 1 illustrates an exemplary process flow for manufacturing a metal stack in accordance with one or more embodiments. [Figure 7] FIG. 1 illustrates an exemplary process flow for manufacturing an LED device according to one or more embodiments. [Figure 8] FIG. 2 is a schematic diagram illustrating a top view of an exemplary display device according to one or more embodiments. [Figure 9] FIG. 1 illustrates a schematic diagram of an exemplary display system having an LED device according to an embodiment of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Before describing some example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or method steps set forth in the following description, as the present disclosure may be used in other embodiments and may be practiced or carried out in various ways.

[0017] The term "substrate" as used herein according to one or more embodiments refers to an intermediate or final structure having a surface or a portion of a surface on which a process acts. Also, a reference to a substrate in an embodiment refers to only a portion of the substrate unless the context clearly indicates otherwise. Furthermore, a reference to depositing on a substrate according to an embodiment includes depositing one or more films, features, or deposited or formed materials on a bare substrate or a substrate.

[0018] In one or more embodiments, "substrate" refers to any substrate or material surface formed on a substrate on which thin film processing is performed during a manufacturing process. In an example embodiment, the substrate surface on which processing is performed includes silicon, silicon oxide, silicon-on-insulator (SOI), strained silicon, amorphous silicon, doped silicon, carbon-doped silicon oxide, germanium, gallium arsenide, glass, sapphire, and any other suitable materials, such as metals, metal nitrides, III-nitrides (e.g., GaN, AlN, InN and alloys), metal alloys, and other conductive materials, depending on the application. Substrates include light emitting diode (LED) devices, including, but not limited to, uLED devices. In an embodiment, the substrate is subjected to a pre-treatment process, where the substrate surface is polished, etched, reduced, oxidized, hydroxylated, annealed, UV cured, e-beam cured, and / or baked. In addition to thin film processing directly on the surface of the substrate itself, in certain embodiments, any disclosed thin film processing steps are performed on an underlying layer formed on the substrate, and the term "substrate surface" is intended to include such underlying layers where the context indicates. Thus, for example, when a thin film / layer or partial thin film / layer is deposited on a substrate surface, the exposed surface of the newly deposited thin film / layer becomes the substrate surface.

[0019] As used herein, the terms "wafer" and "substrate" are used interchangeably. Thus, as used herein, a wafer serves as a substrate for the formation of the LED devices described herein.

[0020] The term microLED (uLED or μLED) refers to a light emitting diode having one or more characteristic dimensions (e.g., height, width, depth, thickness, etc.) less than 100 micrometers. In one or more embodiments, one or more of the dimensions height, width, depth, thickness have a value in the range of 2 to 25 micrometers.

[0021] The advantage of the device of the present invention is that it has a new metal stack, and by inserting an extremely thin optically transparent ohmic contact layer, such as an n-GaN ohmic contact layer, between an N-type layer, such as n-GaN, and a reflective layer (such as an Ag or Au mirror), a good ohmic contact is obtained with n-GaN while achieving high reflectivity. In such a device, low contact resistance (1% work function (Vf) reduction compared to Al baseline) and sufficiently high light extraction (1.5% optical output power (LOP) gain compared to Al baseline) can be achieved.

[0022] In one or more embodiments, the metal stack of layers is useful as an ohmic contact-reflector material to provide low resistance and high reflectivity to the LED device.

[0023] In one or more embodiments, the metal stack of layers described herein is useful as an adhesive material for adhering one or more LED devices to another structure, such as a substrate, a circuit board, or a backplane.

[0024] Referring to the drawings, Figure 1 illustrates a cross-section of a metal stack of layers according to one or more embodiments, and Figure 6 provides an exemplary process flow diagram 550 for fabrication of the metal stack. Methods for depositing materials, layers, and thin films include, but are not limited to, sputter deposition, evaporation, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PV), plasma enhanced atomic layer deposition (PEALD), plasma enhanced chemical vapor deposition (PECVD), and combinations thereof.

[0025] The metal stack of layers 100 includes an ohmic contact layer 151 that is in electrical contact with, and in one or more embodiments directly contacted with, an N-layer of a light emitting diode (LED) device. In operation 551 of FIG. 6, an ohmic contact layer is deposited in electrical contact with an N-type layer of the plurality of semiconductor layers. In one or more embodiments, the ohmic contact layer is in direct contact with the N-type layer. The ohmic contact layer 151 has a work function value that is lower than or equal to the work function value of the N-type layer. For example, an n-GaN N-type layer has a work function value of about 4.1 eV. Exemplary ohmic contact layers according to one or more embodiments include Al (Vf of 4.06-4.26 eV), Ti (Vf of 4.0-4.33), or AZO (Al-doped ZnO) (Vf of 3.1-4.5). In one or more embodiments, the ohmic contact layer has a thickness ranging from 5 Å to 200 Å, inclusive, and all values ​​and subranges therebetween. The ohmic contact layer is designed to be thick enough to form an ohmic contact with the N layer and provide sufficient adhesion to the reflective layer 153 (e.g., Ag or Au), but not too thick so as to degrade the reflectivity of the reflective layer.

[0026] Furthermore, the ohmic contact layer (e.g., Ti) is expected to react with the N-layer (e.g., n-GaN) in the mesa during a downstream thermal cycling step at the interface, e.g., forming an n-GaN / Ti interface, which further reduces the contact resistance and improves the transparency.

[0027] 5 shows a transmission electron microscope (TEM) image of a selection of example embodiments fabricated according to the methods of the present application, which shows a GaN layer with a Ti ohmic contact layer deposited thereon, with an Ag reflective layer on top of the Ti layer, and the reaction of GaN with Ti at the interface is indicated by the arrow "I".

[0028] The metal stack of layers 100 also includes a reflective layer 153 in electrical contact with the ohmic contact layer 151. In operation 553 of FIG. 6, the reflective layer 153 is deposited in direct contact with the ohmic contact layer 151. In one or more embodiments, the reflective layer 153 includes silver (Ag) or gold (Au). In one or more embodiments, the reflective layer has a thickness of 1000 Å or more. In some implementations, it is advantageous for the ohmic contact layer to be very thin (e.g., 5 Å or more and 200 Å or less) relative to the reflective layer. In one or more embodiments, the ohmic contact layer has a thickness of 20% or less of the thickness of the reflective layer, including, for example, 10%, 5%, 1%, or 0.5% or less, and all values ​​and subranges therebetween.

[0029] The metal stack of layers 100 also has a first material barrier layer 157 in electrical contact with the reflective layer 153. In operation 557 of FIG. 6, the first material barrier layer 157 is deposited in electrical contact with the reflective layer 153. In one or more embodiments, the first material barrier layer 157 is in direct contact with the reflective layer 153. In other embodiments, the first material barrier layer 157 is in indirect contact with the reflective layer 153 if the first material migration suppression layer 155 is deposited according to optional operation 555 of FIG. 6. The first material barrier layer 157 inhibits and / or prevents the metal of the reflective layer 153 from forming an intermetallic compound or alloy with the metal of the current carrying layer 159. In some embodiments, the first material barrier layer 157 includes titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), tungsten (W), or a combination thereof. In one or more embodiments, the first material barrier layer 157 has a thickness of 1000 Å or greater.

[0030] The metal stack of layers 100 also optionally includes a first material migration suppression layer 155. In one or more embodiments, the first material migration suppression layer 155 is in direct contact with the reflective layer 153 on one surface and the first material barrier layer 157 on the other surface. The first material migration suppression layer 155 can suppress thermal and electrical migration of the metal in the reflective layer 153. In some embodiments, the first material migration suppression layer 155 includes nickel (Ni) or palladium (Pd). In some embodiments, the first material migration suppression layer 155 has a thickness of 50 Å to 1000 Å, inclusive, and all values ​​and subranges of thickness therebetween.

[0031] The metal stack of layers 100 has a current carrying layer 159 in electrical contact with a first material barrier layer 157. In operation 559 of FIG. 6, the current carrying layer 159 is deposited on the first material barrier layer 157. In some embodiments, the current carrying layer 159 is in direct contact with the first material barrier layer 157. In some embodiments, the current carrying layer 159 comprises copper (Cu), gold (Au), aluminum (Al), or a combination thereof. In some embodiments, the current carrying layer has a thickness of 5000 Å or greater.

[0032] The metal stack of layers 100 has a second material barrier layer 163 in electrical contact with the current carrying layer 159 and capping the metal stack of layers 100. In operation 563 of FIG. 6, the second material barrier layer 163 is deposited in electrical contact with the current carrying layer 159. In one or more embodiments, the second material barrier layer 163 is in direct contact with the current carrying layer 159. In other embodiments, the second material barrier layer 163 is in indirect contact with the current carrying layer 159 if a second material migration suppression layer 161 is deposited according to optional operation 561 of FIG. 6. The second material barrier layer 163 is a protective layer that suppresses and / or prevents attack of the metal stack by downstream processing steps, i.e., dry etching, wet etching, cleaning, etc. In one or more embodiments, the second material barrier layer 163 includes titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), tungsten (W), or combinations thereof. In one or more embodiments, the second material barrier layer 163 has a thickness of 1000 Å or greater.

[0033] The metal stack 100 of layers also optionally includes a second material migration suppression layer 161. In one or more embodiments, the second material migration suppression layer 161 is in direct contact with the current carrying layer 159 on one surface and the second material barrier layer 163 on the other surface. The second material migration suppression layer 161 can suppress thermal and electrical migration of the metal of the current carrying layer 159. In some embodiments, the second material migration suppression layer 161 includes nickel (Ni) or palladium (Pd). In some embodiments, the second material migration suppression layer 161 has a thickness of 50 Å to 1000 Å, including all values ​​and subranges therebetween. In some embodiments, the second material barrier layer 163, alone or in combination with the second material migration suppression layer 161, is effective as a capping layer for the entire metal stack 100 as a whole to prevent degradation during downstream process steps.

[0034] FIG. 7 provides an exemplary process flow diagram 500 for fabricating an LED device according to one or more general embodiments. In operation 510, semiconductor layers including an N-type layer, an active region, and a P-type layer are formed according to methods known in the art. In one or more embodiments, the semiconductor layers are formed by epitaxial (EPI) growth. The semiconductor layers according to one or more examples include epitaxial layers, III-nitride layers, or epitaxial III-nitride layers. In one or more embodiments, the semiconductor layers include III-nitride materials, and in certain embodiments, epitaxial III-nitride materials. In some embodiments, the III-nitride materials include one or more of gallium (Ga), aluminum (Al), and indium (In). Thus, in certain embodiments, the semiconductor layer comprises one or more of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium aluminum nitride (InAlN), aluminum indium gallium nitride (AlInGaN), and the like.

[0035] In some embodiments, the semiconductor layer is grown on a substrate, which may remain or be removed at a later point during fabrication. The substrate may be any substrate known to one of skill in the art. In some embodiments, the substrate comprises one or more of sapphire, silicon carbide, silicon (Si), quartz, magnesium oxide (MgO), zinc oxide (ZnO), spinel, and the like. In some embodiments, the substrate is not patterned prior to growth of the epitaxial layer. Thus, in some embodiments, the substrate may be considered to be unpatterned, flat, or substantially flat. In other embodiments, the substrate is, for example, patterned, e.g., a patterned sapphire substrate (PSS).

[0036] In one or more embodiments, the semiconductor layer includes a stack of undoped and doped III-nitride materials. The III-nitride materials may be doped with one or more of silicon (Si), oxygen (O), boron (B), phosphorus (P), germanium (Ge), manganese (Mn), or magnesium (Mg), depending on whether a p-type or n-type III-nitride material is desired. In one or more embodiments, the semiconductor layer has a combined thickness ranging from about 2 μm to about 10 μm, and all values ​​and subranges therebetween.

[0037] In some embodiments, an active layer is formed between the N-type layer and the P-type layer. The active layer may include any suitable material known to one of ordinary skill in the art. In some embodiments, the active layer includes a multiple quantum well (MQW) of III-nitride material and a III-nitride electron blocking layer.

[0038] In operation 515, a dielectric material is deposited. Suitable dielectric materials include, but are not limited to, silicon oxide (SiO), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (AlOx), aluminum nitride (AlN), and combinations thereof. Those skilled in the art will recognize that the use of a formula such as SiO to represent silicon oxide does not imply any particular stoichiometric relationship between elements. The formula simply identifies the major elements of the thin film.

[0039] In operation 520, etching or patterning is performed to expose at least the N-type layer. In one or more embodiments, conventional masking, wet etching, and / or dry etching processes may be used.

[0040] In operation 550, a metal stack suitable as a bonding layer and / or an ohmic contact-reflector layer is deposited in contact with at least the N-type layer. Operation 550 for forming the metal stack is described in detail with respect to Figure 6. In operations 570 and 575, any further deposition and / or further etching of materials is performed to obtain the desired device configuration.

[0041] In operation 580, any further post-processing is performed. In an embodiment, further processing includes forming a passivation layer around some or all of the LEDs or uLEDs, or the entire device. In an embodiment, the processed structure is retained on the substrate, singulated, and further processed. In an embodiment, the processed structure is flipped over and secured to a support, such as a tape support, and the substrate is removed. Substrate removal is performed by methods known in the art, including substrate laser lift-off. Upon removal of the substrate, singulated LEDs or uLEDs are formed.

[0042] Further processing may involve the deposition of a layer of a down-conversion material, for example a phosphor material.

[0043] 2 shows a cross-sectional view of an LED device according to one or more embodiments. In the embodiment of FIG. 2, a chip-scale package 200 has semiconductor layers including an N-type layer 204n, an active region 206, and a P-type layer 204p. The semiconductor layers reside on a substrate 202.

[0044] The N-bonding material 200n is in electrical contact with the N-type layer 204n. The N-bonding material 200n is a multi-layer structure similar to that illustrated in FIG. 1, including an ohmic contact layer 151 in electrical contact with the N-type layer and having a work function value equal to or less than that of the N-type layer, a reflective layer 153 in electrical contact with the ohmic contact layer 151, a material barrier layer 157, such as a first N-bonding material barrier layer in FIG. 2, in electrical contact with the reflective layer, a current carrying layer 159 in electrical contact with the material barrier layer 157 (e.g., the first N-bonding material barrier layer), and another material barrier layer 161, such as a second N-bonding material layer in FIG. 2, in electrical contact with the current carrying layer 159. In this embodiment, the ohmic contact layer 151 is in direct contact with the N-type layer 204n.

[0045] The P bonding material 200p is in electrical contact with the P-type layer 204p through the P metal layer 212, the guard sheet 214, and the current spreading layer 208. The P bonding material 200p is insulated from the N bonding material 200n by the second dielectric layer 216 and the third dielectric layer 218. In one embodiment, the P bonding material 200p is the same as the N bonding material 200n.

[0046] The first dielectric material 210 insulates the P-type layer 204p and the active area 206 from the N-bonding material 200n. The first dielectric material 210 in Figure 2 also separates the current spreading layer 208 on the P-type layer 204p from the N-type layer 204n.

[0047] A P metal layer 212 is present on the first dielectric material 210 and in the via opening 207 for direct contact with the current spreading layer 208 and for electrical contact with the P-type layer. A guard sheet 214 is on the p-metal layer 212.

[0048] The N-pad 230 contacts the N-bonding layer 200n through an n-opening 219 in the third dielectric layer 218. The N-pad 230 is a multi-layer structure and may have a seed layer and one or more of various n-electrode metals.

[0049] The P pad 220 contacts the P bonding layer 200p through the p opening 217 in the third dielectric layer 218. The P pad 220 is a multi-layer structure and may include a seed layer and one or more of various p electrode metals.

[0050] 3 illustrates a cross-sectional view of an LED device according to one or more embodiments. In the embodiment of FIG. 3, a monolithic die of a micro light emitting diode (uLED) 300 has multiple mesas 350, 351 in the form of an array. The mesas 350 and 351 have semiconductor layers including an N-type layer 304n, an active region 306, and a P-type layer 304p. In this embodiment, the ohmic contact layer 151 is in direct contact with the N-type layer 304n.

[0051] On the P-type layer 304p is a current spreading layer 308. In this embodiment, there is no substrate. Rather, the first portion 301 of the N-type layer 304n forms a monolithic body, and the second portion 303 of the N-type layer combined with the active region and the P-type layer form a plurality of mesas 350, 351 integrated into the monolithic body. The P metal layer 312 on the current spreading layer 308 on the mesa 350 provides the active pixel, which, together with the anode and cathode, provides light upon application of current. The P metal layer is not included on the mesa 351, which provides an inactive region, i.e., no light is produced upon application of current. The mesas 350, 351 are typically formed by etching a structure of the semiconductor layer.

[0052] The N-bonding material 300n is in electrical contact with the first portion 301 of the N-type layer 304n through an N opening 319 in the dielectric material 316. The N-bonding material is a multi-layer structure similar to that of FIG. 1, including an ohmic contact layer 151 in electrical contact with the N-type layer and having a work function value equal to or less than that of the N-type layer, a reflective layer 153 in electrical contact with the ohmic contact layer 151, a material barrier layer 157, e.g., in FIG. 3, a first N-bonding material barrier layer 157 in electrical contact with the reflective layer, a current carrying layer 159 in electrical contact with the material barrier layer 157 (e.g., the first N-bonding material barrier layer), and another material barrier layer 161, e.g., in FIG. 2, a second N-bonding material barrier layer in electrical contact with the current carrying layer 159.

[0053] The P bonding material 300p is in electrical contact with the P-type layer 304p through the P metal layer 312 and the current spreading layer 308, and through the p opening 317 in the dielectric material 316. The P bonding material 300p is separated from the N-bonding material 300n by being physically separated. In one embodiment, the P bonding material 300p is the same as the N bonding material 300n.

[0054] The dielectric layer material 316 insulates the P-type layers and active areas from the N-bonding material. The dielectric material 316 in Figure 3 also separates the current spreading layer 308 on the P-type layer 304p from the N-type layer 304n.

[0055] FIG. 4 illustrates a cross-sectional view of an LED device according to one or more embodiments. In the embodiment of FIG. 4, an array of micro light emitting diodes (uLEDs) 400 has a plurality of mesas 450. Each of the mesas 450 has a semiconductor layer including an N-type layer 404n, an active region 406, and a P-type layer 404p. The mesas 450 are typically formed by etching or patterning a structure of a semiconductor layer on a substrate such that mesas of the semiconductor layer remain, with the trenches each having a bottom defined by the exposed surface of the substrate between the mesas. In some embodiments, the substrate may be removed after further configuration of the device, including filling the trenches with layers and / or materials.

[0056] With respect to etching, in one or more embodiments, a highly anisotropic etching method is used, resulting in angles ranging from vertical (90 degrees) to 80 degrees, even smaller values, and all values ​​in between. In some embodiments, the etch depth of the mesa / trench is typically no more than 5 micrometers. In one or more embodiments, anisotropic etching is used to form the trench. In some embodiments, the width of the mesa is less than 100 micrometers. In some embodiments, the height of the mesa is equal to or less than the width of the mesa.

[0057] Each mesa has a top surface 453 (typically the top of the P-type layer 404p) and at least one mesa sidewall 455. In one or more embodiments, the semiconductor layer is on the substrate 402. A plurality of trenches between the mesas 450 are defined by respective mesa sidewalls 455, each having a bottom surface 457, each of the trenches having an N ohmic contact-reflective material 400n in electrical contact with the N-type layer 400n of each of the mesas 450. 1, the N-ohmic contact-reflective material 400n is a multi-layer structure having an ohmic contact layer 151 in electrical contact with the N-type layer and having a work function value equal to or less than that of the N-type layer, a reflective layer 153 in electrical contact with the ohmic contact layer 151, a material barrier layer 157 in electrical contact with the reflective layer, a current carrying layer 159 in electrical contact with the material barrier layer 157, and another material barrier layer 161 in electrical contact with the current carrying layer 159. In this embodiment, the ohmic contact layer 151 is in direct contact with the N-type layer 404n.

[0058] At the top surface 453 of each mesa 450, there is a current spreading layer 408 on the P-type layer 404p. The dielectric materials 409, 410, and 411 provide electrical insulation. For example, the first dielectric material 409 insulates the P-type layer 404p and the active region 406 from the N ohmic contact-reflective material 400n. The first dielectric material 409 also separates the current spreading layer 408 on the P-type layer 404p from the N-type layer 404n.

[0059] P ohmic contact-reflective material 400p is in electrical contact with P-type layer 404p through via 407 in second dielectric material 410, through P metal layer 412 and current spreading layer 408. P ohmic contact-reflective material 400p is insulated from N ohmic contact-reflective material 400n by first dielectric material 409 and third dielectric material 411. In one or more embodiments, P ohmic contact-reflective material 400p is the same as N ohmic contact reflective material 400n.

[0060] The device further comprises electrode metals, namely an N electrode metal 434 included adjacent to the N ohmic contact-reflective material 400n, and a P electrode metal 424 included adjacent to the P ohmic contact-reflective material 400p.

[0061] In one or more embodiments, a passivation layer 440 is provided on the first dielectric material 409 and the N electrode metal 434. If required, an under bump metal 442 is present on each P electrode metal 424, which may be in the form of a plug.

[0062] (display device) Some displays have single or isolated LEDs or pixels that have the junction and / or ohmic contact-reflective materials disclosed herein.

[0063] Other displays include arrays and groups of LEDs or pixels having bonding and / or ohmic contact-reflective materials as disclosed herein.

[0064] 8 shows a top view of an LED monolithic array 800 having a number of pixels arranged in a 6x19 grid. Pixels 855a and 855b are an example. In this embodiment, a common cathode 840 is connected to the pixels. Anodes are not shown, but they are underneath and included in each pixel. In some embodiments, the array has a 2x2 mesa, 4x4 mesa, 20x20 mesa, 50x50 mesa, 100x100 mesa, or n1xn2 mesa arrangement, where n1 and n2 are each a number ranging from 2 to 1000, and n1 and n2 can be equal or different.

[0065] In some embodiments, an array of micro-LEDs (μLEDs or uLEDs) is used. Micro-LEDs can support high density pixels with lateral dimensions of less than 100 μm×100 μm. In some embodiments, micro-LEDs with diameters or widths of about 50 μm or less can be used. Such micro-LEDs can be used to fabricate color displays by closely arranging micro-LEDs containing red, blue, and green wavelengths.

[0066] In some embodiments, the light emitting array has a small number of micro LEDs arranged on a substrate of centimeter-scale area or larger. In some embodiments, the light emitting array has a micro LED pixel array having hundreds, thousands, or millions of light emitting LEDs arranged together on a centimeter-scale area substrate or smaller. In some embodiments, the micro LEDs can include light emitting diodes of 30 microns to 500 microns in size. The light emitting array can be monochromatic, RGB, or other desired chromaticity. In some embodiments, the pixels can have a square, rectangular, hexagonal, or curved perimeter. The pixels can be the same size, different sizes, or similar sizes grouped together to provide a larger effective pixel size.

[0067] In some embodiments, the light-emitting pixels and the circuitry supporting the light-emitting array are packaged together, optionally with a submount or printed circuit board connected for power supply and control of light generation by the semiconductor LEDs. In certain embodiments, the printed circuit board supporting the light-emitting array has electrical vias, heat sinks, ground planes, electrical traces, and flip-chip or other mounting systems. The submount or printed circuit board may be formed of any suitable material, such as ceramic, silicon, or aluminum. If the submount material is conductive, an insulating layer is formed on the substrate material, and a metal electrode pattern is formed on the insulating layer. The submount can act as a mechanical support, provide an electrical interface between the electrodes on the light-emitting array and the power supply, and provide a heat sink function.

[0068] In some embodiments, the LED light emitting array has optical elements such as lenses, metalenses, and / or pre-collimators. The optical elements can also have or alternatively have apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light emitting array. One or more of the optical elements can also have one or more coatings, including UV blocking or anti-reflective coatings. In some embodiments, the optical system is used to correct or minimize two-dimensional or three-dimensional optical errors, including pincushion distortion, barrel distortion, longitudinal chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical system is used to magnify and / or correct the image. Significantly, in some embodiments, the magnification of the displayed image can make the light emitting array physically smaller, lighter, and require less power than a larger display. Magnification can also increase the field of view of the displayed content, making the presentation of the display equal to the user's normal field of view.

[0069] (Application) 9 illustrates a schematic diagram of an exemplary LED-based display system 900 as disclosed herein. The display system 900 includes a display 908 in electrical communication with an LED light emitting array 902 and an LED driver 904. The display system 900 also includes a system controller 906, such as a microprocessor. The controller 906 is coupled to the LED driver 904. The controller 906 is also coupled to the display 908 and optional sensors 910, and may be powered by a power source 912. In one embodiment, user data input is provided to the system controller 906.

[0070] In one or more embodiments, the system is a uLED-based camera flash system. In such an embodiment, the LED lighting array 902 is a lighting array and lens system, the display 908 has a camera, and the LEDs of 902 and the camera of 908 may be controlled by a controller 906 to match their fields of view.

[0071] If necessary, sensors 910 with control inputs may include, for example, position sensors (e.g., gyroscopes and / or accelerometers) and / or other sensors, which may be used to determine the position, velocity, and orientation of the system. Signals from the sensors 910 may be provided to the controller 906 and used to define the appropriate operating path of the controller 906 (e.g., which LEDs are currently illuminating the object and which LEDs will illuminate the object after a predetermined time).

[0072] In operation, illumination from some or all of the pixels of the LED array in 902 may be adjusted to be deactivated, operated at full intensity, or operated at intermediate intensities. As previously described, beam focusing or steering of the light emitted by the LED array in 902 may be performed electronically by activating one or more subsets of the pixels, allowing dynamic adjustment of the beam shape without moving optical elements or changing the focus of lenses in the lighting fixture.

[0073] The LED array system described herein can support a variety of other beam steering or other applications that benefit from fine-grained intensity, spatial and temporal control of light distribution. These applications include, but are not limited to, precise spatial patterning of light emitted from pixel blocks or individual pixels. Depending on the application, the emitted light may be spectrally distinct, adaptive over time, and / or environmentally responsive. The light-emitting pixel array may provide pre-programmed light distributions with various intensity, spatial, or temporal patterns. The associated optics may be distinct at the pixel, pixel block, or device level. An exemplary light-emitting pixel array has a device with a commonly controlled central block of high intensity pixels with associated common optics, while the edge pixels may have individual optics. In addition to flashlights, common applications supported by light-emitting pixel arrays include video lighting, automotive headlights, architectural and section lighting, and street lighting.

[0074] Other applications of the LED devices disclosed herein include Augmented Reality / Virtual Reality (AR / VR) systems using the uLEDs disclosed herein. One or more AR / VR systems include Augmented Reality (AR) or Virtual Reality (VR) headsets, glasses, and projectors. Such AR / VR systems have an LED light emitting array, an LED driver (or light emitting array controller), a system controller, an AR or VR display, and a sensor system 810. A control input may be provided to the sensor system, while power and user data input may be provided to the system controller. As will be appreciated, in some embodiments, the modules included in the AR / VR system may be compactly arranged in a single structure, or one or more elements may be mounted separately and connected via wireless or wired communication. For example, the light emitting array, the AR or VR display, and the sensor system may be mounted in a headset or glasses, and the LED driver and / or the system controller may be mounted separately.

[0075] In one embodiment, the light emitting array can be used to project light in a pattern of graphics or objects that can assist the AR / VR system. In some embodiments, a separate light emitting array can be used to provide the display image, and the AR features can be provided by a separate, isolated micro LED array. In some embodiments, a selected group of pixels can be used to display content to the user, while tracking of the pixels can be used to provide tracking light used for eye tracking. The content display pixels are designed to emit visible light having at least a portion of the visible band (approximately 400 nm to 750 nm). Meanwhile, the tracking pixels can emit light in the visible light band, the infrared band (approximately 750 nm to 2,200 nm), or some combination thereof. Alternatively, the tracking pixels can be operated in the range of 800 to 1000 nanometers. In some embodiments, the tracking pixels can emit tracking light during times when the content pixels are turned off and no content is displayed to the user.

[0076] AR / VR systems can incorporate a wide range of optics into the LED light emitting array and / or the AR / VR display, for example, as described above, the light emitted by the LED light emitting array can be coupled into the AR / VR display. In AR / VR applications, these optics may have nanofins and are designed to polarize the light they transmit.

[0077] In one embodiment, a light emitting array controller can be used to provide power and real-time control of the light emitting array. For example, the light emitting array controller can perform pixel or group pixel level control of amplitude and duty cycle. In some embodiments, the light emitting array controller further comprises a frame buffer to hold generated or processed images that can be provided to the light emitting array. Other support modules can include digital control interfaces, such as an Inter-Integrated Circuit (I2C) serial bus, a serial peripheral interface (SPI), USB-C, HDMI, display port, or other suitable image or control modules configured to transmit the necessary image data, control data, or commands.

[0078] In operation, pixels in an image can be used to define the response of a corresponding light-emitting array, with the intensity and spatial modulation of the LED pixels being based on the image. To mitigate data rate issues, in some embodiments, a group of pixels (e.g., a 5x5 block) can be controlled as a single block. In some embodiments, high speed and high data rate operation is supported, and pixel values ​​from successive images can be loaded as successive frames in an image sequence at a rate between 30Hz and 100Hz, typically 60Hz. Pulse width modulation can be used to control each pixel to emit light in a pattern with an intensity that is at least in part dependent on the image.

[0079] In some embodiments, the sensor system may include external sensors that monitor the environment, such as a camera, depth sensor, or audio sensor, and internal sensors that monitor the AR / VR headset position, such as an accelerometer or a two- or three-axis gyroscope. Other sensors may include, but are not limited to, air pressure sensors, stress sensors, temperature sensors, or any other suitable sensors required for local or remote environmental monitoring. In some embodiments, the control input may include a detected touch or tap, a gesture input, or a control based on the headset or display position. As another example, an estimated position of the AR / VR system relative to an initial position may be determined based on one or more measurement signals from one or more gyroscopes or position sensors that measure translational or rotational motion.

[0080] In some embodiments, the system controller uses data from the sensor system to integrate measurement signals received from the accelerometer over time to estimate a velocity vector, and integrate the velocity vector over time to determine an estimated position of a reference point of the AR / VR system. In other embodiments, the reference point used to describe the position of the AR / VR system may be based on a depth sensor, a camera placement view, or an optical field flow.

[0081] Based on changes in position, orientation, or movement of the AR / VR system, the system controller can send images or instructions to the light emitting array controller, and changes or modifications to the images or instructions can be made, if necessary, by user data input or automatic data input. User data input can be provided by, but is not limited to, voice commands, haptic feedback, eye or pupil placement, or a connected keyboard, mouse, or game controller.

[0082] (Embodiment) Various embodiments are listed below. It is understood that the embodiments described below can be combined with all aspects and other embodiments in accordance with the scope of the present invention.

[0083] Embodiment (a) 1. A light emitting diode (LED) device, comprising: a plurality of mesas, each of the mesas having a semiconductor layer, the semiconductor layer having an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall; a plurality of trenches between the mesas, each defined by a respective mesa sidewall, each having a bottom surface, each trench having an N ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas; The N ohmic contact-reflective material is It has a multi-layer structure, an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer; a reflective layer in electrical contact with the ohmic contact layer; a first material barrier layer in electrical contact with the reflective layer; a current carrying layer in electrical contact with the first material barrier layer; and a second material barrier layer in electrical contact with the current carrying layer; a plurality of trenches having an N-electrode metal received in the N-ohmic contact-reflective material; a dielectric material insulating the P-type layer and the active region from the N ohmic contact-reflective material; a P electrode metal in electrical contact with the P-type layer of each of the mesas; An LED device comprising:

[0084] Embodiment (b) The LED device of embodiment (a), wherein the N-ohmic-contact-reflective material is in direct contact with the N-type layer.

[0085] Embodiment (c) the N-type layer comprises n-GaN; the ohmic contact layer comprises aluminum (Al), titanium (Ti), or aluminum-doped zinc oxide (AZO); the reflective layer comprises silver (Ag) or gold (Au); the first and second material barrier layers each independently comprise titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), or tungsten (W); The LED device of embodiment (a) or (b), wherein the current carrying layer comprises copper (Cu), gold (Au), or aluminum (Al).

[0086] Embodiment (d) The ohmic contact layer has a thickness in the range of 5 Å to 200 Å, The reflective layer has a thickness of 1000 Å or more; the first and second material barrier layers each independently have a thickness of 1000 Å or greater; The LED device of any one of embodiments (a)-(c), wherein the current carrying layer has a thickness of 5000 Å or more.

[0087] Embodiment (e) The N-ohmic-contact-reflective material further comprises: a first material migration suppression layer in electrical contact with the reflective layer and the first material barrier layer; a second material migration suppression layer in electrical contact with the current carrying layer and the second material barrier layer; The LED device according to any one of embodiments (a) to (d), comprising:

[0088] Embodiment (f) The LED device of embodiment (e), wherein the first and second material migration suppression layers each independently comprise nickel (Ni) or palladium (Pd) and / or independently have a thickness in the range of greater than or equal to 50 Å and less than or equal to 100 Å.

[0089] Embodiment (g) Further, a P ohmic contact-reflective material including the P electrode metal is provided, The LED device according to any of embodiments (a) to (f), wherein the P ohmic contact-reflective material has the same structure as the N ohmic contact-reflective material.

[0090] Embodiment (h) each of the mesas having at least one characteristic dimension less than 100 micrometers; The LED device of any one of embodiments (a)-(g), wherein the characteristic dimension is selected from the group consisting of height, width, and depth.

[0091] Embodiment (i) The LED device according to any one of embodiments (a) to (h), wherein the semiconductor layer is an epitaxial semiconductor layer having a total thickness in the range of 2 μm to 10 μm.

[0092] Embodiment (j) The LED device of any one of embodiments (a)-(i), wherein each of the mesas has sidewalls of the semiconductor layer that define an angle in the range of 60 degrees to 90 degrees from a horizontal plane parallel to the N-type layer and the P-type layer.

[0093] Embodiment (k) The LED device of any one of embodiments (a)-(j), wherein the multiple mesas are integrated into a monolithic die.

[0094] Embodiment (l) The LED device of any one of embodiments (a) to (j), wherein the semiconductor layer is on a substrate.

[0095] Embodiment (m) 1. A method of manufacturing a light emitting diode (LED) device, comprising: Preparing a plurality of mesas and trenches, each of the mesas includes a semiconductor layer, the semiconductor layer having an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall, the trenches being defined by respective mesa sidewalls and each having a bottom surface; exposing the N-type layer; Follow these steps: depositing an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer; depositing a reflective layer in electrical contact with the ohmic contact layer; depositing a first material barrier layer in electrical contact with the reflective layer; depositing a current carrying layer in electrical contact with the first material barrier layer; and depositing a second material barrier layer in electrical contact with the current carrying layer; preparing an N ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas by depositing and patterning an N-electrode metal that is received by the N-ohmic contact-reflective material and a P-electrode metal that is in electrical contact with the P-type layer of each of the mesas; depositing and patterning a dielectric material, said dielectric material insulating said P-type layer and said active region from said N ohmic contact-reflective material; The method comprising:

[0096] Embodiment (n) The method of embodiment (m), comprising depositing the N ohmic contact-reflective material directly on the N-type layer.

[0097] Embodiment (o) the N-type layer comprises n-GaN; the ohmic contact layer comprises aluminum (Al), titanium (Ti), or aluminum-doped zinc oxide (AZO); the reflective layer comprises silver (Ag) or gold (Au); the first and second material barrier layers each independently comprise titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), or tungsten (W); The method of any one of embodiments (m) to (n), wherein the current carrying layer comprises copper (Cu), gold (Au), or aluminum (Al).

[0098] Embodiment (p) The ohmic contact layer has a thickness in the range of 5 Å to 200 Å, The reflective layer has a thickness of 1000 Å or more; the first and second material barrier layers each independently have a thickness of 1000 Å or greater; The method of any one of embodiments (m) to (o), wherein the current carrying layer has a thickness of 5000 Å or greater.

[0099] Embodiment (q) moreover, depositing a first material migration suppression layer in electrical contact with the reflective layer and the first material barrier layer, and / or a second material migration suppression layer in electrical contact with the current carrying layer and the second material barrier layer. The method of any one of embodiments (m) to (p), comprising:

[0100] Embodiment (r) The method of embodiment (q), wherein the first and second material migration suppression layers each independently comprise nickel (Ni) or palladium (Pd) and / or independently have a thickness in the range of 50 Å to 1000 Å.

[0101] Embodiment(s) depositing the ohmic contact layer in electrical contact with the P-type layer; depositing the reflective layer in electrical contact with the ohmic contact layer; depositing the first N bonding material barrier layer in electrical contact with the reflective layer; and depositing the current carrying layer in electrical contact with the first material barrier layer; Due to The method of any one of embodiments (m) to (r), wherein a P bonding material is prepared in contact with the P-type layer.

[0102] Embodiment (t) each of the mesas having at least one characteristic dimension less than 100 micrometers; The method of any one of embodiments (m)-(s), wherein the characteristic dimension is selected from the group consisting of height, width, and depth.

[0103] Throughout this specification, references to "one embodiment," "a particular embodiment," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with an embodiment is included in at least one embodiment of the disclosure. Thus, appearances of the phrases "in one or more embodiments," "in a particular embodiment," "in one embodiment," or "in one embodiment" in various places throughout this application do not necessarily refer to the same embodiment of the disclosure. Furthermore, particular features, structures, materials, or characteristics may be combined in any suitable manner in an embodiment.

[0104] Numerous modifications and other embodiments of the invention will come to mind to one skilled in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. It is therefore understood that the invention is not limited to the specific embodiments disclosed, and that modifications and embodiments are intended to be included within the scope of the appended claims. It is also understood that other embodiments of the invention may be practiced in the absence of elements / steps not specifically disclosed herein.

Claims

1. 1. A light emitting diode (LED) device, comprising: a plurality of mesas, each of the mesas having a semiconductor layer, the semiconductor layer having an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall; a plurality of trenches between the mesas, each defined by a respective mesa sidewall, each having a bottom surface, each trench having an N ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas; The N ohmic contact-reflective material is It has a multi-layer structure, an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer; a reflective layer in electrical contact with the ohmic contact layer; a first material barrier layer in electrical contact with the reflective layer; a current carrying layer in electrical contact with the first material barrier layer; and a second material barrier layer in electrical contact with the current carrying layer; a plurality of trenches having an N-electrode metal received in the N-ohmic contact-reflective material; a dielectric material insulating the P-type layer and the active region from the N ohmic contact-reflective material; a P electrode metal in electrical contact with the P-type layer of each of the mesas; having The N-ohmic-contact reflective material further comprises: a first material migration suppression layer in electrical contact with the reflective layer and the first material barrier layer; and / or a second material migration suppression layer in electrical contact with the current carrying layer and the second material barrier layer; having The LED device, wherein the first and second material migration suppression layers each independently contain nickel (Ni) or palladium (Pd) and / or independently have a thickness in the range of 50 Å to 100 Å.

2. 10. The LED device of claim 1, wherein the N-ohmic-contact-reflective material is in direct contact with the N-type layer.

3. the N-type layer comprises n-GaN; the ohmic contact layer comprises aluminum (Al), titanium (Ti), or aluminum-doped zinc oxide (AZO); the reflective layer comprises silver (Ag) or gold (Au); the first and second material barrier layers each independently comprise titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), or tungsten (W); 10. The LED device of claim 1, wherein the current carrying layer comprises copper (Cu), gold (Au), or aluminum (Al).

4. The ohmic contact layer has a thickness in the range of 5 Å to 200 Å, The reflective layer has a thickness of 1000 Å or more; the first and second material barrier layers each independently have a thickness of 1000 Å or greater; 10. The LED device of claim 1, wherein the current carrying layer has a thickness of 5000 Å or greater.

5. Further, a P ohmic contact-reflective material including the P electrode metal is provided, 2. The LED device of claim 1, wherein the P ohmic contact-reflective material has the same structure as the N ohmic contact-reflective material.

6. each of the mesas having at least one characteristic dimension less than 100 micrometers; 10. The LED device of claim 1, wherein the characteristic dimension is selected from the group consisting of height, width, and depth.

7. 10. The LED device of claim 1, wherein the semiconductor layer is an epitaxial semiconductor layer having a total thickness in the range of 2 μm to 10 μm.

8. 10. The LED device of claim 1, wherein each of the mesas has sidewalls of the semiconductor layer that define an angle in the range of 60 degrees to 90 degrees from a horizontal plane parallel to the N-type layer and the P-type layer.

9. The LED device of claim 1 , wherein the plurality of mesas are integrated into a monolithic die.

10. The LED device of claim 1 , wherein the semiconductor layer is on a substrate.

11. 1. A method of manufacturing a light emitting diode (LED) device, comprising: Preparing a plurality of mesas and trenches, each of the mesas includes a semiconductor layer, the semiconductor layer having an N-type layer, an active region, and a P-type layer, each mesa having a top surface and at least one mesa sidewall, the trenches being defined by respective mesa sidewalls and each having a bottom surface; exposing the N-type layer; Steps below: depositing an ohmic contact layer in electrical contact with the N-type layer and having a work function value less than or equal to a work function value of the N-type layer; depositing a reflective layer in electrical contact with the ohmic contact layer; depositing a first material barrier layer in electrical contact with the reflective layer; depositing a current carrying layer in electrical contact with the first material barrier layer; and depositing a second material barrier layer in electrical contact with the current carrying layer; preparing an N ohmic contact-reflective material in electrical contact with the N-type layer of each of the mesas by depositing and patterning an N-electrode metal that is received by the N-ohmic contact-reflective material and a P-electrode metal that is in electrical contact with the P-type layer of each of the mesas; depositing and patterning a dielectric material, said dielectric material insulating said P-type layer and said active region from said N ohmic contact-reflective material; having The method further comprises: depositing a first material migration suppression layer in electrical contact with the reflective layer and the first material barrier layer, and / or a second material migration suppression layer in electrical contact with the current carrying layer and the second material barrier layer. having The method of claim 1, wherein the first and second material migration suppression layers each independently comprise nickel (Ni) or palladium (Pd) and / or independently have a thickness in the range of 50 Å to 1000 Å.

12. 12. The method of claim 11, comprising depositing the N-ohmic contact-reflective material directly on the N-type layer.

13. the N-type layer comprises n-GaN; the ohmic contact layer comprises aluminum (Al), titanium (Ti), or aluminum-doped zinc oxide (AZO); the reflective layer comprises silver (Ag) or gold (Au); the first and second material barrier layers each independently comprise titanium (Ti), chromium (Cr), platinum (Pt), cobalt (Co), palladium (Pd), or tungsten (W); The method of claim 11 , wherein the current carrying layer comprises copper (Cu), gold (Au), or aluminum (Al).

14. The ohmic contact layer has a thickness in the range of 5 Å to 200 Å, The reflective layer has a thickness of 1000 Å or more; the first and second material barrier layers each independently have a thickness of 1000 Å or greater; The method of claim 11 , wherein the current carrying layer has a thickness of 5000 Å or greater.

15. depositing the ohmic contact layer in electrical contact with the P-type layer; depositing the reflective layer in electrical contact with the ohmic contact layer; depositing the first material barrier layer in electrical contact with the reflective layer; and depositing the current carrying layer in electrical contact with the first material barrier layer; Due to The method of claim 11 , wherein a P bonding material is prepared in contact with the P-type layer.

16. each of the mesas having at least one characteristic dimension less than 100 micrometers; The method of claim 11 , wherein the characteristic dimension is selected from the group consisting of height, width, and depth.

Images