Semiconductor Device
The semiconductor device configuration with a Schottky junctioned cathode electrode and controlled carrier concentration addresses the issue of recovery loss in semiconductor devices, achieving low electron injection and long electron lifetime without the need for lifetime killers.
Patent Information
- Application Number
- JP2022162428
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-10-07
- Publication Date
- 2025-05-20
- Estimated Expiration
- 2042-10-07
AI Technical Summary
Existing semiconductor devices face significant recovery loss due to high carrier concentrations, which is exacerbated by the need for large-scale equipment and complex processes to eliminate internal carriers using lifetime killers.
A semiconductor device configuration featuring a semiconductor substrate with an anode and cathode electrode, a P layer, and an N layer, where the cathode electrode is Schottky junctioned with the N layer, and the metal work function is in the range of 4.2 to 4.3, controlling electron injection and suppressing recovery loss without using a lifetime killer.
This configuration achieves a low electron injection and long electron lifetime structure, reducing recovery loss while maintaining a relatively small forward voltage drop, thereby improving the efficiency and performance of semiconductor devices.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device, and more particularly to reducing recovery loss. [Background technology]
[0002] Semiconductor devices use current control using PN junctions. A diode has a PN junction and allows current to flow from the anode on the P side to the cathode on the N side, blocking current in the opposite direction. When conducting, a large amount of carriers, holes from the anode and electrons from the cathode, are injected, lowering the forward voltage drop VF when conducting.
[0003] On the other hand, during recovery, the injected holes and electrons (carriers) are discharged to the anode and cathode, respectively, so if there is a large amount of carriers, the recovery loss Err becomes large.
[0004] Patent Document 1 discloses that a lifetime killer is provided to eliminate internal carriers, thereby speeding up the discharge of carriers. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] International Publication No. WO2017 / 146148 Summary of the Invention [Problem to be solved by the invention]
[0006] Here, the lifetime killer is provided by forming crystal defects in the semiconductor, and large-scale equipment and work processes are required for the treatment. [Means for solving the problem]
[0007] The semiconductor device according to the present disclosure includes a semiconductor substrate, an anode electrode formed on one surface of the semiconductor substrate, a cathode electrode formed on the other surface of the semiconductor substrate, a P layer formed on the anode electrode side in the semiconductor substrate, and Within Formed N layer An N layer formed entirely on the cathode electrode on one side and the P layer on the other side The cathode electrode and the N layer are Schottky junctioned, the cathode electrode is a metal having a work function in the range of 4.2 to 4.3, and the carrier concentration of the N layer is 1×e 12 ~1×e 18 / cm 3 The range is. Effect of the Invention
[0008] According to the semiconductor device according to the present disclosure, a low electron injection and long electron lifetime structure can be obtained without using a lifetime killer. [Brief description of the drawings]
[0009] [Figure 1] 1 is a schematic diagram showing a configuration of a semiconductor device according to an embodiment; [Diagram 2] The voltage and current waveforms during recovery of a typical diode are shown below. [Diagram 3] FIG. 1 is a diagram showing the relationship between the recovery loss Err and the forward voltage drop VF during coverage by the work function of a general diode. [Figure 4] 2 is a schematic diagram showing a state of injection of holes and electrons in the semiconductor device 10 of the present embodiment. FIG. [Diagram 5] FIG. 2 is a diagram showing energy levels of a Schottky junction. [Figure 6] 4 is a diagram showing a current waveform during recovery in the semiconductor device 10 according to the embodiment. FIG. [Figure 7] 1 is a diagram showing the electron density in the depth direction in the semiconductor device 10 when conductive. [Figure 8] FIG. 1 is a characteristic diagram showing the dependence of recovery loss Err and forward voltage drop VF on the work function of a metal. [Figure 9]FIG. 1 is a characteristic diagram showing the dependence of recovery loss Err and forward voltage drop VF on the doping carrier concentration of N-type carriers (impurities) in the N layer. [Figure 10] 1 is a diagram showing the relationship between recovery loss Err and forward voltage drop VF during recovery in the semiconductor device 10 according to the embodiment. [Figure 11] 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the following embodiments do not limit the present disclosure, and configurations obtained by selectively combining multiple examples are also included in the present disclosure.
[0011] "Configuration of Semiconductor Device" 1 is a schematic diagram showing the configuration of a semiconductor device according to an embodiment. The semiconductor device 10 includes a semiconductor substrate 12. The semiconductor substrate 12 is made of, for example, a silicon (Si) wafer, but may be made of other semiconductors such as SiC or gallium oxide. In this embodiment, an N-type FZ wafer by the FZ (Floating Zone) method doped with N-type carriers (impurities) is used.
[0012] Since an N-type semiconductor substrate 12 is used, most of the semiconductor substrate 12 becomes an N-layer 14. The N-layer 14 is usually called an N-drift layer. A P-layer 16 is formed on one side of the N-layer 14 by doping P-type carriers (impurities) from the surface on one side.
[0013] An anode electrode 20 is formed on one surface of the semiconductor base material 12, that is, on the P layer 16. The anode electrode 20 is preferably made of a metal such as aluminum.
[0014] A cathode electrode 22 is formed on the other surface (rear surface) of the semiconductor substrate 12, that is, on the other surface (rear surface) on the N layer 14. The cathode electrode 22 can also be made of a metal, similar to the anode electrode 20.
[0015] In this manner, in this embodiment, the cathode electrode 22 is in direct contact with the N layer 14, and the two are Schottky junctioned. The metal of the cathode electrode 22 may be Al (aluminum) or an Al-Si alloy (aluminum-silicon alloy), and the cathode electrode 22 may be formed with these as the main components.
[0016] The cathode electrode 22 is made of a metal having a work function in the range of 4.2 to 4.3, such as the metals described above, and the carrier concentration of the N layer 14 is 1×e 12 ~1×e 18 / cm 3 In other words, the semiconductor substrate The material for 12 is not limited to silicon, but may be SiC or gallium oxide, and the material for the cathode electrode 22 is not limited to aluminum or an aluminum alloy, but the difference in work function between them is selected to be 4.2 to 4.3.
[0017] This allows the amount of electrons injected from the cathode electrode 22 side into the N layer 14 to be appropriately controlled, suppressing recovery loss while maintaining the forward voltage drop VF of the semiconductor device 10, in this example a diode, relatively small.
[0018] The semiconductor device 10 according to this embodiment can be used as a diode as it is, but can also be used in various elements incorporating a diode.
[0019] "Recovery Waveform" Fig. 2 shows the voltage and current waveforms during recovery of a typical diode. First, when conducting, the voltage between the anode electrode 20 and the cathode electrode is a forward voltage drop VF, which is a predetermined small voltage when there are sufficient P-type and N-type carriers, and a predetermined current IF flows. In this example, the voltage Vrr is the cathode voltage.
[0020] Here, by applying a reverse voltage, the current IF decreases linearly. This is because holes are drawn from the N layer 14 through the P layer 16 to the anode electrode 20, and electrons are drawn to the cathode electrode 22. At this time, the current Irr once becomes significantly negative and then approaches 0, and the cathode voltage Vrr becomes significantly positive and then settles to the applied voltage.
[0021] The energy loss during recovery is Vrr*Irr*time, and the loss during the period from when Vrr becomes positive to when Irr becomes 0 is the recovery loss Err.
[0022] Figure 3 shows the relationship between the recovery loss Err and the forward voltage drop VF during recovery of a typical diode. As shown above, the forward voltage drop VF increases as the carrier concentration decreases. On the other hand, there is a trade-off between a high carrier concentration and the number of carriers remaining during recovery, which increases the recovery loss.
[0023] 4 is a schematic diagram showing the state of hole and electron injection in the semiconductor device 10 of this embodiment. In this manner, the amount of electron injection is suppressed by the Schottky junction between the cathode electrode 22 and the N layer 14. This makes it possible to obtain a low electron injection and long lifetime structure without using a lifetime killer.
[0024] 5 is a diagram showing the energy levels of a Schottky junction. In this way, an energy barrier is formed by the Schottky junction, which suppresses the injection of electrons into the semiconductor side.
[0025] 6 is a diagram showing a current waveform during recovery of the semiconductor device 10 according to the embodiment. The semiconductor device 10 according to the embodiment and a comparative example in which an N-type high-concentration carrier-doped layer is provided adjacent to the cathode electrode to form an ohmic junction (high electron injection) are shown. Thus, in this embodiment, it is understood that the current amount (Irr) during recovery can be reduced and recovery loss can be suppressed.
[0026] 7 is a diagram showing the electron density in the depth direction in the semiconductor device 10 when conductive. Note that, since the electron and hole densities are equal according to the charge neutrality law, FIG. 7 can also be said to show the hole density. As described above, it can be seen that, in this embodiment, electron injection from the cathode electrode 22 is suppressed. Note that the carrier concentration in the diagram shows the doping carrier concentration of the N layer 14.
[0027] Figure 8 is a characteristic diagram showing the dependence of recovery loss Err and forward voltage drop VF on the work function of a metal. As shown above, as the work function increases, the recovery loss decreases, but the forward voltage drop VF increases. It can be seen that both recovery loss Err and forward voltage drop VF are low when the work function is in the range of 4.2 to 4.3.
[0028] FIG. 9 is a characteristic diagram showing the dependence of the recovery loss Err and the forward voltage drop VF on the doping carrier concentration of the N-type carriers (impurities) in the N layer 14. When the carrier concentration becomes higher than a certain level, the forward voltage drop VF decreases, but the recovery loss Err increases. 18 / cm 3 It can be seen that both can be maintained in a stable state if the carrier concentration is below 1×e 12 It is preferable that the carrier concentration is 1×e 12 ~1×e 18 / cm 3 It is preferable that the range is within the range.
[0029] 10 is a diagram showing the relationship between the recovery loss Err and the forward voltage drop VF during recovery in the semiconductor device 10 according to the embodiment, and also shows the case of a general high electron injection and short lifetime as a comparative example. In this way, the semiconductor device 10 according to the present embodiment has a low electron injection and long lifetime structure, and can reduce the forward voltage drop VF and the recovery loss.
[0030] <Manufacturing process> 11 is a diagram showing a manufacturing process of the semiconductor device 10 according to the embodiment. First, a semiconductor substrate 12 is prepared (S11). As the semiconductor substrate 12, for example, an FZ (Floating Zone) silicon wafer of N type is used.
[0031] P-type impurities are doped (implanted) from the front surface side (S12), and then diffused to form a P-type P layer 16 (S12). Next, a contact is formed (S14), and a front surface electrode, i.e., an anode electrode 20, is formed on the front surface (S15).
[0032] Next, the back surface is polished (S16), and a back surface electrode, that is, a cathode electrode 22, is formed by depositing metal (S17).
[0033] That is, the cathode electrode 22 is formed directly on the N layer 14, and a Schottky junction is formed thereon.
[0034] In this manner, the semiconductor device 10 is formed, and then various inspections are carried out on it (S18), and the manufacturing process is completed. [Explanation of symbols]
[0035] 10 semiconductor device, 12 semiconductor substrate, 14 N layer, 16 P layer, 20 anode electrode, 22 cathode electrode.
Claims
1. A semiconductor substrate; an anode electrode formed on one surface of the semiconductor substrate; a cathode electrode formed on the other surface of the semiconductor substrate; A P layer formed on the anode electrode side in the semiconductor substrate; an N-layer formed within the semiconductor substrate, the N-layer being formed entirely on the cathode electrode on one side and the P-layer being located on the other side; Including, The cathode electrode and the N layer are connected by a Schottky junction, The cathode electrode is a metal having a work function in the range of 4.2 to 4.3; The carrier concentration of the N layer is 1×e 12 1×e 18 / cm 3 In the range of Semiconductor device.
2. 2. The semiconductor device according to claim 1, The metal of the cathode electrode is mainly composed of aluminum or an aluminum-silicon alloy. Semiconductor device.
3. 3. The semiconductor device according to claim 1, The semiconductor substrate is made of a silicon wafer. Semiconductor device.
Citation Information
Patent Citations
Semiconductor device
JP2014063980A
Semiconductor device
WO2017146148A1