LED array

Abstract

To reduce the crosstalk.SOLUTION: A method of producing a light emitting diode (LED) array comprises: forming a plurality of layers (100, 101) of semiconductor material; forming a dielectric mask layer (104) over the plurality of layers, the dielectric mask layer having an array of holes through the dielectric mask layer each exposing an area of one of the layers of semiconductor material; and growing an LED structure (110, 112, 114) in each of the holes, which is arranged to emit light over a range of wavelengths. At least some (101) of the plurality layers form a distributed Bragg reflector arranged to reflect light of at least some of the range of wavelengths.SELECTED DRAWING: Figure 1c

Description

Technical Field

[0001] The present invention relates to a light emitting diode (LED) array and a method of manufacturing an LED array. In particular, but not exclusively, the present invention relates to an array of LEDs at the micrometer scale.

Background Art

[0002] There is a significantly increasing desire to develop group III nitride light emitting diodes (LEDs) at the micrometer scale, i.e., micro-sized LEDs (μLEDs), which are the main components for new generation displays and visible light communication (VLC) applications. Group III nitride μLEDs exhibit several unique features for display applications compared to organic light emitting diodes (OLEDs) and liquid crystal displays (LCDs). Unlike LCDs, III nitride microdisplays with μLEDs as the main component are self-emissive. Monochrome displays using μLEDs exhibit high resolution, high efficiency, and high contrast ratios. OLEDs are typically operated at current densities several orders of magnitude lower than semiconductor LEDs in order to maintain a reasonable lifetime. As a result, the luminance of OLEDs is very low, typically 3000 cd / m 2 for full-color displays, while group III nitride μLEDs are 10 5 cd / m 2Exhibit higher luminance above. Naturally, III-nitride μLEDs inherently exhibit a long operating life and chemical robustness in comparison with OLEDs. Therefore, III-nitride μLEDs are expected to potentially replace LCDs and OLEDs for high-resolution and high-brightness displays in a wide range of applications in the near future, such as smartphones. In addition to display applications, μLEDs exhibit a significantly reduced junction capacitance as a result of their reduced dimensions compared to wide-area LEDs, thus potentially leading to high-speed transmission with GHz modulation bandwidth in VLC applications. Currently, III-nitride μLEDs are fabricated solely by means of combining standard photolithography methods and subsequent dry etching processes on standard III-nitride LED wafers, which is the same as the fabrication of conventional wide-area LEDs with a typical device area of 300 μm × 300 μm or even larger. The only major difference in device fabrication between wide-area LEDs and μLEDs is due to the device dimensions. Typically, the diameter of μLEDs ranges from 50 μm down to a few micrometers. Current technologies are described, for example, in Z.Y. Fan, J.Y. Lin, and H.X. Jiang, J. Phys. D: Appl. Phys. 41, 094001 (2008); H.X. Jiang and J.Y. Lin, Optical Express 21, A476 (2013); and J. Day, J. Li, D.Y.C. Lie, C. Bradford, J.Y. Lin, and H.X. Jiang, Appl. Phys. Lett. 99, 031116 (2011).

[0003] Currently, there are significant challenges in using current μLEDs for VLC applications due to so-called crosstalk. When a single μLED is lit, neighboring μLEDs and regions appear to light up simultaneously, generating crosstalk. As an example, in the case of a multi-channel VLC system using a micro-pixelated μLED array as a transmitter, when a signal is sent from a single μLED along an optical channel, neighboring channels may carry the same signal due to optical crosstalk. The mechanism of crosstalk generation is complex and not yet fully understood. Generally speaking, two main mechanisms are described by H-Y Lin, C-W Sher, D-H Hsieh, X-Y Chen, H-M Philip Chen, T-M Chen, K-M Lau, C-H Chen, C-C Lin, and H-C Kuo, Photonics Research 5, 411 (2017); and as described by K.H. Li, Y.F. Cheung, W.S. Cheung, and H.W. Choi, Appl. Phys. Lett. 107, 171103 (2015), are accepted as the causes of this crosstalk problem. First, the light-emitting mechanism of μLEDs is due to the spontaneous emission process, which means that the light emitted from μLEDs is dispersed in all directions. The pitch of μLEDs (i.e., pixels) is typically on a scale ranging from a few micrometers to dozens of micrometers. As a result, the light emitted from the sidewalls of one μLED is expected to interact with the light from neighboring μLEDs, leading to interference and then crosstalk. Second, even if the sidewalls of all μLEDs in the array configuration are fully covered by an opaque coating, which should mean that the light emitted from the sidewalls of μLEDs is completely suppressed, the crosstalk problem still exists. This means that there is another channel through which the light emitted from one μLED can reach neighboring μLEDs. SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0004] III nitride LEDs are typically grown on sapphire. The refractive index of GaN is greater than 1 (the refractive index of air is 1), but less than that of sapphire, and naturally, this forms a waveguide within the GaN layer sandwiched between air and sapphire. Due to the total internal reflection (TIR) effect, only a small fraction (about 6%) of the emitted light can be extracted from the GaN surface into the air towards the upper surface, while most of the remaining emitted light (about 66%) is trapped within the GaN layer by TIR. This is determined by Snell's law. For a μLED array, only a small fraction of the emitted light is extracted from the upper surface in such a manner that it diverges into a light-emitting cone with a limited solid angle determined by Snell's law, while below the active region, most of the light emitted downward from the active region is confined within the GaN layer below the active region due to TIR. These confined emissions from all μLEDs will thus create channels in the GaN (potentially also in the sapphire) that act as waveguides. Therefore, the emissions from all μLEDs will interact or interfere with each other through the GaN waveguide. This corresponds to most of the emitted light from the μLEDs and is thus dominant in the crosstalk issue.

Means for Solving the Problem

[0005] The present invention provides a method for manufacturing a light-emitting diode (LED) array, comprising the steps of forming a plurality of layers of semiconductor material, and forming a dielectric mask layer covering the plurality of layers, the dielectric mask layer having an array of holes penetrating therethrough that each expose one area of the layers of semiconductor material, and growing, within each of the holes, an LED structure arranged and configured to emit light over a range of wavelengths, wherein at least a portion of the plurality of layers is configured to form a distributed Bragg reflector (DBR) that reflects at least a portion of the light in the range of wavelengths.

[0006] At least one of the plurality of layers may form an electrical contact that connects at least a portion of the LED structure together. The electrical contact may be formed between the DBR and the dielectric layer. The contact layer may be the upper layer of the semiconductor layer. The electrical contact may be formed from a doped semiconductor material such as an n-doped group III nitride material, such as n-GaN.

[0007] The step of forming the DBR is a step of forming at least 5 pairs of layers, or preferably at least 10 pairs of layers, each pair including a first layer of a first material and a second layer of a second material, and the two layers in each pair exhibit different refractive indices, and may include the step of forming. For example, the first and second materials may both include group III nitride materials of different compositions, such as different aluminum contents, which lead to differences in refractive indices.

[0008] One of each pair of layers may be electrochemically etched towards its original state so as to become porous, and thus may exhibit a refractive index much lower than that of GaN, and may be formed from a doped semiconductor material such as n-GaN. The other of each pair of layers may be formed from an undoped semiconductor material that remains unaffected during the electrochemical etching process.

[0009] The LED structure may be grown on the exposed area of the upper layer of the semiconductor layer. The growth is generally in the upward direction because growth from the dielectric sidewalls of the holes does not occur. The upward growth of the LED structure in the holes can therefore result in a layered LED structure, each of the layers being generally flat or planar and having a substantially constant thickness.

[0010] The semiconductor layer may be formed on a substrate of group III nitride such as GaN, or of sapphire, silicon (Si), silicon carbide (SiC), or glass.

[0011] The step of growing an LED structure within each of the holes may include the step of growing an n-type layer. The step of growing an LED structure within each of the holes may include the step of growing a prelayer within each of the holes. The step of growing an LED structure within each of the holes may include the step of growing at least one active layer within each of the holes. The step of growing an LED structure within each of the holes may include the step of growing a p-type layer within each of the holes. The at least one active layer may include at least one quantum well layer and may include a multiple quantum well layer. These may be formed from, for example, InGaN, or another suitable group III nitride material. The prelayer may be, for example, an InGaN layer with a low indium content and a typical thickness of <100 nm, or an InGaN / GaN superlattice with a low indium content (the total thickness of the superlattice is typically below 300 nm). The n-type layer and the p-type layer may further consist of a group III nitride material such as GaN, InGaN, or AlGaN.

[0012] Since each LED structure is grown within one of each of the holes, each LED structure is formed from a plurality of layers all having the same cross-sectional area equal to the cross-sectional area of the hole in which that LED structure is grown.

[0013] The at least one active layer may have an upper surface that is below the upper surface of the dielectric layer. If only one quantum well layer exists, the upper surface is the upper surface of that quantum well layer. If a plurality of quantum well layers exist, the upper surface is the upper surface of the uppermost quantum well layer. The upward direction may be defined as the direction of growth of the semiconductor layer and / or the LED structure.

[0014] The step of forming the dielectric mask layer may include the step of growing a layer of dielectric material and the step of etching an array of holes into the layer of dielectric material. Alternatively, the dielectric layer may be grown around the area where the holes will be formed later, for example, using a mask during the growth of the dielectric layer.

[0015] The method may further include etching each of the exposed regions of the semiconductor layer prior to the step of growing an LED structure in each of the holes.

[0016] The contact layer may be doped. For example, the contact layer may include a single layer of an n-type or p-type group III nitride material. Alternatively, the contact layer may include a first sub-layer and a second sub-layer, and the heterointerface between the first sub-layer and the second sub-layer is arranged and configured to form a two-dimensional charge carrier gas at the heterointerface. The sub-layers may form a buffer layer and a barrier layer. The two-dimensional charge carrier gas may be, for example, a two-dimensional electron gas (2DEG). A two-dimensional hole gas (2DHG) may further be used, but typically these have a lower charge carrier density and / or mobility. For example, a hetero-structure including a layer of GaN and a layer of AlGaN or InGaN, or more generally, two layers of AlGaN with different Al contents, or two layers of InGaN with different In contents, can form a 2DEG at the interface between the two layers, and it is well known that the electron density in the 2DEG varies depending on several factors including the Al content of the AlGaN layer or the In content of the InGaN layer. Other group III nitride heterointerfaces can be used with the same effect.

[0017] The present invention further provides an LED array including a plurality of semiconductor layers and a dielectric layer extending over the semiconductor layers and having an array of LED structures, wherein the LED structures extend through the dielectric layer and are arranged and configured to emit light over a range of wavelengths, and at least a portion of the plurality of layers form a distributed Bragg reflector (DBR) arranged and configured to reflect at least a portion of the light in the range of wavelengths.

[0018] The electrical contact layer can be between the DBR and the dielectric layer. This has the advantage that the current supplying power to the LED does not flow through the DBR structure, and thus that DBR structure does not need to be electrically conductive.

[0019] The LED array may further include an electrode formed on the contact layer. The method or LED array may further include any one or more features of the preferred embodiments of the invention described hereinafter with reference to the accompanying drawings, in any operable combination.

Brief Description of the Drawings

[0020]

Figure 1a

Figure 1b

Figure 1c

Figure 1d

Figure 2

Figure 3

Figure 4

Embodiments for Carrying Out the Invention

[0021] Referring to FIG. 1a, a lower semiconductor layer 100 of a group III nitride, or other suitable semiconductor, such as a standard undoped GaN (u-GaN) layer, is initially grown on a substrate 102. The substrate 102 can be a GaN substrate or any heterogeneous substrate such as sapphire, silicon (Si), silicon carbide (SiC), or even glass. The lower semiconductor layer 100 can be grown by means of any standard GaN growth method using either metalorganic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE), or any other suitable growth method. A plurality of additional layers 101 are grown above the lower layer 100. These layers are arranged and configured to form a distributed Bragg reflector (DBR) having alternating layers of two different materials as will be described in more detail below. An upper semiconductor layer 103 is grown above the DBR layer 101. This layer 103 is arranged and configured to form an electrical contact layer for the LED device and can be made of, for example, n-type GaN (n-GaN). The contact layer can have a thickness ranging from 50 nm to 10 μm. A dielectric layer 104, such as silicon dioxide (SiO ), or silicon nitride (SiN), or any other suitable dielectric material, is deposited on the upper semiconductor layer 103 by PECVD or any other suitable deposition method. The thickness of the dielectric layer can be within the range of 20 nm to 500 μm. 2 )

[0022] Referring to FIG. 1b, an array of holes 106 is then formed within the dielectric layer 104. The holes 106 are typically on the micrometer scale and are therefore referred to as microholes. This can be done by means of photolithography and then an etching process (which can be dry etching or wet etching). In forming the microholes 106, the dielectric layer 104 is etched through its entire thickness up to the upper surface of the upper semiconductor layer 103. If the holes 106 are rounded, they can have diameters from 1 μm to 500 μm, and the pitch distance, i.e., the distance between the centers of adjacent microholes, can be, for example, from 5 μm to 500 μm. Further etching of the upper semiconductor layer 103 can be carried out only within the microhole region using the remaining dielectric layer 104 as a mask. The n-GaN etching depth can be from zero (meaning no GaN etching) to 10 μm depending on the n-GaN layer thickness. Typically, the optimal etching method or conditions will be different for the upper semiconductor layer 103 than for the dielectric layer 104. For example, SF 6 etchant can be used to etch the dielectric layer 104 but will not etch the n-GaN layer 100. Therefore, it is easy to achieve etching all of the paths through the dielectric layer 104 and stopping at the upper surface of the upper semiconductor layer 103. This also has the advantage for the quality of the LED structure grown within the holes 106.

[0023] The holes 106 have a rounded cross-section in the embodiment shown, but other cross-sections, such as oval or square, can be used.

[0024] Next, referring to FIG. 1c, a standard III-nitride LED structure is grown over the exposed area of the upper semiconductor layer 103. However, since only discrete areas of the upper semiconductor layer 103 are exposed by the microholes 106 in the dielectric layer or mask, the LED structure is formed as an array of discrete LEDs 108 separated by the remaining portions of the dielectric layer 104 between the microholes 106. The LED structure 108 can be grown by either MOVPE or MBE methods, or any other suitable growth method. The growth occurs upward from the exposed area of GaN (or other semiconductor) of the upper layer 103 and not from the sidewalls of the holes 106. Therefore, a layered LED structure can be built inside each of the holes 106, and each of the layers is substantially flat or planar. The LED structure can include an n-GaN layer 110, an InGaN buffer layer, an active region 112, a thin p-type AlGaN layer as a blocking layer (not shown), and then a final p-doped GaN layer 114. The active region 112 can include an InGaN-based multiple quantum well (MQW). The buffer layer can be, for example, either an InGaN layer with a low indium content and a typical thickness of <100 nm, or an InGaN / GaN superlattice with a low indium content (the total thickness of the superlattice is typically below 300 nm). An example of the LED structure is described in more detail below with reference to FIG. 2. As described above, due to the dielectric mask 104, the LED structure forms a μLED array and can only be grown within the microholes 106 as shown in FIG. 1c. As shown, it can only be grown within the microholes 106.

[0025] It is important that the uppermost layer of the InGaN MQW112 should not spread above the upper surface of the dielectric layer 104, as spreading may cause a short-circuit effect after the template is fabricated as the final μLED array. Also, it is important that the overgrown n-GaN110 in each of the microhole regions should directly contact the upper semiconductor layer 103 in the unetched portion of the template below the dielectric mask 104 such that all individual μLEDs are electrically connected to each other by the upper semiconductor layer 103 of the unetched portion below the dielectric mask 104.

[0026] Referring to FIG. 1d, once the LED array structure is completed, further device fabrication is performed, including forming electrical contacts to the array. For example, an upper contact layer 116 can be formed over the dielectric mask layer 104 and over the upper p-GaN layer of the individual micro-LED devices 108. The upper contact layer 116 thus forms a p-contact to all of the LED devices 108. This p-contact can be a common p-contact to all of the LED devices 108 or can be formed as a plurality of separate regions each having a separate contact that contacts and is formed over one or more respective groups of the LED devices. This enables the LED devices 108 to be switched in groups and thus form an addressable array. The upper contact layer 116 can be formed from ITO or a Ni / Au alloy. An anode 118 can then be formed over the p-contact layer 116. For example, a portion of the dielectric layer 104 can be removed by etching, and then a portion of the LED structure over the etched dielectric layer section can be further etched down to the upper semiconductor layer 103, which exposes the region 122 of the n-GaN upper semiconductor layer 103, and a cathode 120 can be formed over that exposed region 122 of the n-GaN.

[0027] In the finished structure as shown in FIG. 1d, light is emitted from each of the LEDs 108 in all directions, but the DBR reflects the light emitted downward, thereby significantly increasing the proportion of light emitted upward. Generally, the DBR structure typically exhibits a very high reflectivity of more than 90%. Therefore, the DBR structure will significantly enhance the extraction efficiency, which means that most of the light emitted from individual micro-LEDs will be extracted from the surface, while a portion of the light emitted from the sidewalls of the micro-LEDs and a portion of the light confined within the GaN as a waveguide below the active region will be reduced, or even eliminated in the ideal case. By proper design (such as by properly designing the layer thickness of the micro-LEDs and the pitch of the micro-LEDs), an extraction efficiency approaching 100% can be obtained due to the photonic crystal effect (see Photonic Crystals: Molding the Flow of Light, by J.D. Joannopoulos, R.D. Meade, J.N. Winn, S.G. Johnson, Princeton University Press, 1995) and the microcavity effect. Crosstalk can, therefore, be significantly reduced or even substantially eliminated.

[0028] It will be recognized that various modifications to the embodiments described above are possible. For example, in one variation, the structure is reversed, the p-GaN layer is grown on the substrate, covered by a dielectric layer, then the p-GaN layer of the LED device 108 is first formed, followed by a multiple quantum well layer, and then an n-GaN layer. The n contact layer is then formed above the upper surface of the dielectric layer instead of the p contact layer, and the positions of the anode and cathode are reversed.

[0029] In the configuration of FIGS. 1a to 1d, the overgrown n-GaN 110 within the microholes 106 must coincide with the n-GaN of the unetched portion of the n-GaN upper semiconductor layer 103 below the dielectric mask 104 such that all individual μLEDs 108 are electrically connected to each other by the n-GaN layer 103. Instead of using the n-GaN of the unetched portion below the dielectric mask 104 as an electrically connected channel, in a further embodiment, a group III nitride heterostructure with a two-dimensional electron gas (2DEG) in a heterojunction is used as the semiconductor layer instead of the n-GaN layer. In this embodiment, a standard AlGaN / GaN HEMT structure is used. An electron gas (2DEG) with a high sheet carried density and a high electron mobility, formed at the interface between the AlGaN barrier and the GaN buffer of the high electron mobility transistor (HEMT) structure, is used as the electrically connected channel.

[0030] To fabricate such a device, a standard AlGaN / GaN HEMT structure is grown above the DBR layer. For example, a GaN layer forming a buffer layer can be grown above the DBR layer, and then an AlGaN layer forming a barrier layer can be grown on the GaN layer. This structure is referred to herein as a "grown state HEMT template". Subsequently, for example, SiO with a thickness in the range from 2 nm to 500 μm 2A dielectric layer, such as SiN or any other dielectric material, is deposited on the as-grown HEMT template by using PECVD or any other suitable deposition method. The resulting structure will be the same as the structure shown in FIG. 1a, but with an HEMT structure instead of the upper semiconductor layer 103. After that, by means of photolithography and then an etching process (which can be dry etching or wet etching), the dielectric layer is etched down to the surface of the HEMT structure to form an array of microholes within the dielectric layer. In that case, the microhole diameter can be from 1 μm to 500 μm, and the pitch distance between adjacent hole centers can be within the range of 5 μm to 500 μm. Within the microhole region, further etching of the as-grown HEMT can be carried out using the remaining region of the dielectric layer as a mask. The etching depth of the as-grown HEMT can be from zero (meaning no etching at all) to 10 μm, depending on the AlGaN barrier position of the as-grown HEMT template. However, generally, the etching will extend downward at least as far as the heterointerface between at least two layers of the as-grown HEMT structure to provide good electrical contact between each of the LED structures and the 2DEG.

[0031] Next, a standard III-nitride LED structure is grown on the HEMT template patterned with dielectric masks characterized by microholes by either MOVPE or MBE method, or any other epitaxial method, as described above with reference to FIG. 1c for example, and contacts are provided as described above with reference to FIG. 1d for example. Similar to the embodiments of FIGS. 1a to 1d, the important point is that the upper surface of the InGaN MQW 212 should be below the upper surface of the dielectric layer 204 after being fabricated as the final μLED array to avoid the short-circuit effect.

[0032] Referring to FIG. 2, the LED structures within the LED array of FIGS. 1a - 1d can have any suitable structure. In one example, those LED structures can include an n - GaN layer 210, an InGaN preliminary layer 216 formed above the n - GaN layer 210, several InGaN quantum well layers 212 formed above the preliminary layer 216, a p - doped blocking layer 218, such as p - AlGaN, and then a p - GaN layer 214. It will be recognized that this structure can be varied in several ways. As pointed out above as, the upper surface of the uppermost one of the quantum well layers 212 is preferably below the upper surface of the dielectric layer. The upper surface of the blocking layer 218 is more preferably further below the upper surface of the dielectric layer.

[0033] Referring to FIG. 3, as described above, the DBR layer 101 includes alternating layers 101a, 101b of two different materials having different refractive indices so that light from the LED is reflected at the interfaces between the layers 101. The principle of DBR is well known and thus will not be described in detail. The layers 101a, 101b are of approximately equal thickness, and this thickness is approximately one - quarter of the wavelength of the light (within the material of the DBR layer) that is reflected to produce constructive interference of the reflected light and destructive interference of the transmitted light.

[0034] The DBR structure 101 can be based on an Al(Ga)N / GaN system, which means several pairs of alternating Al(Ga)N and GaN layers grown by MOVPE or MBE, or any other growth method. Alternatively, the DBR structure can include several pairs of alternating GaN and nanoporous GaN layers. To create this structure, several pairs of alternating n-doped GaN and undoped GaN layers can be prepared by MOVPE or MBE, or any other growth method, and then standard electrochemical (EC) etching is performed. The mechanism of EC etching is based on a combination of an oxidation process and a subsequent dissolution process in an acidic solution under an anodic bias, as described in Y. Hou, Z. Ahmed Syed, L. Jiu, J. Bai, and T. Wang, Appl. Phys. Lett. 111, 203901 (2017). Under a positive anodic bias, the injection current will flow through the conductive n-doped GaN portion, which leads to the oxidation of the n-doped GaN, and the oxidized layer is then chemically dissolved in the acidic electrolyte, which converts the n-doped GaN to nanoporous GaN. Therefore, EC etching can be performed only on n-type GaN due to its good conductivity, while non-conductive undoped GaN remains unetched.

[0035] Referring to FIG. 4, the reflectivity of the DBR is a function of wavelength, but typically, the DBR can be arranged and configured to have a relatively wide range of wavelengths, a stop band 400, over which almost total reflection can be achieved. For either the Al(Ga)N / GaN DBR or the GaN and nanoporous GaN DBR, the stop band can be adjusted to cover a wide spectral range from the infrared through the entire visible to the ultraviolet. The reflectivity is further a function of the angle of incidence of light on the DBR, but in the LED array described above, the main function of the DBR is to reflect the light emitted downward by 180° and return it in the upward direction, and thus the DBR can be designed to achieve this.

[0036] The reflectivity of the DBR increases with the number of pairs of layers 101a and 101b. Therefore, the DBR structure can have at least 5 pairs of layers, and more preferably at least 10 pairs of layers.

[0037] LED 108 will each emit light over a certain wavelength range. That wavelength range can be selected, among other things, by choosing the cross-sectional area of LED 108. For example, LEDs grown as described above have been shown to have peak wavelengths in the red part of the spectrum when the diameter of those LEDs is about 30 μm, in the green part of the spectrum when the diameter of those LEDs is about 20 μm, and in the blue part of the spectrum when the diameter of those LEDs is about 10 μm. If all the LEDs have the same electroluminescence spectrum, the DBR can be arranged to have a stop band centered on, or at least including, the peak wavelength of the LEDs. When the LEDs are designed to have different electroluminescence spectra with different peak wavelengths, the DBR can be optimized to give the best overall reflectivity for the different LEDs.

Claims

1. 1. A method for manufacturing a light emitting diode (LED) array, comprising: forming a distributed Bragg reflector (DBR) configured to reflect at least a portion of a range of wavelengths of light; forming an upper semiconductor layer extending over the DBR; forming a dielectric mask layer overlying the top semiconductor layer, the dielectric mask layer having an array of holes extending therethrough, each of the array of holes exposing an area of ​​the top semiconductor layer; growing an LED structure on the exposed areas of the top semiconductor layer in each of the array of holes, the LED structure being configured to emit light over the range of wavelengths, each of the LED structures comprising an active region that does not extend above a top surface of the dielectric mask layer; The method includes:

2. The method of claim 1 , wherein the top semiconductor layer forms electrical contacts that connect together at least some of the LED structures.

3. The method of claim 2 , wherein the electrical contact is formed between the DBR and the dielectric mask layer.

4. 4. The method according to claim 2 or 3, wherein the electrical contacts are formed by doped semiconductor material.

5. The method of claim 1 , wherein forming the DBR comprises forming a plurality of layers of semiconductor material.

6. 5. The method of claim 1, wherein forming the DBR comprises forming at least two pairs of layers, each pair including a first layer of a first material and a second layer of a second material.

7. 7. The method of claim 6, wherein one of the layers of each pair is formed of a doped semiconductor material and is electrochemically etched to increase the porosity of said doped semiconductor material.

8. The method of claim 7 , wherein the other of each pair of layers is formed from an undoped semiconductor material.

9. The dielectric mask layer is made of silicon dioxide (SiO ２ 9. The method of claim 1 , comprising:

10. The method of claim 1 , wherein the dielectric mask layer comprises silicon nitride (SiN).

11. The step of forming a dielectric mask layer comprises: forming a layer of dielectric material overlying the upper semiconductor layer; etching said holes through said layer of dielectric material to form said dielectric mask layer; The method of any one of claims 1 to 10, comprising:

12. a distributed Bragg reflector (DBR) configured to reflect at least a portion of a range of wavelengths of light; an upper semiconductor layer extending over the DBR; a dielectric mask layer extending over the top semiconductor layer, the dielectric mask layer having an array of holes extending therethrough, each of the array of holes exposing an area of ​​the top semiconductor layer; an array of LED structures extending through the dielectric mask layer and configured to emit light over the range of wavelengths, each of the LED structures being formed in one of the holes over a corresponding exposed area of ​​the upper semiconductor layer, each of the LED structures comprising an active region that does not extend above a top surface of the dielectric mask layer; An LED array comprising:

13. 13. The LED array of claim 12, wherein the top semiconductor layer forms an electrical contact layer that connects together at least some of the LED structures.

14. 14. The LED array of claim 13, wherein the top semiconductor layer is formed between the DBR and the dielectric mask layer.

15. 15. The LED array of claim 13 or claim 14, further comprising an electrode formed on the electrical contact layer.

16. 16. The LED array of claim 13, wherein the electrical contact layer comprises a doped semiconductor material.

17. 17. The LED array of claim 12, wherein the DBR comprises multiple layers of semiconductor material.

18. 18. The LED array of claim 12, wherein the DBR comprises at least two pairs of layers, each pair comprising a first layer of a first material and a second layer of a second material.

19. 20. The LED array of claim 18, wherein one of the layers of each pair is formed of a doped semiconductor material and is electrochemically etched to increase the porosity of the doped semiconductor material.

20. 20. The LED array of claim 19, wherein the other of each pair of layers is formed from an undoped semiconductor material.

21. The dielectric mask layer is made of silicon dioxide (SiO ２ 21. The LED array of claim 12, comprising:

22. 22. The LED array of claim 12, wherein the dielectric mask layer comprises silicon nitride (SiN).

23. The dielectric mask layer comprises: forming a layer of dielectric material overlying the upper semiconductor layer; and Etching the holes through the layer of dielectric material to form the dielectric mask layer.

23. The LED array of claim 12, wherein the LED array is formed by:

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