Stacked Structure and Semiconductor Device

Abstract

The present invention provides: a multilayer structure which is ameliorated in terms of crystal defects caused by stress concentration within a semiconductor layer due to an insulating film; and a semiconductor device which uses this multilayer structure. A multilayer structure which is obtained by superposing an insulating layer on a part of a semiconductor film, wherein: the semiconductor film contains a crystalline oxide semiconductor that has a corundum structure and contains one or more metals selected from among group 9 and group 13 elements of the periodic table; and the insulating film has a taper angle of 20° or less.

Description

Technical Field

[0001] The present invention relates to a laminated structure useful for power devices and the like, and a semiconductor device using the laminated structure.

Background Art

[0002] Gallium oxide (Ga 2 O 3 ) has a wide bandgap of 4.8 - 5.3 eV at room temperature and is a transparent semiconductor that hardly absorbs visible light and ultraviolet light. Therefore, it is a promising material especially for use in optoelectronic devices operating in the deep ultraviolet region and transparent electronics. In recent years, the development of photodetectors, light-emitting diodes (LEDs), and transistors based on gallium oxide (Ga 2 O 3 ) has been carried out (see Non-Patent Document 1).

[0003] In addition, gallium oxide (Ga 2 O 3 ) has five crystal structures: α, β, γ, σ, and ε. Generally, the most stable structure is β-Ga 2 O 3 . However, since β-Ga 2 O 3 has a β-gallia structure, it is generally different from the crystal systems used in electronic materials and the like, and its use in semiconductor devices is not necessarily suitable. Also, since the growth of β-Ga 2 O 3 thin films requires a high substrate temperature and a high degree of vacuum, there is also a problem that the manufacturing cost increases. Further, as described in Non-Patent Document 2, in β-Ga 2 O 3 , even a dopant (Si) with a high concentration (for example, 1×10 19 / cm 3 or more) could not be used as a donor without annealing treatment at a high temperature of 800°C to 1100°C after ion implantation. On the other hand, α-Ga 2 O 3Since it has the same crystal structure as the already widely used sapphire substrate, it is suitable for use in optoelectronic devices. Furthermore, since it has a wider bandgap than β-Ga 2 O 3 it is particularly useful for power devices. Therefore, there is a situation where a semiconductor device using α-Ga 2 O 3 as a semiconductor is eagerly awaited.

[0004] Patent Documents 1 and 2 describe a semiconductor device that uses β-Ga 2 O 3 as a semiconductor and uses a two-layer structure consisting of a Ti layer and an Au layer, a three-layer structure consisting of a Ti layer, an Al layer, and an Au layer, or a four-layer structure consisting of a Ti layer, an Al layer, a Ni layer, and an Au layer as an electrode that can obtain ohmic characteristics compatible with it. In addition, Patent Document 3 describes a semiconductor device that uses β-Ga 2 O 3 as a semiconductor and uses any one of Au, Pt, or a laminate of Ni and Au as an electrode that can obtain Schottky characteristics compatible with it. However, when the electrodes described in Patent Documents 1 to 3 are applied to a semiconductor device using α-Ga 2 O 3 as a semiconductor, there are problems such as not functioning as a Schottky electrode or an ohmic electrode, the electrode not bonding to the film, or the semiconductor characteristics being impaired. Furthermore, the electrode configurations described in Patent Documents 1 to 3 have not been able to obtain a practically satisfactory semiconductor device, such as leakage current occurring from the electrode ends.

[0005] In Patent Document 4, a semiconductor device that uses α-Ga 2 O 3 as a semiconductor and uses an electrode containing at least one metal selected from Groups 4 to 9 of the periodic table as a Schottky electrode has been studied. Note that Patent Document 4 relates to a patent application by the present applicant.

[0006] Also, α-Ga 2 O 3Semiconductor devices using a field insulating film to exhibit semiconductor characteristics (such as breakdown voltage) have also been studied (Patent Document 4). However, crystal defects due to stress concentration occur in the semiconductor layer of α-Ga 2 O 3 under the edge of the field insulating film, and there are problems such as the depletion layer not extending due to these crystal defects.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Non-Patent Documents

[0008]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

[0009] An object of the present invention is to provide a laminated structure in which crystal defects due to stress concentration in a semiconductor film under an end portion of an insulator film are improved. [Means for Solving the Problems]

[0010] As a result of intensive studies to achieve the above object, the present inventors have found that a laminated structure in which an insulator film is laminated on a part of a semiconductor film, the semiconductor film has a corundum structure, and contains a crystalline oxide semiconductor containing one or more metals selected from Group 9 and Group 13 of the periodic table, and the insulator film has a taper angle of 20° or less, has no crystal defects due to stress concentration in the semiconductor film under the end portion of the insulator film. When such a laminated structure is used in a semiconductor device, a depletion layer can be favorably extended in the semiconductor layer, and a low-loss semiconductor device with suppressed leakage current can be obtained, and it has been found that the above-described conventional problems can be solved all at once. Further, after obtaining the above findings, the present inventors have further repeated studies and completed the present invention.

[0011] That is, the present invention relates to the following inventions. [1] A laminated structure in which an insulator film is laminated on a part of a semiconductor film, the semiconductor film has a corundum structure, and contains a crystalline oxide semiconductor containing one or more metals selected from Group 9 and Group 13 of the periodic table, and the insulator film has a taper angle of 20° or less. [2] The laminated structure according to [1], wherein the crystalline oxide semiconductor contains a Group 13 metal of the periodic table. [3] The laminated structure according to [1] or [2], wherein the crystalline oxide semiconductor contains at least one metal selected from aluminum, indium, and gallium. [4] The laminated structure according to any one of [1] to [3] above, wherein the crystalline oxide semiconductor contains at least gallium. [5] The laminated structure according to any one of [1] to [4] above, wherein the insulator film has a taper angle of 10° or less. [6] The laminated structure according to any one of [1] to [5] above, wherein the film thickness of at least a part of the insulator film is 1 μm or more. [7] A semiconductor device comprising at least the laminated structure according to any one of [1] to [6] above and an electrode. [8] The semiconductor device according to [7] above, which is a power device. [9] The semiconductor device according to [7] or [8] above, which is a Schottky barrier diode.

[10] A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of [7] to [9] above. [Advantages of the Invention]

[0012] In the laminated structure of the present invention, crystal defects due to stress concentration in the semiconductor film under the end portion of the insulator film are improved. [Brief Description of the Drawings]

[0013]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Embodiments for Carrying Out the Invention

[0014] The laminated structure of the present invention is a laminated structure in which an insulator film is laminated on a part of a semiconductor film, the semiconductor film has a corundum structure, and contains a crystalline oxide semiconductor containing one or more metals selected from Group 9 and Group 13 of the periodic table, and the insulator film is characterized by having a taper angle of 20° or less. Here, the taper angle refers to the inclination angle formed by the side surface (the surface facing the surface of the insulator film in contact with the semiconductor film) and the bottom surface (the surface of the insulator film in contact with the semiconductor film) of the taper portion when the taper portion is observed from a direction perpendicular to its cross-section (a plane perpendicular to the surface of the insulator film).

[0015] The insulator film is not particularly limited as long as it has insulating properties and may be a known insulator film. In the present invention, it is preferably a film containing Si or Al, and more preferably a film containing Si. As the film containing Si, a silicon oxide-based film is a preferred example. As the silicon oxide-based film, for example, SiO 2 film, phosphorus-doped SiO 2 (PSG) film, boron-doped SiO 2 film, phosphorus-boron-doped SiO 2Examples include a film (BPSG film), a SiOC film, a SiOF film, etc. Examples of the film containing Al include, for example, an Al 2 O 3 film, an AlGaO film, an InAlGaO film, an AlInZnGaO 4 film, an AlN film, etc. The method for forming the insulator film is not particularly limited, and examples include a CVD method, an atmospheric pressure CVD method, a plasma CVD method, a mist CVD method, a sputtering method, etc. In the present invention, it is preferable that the method for forming the insulator film is a mist CVD method, a plasma CVD method, or an atmospheric pressure CVD method. Also, the film thickness of the insulator film is not particularly limited, but it is preferable that at least a part of the film thickness of the insulator film is 1 μm or more. According to the present invention, even when such a thick insulator film is laminated on the semiconductor layer, a laminated structure without crystal defects due to stress concentration in the semiconductor layer can be more preferably obtained.

[0016] The insulator film has a taper angle of 20° or less, but the means for forming such a taper angle is not particularly limited, and in the present invention, the taper angle can be formed according to a conventional method. Examples of suitable means for forming the taper angle include, for example, forming a thin film having a faster etching rate than the insulator film on the insulator film, then applying a resist on the thin film, and forming the taper angle by photolithography and etching. Also, in the present invention, it is preferable that the taper angle is 10° or less. In the present invention, the lower limit of the taper angle is not particularly limited, but is preferably 0.2°, more preferably 1.0°, and most preferably 2.2°.

[0017] The semiconductor film (hereinafter also referred to as "semiconductor layer") has a corundum structure and is not particularly limited as long as it contains a crystalline oxide semiconductor containing one or more metals selected from Group 9 (e.g., cobalt, rhodium, or iridium, etc.) and Group 13 (e.g., aluminum, gallium, or indium, etc.) of the periodic table. Examples of the crystalline oxide semiconductor include metal oxides containing one or more metals selected from aluminum, gallium, indium, rhodium, cobalt, and iridium. Further, the semiconductor layer preferably contains a crystalline oxide semiconductor as a main component. In the present invention, the crystalline oxide semiconductor preferably contains a Group 13 metal of the periodic table, more preferably contains at least one metal selected from aluminum, indium, and gallium, and most preferably contains at least gallium. Note that the "main component" means that the crystalline oxide semiconductor is preferably contained in an atomic ratio of 50% or more, more preferably 70% or more, still more preferably 90% or more, and may be 100% with respect to all components of the semiconductor layer. Also, the thickness of the semiconductor layer is not particularly limited and may be 1 μm or less or 1 μm or more. However, in the present invention, it is preferably 1 μm or more, and more preferably 10 μm or more. The surface area of the semiconductor film is not particularly limited, but it may be 1 mm 2 or more, or it may be 1 mm 2 or less. However, it is preferably 10 mm 2 to 300 cm 2 , and more preferably 100 mm 2 to 100 cm 2 . Also, the semiconductor layer is usually single crystal, but it may be polycrystalline. Further, the semiconductor layer is a multilayer film including at least a first semiconductor layer and a second semiconductor layer. When a Schottky electrode is provided on the first semiconductor layer, it is also preferable that the carrier density of the first semiconductor layer is smaller than the carrier density of the second semiconductor layer. In this case, the second semiconductor layer usually contains a dopant, and the carrier density of the semiconductor layer can be appropriately set by adjusting the doping amount.

[0018] The semiconductor layer preferably contains a dopant. The dopant is not particularly limited and may be a known one. Examples of the dopant include n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or p-type dopants such as magnesium, calcium, zinc, etc. In the present invention, the n-type dopant is preferably Sn, Ge, or Si. The content of the dopant is preferably 0.00001 atomic% or more in the composition of the semiconductor layer, more preferably 0.00001 atomic% to 20 atomic%, and most preferably 0.00001 atomic% to 10 atomic%. More specifically, the concentration of the dopant is usually about 1×10 16 / cm 3 ~1×10 22 / cm 3 It may be, or the concentration of the dopant may be, for example, about 1×10 17 / cm 3 or less at a low concentration. Further, according to the present invention, the dopant may be contained at a high concentration of about 1×10 20 / cm 3 or more. Also, the concentration of the fixed charges in the semiconductor layer is not particularly limited, but in the present invention, it is preferably 1×10 17 / cm 3 or less because the semiconductor layer can better form a depletion layer.

[0019] The semiconductor layer may be formed by known means. Examples of the means for forming the semiconductor layer include, for example, CVD method, MOCVD method, MOVPE method, mist CVD method, mist epitaxy method, MBE method, HVPE method, pulse growth method, or ALD method. In the present invention, it is preferable that the means for forming the semiconductor layer is the mist CVD method or the mist epitaxy method. In the mist CVD method or the mist epitaxy method, for example, a raw material solution is atomized (atomization step), the droplets are suspended, and after atomization, the obtained atomized droplets are transported to the substrate with a carrier gas (transport step), and then the atomized droplets are thermally reacted in the vicinity of the substrate to form a semiconductor layer by laminating a semiconductor film mainly containing a crystalline oxide semiconductor on the substrate (film formation step).

[0020] (Atomization step) In the atomization step, the raw material solution is atomized. The atomization means of the raw material solution is not particularly limited as long as it can atomize the raw material solution and may be a known means. In the present invention, atomization means using ultrasonic waves is preferable. The atomized droplets obtained by using ultrasonic waves have an initial velocity of zero and float in the air, so they are preferable. For example, instead of spraying like a spray, they are a mist that can float in space and be transported as a gas, so there is no damage due to collision energy, which is very suitable. The droplet size is not particularly limited and may be droplets of about several mm, but is preferably 50 μm or less, and more preferably 100 nm to 10 μm.

[0021] (Raw material solution) The raw material solution is not particularly limited as long as it can be atomized or made into droplets and contains a raw material capable of forming a semiconductor film, and may be an inorganic material or an organic material. In the present invention, it is preferable that the raw material is a metal or a metal compound, and it is more preferable to contain one or more metals selected from aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, and iridium.

[0022] In the present invention, as the raw material solution, those obtained by dissolving or dispersing the metal in an organic solvent or water in the form of a complex or a salt can be preferably used. Examples of the form of the complex include acetylacetonate complex, carbonyl complex, ammine complex, hydride complex, etc. Examples of the form of the salt include organometallic salts (e.g., metal acetates, metal oxalates, metal citrates, etc.), metal sulfide salts, metal nitrate salts, metal phosphate salts, metal halide salts (e.g., metal chloride salts, metal bromide salts, metal iodide salts, etc.).

[0023] In addition, it is preferable to mix additives such as hydrohalic acids and oxidants into the raw material solution. Examples of the hydrohalic acid include hydrobromic acid, hydrochloric acid, hydroiodic acid, etc. Among them, hydrobromic acid or hydroiodic acid is preferable because the generation of abnormal grains can be more efficiently suppressed. Examples of the oxidant include peroxides such as hydrogen peroxide (H 2 O 2 ), sodium peroxide (Na 2 O 2 ), barium peroxide (BaO 2 ), benzoyl peroxide (C 6 H 5 CO) 2 O 2 ), hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, organic peroxides such as peracetic acid and nitrobenzene, etc.

[0024] The raw material solution may contain a dopant. By including a dopant in the raw material solution, doping can be performed well. The dopant is not particularly limited as long as it does not inhibit the object of the present invention. Examples of the dopant include n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium or niobium, or p-type dopants such as Mg, H, Li, Na, K, Rb, Cs, Fr, Be, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag, Au, Zn, Cd, Hg, Ti, Pb, N, or P. The content of the dopant is appropriately set by using a calibration curve showing the relationship between the concentration of the dopant in the raw material and the desired carrier density.

[0025] The solvent of the raw material solution is not particularly limited and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In the present invention, it is preferable that the solvent contains water, and more preferably, it is water or a mixed solvent of water and alcohol.

[0026] (Transportation step) In the transportation step, the atomized droplets are transported into the film formation chamber with a carrier gas. The carrier gas is not particularly limited as long as it does not inhibit the object of the present invention. For example, oxygen, ozone, an inert gas such as nitrogen or argon, or a reducing gas such as hydrogen gas or forming gas are preferable examples. Also, the type of the carrier gas may be one type, but may also be two or more types. A dilution gas with a reduced flow rate (e.g., 10-fold dilution gas, etc.) may be further used as the second carrier gas. Also, the supply location of the carrier gas is not limited to only one location, but may be two or more locations. The flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 L / min, and more preferably 1 to 10 L / min. In the case of the dilution gas, the flow rate of the dilution gas is preferably 0.001 to 2 L / min, and more preferably 0.1 to 1 L / min.

[0027] (Film formation step) In the film formation process, the semiconductor film is formed on the substrate by thermally reacting the atomized droplets in the vicinity of the substrate. The thermal reaction may be simply achieved by heating the atomized droplets to react, and the reaction conditions and the like are not particularly limited as long as they do not impede the object of the present invention. In this process, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent, but preferably at a temperature not too high (for example, 1000 ° C) or lower, more preferably 650 ° C or lower, and most preferably 300 ° C to 650 ° C. Further, the thermal reaction may be carried out under any atmosphere of vacuum, non-oxygen atmosphere (for example, inert gas atmosphere, etc.), reducing gas atmosphere and oxygen atmosphere as long as it does not impede the object of the present invention, but it is preferably carried out under an inert gas atmosphere or an oxygen atmosphere. Further, it may be carried out under any conditions of atmospheric pressure, increased pressure and reduced pressure, but in the present invention, it is preferably carried out under atmospheric pressure. Note that the film thickness can be set by adjusting the film formation time.

[0028] (Substrate) The substrate is not particularly limited as long as it can support the semiconductor film. The material of the substrate is also not particularly limited as long as it does not impede the object of the present invention, and it may be a known substrate, an organic compound, or an inorganic compound. The shape of the substrate may be any shape and is effective for any shape. For example, plate-like shapes such as flat plates and disks, fibrous shapes, rod-like shapes, cylindrical shapes, prismatic shapes, tubular shapes, spiral shapes, spherical shapes, ring shapes, etc. may be mentioned. In the present invention, a substrate is preferred. The thickness of the substrate is not particularly limited in the present invention.

[0029] The substrate is plate-shaped and is not particularly limited as long as it serves as a support for the semiconductor film. It may be an insulator substrate, a semiconductor substrate, a metal substrate, or a conductive substrate, but it is preferably an insulator substrate and also preferably a substrate having a metal film on its surface. Examples of the substrate include a base substrate mainly containing a substrate material having a corundum structure, a base substrate mainly containing a substrate material having a β-gallium structure, and a base substrate mainly containing a substrate material having a hexagonal crystal structure. Here, "main component" means that the substrate material having the specific crystal structure is preferably contained at 50% or more, more preferably 70% or more, still more preferably 90% or more, and may be 100% in terms of atomic ratio with respect to all components of the substrate material.

[0030] The substrate material is not particularly limited as long as it does not inhibit the object of the present invention and may be a known one. Examples of the substrate material having a corundum structure include, for example, α-Al 2 O 3 (sapphire substrate) or α-Ga 2 O 3 are preferably cited, and a-plane sapphire substrate, m-plane sapphire substrate, r-plane sapphire substrate, c-plane sapphire substrate, and α-type gallium oxide substrate (a-plane, m-plane, or r-plane) are more preferred examples. Examples of the base substrate mainly containing a substrate material having a β-gallium structure include, for example, β-Ga 2 O 3 substrate, or a mixed crystal substrate containing Ga 2 O 3 and Al 2 O 3 and in which Al 2 O 3 is more than 0 wt% and 60 wt% or less. Examples of the base substrate mainly containing a substrate material having a hexagonal crystal structure include, for example, SiC substrate, ZnO substrate, GaN substrate, and the like.

[0031] In the present invention, annealing treatment may be performed after the film formation step. The annealing treatment temperature is not particularly limited as long as it does not inhibit the object of the present invention, and is usually 300°C to 650°C, preferably 350°C to 550°C. Further, the annealing treatment time is usually 1 minute to 48 hours, preferably 10 minutes to 24 hours, and more preferably 30 minutes to 12 hours. Note that the annealing treatment may be performed in any atmosphere as long as it does not inhibit the object of the present invention. It may be under a non-oxygen atmosphere or an oxygen atmosphere. Examples of the non-oxygen atmosphere include an inert gas atmosphere (for example, a nitrogen atmosphere) or a reducing gas atmosphere, etc. In the present invention, an inert gas atmosphere is preferable, and a nitrogen atmosphere is more preferable.

[0032] In the present invention, the semiconductor film may be provided directly on the substrate, or the semiconductor film may be provided via other layers such as a stress relaxation layer (for example, a buffer layer, an ELO layer, etc.), a sacrificial layer for peeling, etc. The forming means of each layer is not particularly limited and may be a known means, but in the present invention, the mist CVD method is preferable.

[0033] In the present invention, after using known means such as peeling the laminated structure from the substrate or the like, it may be used for a semiconductor device, or it may be directly used for a semiconductor device.

[0034] The above-mentioned electrode (hereinafter also referred to as "electrode layer") has conductivity and is not particularly limited as long as it can be used as an electrode and does not inhibit the object of the present invention. The constituent material of the electrode layer may be a conductive inorganic material or a conductive organic material. In the present invention, it is preferable that the material of the electrode is a metal. As the metal, preferably, for example, at least one metal selected from Groups 4 to 10 of the periodic table can be mentioned. Examples of the metal of Group 4 of the periodic table include titanium (Ti), zirconium (Zr), hafnium (Hf), etc. Examples of the metal of Group 5 of the periodic table include vanadium (V), niobium (Nb), tantalum (Ta), etc. Examples of the metal of Group 6 of the periodic table include chromium (Cr), molybdenum (Mo), and tungsten (W), etc. Examples of the metal of Group 7 of the periodic table include manganese (Mn), technetium (Tc), rhenium (Re), etc. Examples of the metal of Group 8 of the periodic table include iron (Fe), ruthenium (Ru), osmium (Os), etc. Examples of the metal of Group 9 of the periodic table include cobalt (Co), rhodium (Rh), iridium (Ir), etc. Examples of the metal of Group 10 of the periodic table include nickel (Ni), palladium (Pd), platinum (Pt), etc. In the present invention, it is preferable that the electrode layer contains at least one metal selected from Groups 4 and 9 of the periodic table, and more preferably contains a metal of Group 9 of the periodic table. The layer thickness of the electrode layer is not particularly limited, but is preferably 0.1 nm to 10 μm, more preferably 5 nm to 500 nm, and most preferably 10 nm to 200 nm. Also, in the present invention, it is preferable that the electrode layer is composed of two or more layers having different compositions from each other. By configuring the electrode layer in such a preferable structure, not only can a semiconductor device with more excellent Schottky characteristics be obtained, but also the effect of suppressing leakage current can be more favorably exhibited.

[0035] When the electrode layer is composed of two or more layers including a first electrode layer and a second electrode layer, the second electrode layer preferably has conductivity and a higher conductivity than the first electrode layer. The constituent material of the second electrode layer may be a conductive inorganic material or a conductive organic material. In the present invention, the material of the second electrode is preferably a metal. In the present invention, the material of the second electrode is preferably a metal. As the metal, preferably, for example, at least one metal selected from Group 8 to Group 13 of the periodic table can be mentioned. As the metals of Group 8 to Group 10 of the periodic table, the metals respectively exemplified as the metals of Group 8 to Group 10 of the periodic table in the description of the electrode layer can be mentioned. As the Group 11 metal of the periodic table, for example, copper (Cu), silver (Ag), gold (Au), etc. can be mentioned. As the Group 12 metal of the periodic table, for example, zinc (ZN), cadmium (Cd), etc. can be mentioned. Further, as the Group 13 metal of the periodic table, for example, aluminum (Al), gallium (Ga), indium (In), etc. can be mentioned. In the present invention, the second electrode layer preferably contains at least one metal selected from Group 11 and Group 13 metals of the periodic table, and more preferably contains at least one metal selected from silver, copper, gold, and aluminum. The layer thickness of the second electrode layer is not particularly limited, but is preferably 1 nm to 500 μm, more preferably 10 nm to 100 μm, and most preferably 0.5 μm to 10 μm. In the present invention, it is preferable that the film thickness of the insulator film under the outer end portion of the electrode layer is thicker than the film thickness of the insulator film from the opening to a distance of 1 μm, because the breakdown voltage characteristics of the semiconductor device can be made more excellent.

[0036] The forming means of the electrode layer is not particularly limited and may be a known means. Specifically, as the forming means of the electrode layer, for example, a dry method or a wet method can be mentioned. Examples of the dry method include sputtering, vacuum evaporation, CVD, etc. Examples of the wet method include screen printing, die coating, etc.

[0037] In the present invention, it is preferable that the electrode has a structure in which the film thickness decreases toward the outside of the semiconductor device. In this case, the electrode may have a taper angle, or the electrode may be composed of two or more layers including a first electrode layer and a second electrode layer, and the outer end portion of the first electrode layer may be located outside the outer end portion of the second electrode layer. In the present invention, when the electrode has a taper angle, such a taper angle is not particularly limited as long as it does not inhibit the object of the present invention, but is preferably 80° or less, more preferably 60° or less, and most preferably 40° or less. The lower limit of the taper angle is also not particularly limited, but is preferably 0.2°, more preferably 1°. Further, in the present invention, when the outer end portion of the first electrode layer is located outside the outer end portion of the second electrode layer, the distance between the outer end portion of the first electrode layer and the outer end portion of the second electrode layer is preferably 1 μm or more because the leakage current can be more effectively suppressed. Further, in the present invention, it is also preferable that at least a part of the portion (hereinafter also referred to as "overhanging portion") of the first electrode layer that overhangs outside the outer end portion of the second electrode layer has a structure in which the film thickness decreases toward the outside of the semiconductor device, because the withstand voltage of the semiconductor device can be made more excellent. Further, by combining such a preferable electrode configuration with the above-described preferable constituent material of the semiconductor layer, a semiconductor device with better suppressed leakage current and lower loss can be obtained.

Example

[0038] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the drawings, but the present invention is not limited to these embodiments.

[0039] FIG. 1 shows the main part of a Schottky barrier diode (SBD) which is one of the preferred embodiments of the present invention. The SBD of FIG. 1 includes an ohmic electrode 102, an n-type semiconductor layer 101a, an n+-type semiconductor layer 101b, Schottky electrodes 103a and 103b, and an insulator film 104. Here, the insulator film 104 has a taper angle of 10° with a decreasing film thickness toward the inside of the semiconductor device. Also, the insulator film 104 is formed on the n-type semiconductor layer 101a and has an opening. The semiconductor device of FIG. 1 can improve the crystal defects at the ends, form a depletion layer better, further improve the electric field relaxation, and better suppress the leakage current due to the insulator film 104. FIGS. 2 and 3 respectively show examples when the taper angles of the insulator film 104 are 6.3° and 3.3°.

[0040] FIG. 4 shows the main part of a Schottky barrier diode (SBD) which is one of the preferred embodiments of the present invention. The SBD of FIG. 4 is different from the SBD of FIG. 1 in that the Schottky electrode 103 is composed of a metal layer 103a, a metal layer 103b, and a metal layer 103c. In the semiconductor device of FIG. 4, since the outer ends of the metal layer 103b and / or the metal layer 103c as the first electrode layer are located outside the outer ends of the metal layer 103a as the second electrode layer, the leakage current can be better suppressed. Furthermore, since the portion of the metal layer 103b and / or the metal layer 103c that protrudes outside the outer end of the metal layer 103a has a taper region with a decreasing film thickness toward the outside of the semiconductor device, it has a structure with better breakdown voltage resistance.

[0041] Examples of the constituent material of the metal layer 103a include the above-mentioned metals exemplified as the constituent material of the second electrode layer. Examples of the constituent material of the metal layer 103b and the metal layer 103c include the above-mentioned metals exemplified as the constituent material of the first electrode layer. The forming means of each layer in FIG. 1 is not particularly limited as long as it does not impede the object of the present invention and may be a known means. For example, after film formation by a vacuum evaporation method, a CVD method, a sputtering method, various coating techniques, means of patterning by a photolithography method, or means of directly patterning using a printing technique or the like can be mentioned.

[0042] Hereinafter, a preferred manufacturing process of the SBD in FIG. 4 will be described, but the present invention is not limited to these preferred manufacturing methods. FIG. 5(a) shows an insulator film 104 laminated on the n-type semiconductor layer 101a of a laminate of an ohmic electrode 102, an n-type semiconductor layer 101a, and an n+-type semiconductor layer 101b. As the insulator layer 104, preferably, for example, an SiO 2 film or the like obtained by a PECVD method can be mentioned. A thin film 106 having a faster etching rate than the insulator film 104 is laminated on the laminate of FIG. 5(a) to obtain the laminate of FIG. 5(b). Examples of the thin film having a fast etching rate include, for example, an SiO 2 thin film obtained by a SOG method, an SiO 2Examples include a thin film (PSG). The thickness of the thin film 106 is not particularly limited, and examples thereof include 1 μm or less. By appropriately adjusting the material and film thickness of the thin film 106, a desired taper angle can be obtained. Here, in order to obtain a desired taper angle, it is important to stack the insulator film 104 and the thin film 106 having an etching rate faster than that of the insulator film 104 in this order. A resist 107 is stacked on the laminate of FIG. 5(b) to obtain the laminate of FIG. 5(c). Further, the laminate of FIG. 6(d) is obtained by photolithography and etching on the laminate of FIG. 5(c). The photolithography method and the etching method may each be a known method. Examples of the etching method include a dry etching method or a wet etching method. By further performing etching to remove the resist 107 and the thin film 106 from the laminate of FIG. 6(d), the laminate of FIG. 6(e) is obtained. The taper angle of the insulator film 104 in FIG. 6(e) is 10°. In the present invention, it is important to make the taper angle 20° or less. For example, when a laminate is obtained at a taper angle of 45°, as shown in FIG. 11, there is a problem that crystal defects occur. That is, defects are scattered inside the semiconductor layer 101a near the end of the tapered portion of the insulator film 104 in the figure. On the other hand, no defects are found in the region away from the tapered portion of the insulator film 104 (near the right end of the figure) or in the region where there is no insulator film (near the left end of the figure). It is considered that this defect is caused by a large difference in the linear thermal expansion coefficient between the insulator film 104 and the semiconductor layer 101a, and a large stress is generated at a place where the mechanical stress changes greatly during the formation of the insulator film 104 or other heat treatment processes. In order to make such a change in mechanical stress smaller and make it difficult to generate defects, it is important to make the taper angle 20° or less. This problem is a new finding obtained by the present inventors through their studies.

[0043] Next, on the laminate of FIG. 6(e), metal layers 103a, 103b, and 103c are formed using the dry method or the wet method to obtain the laminate of FIG. 7(f). Then, an extra portion among the metal layer 103a, the metal layer 103b, and the metal layer 103c is removed using a known etching technique to obtain the laminate of FIG. 7(g). In this etching, for example, it is preferable to form the outer end portion of the first electrode to have a tapered shape by etching while retracting the resist. The semiconductor device obtained as described above has improved crystal defects at the ends, a more favorably formed depletion layer, further improved electric field relaxation, and a configuration capable of better suppressing leakage current.

[0044] In the SBD of FIG. 7(g), as the n-type semiconductor layer 101a, α-Ga 2 O 3 layer, and as the insulator film 104, SiO 2 film (taper angles = 2.2°, 3.3°, 6.3°, 10°, 20°, 45°), the horizontal position of the reverse current (@Vr = 0 to 720 V) at a temperature of 300 K and the surface electric field of the α-Ga 2 O 3 layer were evaluated by simulation. The evaluation results are shown in FIG. 12. As is clear from FIG. 12, compared with the case of using a SiO 2 film having a taper angle of 45°, in the case of using a SiO 2 film having a taper angle of 2.2° to 20°, the electric field concentration in the surface electric field is significantly alleviated, and in the case of using a SiO 2 film having a taper angle of 2.2° to 10°, it can be seen that the electric field concentration in the surface electric field is further more significantly alleviated. Also, in this simulation, the result of the case of using a SiO 2 film having a taper angle of 45° is shown in FIG. 12, but as described above, there is a problem that crystal defects occur, and the electric field concentration shown in the simulation further deteriorates. Also, as the insulator film 104, SiO 2The potential distribution at 600 V at a temperature of 300 K when using a film (taper angles = 3.3°, 6.3°, 10°, 20°) was evaluated by simulation. The evaluation results are shown in Fig. 13. As is clear from Fig. 13, it can be seen that the electric field relaxation is good when using SiO 2 films with taper angles of 3.3°, 6.3°, 10°, and 20°.

[0045] In the SBD of Fig. 4, Al was used as the metal layer 103a of the Schottky electrode, Ti as the metal layer 103b, and Co as the metal layer 103c. α-Ga 2 O 3 layers were used as the n-type semiconductor layer 101a and the n+-type semiconductor layer 101b, respectively, SiO 2 film was used as the dielectric film 104, and a laminate of Ti / Ni / Au was used as the ohmic electrode 102 to fabricate an SBD and perform I-V measurement. Fig. 14 shows the results of the I-V measurement in which the current value on the vertical axis was normalized by the current value at a reverse applied voltage of -200 V. As an example, the I-V measurement results of the SBD fabricated by forming a taper portion so that the taper angle θ is 10° are shown in Fig. 14(a), and as a comparative example, the I-V measurement results of the SBD fabricated by forming a taper portion so that the taper angle θ is 45° are shown in Fig. 14(b). The vertical axis has a logarithmic scale. As is clear from Fig. 14(a) and Fig. 14(b), it was found that the leakage current was significantly suppressed in the case of the product of this example.

[0046] The semiconductor device is particularly useful for power devices. Examples of the semiconductor device include a diode (e.g., a PN diode, a Schottky barrier diode, a junction barrier Schottky diode, etc.) or a transistor (e.g., a MOSFET, a MESFET, etc.). Among them, a diode is preferred, and a Schottky barrier diode (SBD) is more preferred.

[0047] In addition to the above-described matters, the semiconductor device of the present invention can be suitably used as a power module, an inverter, or a converter by using known means, and further, for example, it can be suitably used for a semiconductor system using a power supply device. The power supply device can be produced from or as the semiconductor device by connecting it to a wiring pattern or the like using known means. An example of a power supply system is shown in FIG. 8. FIG. 8 shows a power supply system 170 configured using a plurality of the power supply devices 171 and 172 and a control circuit 173. As shown in FIG. 9, the power supply system can be used for a system device 180 by combining an electronic circuit 181 and a power supply system 182. Note that an example of a power circuit diagram of the power supply device is shown in FIG. 10. FIG. 10 shows a power circuit of a power supply device including a power circuit and a control circuit. After switching a DC voltage at a high frequency by an inverter 192 (configured by MOSFETs A to D) and converting it to AC, insulation and voltage transformation are performed by a transformer 193, rectification is performed by a rectifying MOSFET 194 (A to B'), and smoothing is performed by a DCL 195 (smoothing coils L1 and L2) and a capacitor to output a DC voltage. At this time, the output voltage is compared with a reference voltage by a voltage comparator 197, and the inverter 192 and the rectifying MOSFET 194 are controlled by a PWM control circuit 196 so as to obtain a desired output voltage.

Industrial Applicability

[0048] The laminated structure and the semiconductor device of the present invention can be used in various fields such as semiconductors (e.g., compound semiconductor electronic devices), electronic component and electrical equipment parts, optical and electrophotographic related devices, and industrial members, and are particularly useful for power devices.

Explanation of Reference Numerals

[0049] 101a n-type semiconductor layer 101b n+-type semiconductor layer 102 Ohmic electrode 103 Schottky electrode 103a Metal layer 103b Metal layer 103c Metal layer 104 Insulator film 106 thin film 107 resist 170 power supply system 171 power supply device 172 power supply device 173 control circuit 180 system device 181 electronic circuit 182 power supply system 192 inverter 193 transformer 194 rectifying MOSFET 195 DCL 196 PWM control circuit 197 voltage comparator

Claims

1. A laminated structure in which an insulator film is laminated on a part of a semiconductor film, wherein the semiconductor film has a corundum structure and includes a crystalline oxide semiconductor containing at least gallium, the insulator film contains Si or Al, at least a part of the insulator film has a film thickness greater than 1 μm, and the insulator film has a taper angle of 20° or less.

2. A laminated structure in which an insulator film is laminated on a part of a semiconductor film, wherein the semiconductor film has a corundum structure and includes a crystalline oxide semiconductor containing one or more metals selected from Group 9 and Group 13 of the periodic table, the insulator film has a linear side surface in a cross section perpendicular to the surface of the insulator film, and the angle formed by the side surface and the bottom surface of the insulator film is 20° or less.

3. The laminated structure according to Claim 2, wherein the crystalline oxide semiconductor contains at least gallium.

4. The laminated structure according to Claim 2, wherein at least a part of the insulator film has a film thickness greater than 1 μm.

5. The laminated structure according to any one of Claims 1 to 4, wherein the insulator film has a taper angle of 10° or less.

6. A semiconductor device comprising at least the laminated structure according to any one of Claims 1 to 5 and an electrode.

7. The semiconductor device according to Claim 6, which is a power device.

8. The semiconductor device according to Claim 6 or 7, which is a Schottky barrier diode.

9. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of Claims 6 to 8.

Images