Imaging device

Abstract

There is a demand for an imaging device capable of capturing images over a light intensity range that is equivalent to or more than that of human vision in dark environments and bright environments. The present invention expands the dynamic range and realizes high picture quality. With a view to obtaining an image with an expanded dynamic range, two capacitors, a large one and a small one, are provided to each pixel. The large capacitor is configured to be sandwiched between a transistor for controlling the amount of electric charge overflowing from the small capacitor and a transistor for resetting accumulated charge. OS transistors are used for both of these transistors. The OS transistors have an extremely low off-current characteristic, and thus enable expansion of the dynamic range of imaging.

Description

Technical Field

[0001] One aspect of the present invention relates to an imaging device using an oxide semiconductor and a method for manufacturing the same.

[0002] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. One aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one aspect of the present invention disclosed in this specification and the like include semiconductor devices, imaging devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices, driving methods thereof, or manufacturing methods thereof.

[0003] Note that in this specification, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and imaging devices, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices.

Background Art

[0004] Image sensors are widely used as components for imaging in digital cameras, video cameras, etc. They are also used as part of security devices such as security cameras. In security cameras, it is necessary to perform accurate imaging not only in bright places during the day but also at night or in dark places with little light, and an image sensor with a wide dynamic range is required.

[0005] In addition, an imaging device having a configuration in which a transistor having an oxide semiconductor is used as part of a pixel circuit is disclosed in Patent Document 1.

[0006] In addition, a solid-state imaging device and an optical sensor capable of achieving a wide dynamic range are disclosed in Patent Document 2.

Prior Art Documents

Patent Documents

[0007] Patent Document 1 Japanese Patent Application Laid-Open No. 2017-55403 Patent Document 2 Japanese Patent Application Laid-Open No. 2005-328493 Summary of the Invention Problems to be Solved by the Invention

[0008] There is a demand for an imaging device that can capture images in a light amount range equal to or greater than that of the human vision from a dark environment to a bright environment. One of the problems is to produce an imaging device that can expand the dynamic range and achieve high image quality.

[0009] In addition, miniaturization of the imaging device is also one of the problems. Means for Solving the Problems

[0010] In order to obtain an image with an expanded dynamic range, two capacitances, a large capacitance and a small capacitance, are provided in one pixel. When it is dark, charge is accumulated only in the small capacitance, and when it is bright, not only the small capacitance but also the charge overflowing from the small capacitance is accumulated in the large capacitance. The charge is accumulated according to the illuminance without saturating the output over a wide illuminance range, and the charge is output.

[0011] The large capacitance is configured to be sandwiched between a transistor for controlling the amount of charge overflowing from the small capacitance and a transistor for resetting the stored charge. For example, these two transistors use a transistor in which the active layer is formed of an oxide semiconductor (hereinafter referred to as an OS transistor). Since the OS transistor has extremely low off-current characteristics, the dynamic range of imaging can be expanded.

[0012] Furthermore, two silicon transistors are connected to a photodiode formed by being embedded in a silicon substrate. As the silicon substrate, a single-crystalline semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate can be used.

[0013] The silicon substrate may be an SOI (Silicon on Insulator) substrate or the like. As the SOI substrate, after implanting oxygen ions into a mirror-polished wafer and then heating it at a high temperature, a SIMOX (Separation by Implanted Oxygen) substrate formed by forming an oxide layer to a certain depth from the surface and eliminating defects generated in the surface layer, or a smart cut method of splitting a semiconductor substrate by utilizing the growth by heat treatment of microvoids formed by hydrogen ion implantation, an SOI substrate formed by using the ELTRAN method (registered trademark: Epitaxial Layer Transfer), etc. may be used. A transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0014] With the above configuration, a circuit configuration with low leakage current can be realized both when the surroundings of the imaging device are bright and when they are dark. As a result, the SN ratio (Signal to Noise Ratio) of the measurement in the imaging device is improved, and the image quality measured by the imaging device is improved. Further, by reducing the leakage with the OS transistor, deterioration of the image until it is read out is prevented.

[0015] The invention disclosed in this specification is an imaging device having a first transistor to a sixth transistor, a photoelectric conversion element, a first capacitor element, and a second capacitor element. One electrode of the photoelectric conversion element is electrically connected to one of the source or drain of the first transistor. The other of the source or drain of the first transistor is electrically connected to one of the source or drain of the second transistor. The other of the source or drain of the first transistor is electrically connected to one electrode of the first capacitor element. The other of the source or drain of the first transistor is electrically connected to the gate electrode of the third transistor. One of the source or drain of the third transistor is electrically connected to one of the source or drain of the fourth transistor. The other of the source or drain of the second transistor is electrically connected to one electrode of the second capacitor element. One electrode of the second capacitor element is electrically connected to one of the source or drain of the fifth transistor. One of the source or drain of the sixth transistor is electrically connected to one of the source or drain of the first transistor. The first transistor, the third transistor, the fourth transistor, and the sixth transistor are imaging devices having silicon in the region where the channel is formed.

[0016] In the above configuration, the second transistor and the fifth transistor are imaging devices having an oxide semiconductor in the region where the channel is formed. Alternatively, in the above configuration, the second transistor and the fifth transistor may be imaging devices having silicon.

[0017] In the above configuration, the second capacitor element has a larger capacitance than the first capacitor element. These capacitor elements may be called a lateral overflow integration capacitor (LOFIC).

[0018] In the above configuration, the photoelectric conversion element and the first transistor are provided adjacent to each other, and the photoelectric conversion element and the source or drain of the sixth transistor are provided adjacent to each other and are fabricated on the same silicon substrate.

Advantages of the Invention

[0019] According to one aspect of the present invention, an imaging device capable of photographing in a light amount range equivalent to or greater than that of the human vision from a dark environment to a bright environment can be realized. Further, an imaging device capable of expanding the dynamic range and achieving high image quality can be fabricated.

Brief Description of the Drawings

[0020] FIG. 1 is an equivalent circuit diagram showing one aspect of the present invention. FIGS. 2A and 2B are equivalent circuit diagrams showing variations. FIG. 3 is a schematic cross-sectional view of an image sensor chip showing one aspect of the present invention. FIG. 4 is a diagram showing a configuration example of a transistor and a capacitor showing one aspect of the present invention. FIGS. 5A to 5C are diagrams showing configuration examples of transistors. FIGS. 6A to 6C are diagrams showing configuration examples of transistors. FIGS. 7A to 7C are diagrams showing configuration examples of transistors. FIGS. 8A to 8C are perspective views of a package containing an imaging device, and FIG. 8D is a cross-sectional view. FIGS. 9A to 9C are perspective views of a package containing an imaging device, and FIG. 9D is a cross-sectional view. FIGS. 10A to 10F are perspective views for explaining an electronic device. FIG. 11 is a diagram showing an example of a timing chart showing one aspect of the present invention. FIGS. 12A to 12G are examples of potential diagrams at each timing of the timing chart of FIG. 11.

Embodiments for Carrying Out the Invention

[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that its form and details can be variously changed. Further, the present invention is not to be construed as limited to the description of the embodiments shown below.

[0022] Note that the ordinal numbers attached as the first and second are used for convenience and do not indicate the process order or the stacking order. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third" and so on for explanation. Also, the ordinal numbers described in this specification and the like may not match the ordinal numbers used to identify an aspect of the present invention.

[0023] Note that, for example, when the source of a transistor (or the first terminal, etc.) is electrically connected to X via (or without) Z1, and the drain of the transistor (or the second terminal, etc.) is electrically connected to Y via (or without) Z2, or when the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, another part of Z1 is directly connected to X, the drain of the transistor (or the second terminal, etc.) is directly connected to a part of Z2, and another part of Z2 is directly connected to Y, it can be expressed as follows.

[0024] For example, it can be expressed as "X, the source (or the first terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor are electrically connected to each other, and they are electrically connected in the order of X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y." Or, it can be expressed as "The source (or the first terminal, etc.) of the transistor is electrically connected to X, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as "X is electrically connected to Y via the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor, and X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y are provided in this connection order." By stipulating the connection order in the circuit configuration using an expression method similar to these examples, the source (or the first terminal, etc.) of the transistor and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope.

[0025] Alternatively, as another way of expression, for example, it can be expressed as "The source (or the first terminal, etc.) of the transistor is electrically connected to X via at least the first connection path, the first connection path does not have the second connection path, the second connection path is a path between the source (or the first terminal, etc.) of the transistor and the drain (or the second terminal, etc.) of the transistor via the transistor, the first connection path is a path via Z1, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via at least the third connection path, the third connection path does not have the second connection path, and the third connection path is a path via Z2." Or, it can be expressed as "The source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least the first connection path, the first connection path does not have the second connection path, the second connection path has a connection path via the transistor, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third connection path, and the third connection path does not have the second connection path." Or, it can be expressed as "The source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least the first electrical path, the first electrical path does not have the second electrical path, the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, the third electrical path does not have the fourth electrical path, and the fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." By defining the connection paths in the circuit configuration using an expression method similar to these examples, it is possible to distinguish between the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor and determine the technical scope.

[0026] Note that these expression methods are just examples and are not limited to these expression methods. Here, X, Y, Z1, and Z2 are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0027] Note that even when components that are independent on the circuit diagram are shown as being electrically connected, there may be a case where one component has the functions of a plurality of components combined. For example, when a part of the wiring also functions as an electrode, one conductive film has the functions of both the wiring component and the electrode component combined. Therefore, the electrically connected in this specification includes such a case where one conductive film has the functions of a plurality of components combined within its scope.

[0028] (Embodiment 1) In this embodiment, an imaging device which is one aspect of the present invention will be described with reference to the drawings.

[0029] FIG. 1 is a circuit diagram of one pixel among a plurality of imaging devices according to one aspect of the present invention.

[0030] In the pixel, one electrode of the photoelectric conversion element PD is electrically connected to one of the source or drain of the transistor M1. The other of the source or drain of the transistor M1 is electrically connected to one of the source or drain of the transistor M2. The other of the source or drain of the transistor M1 is electrically connected to one electrode of the first capacitor element C1. The other of the source or drain of the transistor M1 is electrically connected to the gate electrode of the transistor M3. One of the source or drain of the transistor M3 is electrically connected to one of the source or drain of the transistor M4. The other of the source or drain of the transistor M2 is electrically connected to one electrode of the second capacitor element C2. One electrode of the second capacitor element C2 is electrically connected to one of the source or drain of the transistor M5. One of the source or drain of the transistor M6 is electrically connected to one of the source or drain of the transistor M1.

[0031] Here, the node FD is connected to the other of the source or drain of the transistor M1, one of the source or drain of the transistor M2, the gate electrode of the transistor M3, and one electrode of the first capacitor element C1, respectively.

[0032] The other electrode of the photoelectric conversion element PD is electrically connected to the wiring (VSS). The photoelectric conversion element PD generates and accumulates signal charges according to the amount of received light.

[0033] The other of the source or drain of the transistor M5 is electrically connected to the wiring (VDD1). The other of the source or drain of the transistor M3 is electrically connected to the wiring (VDD2).

[0034] The other of the source or drain of the transistor M4 is electrically connected to the wiring (OUT).

[0035] Note that in the connection forms of the above elements, an example is shown where multiple transistors or multiple capacitor elements share the wiring to which they are electrically connected, but each may be electrically connected to different wiring.

[0036] The transistor M1 functions as a transfer switch. It transfers the charges generated in the photoelectric conversion element PD to the node FD and is controlled by the gate TX. An overflow path is provided in the channel formation region of the transistor M1.

[0037] The transistor M2 can be called the second transfer switch, is controlled by the gate SG, and accumulates charges in the capacitor element C2 by turning on.

[0038] The transistor M3 is a source follower transistor, and the node FD is connected to its gate.

[0039] The transistor M4 is a selection transistor and is controlled by the gate SE.

[0040] Transistor M5 is a reset transistor and is controlled by gate RST. Transistor M5 resets the capacitive element C1 connected to node FD. At the same time, transistor M5 also resets the capacitive element C2.

[0041] Transistor M6 is provided to reduce the leakage of transistor M1 and becomes on when a signal is applied to gate TL. The signal applied to transistor M6 controls transistor M6 so as to prevent the leakage of the capacitive element C1.

[0042] An example of a timing chart is shown in FIG. 11. In FIG. 11, the exposure period (accumulation period Exposure) and the readout period (Read out) are indicated by arrows. A high gain mode period (HCG) for reading out a pixel signal with a high conversion gain is performed at time T1 after the exposure is started. HCGRST is the reset time, and HCGSIG indicates the output time. A low gain mode period (LCG) for reading out a pixel signal with a low conversion gain in which the capacitance of FD is changed at time T5 is performed. LCGRST is the reset time, and LCGSIG indicates the output time. As shown in FIG. 11, transistor M6 is driven according to gate TL and becomes on at a timing that becomes a High level after the exposure period. Note that FD refers to a floating diffusion. Also, CS refers to a capacitance with a relatively deep potential.

[0043] In this embodiment, both transistor M2 and transistor M5 connected to the capacitive element C2 are configured with OS transistors using an oxide semiconductor in the channel formation region, and the other transistors are fabricated on a silicon substrate. When transistor M2 and transistor M5 are configured with OS transistors, it is possible to reduce the voltage fluctuation amount of the capacitance due to the leakage current. Also, instead of using OS transistors partially, both transistor M2 and transistor M5 may be configured with silicon transistors to shorten the manufacturing process.

[0044] When the amount of received light of the photoelectric conversion element PD is large and charge overflows from the capacitance element C1 of the node FD, that is, in the case of high illuminance, the charge is accumulated in the capacitance element C1 and the capacitance element C2.

[0045] Also, when the amount of received light of the photoelectric conversion element PD is small and the charge can be contained in the capacitance element C1 of the node FD, that is, in the case of low illuminance, it is accumulated only in the capacitance element C1.

[0046] Regardless of whether it is high illuminance or low illuminance, the readout operation of the pixel circuit is performed in the order of a reset period, a high-illuminance reset level readout period, a low-illuminance reset level readout period, a photocharge transfer period, a low-illuminance signal level readout period, and a high-illuminance signal level readout period.

[0047] Regarding driving methods other than the transistor M6, FIG. 12 shows an example of a potential diagram at each timing of the timing chart. FIG. 12A is an example of a potential diagram at time T1 in FIG. 11, FIG. 12B is an example of a potential diagram at time T2 in FIG. 11, and FIG. 12C is an example of a potential diagram at time T3 in FIG. 11. Also, FIG. 12D is an example of a potential diagram at time T4 in FIG. 11, FIG. 12E is an example of a potential diagram at time T5 in FIG. 11, FIG. 12F is an example of a potential diagram at time T6 in FIG. 11, and FIG. 12G is an example of a potential diagram at time T7 in FIG. 11. Since the driving method as a pixel circuit having a LOFIC structure is known, detailed description will be omitted here.

[0048] Also, FIG. 2A shows a configuration in which the transistor M6 is removed from the circuit configuration of FIG. 1. When at least the transistor M2 and the transistor M5 are configured by OS transistors, it becomes one of the modified examples of FIG. 1. When the transistors M1, M2, M3, M4, and M5 are formed on a silicon substrate, it corresponds to a conventional example. Regarding the driving method of the circuit in FIG. 2A, when the transistors M1, M2, M3, M4, and M5 are formed on a silicon substrate, since it is known as a pixel circuit having a LOFIC structure, the description will be omitted here.

[0049] The circuit shown in FIG. 2B is an example where the first capacitive element C1 shown in FIG. 2A is not illustrated. Also, the node CS is illustrated. In the circuit shown in FIG. 2B, when transistors M2 and M5 are formed on a silicon substrate and when transistors M2 and M5 are configured with OS transistors, it was estimated that the former had a voltage fluctuation amount of capacitance of 11.2 mV and the latter had a voltage fluctuation amount of capacitance of 0.37 nV. Note that the estimation was performed under the conditions that the frame rate was 60 fps, the leakage current of the silicon transistor was 30 fA, the leakage current of the OS transistor was 1 zA, and the capacitance was 45 fF. As described above, in the imaging device according to one aspect of the present invention, when the OS transistor is applied to transistors M2 and M5, it is possible to reduce the voltage fluctuation amount of the capacitance due to the leakage current. Therefore, the dynamic range of imaging of the imaging device can be expanded.

[0050] FIG. 3 shows an example of a cross-sectional schematic diagram of a back-illuminated image sensor chip.

[0051] FIG. 3 is a cross-sectional view of a chip manufactured by forming an OS transistor (OSFET) on a silicon transistor formed on a silicon substrate and further bonding it to a capacitive element C2 provided on another silicon substrate. The wiring layers provided on the respective silicon substrates are bonded together by a bonding technique such as Cu-Cu bonding or microbumps. Note that Cu-Cu bonding is a technique for achieving electrical conduction by connecting Cu (copper) pads to each other. Further, a back gate for controlling the threshold value may be provided below the OSFET in FIG. 3.

[0052] In FIG. 3, a microlens LENS is provided on the back surface of the silicon substrate. In FIG. 3, the silicon substrate and the microlens LENS are provided in contact with each other, but a color filter or a black matrix may be provided between the silicon substrate and the microlens LENS.

[0053] An N-type impurity (such as phosphorus) is doped into a silicon substrate having a P-type well PWELL to form an N-type high-concentration region N+, and a source region or a drain region of each transistor is formed.

[0054] In FIG. 3, transistors M1, M4, and M6 are illustrated. Also, the gate TL of transistor M6 is illustrated. A P-type region P+ doped with a high-concentration P-type impurity (such as boron) is provided between the channel formation region of transistor M1 and the channel formation region of transistor M6. Further, below the P-type region P+, there is an N-type region N having a lower concentration than the N-type high-concentration region N+, and further below, there is an N-type low-concentration region N− having a lower concentration than the N-type region N. The photoelectric conversion element PD is constituted by the stack of the P-type region P+, the N-type region N, and the N-type low-concentration region N−.

[0055] Although not illustrated in FIG. 3, a transistor M3 may be formed on the silicon substrate, and a capacitor element C1 may be formed by forming an electrode on the gate of transistor M3 via an insulating layer.

[0056] Also, although FIG. 3 shows an example of a back-illumination type (also called a back-incidence type) image sensor chip, it is not particularly limited, and a front-incidence type image sensor chip may be used. Further, although an example of bonding another silicon substrate provided with a capacitor element C2 is shown, it is not particularly limited, and an image sensor chip in which the capacitor element C2 is stacked above the OS transistor without bonding another silicon substrate may be used. Also, an image sensor chip in which a trench type capacitor is stacked as the capacitor element C2 may be used.

[0057] (Embodiment 2) In this embodiment, the structure and manufacturing process of the OS transistor (OSFET) used in the image sensor chip shown in FIG. 3 will be described below.

[0058] As an example, a configuration in which transistors having different electrical characteristics are stacked will be described. By adopting such a configuration, the design freedom of the semiconductor device can be increased. Further, by stacking and providing transistors having different electrical characteristics, the integration degree of the semiconductor device can be increased. The transistor 500 in FIG. 4 is a transistor having an oxide semiconductor in the channel formation region, and the transistor 550 is an example of a transistor using a silicon substrate.

[0059] FIG. 5A is a cross-sectional view of the transistor 500 in the channel length direction, FIG. 5B is a cross-sectional view of the transistor 500 in the channel width direction, and FIG. 5C is a cross-sectional view of the transistor 550 in the channel width direction. For example, the transistor 500 corresponds to the transistor OSFET shown in the first embodiment, and the transistor 550 corresponds to the transistor M1. Further, the capacitor 600 in FIG. 4 corresponds to the capacitor element C1 or the capacitor element C2. However, the OSFET in FIG. 3 corresponds to an example in which the conductor 503 described later is not provided.

[0060] The transistor 500 is an OS transistor. The transistor 500 has an extremely small off-current. Therefore, it is possible to hold the data voltage or charge written to the memory node via the transistor 500 for a long period of time. That is, since the refresh operation frequency of the memory node is reduced or the refresh operation is not required, the power consumption of the semiconductor device can be reduced.

[0061] As shown in FIG. 5C, in the transistor 550, the upper surface and the side surface in the channel width direction of the semiconductor region 313 are covered with the conductor 316 via the insulator 315. In this way, by making the transistor 550 a Fin type, the effective channel width is increased, so that the on-characteristics of the transistor 550 can be improved. Further, since the contribution of the electric field of the gate electrode can be increased, the off-characteristics of the transistor 550 can be improved.

[0062] Note that the transistor 550 may be either p-channel type or n-channel type.

[0063] In regions where the channel of the semiconductor region 313 is formed, regions in the vicinity thereof, source regions, or drain regions, such as the low-resistance regions 314a and 314b, it is preferable to include a semiconductor such as a silicon-based semiconductor, and it is preferable to include single-crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may also be used. Alternatively, by using GaAs, GaAlAs, etc., the transistor 550 may be a HEMT (High Electron Mobility Transistor).

[0064] The low-resistance regions 314a and 314b include, in addition to the semiconductor material applied to the semiconductor region 313, elements that impart n-type conductivity such as arsenic and phosphorus, or elements that impart p-type conductivity such as boron.

[0065] As the conductor 316 that functions as a gate electrode, a conductive material such as a semiconductor material such as silicon, a metal material, an alloy material, or a metal oxide material that includes an element that imparts n-type conductivity such as arsenic and phosphorus, or an element that imparts p-type conductivity such as boron can be used.

[0066] Note that since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten from the viewpoint of heat resistance.

[0067] The transistor 550 may be formed using an SOI substrate or the like.

[0068] As the SOI substrate, for example, a SIMOX substrate formed by implanting oxygen ions into a mirror-polished wafer and then performing high-temperature heating to form an oxide layer to a certain depth from the surface and eliminate defects generated in the surface layer, or a smart cut method in which a semiconductor substrate is cleaved by utilizing the growth by heat treatment of microvoids formed by hydrogen ion implantation, an SOI substrate formed using the ELTRAN method (registered trademark), etc. may be used. A transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0069] Note that the transistor 550 shown in FIG. 4 is an example and is not limited to its configuration, and an appropriate transistor may be used according to the circuit configuration and driving method. For example, when the semiconductor device is a unipolar circuit of only OS transistors (meaning transistors of the same polarity such as only n-channel type transistors), as shown in FIG. 4, the configuration of the transistor 550 may be the same as that of the transistor 500. Details of the transistor 500 will be described later.

[0070] Over the transistor 550, an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are sequentially stacked and provided.

[0071] As the insulator 320, the insulator 322, the insulator 324, and the insulator 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0072] Note that in this specification, silicon oxynitride refers to a material having an oxygen content higher than that of nitrogen in its composition, and silicon nitride oxide refers to a material having a nitrogen content higher than that of oxygen in its composition. Also, in this specification, aluminum oxynitride refers to a material having an oxygen content higher than that of nitrogen in its composition, and aluminum nitride oxide refers to a material having a nitrogen content higher than that of oxygen in its composition.

[0073] The insulator 322 may function as a planarization film that planarizes the step formed by the transistor 550 or the like provided below it. For example, the upper surface of the insulator 322 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0074] In addition, for the insulator 324, it is preferable to use a film having a barrier property that prevents hydrogen and impurities from diffusing from the substrate 311 or the transistor 550 or the like into the region where the transistor 500 is provided.

[0075] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film with a small amount of hydrogen desorption.

[0076] The amount of hydrogen desorption can be analyzed using, for example, temperature programmed desorption gas analysis (TDS). For example, the amount of hydrogen desorption of the insulator 324 is such that in TDS analysis, in the range where the surface temperature of the film is from 50°C to 500°C, the desorption amount converted to hydrogen atoms, when converted per unit area of the insulator 324, is 10×10 15 atoms / cm 2 or less, preferably 5×10 15 atoms / cm 2 or less.

[0077] Note that the insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. Also, for example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, more preferably 0.6 times or less, of the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0078] In addition, capacitors 600, or conductors 328, conductors 330, etc. that are connected to transistors 500 are embedded in insulators 320, insulators 322, insulators 324, and insulators 326. Note that conductors 328 and conductors 330 have functions as plugs or wirings. In addition, conductors having functions as plugs or wirings may be given the same reference numeral for a plurality of configurations. Also, in this specification and the like, a wiring and a plug connected to the wiring may be an integral body. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

[0079] As materials for each plug and wiring (conductors 328, conductors 330, etc.), conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials can be used singly or in a stacked manner. It is preferable to use high melting point materials such as tungsten and molybdenum that achieve both heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferable to form with a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0080] A wiring layer may be provided on insulator 326 and conductor 330. For example, in FIG. 4, insulators 350, insulators 352, and insulators 354 are sequentially stacked and provided. In addition, conductor 356 is formed in insulators 350, insulators 352, and insulators 354. Conductor 356 has a function as a plug connected to transistor 550 or a wiring. Note that conductor 356 can be provided using the same material as conductors 328 and conductors 330.

[0081] Note that, for example, as with the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 350. Further, the conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 350 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0082] Note that, as the conductor having a barrier property against hydrogen, for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity as a wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen is in contact with the insulator 350 having a barrier property against hydrogen.

[0083] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. 4, the insulators 360, 362, and 364 are sequentially laminated and provided. Further, a conductor 366 is formed in the insulators 360, 362, and 364. The conductor 366 has a function as a plug or a wiring. Note that the conductor 366 can be provided using the same materials as the conductors 328 and 330.

[0084] Note that, for example, as with the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 360. Further, the conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 360 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0085] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. 4, the insulator 370, the insulator 372, and the insulator 374 are sequentially stacked and provided. Further, a conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 has a function as a plug or wiring. Note that the conductor 376 can be provided using the same material as the conductor 328 and the conductor 330.

[0086] Note that, for example, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 370, similar to the insulator 324. Further, the conductor 376 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 370 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0087] A wiring layer may be provided on the insulator 374 and the conductor 376. For example, in FIG. 4, the insulator 380, the insulator 382, and the insulator 384 are sequentially stacked and provided. Further, a conductor 386 is formed in the insulator 380, the insulator 382, and the insulator 384. The conductor 386 has a function as a plug or wiring. Note that the conductor 386 can be provided using the same material as the conductor 328 and the conductor 330.

[0088] Note that, for example, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 380, similar to the insulator 324. Further, the conductor 386 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 380 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0089] In the above description, wiring layers including the conductor 356, wiring layers including the conductor 366, wiring layers including the conductor 376, and wiring layers including the conductor 386 have been described. However, the semiconductor device according to the present embodiment is not limited to this. The number of wiring layers similar to the wiring layer including the conductor 356 may be three or less, or may be five or more.

[0090] On the insulator 384, an insulator 510, an insulator 512, an insulator 514, and an insulator 516 are laminated in this order. It is preferable to use a material having a barrier property against oxygen and hydrogen for any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516.

[0091] For example, for the insulator 510 and the insulator 514, it is preferable to use a film having a barrier property such that hydrogen and impurities do not diffuse from, for example, the region where the substrate 311 or the transistor 550 is provided to the region where the transistor 500 is provided. Therefore, a material similar to that of the insulator 324 can be used.

[0092] As an example of a film having a barrier property against hydrogen, silicon nitride formed by CVD can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film having a small amount of hydrogen desorption.

[0093] Further, as a film having a barrier property against hydrogen, for example, for the insulator 510 and the insulator 514, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0094] In particular, aluminum oxide has a high blocking effect that prevents the film from permeating both oxygen and impurities such as hydrogen and moisture, which are factors causing fluctuations in the electrical characteristics of transistors. Therefore, aluminum oxide can prevent the incorporation of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. In addition, it is possible to suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, it is suitable for use as a protective film for the transistor 500.

[0095] Also, for example, the same materials as those of the insulator 320 can be used for the insulator 512 and the insulator 516. Further, by applying a material having a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 512 and the insulator 516.

[0096] Also, conductors 518 and conductors (for example, conductor 503) constituting the transistor 500 are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. Note that the conductor 518 functions as a capacitor 600, a plug connected to the transistor 550, or a wiring. The conductor 518 can be provided using the same materials as those of the conductor 328 and the conductor 330.

[0097] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having a barrier property against oxygen, hydrogen, and water. With this configuration, the transistor 550 and the transistor 500 can be separated by a layer having a barrier property against oxygen, hydrogen, and water, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0098] A transistor 500 is provided above the insulator 516.

[0099] As shown in FIGS. 5A and 5B, the transistor 500 includes a conductor 503 disposed to be embedded in insulators 514 and 516, an insulator 520 disposed on the insulator 516 and the conductor 503, an insulator 522 disposed on the insulator 520, an insulator 524 disposed on the insulator 522, an oxide 530a disposed on the insulator 524, an oxide 530b disposed on the oxide 530a, conductors 542a and 542b disposed apart from each other on the oxide 530b, an insulator 580 disposed on the conductors 542a and 542b and having an opening formed by overlapping between the conductor 542a and the conductor 542b, an insulator 545 disposed on the bottom and side surfaces of the opening, and a conductor 560 disposed on the formation surface of the insulator 545.

[0100] Also, as shown in FIGS. 5A and 5B, it is preferable that an insulator 544 is disposed between the oxides 530a, 530b, the conductors 542a and 542b, and the insulator 580. Also, as shown in FIGS. 5A and 5B, the conductor 560 preferably includes a conductor 560a provided inside the insulator 545 and a conductor 560b provided to be embedded inside the conductor 560a. Also, as shown in FIGS. 5A and 5B, it is preferable that an insulator 574 is disposed on the insulator 580, the conductor 560, and the insulator 545.

[0101] In this specification and the like, the oxides 530a and 530b may sometimes be collectively referred to as the oxide 530.

[0102] Note that in the transistor 500, a configuration in which two layers of the oxides 530a and 530b are stacked in a region where a channel is formed and in its vicinity is shown, but the present invention is not limited to this. For example, a configuration may be provided in which a single layer of the oxide 530b or a stacked configuration of three or more layers is provided.

[0103] In addition, in the transistor 500, the conductor 560 is shown in a two-layer stacked configuration, but the present invention is not limited to this. For example, the conductor 560 may have a single-layer configuration or a stacked configuration of three or more layers. Also, the transistor 500 shown in FIGS. 5A and 5B is an example, and is not limited to its configuration. An appropriate transistor may be used according to the circuit configuration, driving method, etc.

[0104] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and 542b function as the source electrode or the drain electrode, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b. The arrangement of the conductor 560, the conductor 542a, and the conductor 542b is self-aligned with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing an alignment margin, and the occupied area of the transistor 500 can be reduced. Thereby, miniaturization and high integration of the semiconductor device can be achieved.

[0105] Furthermore, since the conductor 560 is self-alignedly formed in the region between the conductors 542a and 542b, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560, the conductor 542a, and the conductor 542b can be reduced. Therefore, the switching speed of the transistor 500 can be improved, and high frequency characteristics can be achieved.

[0106] Conductor 560 may function as a first gate (also referred to as a top gate) electrode. Further, conductor 503 may function as a second gate (also referred to as a bottom gate or a back gate) electrode. In that case, the threshold voltage of transistor 500 can be controlled by changing the potential applied to conductor 503 independently without linking it to the potential applied to conductor 560. In particular, by applying a negative potential to conductor 503, the threshold voltage of transistor 500 can be made greater than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to conductor 503 can make the drain current smaller when the potential applied to conductor 560 is 0 V than when no negative potential is applied.

[0107] Conductor 503 is arranged to overlap with oxide 530 and conductor 560. Thereby, when a potential is applied to conductor 560 and conductor 503, the electric field generated from conductor 560 and the electric field generated from conductor 503 are connected, and the channel formation region formed in oxide 530 can be covered.

[0108] In this specification and the like, a configuration of a transistor in which a channel formation region is electrically surrounded by an electric field of a pair of gate electrodes (a first gate electrode and a second gate electrode) is referred to as a surrounded channel (S-channel) configuration. Further, in this specification and the like, the surrounded channel (S-channel) configuration has the feature that the side surfaces and peripheries of the oxide 530 in contact with the conductors 542a and 542b functioning as source and drain electrodes are of the same I-type as the channel formation region. Further, since the side surfaces and peripheries of the oxide 530 in contact with the conductors 542a and 542b are in contact with the insulator 544, they can be of the I-type similar to the channel formation region. Note that in this specification and the like, the I-type can be treated in the same manner as high-purity intrinsic described later. Further, the S-channel configuration disclosed in this specification and the like is different from the Fin-type configuration and the planar-type configuration. By adopting the S-channel configuration, it is possible to enhance the resistance to the short-channel effect, in other words, to obtain a transistor in which the short-channel effect hardly occurs.

[0109] Further, the conductor 503 has the same configuration as the conductor 518, and a conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and a conductor 503b is further formed inside. Note that in the transistor 500, a configuration in which the conductor 503a and the conductor 503b are laminated is shown, but the present invention is not limited thereto. For example, the conductor 503 may be provided in a single-layer or a laminated configuration of three or more layers.

[0110] Here, it is preferable to use a conductive material in which the conductor 503a has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use a conductive material in which the conductor 503a has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.

[0111] For example, since the conductor 503a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 503b and the decrease in conductivity.

[0112] Further, when the conductor 503 also serves as a wiring function, the conductor 503b is preferably made of a highly conductive material mainly composed of tungsten, copper, or aluminum. In the present embodiment, the conductor 503 is illustrated as a laminate of the conductor 503a and the conductor 503b, but the conductor 503 may have a single-layer structure.

[0113] The insulators 520, 522, and 524 have a function as a second gate insulating film.

[0114] Here, the insulator 524 in contact with the oxide 530 is preferably an insulator containing more oxygen than oxygen satisfying the stoichiometric composition. The oxygen is likely to be released from the film by heating. In this specification and the like, the oxygen released by heating may be referred to as "excess oxygen". That is, it is preferable that a region containing excess oxygen (also referred to as an "excess oxygen region") is formed in the insulator 524. By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V O : also referred to as oxygen vacancy) in the oxide 530 can be reduced, and the reliability of the transistor 500 can be improved. When hydrogen enters the oxygen vacancy in the oxide 530, the defect (hereinafter, may be referred to as V O H) may function as a donor, and carriers, electrons, may be generated. Also, a part of hydrogen may combine with oxygen bonded to a metal atom to generate carriers, electrons. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics. Further, since hydrogen in the oxide semiconductor is likely to move due to stress such as heat and an electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate. In one aspect of the present invention, V in the oxide 530 OIt is preferable to reduce H as much as possible to high-purity genuine or substantially high-purity genuine. Thus, V O In order to obtain an oxide semiconductor with sufficiently reduced H, it is important to remove impurities such as moisture and hydrogen in the oxide semiconductor (also referred to as "dehydration" or "dehydrogenation treatment"), and to supply oxygen to the oxide semiconductor to compensate for oxygen deficiencies (also referred to as "oxygen addition treatment"). V O By using an oxide semiconductor with sufficiently reduced impurities such as H in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0115] As the insulator having an excess oxygen region, specifically, it is preferable to use an oxide material in which some oxygen is desorbed by heating. The oxide from which oxygen is desorbed by heating is such that, by TDS (Thermal Desorption Spectroscopy) analysis, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more, and it is an oxide film. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0116] Also, the insulator having the excess oxygen region and the oxide 530 may be subjected to any one or a plurality of treatments such as heat treatment, microwave treatment, or RF treatment in contact with each other. By performing such treatment, water or hydrogen in the oxide 530 can be removed. For example, in the oxide 530, a reaction occurs in which the VoH bond is broken, in other words, "V OThe reaction of "H→+Vo+H" occurs, and dehydrogenation can take place. In this case, part of the hydrogen generated may combine with oxygen to be removed as H2O from the oxide 530 or the insulator near the oxide 530. Also, part of the hydrogen may be gettered by the conductors 542a and 542b.

[0117] Also, for the above microwave treatment, it is preferable to use, for example, a device having a power source for generating high-density plasma or a device having a power source for applying RF to the substrate side. For example, by using a gas containing oxygen and high-density plasma, high-density oxygen radicals can be generated, and by applying RF to the substrate side, the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or the insulator near the oxide 530. Also, for the above microwave treatment, the pressure may be 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more. Also, as the gas introduced into the device for performing the microwave treatment, for example, oxygen and argon are used, and the oxygen flow rate ratio (O2 / (O2+Ar)) is 50% or less, preferably 10% or more and 30% or less.

[0118] Also, during the manufacturing process of the transistor 500, it is preferable to perform a heat treatment with the surface of the oxide 530 exposed. The heat treatment may be performed, for example, at 100°C or higher and 450°C or lower, more preferably 350°C or higher and 400°C or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 530 to reduce oxygen deficiency. Also, the heat treatment may be performed under reduced pressure. Or, after performing the heat treatment in an atmosphere of nitrogen gas or an inert gas, in order to supplement the desorbed oxygen, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. Or, after performing the heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, the heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.

[0119] Note that by performing an oxygen addition treatment on the oxide 530, the oxygen deficiency in the oxide 530 can be repaired by the supplied oxygen, that is, the reaction of "Vo + O → null" can be promoted. Further, by reacting the supplied oxygen with the hydrogen remaining in the oxide 530, the hydrogen can be removed (dehydrated) as H2O. As a result, it is possible to suppress the recombination of the hydrogen remaining in the oxide 530 with the oxygen deficiency to form V O H

[0120] Further, when the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (the oxygen is difficult to permeate).

[0121] It is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen and impurities, so that the oxygen possessed by the oxide 530 does not diffuse to the insulator 520 side. Further, it is possible to suppress the conductor 503 from reacting with the oxygen possessed by the insulator 524 and the oxide 530.

[0122] The insulator 522 is preferably a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator functioning as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0123] In particular, it is preferable to use an insulator containing one or both of oxides of aluminum and hafnium, which is an insulating material having a function of suppressing diffusion of impurities and oxygen (such that the oxygen is less permeable). As the insulator containing one or both of oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), and the like. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the incorporation of impurities such as hydrogen from the periphery of the transistor 500 into the oxide 530.

[0124] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide may be added to these insulators. Or these insulators may be nitrided. The above insulators may be laminated with silicon oxide, silicon oxynitride, or silicon nitride and used.

[0125] Also, the insulator 520 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Further, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride, an insulator 520 having a laminated structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0126] In the transistors 500 of FIGS. 5A and 5B, the insulator 520, the insulator 522, and the insulator 524 are shown as the second gate insulating film having a three-layer laminated structure, but the second gate insulating film may have a single-layer, two-layer, or four-layer or more laminated structure. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used.

[0127] The transistor 500 uses a metal oxide that functions as an oxide semiconductor for the oxide 530 including the channel formation region. For example, as the oxide 530, a metal oxide such as an In-M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used.

[0128] The formation of the metal oxide that functions as an oxide semiconductor may be performed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide that functions as an oxide semiconductor will be described in detail in other embodiments.

[0129] Also, as the metal oxide that functions as the channel formation region in the oxide 530, it is preferable to use one having a bandgap of 2 eV or more, preferably 2.5 eV or more. Thus, by using a metal oxide with a large bandgap, the off-current of the transistor can be reduced.

[0130] The oxide 530 has the oxide 530a under the oxide 530b, so that the diffusion of impurities from the constituent formed below the oxide 530a to the oxide 530b can be suppressed.

[0131] Note that the oxide 530 preferably has a laminated structure of a plurality of oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 530a, the atomic ratio of the element M in the constituent elements is preferably larger than the atomic ratio of the element M in the constituent elements in the metal oxide used for the oxide 530b. Also, in the metal oxide used for the oxide 530a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. Further, in the metal oxide used for the oxide 530b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 530a.

[0132] Also, it is preferable that the energy of the lower end of the conduction band of the oxide 530a is higher than the energy of the lower end of the conduction band of the oxide 530b. In other words, it is preferable that the electron affinity of the oxide 530a is smaller than the electron affinity of the oxide 530b.

[0133] Here, at the junction of the oxide 530a and the oxide 530b, the energy level of the lower end of the conduction band changes smoothly. In other words, it can also be said that the energy level of the lower end of the conduction band at the junction of the oxide 530a and the oxide 530b changes continuously or is continuously joined. To achieve this, it is advisable to lower the density of defect energy levels in the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0134] Specifically, by having a common element (as the main component) other than oxygen in the oxide 530a and the oxide 530b, a mixed layer with a low density of defect energy levels can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, it is advisable to use an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, etc. as the oxide 530a.

[0135] At this time, the main path of the carrier becomes the oxide 530b. By configuring the oxide 530a as described above, the density of defect levels at the interface between the oxide 530a and the oxide 530b can be reduced. Therefore, the influence of interface scattering on carrier conduction becomes small, and the transistor 500 can obtain a high on-current.

[0136] On the oxide 530b, a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided. As the conductor 542a and the conductor 542b, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements, etc. are preferably used. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Furthermore, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.

[0137] In addition, in FIG. 5A, although the conductors 542a and 542b are shown as a single-layer structure, they may also be a laminated structure of two or more layers. For example, a tantalum nitride film and a tungsten film may be laminated. Also, a titanium film and an aluminum film may be laminated. Further, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, or a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0138] Also, a three-layer structure in which a titanium film or a titanium nitride film is provided, an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and a titanium film or a titanium nitride film is further formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film is provided, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed thereon, and the like exist. In addition, a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0139] Also, as shown in FIG. 5A, regions 543a and 543b may be formed as low-resistance regions at the interface between the oxide 530 and the conductor 542a (conductor 542b) and in the vicinity thereof. At this time, region 543a functions as one of the source region or the drain region, and region 543b functions as the other of the source region or the drain region. Also, a channel formation region is formed in the region sandwiched between region 543a and region 543b.

[0140] By providing the conductor 542a (conductor 542b) in contact with the oxide 530, the oxygen concentration in region 543a (region 543b) may be reduced. Also, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the components of the oxide 530 may be formed in region 543a (region 543b). In such a case, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0141] The insulator 544 is provided to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may be provided to cover the side surface of the oxide 530 and be in contact with the insulator 524.

[0142] As the insulator 544, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. can be used. Further, as the insulator 544, silicon oxynitride or silicon nitride can also be used.

[0143] In particular, as the insulator 544, it is preferable to use aluminum oxide, hafnium oxide, aluminum, and an oxide containing hafnium (hafnium aluminate), which is an insulator containing one or both oxides of aluminum or hafnium. In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in a later process. When the conductor 542a and the conductor 542b are made of a material having oxidation resistance or the conductivity does not significantly decrease even when oxygen is absorbed, the insulator 544 is not an essential component. It may be appropriately designed according to the required transistor characteristics.

[0144] By having the insulator 544, it is possible to suppress impurities such as water and hydrogen contained in the insulator 580 from diffusing into the oxide 530b through the insulator 545. Further, oxidation of the conductor 560 due to the excess oxygen of the insulator 580 can be suppressed.

[0145] The insulator 545 functions as a first gate insulating film. The insulator 545 is preferably formed using an insulator that contains an excessive amount of oxygen and releases oxygen when heated, similar to the insulator 524 described above.

[0146] Specifically, silicon oxide with excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, and silicon oxide with pores can be used. In particular, silicon oxide and silicon oxynitride are preferred because they are stable against heat.

[0147] By providing an insulator containing excess oxygen as insulator 545, oxygen can be effectively supplied from insulator 545 to the channel formation region of oxide 530b. Also, similar to insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in insulator 545 is reduced. The film thickness of insulator 545 is preferably 1 nm or more and 20 nm or less.

[0148] Further, in order to efficiently supply the excess oxygen possessed by insulator 545 to oxide 530, a metal oxide may be provided between insulator 545 and conductor 560. It is preferable that the metal oxide suppresses the diffusion of oxygen from insulator 545 to conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from insulator 545 to conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to oxide 530. Also, oxidation of conductor 560 by excess oxygen can be suppressed. As the metal oxide, a material that can be used for insulator 544 may be used.

[0149] Note that insulator 545 may have a stacked structure, similar to the second gate insulating film. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by forming an insulator that functions as a gate insulating film into a stacked structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a stacked structure that is thermally stable and has a high relative permittivity can be formed.

[0150] The conductor 560 that functions as the first gate electrode is shown as a two-layer structure in FIGS. 5A and 5B, but it may be a single-layer structure or a laminated structure of three or more layers.

[0151] For the conductor 560a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 560b by the oxygen contained in the insulator 545 and the resulting decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Also, as the conductor 560a, an oxide semiconductor applicable to the oxide 530 can be used. In that case, by forming the conductor 560b by sputtering, the electrical resistance value of the conductor 560a can be reduced to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0152] Also, for the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Also, since the conductor 560b also functions as a wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0153] Insulator 580 is provided on conductor 542a and conductor 542b via insulator 544. Insulator 580 preferably has an excess oxygen region. For example, as insulator 580, it is preferable to have silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be easily formed in a later process.

[0154] Insulator 580 preferably has an excess oxygen region. By providing insulator 580 that releases oxygen upon heating, oxygen in insulator 580 can be efficiently supplied to oxide 530. Note that it is preferable that the concentration of impurities such as water or hydrogen in insulator 580 is reduced.

[0155] The opening of insulator 580 is formed to overlap the region between conductor 542a and conductor 542b. Thereby, conductor 560 is formed to be embedded in the opening of insulator 580 and the region sandwiched between conductor 542a and conductor 542b.

[0156] When miniaturizing a semiconductor device, it is required to shorten the gate length, but it is necessary to prevent the conductivity of conductor 560 from decreasing. Therefore, if the film thickness of conductor 560 is increased, conductor 560 can have a high aspect ratio shape. In the present embodiment, since conductor 560 is provided to be embedded in the opening of insulator 580, even if conductor 560 has a high aspect ratio shape, it can be formed without collapsing conductor 560 during the process.

[0157] The insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 545. By forming the insulator 574 by a sputtering method, an excess oxygen region can be provided in the insulator 545 and the insulator 580. Thereby, oxygen can be supplied from the excess oxygen region into the oxide 530.

[0158] For example, as the insulator 574, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used.

[0159] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm or more and 3.0 nm or less. Therefore, aluminum oxide formed by a sputtering method can function as an oxygen supply source and also as a barrier film for impurities such as hydrogen.

[0160] Also, it is preferable to provide an insulator 581 that functions as an interlayer film on the insulator 574. Similar to the insulator 524 and the like, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

[0161] Also, conductors 540a and 540b are arranged in openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544. The conductors 540a and 540b are provided to face each other with the conductor 560 interposed therebetween. The conductors 540a and 540b have the same configuration as the conductors 546 and 548 described later.

[0162] An insulator 582 is provided on an insulator 581. It is preferable to use a material that is barrier against oxygen and hydrogen for the insulator 582. Therefore, the same material as that of the insulator 514 can be used for the insulator 582. For example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.

[0163] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the mixing of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. In addition, it is possible to suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, it is suitable to be used as a protective film for the transistor 500.

[0164] An insulator 586 is provided on the insulator 582. The same material as that of the insulator 320 can be used for the insulator 586. In addition, by applying a material having a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 586.

[0165] In addition, conductors 546, conductors 548, etc. are embedded in the insulator 520, the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, the insulator 581, the insulator 582, and the insulator 586.

[0166] The conductor 546 and the conductor 548 function as plugs or wirings connected to the capacitor 600, the transistor 500, or the transistor 550. The conductor 546 and the conductor 548 can be provided using the same materials as the conductor 328 and the conductor 330.

[0167] Also, after the formation of the transistor 500, an opening may be formed so as to surround the transistor 500, and an insulator having a high barrier property against hydrogen or water may be formed so as to cover the opening. By wrapping the transistor 500 with the above-described insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 500 may be collectively wrapped with an insulator having a high barrier property against hydrogen or water. When forming an opening so as to surround the transistor 500, for example, when forming an opening reaching the insulator 522 or the insulator 514 and forming the above-described insulator having a high barrier property so as to be in contact with the insulator 522 or the insulator 514, it is possible to also serve as part of the manufacturing process of the transistor 500, which is preferable. As the insulator having a high barrier property against hydrogen or water, for example, the same material as the insulator 522 or the insulator 514 may be used.

[0168] Subsequently, a capacitor 600 is provided above the transistor 500. The capacitor 600 includes a conductor 610, a conductor 620, and an insulator 630.

[0169] Also, a conductor 612 may be provided on the conductor 546 and the conductor 548. The conductor 612 functions as a plug or wiring connected to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. Note that the conductor 612 and the conductor 610 can be formed simultaneously.

[0170] For the conductor 612 and the conductor 610, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above-described elements as components can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can also be applied.

[0171] In the present embodiment, the conductor 612 and the conductor 610 are shown in a single-layer configuration, but the present invention is not limited to this configuration, and a laminated configuration of two or more layers may also be used. For example, a conductor having barrier properties, and a conductor having high adhesiveness to the conductor having barrier properties and the conductor having high conductivity may be formed between the conductor having barrier properties and the conductor having high conductivity.

[0172] The conductor 620 is provided so as to overlap the conductor 610 with the insulator 630 interposed therebetween. Note that, as the conductor 620, a conductive material such as a metal material, an alloy material, or a metal oxide material can be used. It is preferable to use a high melting point material such as tungsten or molybdenum that achieves both heat resistance and conductivity, and it is particularly preferable to use tungsten. Further, when forming simultaneously with other components such as a conductor, Cu (copper), Al (aluminum), or the like, which is a low resistance metal material, may be used.

[0173] An insulator 640 is provided on the conductor 620 and the insulator 630. The insulator 640 can be provided using the same material as the insulator 320. Further, the insulator 640 may function as a planarization film that covers the uneven shape below it.

[0174] By using this configuration, in a semiconductor device using a transistor having an oxide semiconductor, miniaturization or high integration can be achieved.

[0175] As substrates that can be used in a semiconductor device according to an aspect of the present invention, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (for example, a stainless steel substrate, a substrate having a stainless steel foil, a tungsten substrate, a substrate having a tungsten foil, etc.), a semiconductor substrate (for example, a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate, etc.), an SOI substrate, etc. can be used. Further, a plastic substrate having heat resistance capable of withstanding the processing temperature of the present embodiment may be used. Examples of the glass substrate include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, or soda lime glass. In addition, crystallized glass or the like can be used.

[0176] Alternatively, as the substrate, a flexible substrate, a laminated film, paper containing a fibrous material, or a base film can be used. Examples of the flexible substrate, the laminated film, the base film, etc. include the following. For example, plastics typified by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Alternatively, as an example, there is a synthetic resin such as acrylic. Alternatively, as an example, there are polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Alternatively, as an example, there are polyamide, polyimide, aramid resin, epoxy resin, an inorganic vapor deposition film, or papers. In particular, by manufacturing a transistor using a semiconductor substrate, a single crystal substrate, or an SOI substrate, etc., a transistor with less variation in characteristics, size, or shape, high current capacity, and small size can be manufactured. When a circuit is configured with such a transistor, power consumption reduction or high integration of the circuit can be achieved.

[0177] Further, a flexible substrate may be used as the substrate, and transistors, resistors, and / or capacitors may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate and transistors, resistors, and / or capacitors. After partially or fully completing a semiconductor device on the release layer, the release layer can be separated from the substrate and used for transfer onto another substrate. At this time, transistors, resistors, and / or capacitors can be transferred onto substrates with poor heat resistance or flexible substrates. Note that, for example, a stacked structure of inorganic films such as a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, a silicon film containing hydrogen, or the like can be used for the above-described release layer.

[0178] That is, a semiconductor device may be formed on a certain substrate and then transferred onto another substrate. As an example of the substrate onto which the semiconductor device is transferred, in addition to the substrate on which the above-described transistors can be formed, there are a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, hemp), synthetic fibers (nylon, polyurethane, polyester), or regenerated fibers (acetate, cuprammonium rayon, rayon, regenerated polyester), etc.), a leather substrate, or a rubber substrate. By using these substrates, it is possible to manufacture a flexible semiconductor device, manufacture a semiconductor device that is difficult to break, impart heat resistance, reduce weight, or reduce thickness.

[0179] By providing a semiconductor device on a flexible substrate, it is possible to suppress an increase in weight and provide a semiconductor device that is difficult to break.

[0180] <Modification Example 1 of Transistor> The transistor 500A shown in FIGS. 6A to 6C is a modified example of the transistor 500 having the configuration shown in FIGS. 5A and 5B. FIG. 6A is a top view of the transistor 500A, FIG. 6B is a cross-sectional view of the transistor 500A in the channel length direction, and FIG. 6C is a cross-sectional view of the transistor 500A in the channel width direction. Note that the configuration shown in FIGS. 6A to 6C can also be applied to other transistors included in a semiconductor device according to an aspect of the present invention, such as the transistor 550.

[0181] The transistor 500A having the configuration shown in FIGS. 6A to 6C is different from the transistor 500 having the configuration shown in FIGS. 5A and 5B in that it has an insulator 552, an insulator 513, and an insulator 404. Further, the transistor 500A is different from the transistor 500 having the configuration shown in FIGS. 5A and 5B in that the insulator 552 is provided in contact with the side surface of the conductor 540a and the insulator 552 is provided in contact with the side surface of the conductor 540b. Furthermore, the transistor 500A is different from the transistor 500 having the configuration shown in FIGS. 5A and 5B in that it does not have an insulator 520.

[0182] In the transistor 500A having the configuration shown in FIGS. 6A to 6C, the insulator 513 is provided on the insulator 512. Also, the insulator 404 is provided on the insulator 574 and on the insulator 513.

[0183] In the transistor 500A having the configuration shown in FIGS. 6A to 6C, the insulators 514, 516, 522, 524, 544, 580, and 574 are patterned, and the insulator 404 is configured to cover these. That is, the insulator 404 is in contact with the upper surface of the insulator 574, the side surface of the insulator 574, the side surface of the insulator 580, the side surface of the insulator 544, the side surface of the insulator 524, the side surface of the insulator 522, the side surface of the insulator 516, the side surface of the insulator 514, and the upper surface of the insulator 513, respectively. Thereby, the oxide 530 and the like are isolated from the outside by the insulator 404 and the insulator 513.

[0184] The insulator 513 and the insulator 404 preferably have a high function of suppressing the diffusion of hydrogen (for example, at least one of a hydrogen atom, a hydrogen molecule, etc.) or water molecules. For example, as the insulator 513 and the insulator 404, it is preferable to use silicon nitride or silicon oxynitride, which is a material with high hydrogen barrier properties. Thereby, since the diffusion of hydrogen or the like into the oxide 530 can be suppressed, the deterioration of the characteristics of the transistor 500A can be suppressed. Therefore, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0185] The insulator 552 is provided in contact with the insulator 581, the insulator 404, the insulator 574, the insulator 580, and the insulator 544. The insulator 552 preferably has a function of suppressing the diffusion of hydrogen or water molecules. For example, as the insulator 552, it is preferable to use an insulator such as silicon nitride, aluminum oxide, or silicon oxynitride, which is a material with high hydrogen barrier properties. In particular, since silicon nitride is a material with high hydrogen barrier properties, it is suitable for use as the insulator 552. By using a material with high hydrogen barrier properties as the insulator 552, the diffusion of impurities such as water or hydrogen from the insulator 580 or the like through the conductor 540a and the conductor 540b into the oxide 530 can be suppressed. Also, the absorption of oxygen contained in the insulator 580 by the conductor 540a and the conductor 540b can be suppressed. As described above, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0186] <Modification Example 2 of Transistor> A configuration example of the transistor 500B will be described with reference to FIGS. 7A, 7B, and 7C. FIG. 7A is a top view of the transistor 500B. FIG. 7B is a cross-sectional view of the L1-L2 portion indicated by the dashed line in FIG. 7A. FIG. 7C is a cross-sectional view of the W1-W2 portion indicated by the dashed line in FIG. 7A. In the top view of FIG. 7A, the description of some elements is omitted for clarity of the figure.

[0187] Transistor 500B is a modified example of transistor 500 and is a transistor that can be replaced with transistor 500. Therefore, to avoid repeating the description, mainly the differences between transistor 500B and transistor 500 will be described.

[0188] The conductor 560 that functions as the first gate electrode has a conductor 560a and a conductor 560b on the conductor 560a. It is preferable to use a conductive material for the conductor 560a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0189] Since the conductor 560a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 560b can be improved. That is, by having the conductor 560a, oxidation of the conductor 560b can be suppressed, and a decrease in conductivity can be prevented.

[0190] Also, it is preferable to provide an insulator 544 so as to cover the upper surface and side surface of the conductor 560 and the side surface of the insulator 545. The insulator 544 may be made of an insulating material that has a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen. For example, it is preferable to use aluminum oxide or hafnium oxide. Additionally, other materials such as metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can also be used.

[0191] By providing the insulator 544, oxidation of the conductor 560 can be suppressed. Also, by having the insulator 544, diffusion of impurities such as water and hydrogen that the insulator 580 has into the transistor 500B can be suppressed.

[0192] Since the conductor 560 overlaps a part of the conductor 542a and a part of the conductor 542b in the transistor 500B, the parasitic capacitance is likely to be larger than that of the transistor 500. Therefore, the operating frequency tends to be lower than that of the transistor 500. However, since the process of providing an opening in the insulator 580 and filling the conductor 560, the insulator 545, etc. is unnecessary, the productivity is high compared to the transistor 500.

[0193] The configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments.

[0194] (Embodiment 3) In this embodiment, an example of a package containing an image sensor chip and a camera module will be described. For the image sensor chip, for example, the configuration of the imaging device according to one aspect of the present invention shown in FIG. 3 can be used.

[0195] FIG. 8A is an external perspective view of the upper surface side of a package containing an image sensor chip. The package includes a package substrate 810 for fixing the image sensor chip 850, a cover glass 820, an adhesive 830 for bonding the two, and the like.

[0196] FIG. 8B is an external perspective view of the lower surface side of the package. The lower surface of the package has a BGA (Ball Grid Array) configuration with solder balls as bumps 840. Note that it is not limited to BGA, and it may be LGA (Land Grid Array), PGA (Pin Grid Array), or the like.

[0197] FIG. 8C is a perspective view of the package shown with a part of the cover glass 820 and the adhesive 830 omitted, and FIG. 8D is a cross-sectional view of the package. An electrode pad 860 is formed on the package substrate 810, and the electrode pad 860 and the bump 840 are electrically connected via the through hole 880 and the land 885. The electrode pad 860 is electrically connected to the electrode of the image sensor chip 850 by the wire 870.

[0198] Further, FIG. 9A is an external perspective view of the upper surface side of the camera module in which the image sensor chip is housed in a lens-integrated package. The camera module includes a package substrate 811 for fixing the image sensor chip 851, a lens cover 821, a lens 835, and the like. Also, an IC chip 890 having functions such as a drive circuit and a signal conversion circuit of the imaging device is provided between the package substrate 811 and the image sensor chip 851, and has a configuration as a SiP (System in package).

[0199] FIG. 9B is an external perspective view of the lower surface side of the camera module. It has a QFN (Quad flat no-lead package) configuration in which mounting lands 841 are provided on the lower surface and four side surfaces of the package substrate 811. Note that this configuration is an example, and it may be a QFP (Quad flat package) or the aforementioned BGA or the like.

[0200] FIG. 9C is a perspective view of the module shown with a part of the lens cover 821 and the lens 835 omitted, and FIG. 9D is a cross-sectional view of the camera module. A part of the land 841 is used as the electrode pad 861, and the electrode pad 861 is electrically connected to the electrodes of the image sensor chip 851 and the IC chip 890 by the wire 871.

[0201] By housing the image sensor chip in a package in the form described above, mounting on a printed circuit board or the like becomes easy, and the image sensor chip can be incorporated into various semiconductor devices and electronic devices.

[0202] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0203] (Embodiment 4) As an imaging device according to an aspect of the present invention and an electronic device that can use a semiconductor device including the imaging device, a display device, a personal computer, an image storage device or an image playback device equipped with a recording medium, a mobile phone, a game machine including a portable type, a portable data terminal, an e-book terminal, a video camera, a camera such as a digital still camera, a goggle type display (head-mounted display), a navigation system, an audio playback device (car audio, digital audio player, etc.), a copying machine, a facsimile machine, a printer, a printer multifunction machine, an automated teller machine (ATM), a vending machine, etc. can be mentioned. Specific examples of these electronic devices are shown in FIG. 10.

[0204] FIG. 10A is a surveillance camera and has a housing 951, a lens 952, a support portion 953, etc. As one of the components for acquiring an image in the surveillance camera, an imaging device according to an aspect of the present invention can be provided. Note that the surveillance camera is a common name and does not limit the use. For example, a device having a function as a surveillance camera is also called a camera or a video camera.

[0205] FIG. 10B is a video camera and has a first housing 971, a second housing 972, a display portion 973, operation keys 974, a lens 975, a connection portion 976, etc. The operation keys 974 and the lens 975 are provided on the first housing 971, and the display portion 973 is provided on the second housing 972. As one of the components for acquiring an image in the video camera, an imaging device according to an aspect of the present invention can be provided. The imaging device according to an aspect of the present invention can obtain an image with an extended dynamic range.

[0206] FIG. 10C is a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, a light emitting unit 967, a lens 965, etc. One of the components for obtaining an image in the digital camera can be provided with an imaging device according to an aspect of the present invention. The imaging device according to an aspect of the present invention can obtain an image with an extended dynamic range.

[0207] FIG. 10D is a wristwatch-type information terminal, which includes a housing 931, a display unit 932, a wristband 933, an operation button 935, a crown 936, a camera 939, etc. The display unit 932 may be a touch panel. One of the components for obtaining an image in the information terminal can be provided with an imaging device according to an aspect of the present invention. The imaging device according to an aspect of the present invention can obtain an image with an extended dynamic range.

[0208] FIG. 10E is a portable game machine, which includes a housing 901, a housing 902, a display unit 903, a display unit 904, a microphone 905, a speaker 906, operation keys 907, a stylus 908, a camera 909, etc. Although the portable game machine shown in FIG. 10E has two display units 903 and 904, the number of display units of the portable game machine is not limited to this. One of the components for obtaining an image in the portable game machine can be provided with an imaging device according to an aspect of the present invention. The imaging device according to an aspect of the present invention can obtain an image with an extended dynamic range.

[0209] FIG. 10F is a portable data terminal, which includes a housing 911, a display unit 912, a speaker, a camera 919, etc. Information can be input and output by the touch panel function of the display unit 912. One of the components for obtaining an image in the portable data terminal can be provided with an imaging device according to an aspect of the present invention. The imaging device according to an aspect of the present invention can obtain an image with an extended dynamic range.

[0210] Note that this embodiment can be appropriately combined with other embodiments shown in this specification.

Description of Reference Numerals

[0211] 311: Substrate, 313: Semiconductor region, 314a: Low-resistance region, 314b: Low-resistance region, 315: Insulator, 316: Conductor, 320: Insulator, 322: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor, 360: Insulator, 362: Insulator, 364: Insulator, 366: Conductor, 370: Insulator, 372: Insulator, 374: Insulator, 376: Conductor, 380: Insulator, 382: Insulator, 384: Insulator, 386: Conductor, 404: Insulator, 500: Transistor, 500A: Transistor, 500B: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 510: Insulator, 512: Insulator, 513: Insulator, 514: Insulator, 516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 540a: Conductor, 540b: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544: Insulator, 545: Insulator, 546: Conductor, 548: Conductor, 550: Transistor, 552: Insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 574: Insulator, 580: Insulator, 581: Insulator, 582: Insulator, 586: Insulator, 600: Capacitance, 610: Conductor, 612: Conductor, 620: Conductor, 630: Insulator, 640: Insulator, 810: Package substrate, 811: Package substrate, 820: Cover glass, 821: Lens cover, 830: Adhesive, 835: Lens, 840: Bump, 841: Land, 850: Image sensor chip, 851: Image sensor chip, 860: Electrode pad, 861: Electrode pad, 870: Wire, 871: Wire, 880: Through hole, 885: Land, 890: IC chip, 901: Housing, 902: Housing, 903: Display unit, 904: Display unit, 905: Microphone, 906: Speaker, 907: Operation key, 908: Stylus, 909: Camera, 911: Housing, 912: Display unit, 919: Camera, 931: Housing, 932: Display unit, 933: Wristband, 935: Button, 936: Watch head, 939: Camera, 951: Housing, 952: Lens, 953: Support part, 961: Housing, 962: Shutter button, 963: Microphone, 965: Lens, 967: Light-emitting part,971: Housing, 972: Housing, 973: Display unit, 974: Operation key, 975: Lens, 976: Connection part

Claims

【Claim 1】 An imaging device having a first transistor to a sixth transistor, a photoelectric conversion element, a first capacitor element, and a second capacitor element, One electrode of the photoelectric conversion element is electrically connected to one of the source or drain of the first transistor, The other of the source or drain of the first transistor is electrically connected to one of the source or drain of the second transistor, The other of the source or drain of the first transistor is electrically connected to one electrode of the first capacitor element, The other of the source or drain of the first transistor is electrically connected to the gate electrode of the third transistor, One of the source or drain of the third transistor is electrically connected to one of the source or drain of the fourth transistor, The other of the source or drain of the second transistor is electrically connected to one electrode of the second capacitor element, One electrode of the second capacitor element is electrically connected to one of the source or drain of the fifth transistor, One of the source or drain of the sixth transistor is electrically connected to one of the source or drain of the first transistor, The first transistor, the third transistor, the fourth transistor, and the sixth transistor have silicon in a region where a channel is formed, The second transistor has a first oxide semiconductor, a first insulator having a region located above the first oxide semiconductor, a second insulator having a region located above the first oxide semiconductor, and a first conductor having a region located above the first oxide semiconductor, The first oxide semiconductor has a region where a channel of the second transistor is formed, The first insulator has a first opening, The second insulator has a region in contact with the upper surface of the first oxide semiconductor and a region in contact with the side surface of the first insulator in the first opening. The first conductor has a region that functions as a gate electrode of the second transistor. The fifth transistor includes a second oxide semiconductor, a third insulator having a region located above the second oxide semiconductor, a fourth insulator having a region located above the first oxide semiconductor, and a second conductor having a region located above the second oxide semiconductor. The second oxide semiconductor has a region where a channel of the fifth transistor is formed. The third insulator has a second opening. The fourth insulator has a region in contact with the upper surface of the second oxide semiconductor and a region in contact with the side surface of the third insulator in the second opening. The second conductor has a region that functions as a gate electrode of the fifth transistor. The imaging device, wherein the second capacitor element has a larger capacitance than the first capacitor element. Claim 2 The imaging device according to claim 1, wherein the photoelectric conversion element and the first transistor are provided adjacent to each other, and the photoelectric conversion element and the source or drain of the sixth transistor are provided adjacent to each other and are formed on the same silicon substrate.

Images