Phase change memory cell

Abstract

The semiconductor structure includes a heater surrounded by a dielectric layer, a projection liner over the heater, a phase change material layer above the projection liner, and a top electrode contact surrounding a top of the phase change material layer. The projection liner can cover a top surface of the heater. The projection liner can separate the phase change material layer from the second dielectric layer and the heater. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The top electrode contact can be separated from the phase change material layer by a metal liner. The semiconductor structure can include a bottom electrode below and in electrical contact with the heater, and a top electrode above and in electrical contact with the phase change material layer.

Description

Technical Field

[0001] The present invention generally relates to phase change memory cells, and more specifically to a method of forming a phase change memory having a wrap-around ring type electrode contact and a projection liner, and a structure thereof.

Background Art

[0002] Phase change memory cells can be used for data storage. Phase change memory cells are non-volatile random access memories. A typical configuration of a phase change memory cell can include a phase change material disposed between and coupled to at least two electrodes. When the phase change memory cell is in use, the phase change material can operate in one of at least two reversible convertible phases, an amorphous phase and a crystalline phase. The amorphous phase and the crystalline phase are different from each other. In the amorphous phase, the phase change material has a significantly higher resistance compared to the crystalline phase. To facilitate the phase transition, energy capable of causing the desired phase transition, such as electrical energy, thermal energy, any other suitable form of energy, or a combination thereof, is supplied to the phase change material.

[0003] To facilitate the change from the crystalline phase to the amorphous phase, electrical energy such as a voltage pulse can be applied to one of the electrodes, for example, the bottom electrode, to heat the phase change material at or near that electrode above its melting point. The phase change material is then rapidly cooled below its glass temperature. The phase change material thus treated is converted from the crystalline phase to the amorphous phase. An amorphous region where such a phase transition has occurred is generated in the phase change material.

Summary of the Invention

[0004] According to one aspect of the present invention, a semiconductor structure includes a heater surrounded by a dielectric layer, a projection liner over the heater, a phase change material layer above the projection liner, and an upper electrode contact surrounding the top of the phase change material. The projection liner covers the top surface of the heater. The projection liner separates the phase change material layer from a second dielectric layer and the heater. The upper electrode contact is separated from the phase change material layer by a metal liner. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The upper electrode contact can be a wrap-around ring-type upper electrode contact that can extend vertically along the sidewalls of the phase change material layer. The semiconductor structure can include a bottom electrode below the heater and in electrical contact with the heater, and an upper electrode above the phase change material layer and in electrical contact with the phase change material layer. The semiconductor structure can include a mask layer above the upper electrode and in direct contact with the upper electrode, and a bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode. The phase change material layer can include a crystalline phase and an amorphous phase. The amorphous phase can be present directly above the heater. The semiconductor structure can further include a first metal layer below the bottom electrode contact and in electrical contact with the bottom electrode contact, a second metal layer above the upper electrode contact and in electrical contact with the upper electrode contact, and a via contact between the first metal layer and the second metal layer and in electrical contact with the first metal layer and the second metal layer.

[0005] According to another embodiment of the present invention, the semiconductor structure can include two or more phase change memory cells separated by a dielectric layer. Each of the two or more phase change memory cells can include a phase change material layer and a heater. The semiconductor structure can include two or more upper electrode contacts over the two or more phase change memory cells. The two or more upper electrode contacts can be separated from the phase change memory cells by a metal liner. The two or more upper electrode contacts can be wrap-around ring-shaped upper electrode contacts that can extend vertically along the sidewalls of the phase change material layer. The two or more upper electrode contacts can extend vertically along the sidewall portions of the phase change material layer. The phase change material layer can include a crystalline phase and an amorphous phase. The amorphous phase can be present directly above the heater. The two or more phase change memory cells can include a heater surrounded by a second dielectric layer, a projection liner over the heater, a phase change material layer above the projection liner, a bottom electrode below the heater and in electrical contact with the heater, and an upper electrode above the phase change material layer and in electrical contact with the phase change material layer. The projection liner can cover the upper surface of the heater. The projection liner can separate the phase change material layer from the second dielectric layer and the heater. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The semiconductor structure can include a mask layer above the upper electrode and in direct contact with the upper electrode, and a bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode. The semiconductor structure can further include a first metal layer below the bottom electrode contact and in electrical contact with the bottom electrode contact, a second metal layer above the upper electrode contact and in electrical contact with the upper electrode contact, and a via contact between the first metal layer and the second metal layer and in electrical contact with the first metal layer and the second metal layer.

[0006] According to another embodiment of the present invention, the method includes forming a heater surrounded by a second dielectric layer, depositing a projection liner over the heater, depositing a phase change material layer above the projection liner, and forming an upper electrode contact surrounding the upper portion of the phase change material layer. The phase change material layer can include a crystalline phase and an amorphous phase. The amorphous phase can be present directly above the heater. The projection liner can cover the upper surface of the heater. The projection liner can separate the phase change material layer from the second dielectric layer and the heater. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The upper electrode contact can be separated from the phase change material layer by a metal liner. The upper electrode contact can be a wrap-around ring-type upper electrode contact that extends vertically along the sidewalls of the phase change material layer. The method can include forming a bottom electrode in electrical contact with the heater below the heater, and depositing an upper electrode in electrical contact with the phase change material layer above the phase change material layer. The method can include depositing a mask layer in direct contact with the upper electrode above the upper electrode, and forming a bottom electrode contact in electrical contact with the bottom electrode below the bottom electrode.

Brief Description of the Drawings

[0007] The following detailed description is given by way of example and is not intended to limit the present invention solely thereto, and will be best understood in conjunction with the accompanying drawings.

[0008]

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[0009] The drawings are not necessarily to scale. The drawings are merely schematic and are not intended to depict specific parameters of the invention. The drawings are intended to depict only typical embodiments of the invention. In the drawings, like numbers represent like elements.

DETAILED DESCRIPTION OF THE INVENTION

[0010] In this specification, detailed embodiments of the claimed structures and methods are disclosed, but it should be understood that the disclosed embodiments are merely examples of the claimed structures and methods that can be embodied in various forms. However, the present invention can be embodied in many different forms and should not be construed as limited to the exemplary embodiments disclosed herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In this description, well-known features and techniques may be omitted in some cases to avoid unnecessarily obscuring the presented embodiments.

[0011] For the purposes of the following description, the terms "upper", "lower", "right", "left", "vertical", "horizontal", "top", "bottom", and derivatives thereof are related to the disclosed structures and methods oriented in the drawings. The terms "overlying", "atop", "on top", "positioned on", or "positioned atop" mean that a first element, e.g., a first structure, is present over a second element, e.g., a second structure, but intervening elements, e.g., an interface structure, may be present between the first and second elements. The term "direct contact" means that a first element, e.g., a first structure, and a second element, e.g., a second structure, are connected at the interface of the two elements without an intermediate conductive, insulating, or semiconductor layer therebetween.

[0012] To avoid obscuring the presentation of embodiments of the present invention, in the following detailed description, some processing steps or operations known in the art may be combined for presentation and illustration purposes and may not be described in detail. In other cases, some processing steps or operations known in the art may not be described at all. It should be understood that the following description is rather focused on the prominent features or elements of various embodiments of the present invention.

[0013] When a phase change memory cell is used, the phase change material can operate in one of at least two reversibly convertible phases, an amorphous phase and a crystalline phase. The amorphous and crystalline phases can also be referred to as the amorphous state and the crystalline state. The amorphous state of the phase change material exhibits high resistance and low conductance, while the crystalline state of the phase change material exhibits low resistance and high conductance. The amorphous and crystalline states can be utilized to program various data values of the phase change memory cell.

[0014] Programming of the various data values of the phase change memory cell can be achieved, for example, by applying an appropriate voltage to the phase change material using electrodes such as a bottom electrode and a top electrode. Depending on the applied voltage, the phase change material changes from a crystalline state to an amorphous state or vice versa. Further, the phase change memory cell can have various programming levels. Each programming level can correspond to a different voltage applied to the phase change material to program the phase change material. When the phase change memory cell is programmed, a read voltage is applied using the electrodes, and the information stored at that phase change material level can be retrieved. The read voltage can be made low enough to ensure that the application of the read voltage does not disturb the programmed cell state.

[0015] However, when the phase change memory cell is programmed, the resistance of the phase change memory cell may exhibit or experience resistance drift. More specifically, it is the amorphous state that can exhibit resistance drift. That is, the resistance of the phase change memory cell in the amorphous state can increase over time. The resistance of the phase change memory cell is unpredictable due to resistance drift. Therefore, it would be advantageous to reduce resistance drift and make the resistance of the phase change material predictable and reproducible. Further, by reducing resistance drift, the phase change memory cell can exhibit a resistance that can change linearly with the applied programming pulse.

[0016] To reduce resistance drift without impairing any attributes of the phase change memory cell, embodiments of the present invention provide a phase change memory cell structure having a wrap-around ring type electrode contact and a projection liner and a method of manufacturing such a structure.

[0017] Figures 1 - 4 show exemplary method steps for forming a phase change memory cell having a wrap - around ring - type electrode contact and a projection liner, according to one embodiment. Figures 1 - 3 are cross - sectional views drawn along cross - section line X - X. Figure 4 is a cross - sectional view drawn along cross - section lines X - X and Y - Y.

[0018] Next, referring to Figure 1, a structure 100 according to one embodiment is shown. The structure 100 can include a metal layer 102, an NBLOK 104, a first dielectric layer 106, a barrier layer 108, a bottom electrode 110, a bottom electrode contact 112, a second dielectric layer 114, and a heater 116. The metal layer 102 can be made of a metal such as copper, for example. The metal layer 102 may be referred to as the first metal layer. The NBLOK 104 is a barrier film used for copper chips. The NBLOK 104 can be made of nitrogen - doped silicon carbide or carbon - doped silicon nitride. The NBLOK 104 can be formed on the metal layer 102 using standard deposition methods. The NBLOK 104 may be referred to as the first NBLOK.

[0019] The first dielectric layer 106 can be deposited on the upper surface of the NBLOK 104 using known deposition techniques such as atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD). The first dielectric layer 106 can be made of any suitable low-k dielectric material, TEOS, or a bilayer of TEOS and NBLOK. The bottom electrode 110 can be formed within the trench of the first dielectric layer 106. When a trench (not shown) is formed, a barrier layer 108 can be conformally deposited using a known deposition technique such as ALD. The barrier layer 108 can be made of tantalum nitride (TaN), titanium nitride (TiN), or any combination thereof. The barrier layer 108 prevents the material forming the bottom electrode 110 from migrating into the first dielectric layer 106. Next, the trench is filled with a conductive metal such as copper, tungsten, cobalt, or aluminum to form the bottom electrode 110. A planarization process such as chemical mechanical polishing (CMP) is performed to remove excess material from the upper surface of the substrate 100.

[0020] In addition to the bottom electrode 110, the structure includes a bottom electrode contact 112. The bottom electrode contact 112 can be formed using standard deposition and lithography techniques. The bottom electrode contact 112 can be made of a conductive metal such as copper, tungsten, cobalt, or aluminum to allow current to flow through the bottom electrode 110 and the bottom electrode contact 112. The bottom electrode contact 112 is below and in electrical contact with the bottom electrode 110. The bottom electrode contact 112 is above and in electrical contact with the metal layer 102. Although two bottom electrodes 110 and two bottom electrode contacts 112 are shown, it should be appreciated that embodiments of the present invention can include any number of bottom electrodes 110 and bottom electrode contacts 112.

[0021] Once the bottom electrode 110 is formed, a second dielectric layer 114 is deposited on the top surface of the structure 100 using known deposition techniques such as ALD, CVD, or PVD. The second dielectric layer 114 can be made of a dielectric material such as silicon nitride and can be fabricated to a thickness of about 50 nm.

[0022] Continuing with reference to FIG. 1, a heater 116 is formed in the second dielectric layer 114 above the bottom electrode 110 such that the bottom electrode 110 is below the heater 116 and in electrical contact therewith. The heater 116 is surrounded by the second dielectric layer 114. Although two heaters are shown, it should be appreciated that embodiments of the present invention can include any number of heaters 116. In one embodiment, each heater 116 includes an outer layer 118, an intermediate layer 120, and an inner layer 122. In an alternative embodiment, the heater 116 can be made of a single material such as, for example, the material that constitutes the intermediate layer 120.

[0023] The heater 116 extends through the second dielectric layer 114 to the bottom electrode 110 and is formed in the trench. In order to remove the second dielectric layer 114 to form the heater 116, a resist such as photoresist can be deposited and patterned. Using the patterned resist as an etching mask, an etching process such as reactive ion etching (RIE) can be performed to remove the second dielectric layer 114 until the bottom electrode 110 is exposed. The outer layer 118 can be conformally deposited to a thickness of about 5 nm in the trench using a deposition process such as ALD. The outer layer 118 can be made of a material such as TaN. The intermediate layer 120 can be conformally deposited to a thickness of about 6 nm on top of the outer layer 118 in the trench using a deposition process such as ALD. The intermediate layer 120 can be made of a material such as TiN. The inner layer 122 can be conformally deposited to a thickness of about 20 nm on top of the intermediate layer 120 so as to fill the trench using a deposition process such as ALD. The intermediate layer 120 exists between the outer layer 118 and the inner layer 122. The inner layer 122 can be made of a material such as TaN. The inner layer 122 is surrounded by the intermediate layer 120. When the heater 116 is formed, a CMP process can be used to remove the extra portions of the outer layer 118, the intermediate layer 120, and the inner layer 122 remaining on the upper surface of the structure 100.

[0024] Next, referring to FIG. 2, a structure 100 having a projection liner 124 according to one embodiment is shown. The projection liner 124 is deposited on the upper surface of the structure 110 to cover the heater 116 and the second dielectric layer 114 using a deposition process such as ALD, for example. The projection liner 124 can be made of a semiconductor material such as amorphous carbon or amorphous silicon, for example. The projection liner 124 can also be made of a metal or a metal nitride, in which case the metal component can be a refractory material such as molybdenum, tungsten, titanium, tantalum, etc. For example, the projection liner 124 can be made of TaN. The projection liner 124 enables current to flow from the bottom electrode 110 through the phase change material layer to the upper electrode, bypassing the amorphous portion of the phase change material layer.

[0025] After the projection liner 124 is deposited on the upper surface of the structure 100 and covers the upper surfaces of the heater 116 and the second dielectric layer 114, the projection liner 124 is then patterned (not shown). The patterning can be performed by lithography and etching. An etching process such as an RIE process can be performed to remove specific portions of the projection liner 124. The resulting structure 100 includes the portion of the projection liner 124 that remains directly above the heater 116. The projection liner 124 extends laterally beyond the upper surface of the heater 116, but the projection liner 124 does not extend laterally across the entire upper surface of the second dielectric layer 114.

[0026] Next, referring to FIG. 3, a structure 100 according to one embodiment having a phase change material layer 126, an upper electrode 128, and a mask layer 130 is shown. The phase change material layer 126 can be deposited on the upper surface of the structure 100 using a known deposition method such as ALD. The phase change material layer 126 can include both a crystalline phase 126a and an amorphous phase 126b. The amorphous phase 126b can be present directly above the heater 116. The phase change material layer 126 can preferably be formed from a type of material including a chalcogenide-based material. Chalcogens include any of the four elements that form part of Group VI of the periodic table, oxygen (O), sulfur (S), selenium (Se), and tellurium (Te). A chalcogenide includes a compound of a chalcogen and a more electrically positive element or radical. A chalcogenide alloy includes a combination of a chalcogenide and another material such as a transition metal. Chalcogenide alloys typically include one or more elements from Group IV of the periodic table of elements, such as germanium (Ge) and tin (Sn). Chalcogenide alloys often include compounds containing one or more of antimony (Sb), gallium (Ga), indium (In), and silver (Ag).

[0027] The technical literature describes many phase change-based memory materials, including alloys such as Ga / Sb, In / Sb, In / Se, Sb / Te, Ge / Te, Ge / Sb / Te, In / Sb / Te, Ga / Se / Te, Sn / Sb / Te, In / Sb / Ge, Ag / In / Sb / Te, Ge / Sn / Sb / Te, Ge / Sb / Se / Te, and Te / Ge / Sb / S. In the family of Ge / Sb / Te alloys, a wide range of alloy compositions are processable. This composition can be characterized as TeGe.Sb 100-(a+b) For example. More generally, chromium (Cr), iron (Fe), nickel (Ni), niobium (Nb), palladium (Pd), platinum (Pt), and mixtures or alloys thereof can be combined with Ge / Sb / Te to form a phase change alloy having programmable resistance characteristics.

[0028] The upper electrode 128 is deposited on the phase change material layer 126 such that current can flow from the bottom electrode 110 through the phase change material layer 126 to the upper electrode 128. The upper electrode 128 is above and in electrical contact with the phase change material layer 126. To form the upper electrode 128, known suitable deposition techniques such as ALD, CVD, or PVD can be used. The upper electrode 128 is in direct contact with the phase change material layer 126. The upper electrode 128 can be made of substantially the same conductive material as the bottom electrode 110, such as TiN for example.

[0029] The mask layer 130 is deposited on the upper electrode 128 using known deposition techniques. The mask layer 130 is in direct contact with the upper electrode 128. The mask layer 130 can be made of a dielectric material such as silicon dioxide, silicon nitride, or silicon oxynitride or a combination thereof. In some embodiments, the mask layer 130 can be formed using a conventional deposition process such as CVD or PVD. The mask layer 130 is then patterned (not shown). The patterning can be performed by lithography and etching. An etching process such as an RIE process can be performed to remove portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126. The resulting structure 100 includes the first projection liner 124, the phase change material layer 126, the upper electrode 128, and the portions of the mask layer 130 remaining directly above the heater 116.

[0030] Next, referring to FIG. 4, a structure 100 is shown having a third dielectric layer 132, an upper electrode contact 136, a via contact 138, a second NBLOK 140, and a second metal layer 142 according to one embodiment. After the mask layer 130 is patterned, the third dielectric layer 132 is deposited on the upper surface of the structure 100 so as to cover the upper surfaces of the mask layer 130 and the second dielectric layer 114. The third dielectric layer 132 can be made of any suitable dielectric material such as, for example, silicon nitride, a silicon-based low-k dielectric, or TEOS. The third dielectric layer 132 can be formed using known suitable deposition techniques such as, for example, ALD, CVD, or PVD. The third dielectric layer 132 is made of a material having low thermal conductivity. As a result, the third dielectric layer 132 functions as a heat insulator. A planarization process such as CMP is performed to remove the excess portion of the material forming the third dielectric layer 132 from the upper surface of the structure 100.

[0031] The structure 100 is patterned to create via contact openings and upper electrode contact openings (not shown). The upper electrode contact opening extends from the upper surface of the third dielectric layer 132 through the mask layer 130 to the upper electrode 128. The upper electrode contact opening extends vertically downwards to below the upper surface of the phase change material layer 126. The via opening extends from the upper surface of the third dielectric layer 132 through the second and first dielectric layers 114, 106, through the NBLOK 104, and to the metal layer 102.

[0032] Once the openings are formed, a metal liner 134 is then conformally deposited within the upper electrode opening using known deposition techniques. The metal liner 134 can be made of TaN, TiN, or any combination thereof. Next, the openings are filled with a conductive material such as, for example, copper, tungsten, cobalt, or aluminum to form the upper electrode contact 136. By having the metal liner 134 within the upper electrode opening, it becomes possible to form the conductive material well within the above-described openings.

[0033] The upper electrode contact 136 extends vertically downward through the mask layer 130 and the upper electrode 128 and into the phase change material layer 126. As a result, a portion of the upper electrode contact 136 surrounds the upper portion of the phase change material layer 126. The upper electrode contact 136 is in electrical contact with the upper electrode 128. The bottom of the upper electrode contact 136 forms a ring around the mask layer 130, the upper electrode 128, and the upper portion of the phase change material layer 126.

[0034] By combining the projection liner 124 with the wrap-around ring-shaped upper electrode contact 136, the resistance drift coefficient is improved and the required programming current is reduced. Further, by having the mask layer 130 on the upper electrode 128, heat can dissipate through the upper electrode 128 and the phase change material layer 126. This in turn provides a longer heat path with better insulation, reducing the required programming current. For example, during readout, a voltage can be applied to the bottom electrode 110 and current can flow from the bottom electrode to the upper electrode 128. The resistance of the first projection liner 124 is selected such that the projection liner 124 has a slight effect on the write operation (during which a phase transition occurs) but a significant effect on the read operation. This is actually possible because the electrical transport of the amorphous phase 126b is highly non-linear. At high electric fields, the amorphous material undergoes so-called electron threshold switching and enters a low resistance state (on state). Thus, during the high electric field write process, if the resistance of the projection liner 124 becomes significantly higher than the on-state resistance of the amorphous phase 126b, most of the current will flow through the phase change material layer 126.

[0035] However, during the read process at low electric fields, the current bypasses the high-resistance amorphous phase 126b and flows through a portion of the first projection liner 124 that is parallel to it. Thus, the resistance of the device is dominated by the resistance of that portion of the projection liner 124 and serves as a good measure of the amorphous / crystalline phase configuration. Information typically stored in the length of the amorphous phase 126b is, in a sense, projected onto the projection liner 124. Note that the "projection" is designed to occur only during the read process, even when the projection liner 124 is present during both read and write operations. Thus, the projection liner 124 provides a conductive path parallel to the crystalline phase 126a and the amorphous phase 126b of the phase change material layer 126. The projection liner 124 functions as a parallel resistor that bypasses the current around the amorphous phase 126b.

[0036] Continuing to refer to FIG. 4, to form the via contact 138, first, the barrier layer 108 is deposited within the via opening. Next, the via opening is filled with a conductive material such as, for example, copper, tungsten, cobalt, or aluminum. Next, a CMP process can be performed to remove excess material from the top surface of the structure 100. The via contact 138 is between the first metal layer 102 and the second metal layer 142 and is in electrical contact with them.

[0037] After the upper electrode contact 136 and via contact 138 are formed, the structure 100 further undergoes processing to form a second NBLOK 140 and a second metal layer 142. Using known deposition techniques, the second NBLOK 140 can be deposited on the upper surface of the structure 100. The second NBLOK 140 can be made of substantially the same material as the NBLOK 104. On the second NBLOK 140, the second metal layer 142 can be deposited using known deposition techniques. The second metal layer 142 is made from substantially the same material as the first metal layer 102. The bottom surface of the second metal layer 142 is in direct contact with the upper surface of the upper electrode contact 136 and the upper surface of the via contact 138. Next, the second metal layer 142 is patterned and a fourth dielectric layer 144 is deposited. The fourth dielectric layer 144 is made of substantially the same material as the first dielectric layer 106.

[0038] Figures 1-4 provide a method of manufacturing a phase change memory cell having a first projection liner 124, a metal liner 134, and a wrap-around ring-shaped upper electrode contact 136. Having the wrap-around ring-shaped upper electrode contact 136 in combination with a mask layer 130 over the upper electrode 128 helps to better insulate the phase change memory cell. This, in turn, can reduce the programming current.

[0039] The phase change memory cell can be called a mushroom-shaped phase change memory cell due to the shape of the amorphous phase 126a of the phase change material layer 126. The resulting structure 100 includes, as shown in FIG. 4, first and second projection liners 124, 134 and a wrap-around ring-shaped top electrode contact 136. The projection liner 124 separates the second dielectric layer 114 from the phase change material layer 126. The metal liner 134 is used to line the top electrode contact opening before the top electrode contact opening is filled to form the top electrode contact 136. As a result, the metal liner 134 surrounds the top electrode contact 136. By having a wrap-around ring-shaped top electrode contact 136, it becomes possible to adjust the path of the read current. This adjustment can be performed during the patterning of the top electrode contact opening. For example, the top electrode contact opening can be patterned to extend further vertically along the sidewalls of the phase change material layer 126, thereby reducing the gap between the projection liner 124 and the metal liner 134.

[0040] The projection liner 124 provides a conductive path parallel to the crystalline phase 126a and the amorphous phase 126b of the phase change material layer 126, thereby reducing the resistance drift coefficient during current reading. The projection liner 124 functions as a parallel resistor that bypasses the current around the amorphous phase 126b. Since the amorphous phase 126b of the phase change material layer 126 experiences resistance drift, the amorphous phase 126b becomes the main resistance. The projection liner 124 provides an alternative current path under the amorphous phase 126b. The resistance from the current flowing along the projection liner 124 provides the read RESET resistance of the phase change memory cell. Further, the combination of the projection liner 124 and the wrap-around ring-shaped top electrode contact 136 enables the current to flow more easily through the projection liner 124, through the crystalline phase 126a, and up to the top electrode contact 136.

[0041] Another embodiment of manufacturing a phase change memory cell having a first projection liner 124 and a wrap-around ring-shaped upper electrode contact 136 will be described in detail below with reference to the accompanying FIGS. 5 to 7. FIGS. 5 and 6 are cross-sectional views drawn along the cross-section line X-X. FIG. 7 is a cross-sectional view drawn along the cross-section line X-X and the cross-section line Y-Y. In this embodiment, the phase change material layer 126 is separated above the heater 116.

[0042] Next, referring to FIG. 5, a structure 200 in an intermediate state of manufacturing after heater formation (described above in relation to FIG. 1) according to an embodiment of the present invention is shown. The structure 200 is substantially the same in all respects as the structure 100 described in detail above in relation to FIG. 1, but in this embodiment, the structure 200 includes two separated portions of the projection liner 124.

[0043] Starting with the structure 100 of FIG. 1, the projection liner 124 is deposited on the upper surface of the structure 100 so as to cover the upper surfaces of the heater 116 and the second dielectric layer 114 using a deposition process such as ALD. Next, the projection liner 124 is patterned (not shown). The patterning can be performed by lithography and etching. An etching process such as an RIE process can be performed to remove a specific portion of the projection liner 124 from the upper surface of the second dielectric layer 114 that does not have the heater 116 directly below. Further, the portion of the projection liner 124 is also removed from the upper surface of the second dielectric layer 114 located between the heaters 116. As a result, the portion of the projection liner 124 extends over the upper surface of the heater 116 and the upper surface of the second dielectric layer surrounding the heater 116.

[0044] Next, referring to FIG. 6, a structure 200 having a phase change material layer 126, an upper electrode 128, and a mask layer 130 according to an embodiment is shown. First, the phase change material layer 126 is deposited on the upper surface of the structure 200. Next, the upper electrode 128 is deposited on the phase change material layer 126, and then the mask layer 130 is deposited on the upper electrode 128. The phase change material layer 126, the upper electrode 128, and the mask layer 130 can be deposited using known deposition techniques such as CVD, PVD, or ALD, for example.

[0045] After deposition, the mask layer 130 is patterned (not shown). The patterning can be performed by lithography and etching. An etching process such as an RIE process can be performed to remove portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126, thereby exposing the upper surface of the second dielectric layer 114 between the heaters 116.

[0046] By removing portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126 between the heaters 116, an opening is created that extends from the upper surface of the mask layer 130 through the upper electrode 128 and the phase change material layer 126 to the exposed upper surface of the second dielectric layer 114. The portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126 are also removed from the area of the structure 200 that does not include the heater 116 within the second dielectric layer 114. The resulting structure 200 shown in FIG. 6 includes two heaters 116 along with two phase change memory cells. As a result, heating of one heater 116, for example, the left heater 116, will not affect the phase change memory layer 126 over the second heater 116, for example, the right heater.

[0047] Next, referring to FIG. 7, the structure 200 undergoes additional processing described in detail with reference to FIG. 4. The resulting structure shown in FIG. 7 and the structure 100 shown in FIG. 4 are substantially the same since both structures include the projection liner 124. The projection liner 124 is self-aligned. In both structures 100 and 200, the projection liner 124 extends horizontally over the heater 116 and separates the upper surface of the heater 116 and the upper surface of the surrounding second dielectric layer 114 from the bottom surface of the phase change material layer 126. The metal liner 134 in both structures 100 and 200 surrounds the upper electrode contact 136 and separates the upper electrode contact 136 from the phase change material layer 126, the upper electrode 128, and the mask layer 130.

[0048] The structure 200 shown in FIG. 7 includes two phase change memory cells separated by a third dielectric layer 132. Each of the two phase change memory cells includes a bottom electrode 110, a heater 116, a phase change material layer 126, and an upper electrode 128. The structure 200 further includes two upper electrode contacts 136. Each upper electrode contact 136 is a ring-shaped electrode contact that surrounds the upper portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126. The upper electrode contact 136 extends vertically along the sidewall portions of the mask layer 130, the upper electrode 128, and the phase change material layer 126.

[0049] The above-described embodiments of the present invention illustrate a method and structure for forming a phase change memory cell that includes a projection liner 124 along with a wrap-around ring-shaped upper electrode contact 136. The combination of the projection liner 124 and the wrap-around ring-shaped upper electrode contact 136 reduces resistance drift by providing a current path that bypasses the amorphous phase 128b of the phase change material layer 126 from the bottom electrode 110 to the upper electrode 128. Thereby, the resistance drift coefficient can be improved from a range of about 0.005 to 0.01 to a range of about 0.001 to 0.005. Further, by having the wrap-around ring-shaped upper electrode contact 136, a thermal benefit of the phase change memory cell is provided and the programming current of the phase change memory cell can be reduced.

[0050] The descriptions of the various embodiments of the present invention are presented for purposes of illustration, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the described embodiments. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or a technical improvement over technologies found in the marketplace, or to enable other practitioners of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A heater surrounded by a dielectric layer, A projection liner on the heater, the projection liner covering the upper surface of the heater, A phase change material layer above the projection liner, the projection liner separating the phase change material layer from the dielectric layer and the heater, An upper electrode contact surrounding the upper portion of the phase change material layer, the upper electrode contact being separated from the phase change material layer by a metal liner, A bottom electrode below the heater and in electrical contact with the heater, An upper electrode above the phase change material layer and in electrical contact with the phase change material layer A semiconductor structure comprising.

2. A mask layer above the upper electrode and in direct contact with the upper electrode, A bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode The structure according to claim 1, further comprising.

3. The phase change material layer includes a crystalline phase and an amorphous phase, and the amorphous phase is directly above the heater. The structure according to claim 1 or claim 2.

4. The projection liner provides a conductive path parallel to the crystalline phase and the amorphous phase of the phase change material layer. The structure according to claim 3.

5. The upper electrode contact is a wrap-around ring type upper electrode contact. The structure according to any one of claims 1 to 4.

6. The upper electrode contact extends vertically along the sidewall of the phase change material layer. The structure according to claim 1.

7. Two or more phase change memory cells separated by a dielectric layer, each comprising a phase change material layer and a heater, Two or more upper electrode contacts above the two or more phase change memory cells, separated from the phase change memory cells by a metal liner and extending vertically along the sidewall portion of the phase change material layer Comprising, Each of the two or more phase change memory cells A heater surrounded by a second dielectric layer, A projection liner on the heater, the projection liner covering the upper surface of the heater, A phase change material layer above the projection liner, wherein the projection liner separates the phase change material layer from the second dielectric layer and the heater, the phase change material layer; A bottom electrode below the heater and in electrical contact with the heater; An upper electrode above the phase change material layer and in electrical contact with the phase change material layer Comprising; A semiconductor structure.

8. The phase change material layer includes a crystalline phase and an amorphous phase, and the amorphous phase is directly above the heater, the structure according to claim 7.

9. A mask layer above the upper electrode and in direct contact with the upper electrode; A bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode The structure according to claim 7, further comprising.

10. A first metal layer below the bottom electrode contact and in electrical contact with the bottom electrode contact; A second metal layer above the upper electrode contact and in electrical contact with the upper electrode contact; A via contact between the first metal layer and the second metal layer and in electrical contact with the first metal layer and the second metal layer The structure according to claim 9, further comprising.

11. The projection liner provides a conductive path parallel to the crystalline phase and the amorphous phase of the phase change material layer, the structure according to claim 8.

12. The two or more upper electrode contacts are wrap-around ring type upper electrode contacts, the structure according to any one of claims 7 to 11.

13. Forming a heater surrounded by a second dielectric layer; Depositing a projection liner on the heater to cover the upper surface of the heater; Depositing a phase change material layer above the projection liner, wherein the projection liner separates the phase change material layer from the second dielectric layer and the heater; Forming an upper electrode contact surrounding the upper portion of the phase change material layer, wherein the upper electrode contact is separated from the phase change material layer by a metal liner; Forming a bottom electrode below the heater and in electrical contact with the heater; Depositing an upper electrode above the phase change material layer and in electrical contact with the phase change material layer Including methods.

14. Depositing a mask layer directly contacting the upper electrode above the upper electrode; Forming a bottom electrode contact in electrical contact with the bottom electrode below the bottom electrode; The method according to claim 13, further comprising.

15. The method according to claim 13, wherein the phase change material layer includes a crystalline phase and an amorphous phase, and the amorphous phase is directly above the heater.

16. The method according to claim 15, wherein the projection liner provides a conductive path parallel to the crystalline phase and the amorphous phase of the phase change material layer.

17. The method according to any one of claims 13 to 16, wherein the upper electrode contact is a wrap-around ring type upper electrode contact extending vertically along the side wall of the phase change material layer.

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