Reset method for integrated circuit and integrated circuit
JP7703019B2Active Publication Date: 2025-07-04SANECHIPS TECH CO LTD
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Patent Information
- Application Number
- JP2023512678
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-08-21
- Filing Date
- 2021-08-19
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2041-08-19
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Figure 0007703019000007 
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Abstract
The present application provides a reset method for an integrated circuit, the reset method including the steps of: in response to a reset signal received by a first data unit, generating a synchronous reset signal from the reset signal, and outputting the synchronous reset signal to the first data unit after at least one preset period has elapsed; and in response to a first data signal output by the first data unit, generating a second data signal from the synchronous reset signal and the first data signal, and outputting the second data signal to the second data unit. The present application further provides an integrated circuit.
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Citation Information
Patent Citations
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