Semiconductor diode

Abstract

A semiconductor diode (100) comprises: a P-type semiconductor (1); an N-type semiconductor (2) that has a band gap smaller than that of the P-type semiconductor (1); and an insulator (3) that is provided between the P-type semiconductor (1) and the N-type semiconductor (2) and that has a band gap greater than those of the P-type semiconductor (1) and the N-type semiconductor (2), wherein the band gap difference between the P-type semiconductor (1) and the N-type semiconductor (2) is 1 eV or more, and the band gap difference between the P-type semiconductor (1) and the insulator (3) is 1 eV or less.

Description

Technical Field

[0001] The present invention relates to a semiconductor diode.

Background Art

[0002] A general semiconductor diode includes a P-type semiconductor, an N-type semiconductor, and an insulating layer provided between the P-type semiconductor and the N-type semiconductor. The semiconductor diode has a rectifying characteristic that allows current to flow in only one direction and is used as a rectifying element.

[0003] As shown in Japanese Journal of Applied Physics, 2018, Vol. 57, No. 4, p. 041201-1-041201-5, in recent years, attempts have been made to use a semiconductor diode as a charge storage element.

Summary of the Invention

[0004] In the above semiconductor diode, TiOx is provided as the P-type semiconductor, NiOx is provided as the N-type semiconductor, and SiN is provided as the insulating layer. In the above semiconductor diode, when current flows, carriers are trapped at the trapping levels in the semiconductor diode, and thereby, charges are accumulated in the semiconductor diode. The semiconductor diode as the above charge storage element is still in the research stage, and an increase in the charge storage capacitance is expected.

[0005] An object of the present invention is to increase the charge storage capacitance of a semiconductor diode.

[0006] According to an aspect of the present invention, there is provided a semiconductor diode including a P-type semiconductor, an N-type semiconductor having a smaller bandgap than the P-type semiconductor, and an insulator provided between the P-type semiconductor and the N-type semiconductor and having a larger bandgap than the P-type semiconductor and the N-type semiconductor, wherein a difference in bandgap between the P-type semiconductor and the N-type semiconductor is 1 eV or more, and a difference in bandgap between the P-type semiconductor and the insulator is 1 eV or less.

[0007] According to another aspect of the present invention, there is provided a semiconductor diode including a P-type semiconductor, an N-type semiconductor having a larger bandgap than the P-type semiconductor, and an insulator provided between the P-type semiconductor and the N-type semiconductor and having a larger bandgap than the P-type semiconductor and the N-type semiconductor, wherein the difference in bandgap between the P-type semiconductor and the N-type semiconductor is 1 eV or more, and the difference in bandgap between the N-type semiconductor and the insulator is 1 eV or less. That is, in a state where a positive voltage is applied to the P-type semiconductor from the outside of the semiconductor diode with respect to the N-type semiconductor, the energy level of the valence band of the P-type semiconductor is set to be lower than the energy level of the valence band of the N-type semiconductor, and the energy level of the conduction band of the N-type semiconductor is set to be lower than the energy level of the conduction band of the P-type semiconductor.

Brief Description of the Drawings

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Embodiments for Carrying Out the Invention

[0009] <First Embodiment> Referring to FIGS. 1 to 3, a semiconductor diode 100 according to a first embodiment of the present invention will be described. The semiconductor diode 100 is used as a charge storage element for storing and releasing charges.

[0010] As shown in FIG. 1, the semiconductor diode 100 includes a P-type semiconductor 1, an N-type semiconductor 2, an insulator 3 provided between the P-type semiconductor 1 and the N-type semiconductor 2, a first electrode 4 electrically connected to the N-type semiconductor 2, and a second electrode 5 electrically connected to the P-type semiconductor 1. The semiconductor diode 100 is formed by laminating the first electrode 4, the N-type semiconductor 2, the insulator 3, the P-type semiconductor 1, and the second electrode 5 in this order.

[0011] An oxide semiconductor with a wide bandgap such as NiO is used for the P-type semiconductor 1, a single-element semiconductor such as N-type silicon (n-Si) is used for the N-type semiconductor 2, and a perovskite-based compound such as LiNbO3 is used for the insulator 3. The surface of the N-type semiconductor 2 facing the insulator 3 is formed in an uneven shape. The first electrode 4 is a metal thin film such as stainless steel and has the functions of both a base material and an electrode. The second electrode 5 is a metal thin film such as Al or Cu.

[0012] Next, a method for forming the semiconductor diode 100 will be described.

[0013] First, the N-type semiconductor 2 is formed on the first electrode 4 by CVD or sputtering. The formed N-type semiconductor 2 is selectively anisotropically etched by a lithography method or an imprint method to form unevenness on the surface. Then, the insulator 3 is deposited on the N-type semiconductor 2 with unevenness by CVD, sputtering, or EB evaporation, and the P-type semiconductor 1 is similarly deposited on the insulator 3 by CVD, sputtering, or EB evaporation. Thereafter, the second electrode 5 is formed of a metal thin film such as Al or Cu. Thereby, a PIN diode structure of the semiconductor diode 100 is formed.

[0014] Regarding the method of forming the semiconductor diode 100, in addition to the dry method using a vacuum apparatus such as the CVD, sputtering, or EB evaporation, it is also possible to form the N-type semiconductor 2, P-type semiconductor 1, and insulator 3 into powders, stack them in order, and then compress them. Further, it is also possible to form them by compressing the layers formed by compressing each layer of powder and stacking them, or by adding a binder material to the powders of the N-type semiconductor 2, P-type semiconductor 1, and insulator 3 and stacking them in a coating method.

[0015] Next, with reference to FIGS. 2 and 3, the operation of the semiconductor diode 100 will be described. FIG. 2 is a diagram showing the band diagram of the semiconductor diode 100 when it is open, and FIG. 3 is a diagram showing the band diagram of the semiconductor diode 100 when a forward bias voltage is externally applied. In other words, FIG. 2 is a diagram showing the band diagram in a state where the P-type semiconductor 1 and the N-type semiconductor 2 are joined (PN junction), and FIG. 3 is a diagram showing the band diagram when a positive voltage is applied to the P-type semiconductor 1 with respect to the N-type semiconductor 2 from the outside of the semiconductor diode 100. In FIGS. 2 and 3, the band gap 11 of the P-type semiconductor 1 (NiO), the band gap 12 of the N-type semiconductor 2 (n-Si), and the band gap 13 of the insulator 3 (LiNbO3) are illustrated, and the Fermi level Ef (see FIG. 2) and the energy level Vf of the forward bias voltage (see FIG. 3) are also illustrated. The upper end of each band gap is the energy level of the conduction band, and the lower end is the energy level of the valence band. The energy levels of each material are measured by observing photoelectrons and thermoelectrons.

[0016] The band gap 11 of the P-type semiconductor 1 (NiO) is large, specifically, 3.7 eV. The band gap 12 of the N-type semiconductor 2 (n-Si) is small, specifically, 1.12 eV. Thus, the difference between the band gaps 11 and 12 of the P-type semiconductor 1 and the N-type semiconductor 2 is 1 eV or more. Also, the band gap 13 of the insulator 3 (LiNbO3) is 3.9 eV. The insulator 3 has a band gap close to that of the P-type semiconductor 1, and the difference between the band gaps 13 and 11 of the insulator 3 and the P-type semiconductor 1 is 1 eV or less. Thus, the insulator 3 has a larger band gap than the P-type semiconductor 1 and the N-type semiconductor 2.

[0017] When the P-type semiconductor 1 and the N-type semiconductor 2 are joined by a PN junction, a depletion layer (or an electric double layer) is formed at the junction surface. An electric field is generated within the depletion layer, and a potential difference (built-in potential) is generated between both ends of the depletion layer, in other words, between the P-type semiconductor 1 and the N-type semiconductor 2, as shown in FIG. 2. In this state, due to the electric field within the depletion layer, the movement of electrons and holes does not occur between the P-type semiconductor 1 and the N-type semiconductor 2.

[0018] In this state, as shown in FIG. 3, when a forward bias voltage is applied to the PN junction from the outside, in other words, when a positive voltage is applied to the P-type semiconductor 1 from the outside, the electric field within the depletion layer generated at the PN junction is weakened by the electric field generated by the voltage from the outside. As a result, the energy level of the valence band of the P-type semiconductor 1 becomes lower than the energy level of the valence band of the N-type semiconductor 2, and the energy barrier for holes to move from the P-type semiconductor 1 to the N-type semiconductor 2 becomes lower. Therefore, as indicated by the arrow in FIG. 3, holes move from the P-type semiconductor 1 to the N-type semiconductor 2.

[0019] On the other hand, as shown in FIG. 3, when a forward bias voltage is applied externally to the PN junction, the energy level of the conduction band of the N-type semiconductor 2 is lower than the energy level of the conduction band of the P-type semiconductor 1. In other words, the energy of the conduction band of the N-type semiconductor 2 is lower (negative) than the energy of the conduction band of the P-type semiconductor 1. Therefore, the energy barrier when electrons in the N-type semiconductor 2 move into the P-type semiconductor 1 is high, and the movement of electrons from the N-type semiconductor 2 to the P-type semiconductor 1 is blocked because the energy barrier cannot be overcome. Thus, in the semiconductor diode 100, a forward current (drift current) flows when holes move from the P-type semiconductor 1 to the N-type semiconductor 2 through the insulator 3.

[0020] In the semiconductor diode 100, the band gaps of the P-type semiconductor 1 and the N-type semiconductor 2 are different (specifically, the difference is 1 eV or more). For this reason, as described above, when a forward bias voltage is applied, the energy level of the valence band of the P-type semiconductor 1 is lower than the energy level of the valence band of the N-type semiconductor 2, and the energy level of the conduction band of the N-type semiconductor 2 is lower than the energy level of the conduction band of the P-type semiconductor 1.

[0021] So far, the explanation has been based on the energy level, that is, the magnitude of energy. Explaining based on the energy level with reference to the vacuum level of the N-type semiconductor on the ground side, in the state where a forward current is flowing in the semiconductor diode 100, the energy level of the conduction band of the N-type semiconductor 2 is greater than the energy level of the conduction band of the P-type semiconductor 1, and the energy level of the valence band of the P-type semiconductor 1 is greater than the energy level of the valence band of the N-type semiconductor 2. That is, the P-type semiconductor 1 and the N-type semiconductor 2 are set such that the energy level of the conduction band of the N-type semiconductor 2 is greater than the energy level of the conduction band of the P-type semiconductor 1 and the energy level of the valence band of the P-type semiconductor 1 is greater than the energy level of the valence band of the N-type semiconductor 2 in the state where a forward current is flowing.

[0022] In the semiconductor diode 100, when a forward current flows as described above, some holes are trapped in the insulator 3 and the trapping levels (accumulation layers) generated at the interfaces between the insulator 3, the P-type semiconductor 1, and the N-type semiconductor 2. As a result, charges are accumulated in the semiconductor diode 100 as a charge storage element, and the semiconductor diode 100 is charged. When the application of the forward bias voltage is stopped and an external load is connected to the semiconductor diode 100, the holes accumulated in the trapping levels are released to the outside, and the semiconductor diode 100 is discharged.

[0023] Here, with reference to FIGS. 7 and 8, as a comparative example, the semiconductor diode 300 described in Japanese Journal of Applied Physics, 2018, Vol. 57, No. 4, p. 041201-1-041201-5 will be described.

[0024] The semiconductor diode 300 includes a P-type semiconductor 201, an N-type semiconductor 202, and an insulator 203 provided between the P-type semiconductor 201 and the N-type semiconductor 202. Since the overall configuration of the semiconductor diode 300 is the same as that of the semiconductor diode 100, the illustration thereof is omitted. As shown in FIG. 7, NiO is used for the P-type semiconductor 201 x and the bandgap 211 is 3.7 eV. TiO is used for the N-type semiconductor 202 x and the bandgap 212 is 3.2 eV. Thus, the P-type semiconductor 201 and the N-type semiconductor 202 have similar bandgaps, and the difference between the bandgaps 211 and 212 of the P-type semiconductor 201 and the N-type semiconductor 202 is less than 1 eV. Also, SiN is used for the insulator 203 and the bandgap 213 is 4.9 eV.

[0025] With reference to FIGS. 7 and 8, the operation of the semiconductor diode 300 will be described. FIG. 7 is a diagram showing the band diagram of the semiconductor diode 300 when it is open, and FIG. 8 is a diagram showing the band diagram of the semiconductor diode 300 when a forward bias voltage is externally applied thereto. In FIGS. 7 and 8, the bandgap 211 of the P-type semiconductor 201 (NiO x ) and the N-type semiconductor 202 (TiOx ) shows the bandgap 212 of [material name 1] and the bandgap 213 of the insulator 203 (SiN), and also shows the Fermi level Ef (see Fig. 7) and the energy level Vf of the forward bias voltage (see Fig. 8).

[0026] From the state where the P-type semiconductor 201 and the N-type semiconductor 202 shown in Fig. 7 are PN-junctioned, as shown in Fig. 8, a forward bias voltage is applied to the PN-junction from the outside. Then, the energy level of the valence band of the P-type semiconductor 201 becomes lower than the energy level of the valence band of the N-type semiconductor 202, and holes move from the P-type semiconductor 201 to the N-type semiconductor 202. Also, the energy level of the conduction band of the N-type semiconductor 202 becomes higher than the energy level of the conduction band of the P-type semiconductor 201, and electrons move from the N-type semiconductor 202 to the P-type semiconductor 201. In this way, in the semiconductor diode 300, a forward current flows by both electrons and holes moving between the P-type semiconductor 201 and the N-type semiconductor 202.

[0027] In the semiconductor diode 300, the bandgaps of the P-type semiconductor 201 and the N-type semiconductor 202 are close (specifically, the difference is 0.5 eV). Therefore, when a forward bias voltage is applied as in the semiconductor diode 100, it is difficult to make the energy level of the valence band of the P-type semiconductor 201 lower than the energy level of the valence band of the N-type semiconductor 202 and the energy level of the conduction band of the N-type semiconductor 202 lower than the energy level of the conduction band of the P-type semiconductor 201.

[0028] In the semiconductor diode 300, when the forward current flows as described above, some electrons and holes are trapped at the trapping levels generated at the insulator 203 and at the interfaces between the insulator 203, the P-type semiconductor 201, and the N-type semiconductor 202. As a result, charges are accumulated in the semiconductor diode 300. The trapping levels are formed, for example, by introducing silicon compound particles into the N-type oxide semiconductor and the P-type oxide semiconductor.

[0029] Thus, in the semiconductor diode 300 of the comparative example, since the band gaps of the P-type semiconductor 201 and the N-type semiconductor 202 are close, both electrons and holes move and a forward current flows. Therefore, it is considered that the electrons and holes moving as the forward current recombine and disappear before being captured by the trapping levels, and the electrons and holes cannot be efficiently captured and accumulated in the trapping levels.

[0030] On the other hand, in the semiconductor diode 100 according to the first embodiment, since the band gaps of the P-type semiconductor 1 and the N-type semiconductor 2 are different, a state can be set in which holes move and a forward current flows as described above, and the holes are captured by the trapping levels generated at the insulator 3 and the interfaces between the insulator 3, the P-type semiconductor 1, and the N-type semiconductor 2. As a result, recombination of the moving holes with electrons is prevented, so that recombination of the holes with electrons and disappearance before the holes are captured by the trapping levels are prevented. Therefore, holes can be efficiently captured and accumulated in the trapping levels, and the charge storage capacitance of the semiconductor diode 100 can be increased. In this way, in the semiconductor diode 100, the charge storage capacitance can be increased without impairing the thin shape which is a characteristic as a charge storage element.

[0031] When the forward bias voltage is further increased from the state shown in FIG. 3, the energy level of the conduction band of the N-type semiconductor 2 becomes higher than the energy levels of the conduction bands of the insulator 3 and the P-type semiconductor 1. Therefore, electrons start to move from the N-type semiconductor 2 to the P-type semiconductor 1. In this state, the forward current cannot be limited to the movement of holes, and it becomes difficult to accumulate charges in the semiconductor diode 100 as compared with the state in which the forward current flows due to the movement of holes. That is, in the semiconductor diode 100, there is an upper limit to the forward bias voltage that can be applied. The upper limit of the forward bias voltage is the maximum voltage at which the energy level of the conduction band of the N-type semiconductor 2 becomes lower than the higher one of the energy levels of the conduction bands of the insulator 3 or the P-type semiconductor 1.

[0032] In the semiconductor diode 100, the larger the band gaps 11 and 13 of the P-type semiconductor 1 and the insulator 3 and the smaller the band gap 12 of the N-type semiconductor 2 are, the higher the upper limit of the forward bias voltage from the outside in the state where the forward current flows due to the movement of holes can be made. The accumulation of charges in the semiconductor diode 100 ends when the charges in an amount that relaxes the forward bias voltage from the outside are trapped at the trapping level. Therefore, while the forward current flows through the semiconductor diode 100 due to the movement of holes, the amount of accumulated charges in the semiconductor diode 100 can be further increased by increasing the forward bias voltage from the outside.

[0033] In the state where the forward current flows through the semiconductor diode 100 due to the movement of holes, it is preferable that the positive voltage applied from the outside is 1 V or more. In other words, it is preferable that the band gaps 11 and 13 of the P-type semiconductor 1 and the insulator 3 are 1 eV or more larger than the band gap 12 of the N-type semiconductor 2, and the difference between the band gaps 11 and 13 of the P-type semiconductor 1 and the insulator 3 is 1 eV or less. By forming the semiconductor diode 100 in this way, the upper limit of the forward bias voltage from the outside in the state where the forward current flows due to the movement of holes can be increased to 1 V or more. Since the power supply voltage of a generally used semiconductor electronic device is 1 to 5 V, if the forward bias voltage from the outside in the state where the forward current flows due to the movement of holes is 1 V or more, the semiconductor electronic device can be sufficiently operated by the semiconductor diode 100. However, in the state where the forward current flows through the semiconductor diode 100 due to the movement of holes, the positive voltage applied from the outside may be less than 1 V. Regardless of whether the voltage accumulated in the semiconductor diode 100 is small or large, a large voltage can be ensured by connecting a plurality of semiconductor diodes 100 in series.

[0034] In addition, in the semiconductor diode 100, the surface of the N-type semiconductor 2 facing the insulator 3 is formed in an uneven shape. By doing so, the surface area of the interface between the N-type semiconductor 2 and the insulator 3 is increased, so that the capacitance of the trapping level is increased, and the amount of stored charge in the semiconductor diode 100 can be further increased. Note that the surface area of the interface between the N-type semiconductor 2 and the insulator 3 may be increased by subjecting the surface of the N-type semiconductor 2 facing the insulator 3 to anodization treatment to make it porous (porous silicon). Further, the surface of the N-type semiconductor 2 facing the insulator 3 may be modified at the atomic level by ion beam implantation, ion milling, plasma irradiation, or the like. Also, the uneven shape or porous shape does not have to be formed on the surface of the N-type semiconductor 2 facing the insulator 3.

[0035] In the first embodiment, in the semiconductor diode 100, an oxide semiconductor having a wide bandgap such as NiO is used for the P-type semiconductor 1. Also, a single-element semiconductor such as n-Si is used for the N-type semiconductor 2, and a perovskite-based compound such as LiNbO3 is used for the insulator 3. However, the configurations of the P-type semiconductor 1, the N-type semiconductor 2, and the insulator 3 are not limited to these. For example, an oxide semiconductor such as Cr2O3 having a relatively large bandgap may be used as the P-type semiconductor 1. In the semiconductor diode 100, when a forward current is flowing, it is sufficient that the energy level of the conduction band of the N-type semiconductor 2 is higher than the energy level of the conduction band of the P-type semiconductor 1, and the energy level of the valence band of the P-type semiconductor 1 is higher than the energy level of the valence band of the N-type semiconductor 2. With this configuration, it is possible to prevent holes from recombining with electrons and disappearing before being trapped in the trapping level, and to increase the charge storage capacitance of the semiconductor diode 100.

[0036] According to the first embodiment described above, the following operational effects are obtained.

[0037] In the semiconductor diode 100, since the band gaps of the P-type semiconductor 1 and the N-type semiconductor 2 are different, it is possible to set a state in which holes move and a forward current flows. As a result, holes are trapped in the insulator 3 and the trapping levels generated at the interfaces between the insulator 3, the P-type semiconductor 1, and the N-type semiconductor 2. Therefore, it is possible to prevent holes from recombining with electrons and disappearing before being trapped in the trapping levels. Thus, holes can be efficiently trapped and accumulated in the trapping levels, and the charge storage capacitance of the semiconductor diode 100 can be increased without impairing the thin shape.

[0038] In the state where a forward current flows due to the movement of holes in the semiconductor diode 100, when the positive voltage applied from the outside is 1 V or more, the semiconductor diode 100 can sufficiently operate a semiconductor electronic device. Note that in the state where a forward current flows due to the movement of holes in the semiconductor diode 100, even when the positive voltage applied from the outside is less than 1 V, a large voltage can be ensured by connecting a plurality of semiconductor diodes 100 in series.

[0039] <Second Embodiment> Next, with reference to FIGS. 4 to 6, the semiconductor diode 200 according to the second embodiment of the present invention will be described. Hereinafter, the description will focus on the differences from the first embodiment.

[0040] As shown in FIG. 4, the semiconductor diode 200 includes a P-type semiconductor 101, an N-type semiconductor 102, an insulator 3 provided between the P-type semiconductor 101 and the N-type semiconductor 102, a first electrode 104 electrically connected to the P-type semiconductor 101, and a second electrode 105 electrically connected to the N-type semiconductor 102.

[0041] In the first embodiment described above, NiO is used for the P-type semiconductor 1, n-Si or the like is used for the N-type semiconductor 2, the band gaps 11 and 13 between the P-type semiconductor 1 and the insulator 3 are large, and the band gap 12 of the N-type semiconductor 2 is small. In contrast, in the second embodiment, as shown in FIG. 5, for the semiconductor diode 200, a single-element semiconductor such as p-type silicon (p-Si) is used for the P-type semiconductor 101, and an oxide semiconductor such as TiO is used for the N-type semiconductor 102. The band gaps 112 and 13 between the N-type semiconductor 102 and the insulator 3 are large, and the band gap 111 of the P-type semiconductor 101 is small.

[0042] The semiconductor diode 200 is formed by laminating a first electrode 104, a P-type semiconductor 101, an insulator 3, an N-type semiconductor 102, and a second electrode 105 in this order. First, the P-type semiconductor 101 is formed on the first electrode 104 by CVD or sputtering. The formed P-type semiconductor 101 is subjected to a lithography method or an imprint method to form irregularities on the surface. Then, the insulator 3 is deposited on the P-type semiconductor 101 with irregularities formed thereon by CVD, sputtering, or EB evaporation, and the N-type semiconductor 102 is similarly deposited on the insulator 3 by CVD, sputtering, or EB evaporation. Thereafter, the second electrode 105 is formed of a metal thin film such as Al or Cu. Thereby, the PIN diode structure of the semiconductor diode 200 is formed.

[0043] FIG. 5 is a diagram showing the band diagram of the semiconductor diode 200 when it is open, and FIG. 6 is a diagram showing the band diagram of the semiconductor diode 200 when a forward bias voltage is externally applied. In FIGS. 5 and 6, the band gap 111 of the P-type semiconductor 101 (p-Si), the band gap 112 of the N-type semiconductor 102 (TiO), and the band gap 13 of the insulator 3 (LiNbO3) are illustrated, and the Fermi level Ef (see FIG. 5) and the energy level Vf of the forward bias voltage (see FIG. 6) are also illustrated.

[0044] The band gap 111 of the P-type semiconductor 101 (p-Si) is 1.12 eV, and the band gap 112 of the N-type semiconductor 102 (TiO) is 3.2 eV. Thus, the difference between the band gaps 111 and 112 of the P-type semiconductor 101 and the N-type semiconductor 102 is 1 eV or more. Also, the band gap 13 of the insulator 3 (LiNbO3) is 3.9 eV, and the difference between the band gaps 112 and 13 of the N-type semiconductor 102 and the insulator 3 is 1 eV or less. Thus, the insulator 3 has a larger band gap than the P-type semiconductor 101 and the N-type semiconductor 102.

[0045] From the state where the P-type semiconductor 101 and the N-type semiconductor 102 shown in FIG. 5 are PN-junctioned, as shown in FIG. 6, a forward bias voltage is externally applied to the PN-junction. Then, the energy level of the conduction band of the N-type semiconductor 102 becomes higher than the energy level of the conduction band of the P-type semiconductor 101, and as indicated by the arrow in FIG. 6, electrons move from the N-type semiconductor 102 to the P-type semiconductor 101. On the other hand, the energy level of the valence band of the P-type semiconductor 101 is higher than the energy level of the valence band of the N-type semiconductor 102. Therefore, the energy barrier when holes in the P-type semiconductor 101 move into the N-type semiconductor 102 through the insulator 3 is high, and the movement of holes from the P-type semiconductor 101 to the N-type semiconductor 102 is blocked because the energy barrier cannot be overcome. Thus, in the semiconductor diode 200, electrons move and a forward current flows.

[0046] In the semiconductor diode 200, the band gaps of the P-type semiconductor 101 and the N-type semiconductor 102 are different (specifically, the difference is 1 eV or more). For this reason, as described above, when a forward bias voltage is applied, the energy level of the conduction band of the N-type semiconductor 102 becomes higher than the energy level of the conduction band of the P-type semiconductor 101, and the energy level of the valence band of the P-type semiconductor 101 becomes higher than the energy level of the valence band of the N-type semiconductor 102.

[0047] That is, in the state where a forward current is flowing through the semiconductor diode 200, the energy level of the valence band of the P-type semiconductor 101 is lower than the energy level of the valence band of the N-type semiconductor 102, and the energy level of the conduction band of the N-type semiconductor 102 is lower than the energy level of the conduction band of the P-type semiconductor 101. In other words, the P-type semiconductor 101 and the N-type semiconductor 102 are set such that the energy level of the valence band of the P-type semiconductor 101 is lower than the energy level of the valence band of the N-type semiconductor 102 in the state where a forward current is flowing, and the energy level of the conduction band of the N-type semiconductor 102 is lower than the energy level of the conduction band of the P-type semiconductor 101.

[0048] As described above, in the semiconductor diode 200, since the band gaps of the P-type semiconductor 101 and the N-type semiconductor 102 are different, electrons move and a forward current flows. Therefore, electrons are trapped at the insulating body 3 and at the trapping levels generated at the interfaces between the insulating body 3, the P-type semiconductor 101, and the N-type semiconductor 102. Therefore, similar to the semiconductor diode 100, before the electrons are trapped at the trapping levels, they are prevented from recombining with holes and disappearing, so that the electrons can be efficiently trapped and accumulated at the trapping levels. Therefore, the charge storage capacitance of the semiconductor diode 200 can be increased.

[0049] When the forward bias voltage is further increased from the state shown in FIG. 6, the energy level of the valence band of the N-type semiconductor 102 becomes higher than the energy levels of the valence bands of the insulating body 3 and the P-type semiconductor 101. Therefore, holes start to move from the N-type semiconductor 102 to the P-type semiconductor 101. In this state, the forward current cannot be limited to the movement of electrons, and it becomes difficult to accumulate charges in the semiconductor diode 200 as compared with the state where the forward current flows due to the movement of electrons. That is, in the semiconductor diode 200, there is an upper limit to the forward bias voltage that can be applied. The upper limit of the forward bias voltage is the maximum voltage at which the energy level of the valence band of the P-type semiconductor 101 becomes higher than the lower of the energy levels of the valence bands of the N-type semiconductor 102 or the insulating body 3.

[0050] Note that, similar to the semiconductor diode 100, in the state where a forward current flows due to the movement of electrons in the semiconductor diode 200, it is preferable that the positive voltage applied from the outside is 1 V or more. In other words, the band gaps 112 and 13 of the N-type semiconductor 102 and the insulator 3 are preferably 1 eV or more larger than the band gap 111 of the P-type semiconductor 101, and the difference between the band gaps 112 and 13 of the N-type semiconductor 102 and the insulator 3 is preferably 1 eV or less. By forming the semiconductor diode 200 in this way, the upper limit of the forward bias voltage from the outside in the state where a forward current flows due to the movement of electrons can be increased to 1 V or more, and the semiconductor electronic device can be sufficiently operated by the semiconductor diode 200. However, similar to the semiconductor diode 100, in the state where a forward current flows due to the movement of electrons in the semiconductor diode 200, the positive voltage applied from the outside may be less than 1 V.

[0051] Also, the surface of the P-type semiconductor 101 facing the insulator 3 in the semiconductor diode 200 is formed in an uneven shape. Thereby, by increasing the surface area of the interface between the P-type semiconductor 101 and the insulator 3, similar to the semiconductor diode 100, the storage capacitance of the trapping level increases, and the amount of stored charge in the semiconductor diode 200 can be further increased. Note that the surface area of the interface between the P-type semiconductor 101 and the insulator 3 may be increased by subjecting the surface of the P-type semiconductor 101 facing the insulator 3 to an anodization treatment to make it porous (porous silicon). Further, the surface of the P-type semiconductor 101 facing the insulator 3 may be modified at the atomic level by ion beam implantation, ion milling, plasma irradiation, or the like. Also, the uneven shape or the porous shape does not have to be formed on the surface of the P-type semiconductor 101 facing the insulator 3.

[0052] In the second embodiment, p-Si is used for the P-type semiconductor 101, TiO is used for the N-type semiconductor 102, and LiNbO3 is used for the insulator 3. However, the configurations of the P-type semiconductor 101, the N-type semiconductor 102, and the insulator 3 are not limited to this. For example, an oxide semiconductor such as Ta2O5 or WO3 having a relatively large bandgap may be used as the N-type semiconductor 102. In the state where a forward current is flowing through the semiconductor diode 200, it is sufficient that the energy level of the valence band of the P-type semiconductor 101 is smaller than the energy level of the valence band of the N-type semiconductor 102, and the energy level of the conduction band of the N-type semiconductor 102 is smaller than the energy level of the conduction band of the P-type semiconductor 101. With this configuration, it is possible to prevent electrons from recombining with holes and disappearing before being trapped at the trapping level, and to increase the charge storage capacitance of the semiconductor diode 200.

[0053] The following modifications are also within the scope of the present invention, and it is also possible to combine the configurations shown in the modifications with the configurations described in the above embodiments, combine the configurations described in the above different embodiments with each other, or combine the configurations described in the following different modifications with each other.

[0054] <Modification 1> In the above embodiment, LiNbO3 or the like is used for the insulator 3. However, a compound having a perovskite structure and piezoelectric properties, such as a lithium-based perovskite compound such as Li3PS4 or LiBH4 or a manganese-based perovskite compound such as LaMnO3, may be used as the insulator 3. In this configuration, when charges are accumulated in the semiconductor diodes 100 and 200, a physical pressure is applied to the P-type semiconductor 1 and the N-type semiconductor 2 by the internal electric field generated, so that the mobility of electrons and holes increases, and the speed at which electrons and holes are trapped at the trapping level increases. Therefore, the amount of accumulated charge in the semiconductor diodes 100 and 200 can be further increased.

[0055] <Modification 2> In the above-described embodiment, the semiconductor diodes 100 and 200 include a P-type semiconductor 1, 101, an N-type semiconductor 2, 102, and an insulator 3. In addition to or instead of this, a zero-bandgap semiconductor material such as a graphene layer may be provided in the semiconductor diodes 100 and 200. In this case, the graphene layer is provided between the N-type semiconductor 2 and the insulator 3 or replaced as the N-type semiconductor, and provided between the P-type semiconductor 101 and the insulator 3 or replaced as the P-type semiconductor. In other words, the graphene layer is provided between the one with the smaller bandgap among the P-type semiconductor 1, 101 and the N-type semiconductor 2, 102 and the insulator 3 or replaces the semiconductor with the smaller bandgap. Further, the graphene layer can also replace the N-type semiconductor, for example, by forming phosphorus (P)-doped graphene on the N-type semiconductor 2 by CVD or a liquid-phase growth method or directly forming it on the base electrode. In this configuration, the forward bias voltage from the outside in a state where a forward current flows due to the movement of electrons and holes can be made higher, and the amount of stored charge in the semiconductor diodes 100 and 200 can be further increased.

[0056] <Modification Example 3> In the above-described embodiment, the semiconductor diodes 100 and 200 are used as charge storage elements for storing and releasing charges. The charge storage element is, for example, an element that supplies charges to other semiconductor elements on a substrate or a secondary battery that supplies charges to other electronic devices.

[0057] As described above, when forming a semiconductor diode as a charge storage element, a PIN diode structure composed of a P-type semiconductor with a wide bandgap, an insulating layer with a bandgap relatively close to that of the semiconductor, and an N-type semiconductor with a small bandgap, or an N-type semiconductor with a wide bandgap, an insulating layer with a bandgap relatively close to that of the semiconductor, and a P-type semiconductor with a small bandgap, in a combination where the difference between the semiconductor with a wide bandgap and the semiconductor with a small bandgap is 1 eV or more. By processing the surface of the semiconductor with a small bandgap into a concave-convex shape or a porous shape so as to increase the surface area of the interface between the insulating layer of the PIN diode and the semiconductor with a small bandgap of the PIN diode, when charging a charge storage element using a semiconductor diode, the current component flowing through the PIN diode is controlled so that either the hole drift current or the electron drift current becomes the main current component, thereby reducing the probability of recombination of the electron drift current and the hole drift current within the PIN diode, and enabling efficient accumulation of charges by holes or charges by electrons at the trapping levels within the PIN diode.

[0058] As described above, the embodiments of the present invention have been explained. However, the above embodiments merely show a part of the application examples of the present invention, and are not intended to limit the technical scope of the present invention to the specific configurations of the above embodiments.

[0059] This application claims priority based on Japanese Patent Application No. 2021-092625 filed with the Japan Patent Office on June 1, 2021, and the entire contents of this application are incorporated herein by reference.

Claims

1. a P-type semiconductor; an N-type semiconductor having a smaller bandgap than the P-type semiconductor; an insulator provided between the P-type semiconductor and the N-type semiconductor and having a larger bandgap than the P-type semiconductor and the N-type semiconductor, and comprising: the difference in bandgap between the P-type semiconductor and the N-type semiconductor is 1 eV or more; a semiconductor diode in which the difference in bandgap between the P-type semiconductor and the insulator is 1 eV or less.

2. The semiconductor diode according to claim 1, wherein in a state where a positive voltage is applied to the P-type semiconductor with reference to the N-type semiconductor from the outside of the semiconductor diode, the energy level of the conduction band of the N-type semiconductor is set to be higher than the energy level of the conduction band of the P-type semiconductor, and the energy level of the valence band of the P-type semiconductor is set to be higher than the energy level of the valence band of the N-type semiconductor.

3. The semiconductor diode according to claim 1 or 2, wherein an oxide semiconductor is used for the P-type semiconductor, and an N-type single-element semiconductor or a semiconductor having a zero bandgap in the N-type is used for the N-type semiconductor.

4. A semiconductor diode, comprising: a P-type semiconductor; an N-type semiconductor having a larger bandgap than the P-type semiconductor; an insulator provided between the P-type semiconductor and the N-type semiconductor and having a larger bandgap than the P-type semiconductor and the N-type semiconductor, and comprising: the difference in bandgap between the P-type semiconductor and the N-type semiconductor is 1 eV or more; the difference in bandgap between the N-type semiconductor and the insulator is 1 eV or less; in a state where a positive voltage is applied to the P-type semiconductor with reference to the N-type semiconductor from the outside of the semiconductor diode, the energy level of the valence band of the P-type semiconductor is set to be lower than the energy level of the valence band of the N-type semiconductor, and the energy level of the conduction band of the N-type semiconductor is set to be lower than the energy level of the conduction band of the P-type semiconductor.

5. The semiconductor diode according to claim 4, wherein a P-type single-element semiconductor or a semiconductor having a zero bandgap in the P-type is used for the P-type semiconductor, and an oxide semiconductor is used for the N-type semiconductor.

6. The semiconductor diode according to claim 2 or 4, wherein A semiconductor diode in which the positive voltage applied from the outside is 1 V or more. **Claim 7** A semiconductor diode according to any one of Claims 1 to 6, wherein a surface of the P-type semiconductor or the N-type semiconductor facing the insulator is formed in an uneven shape or a porous shape. **Claim 8** A semiconductor diode according to any one of Claims 1 to 7, The insulator is LiNbO 3 , Li 3 P.S. 4 , or LiBH 4 Lithium-based perovskite compounds such as LaMnO 3 A semiconductor diode in which a manganese-based perovskite compound such as

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