Ferroelectric device, semiconductor device

Abstract

Provided is a ferroelectric device (100) that has a metal nitride film (130) having favorable ferroelectricity. The ferroelectric device includes: a first conductor (110); the metal nitride film disposed on the first conductor; a second conductor (120) disposed on the metal nitride film; a first insulator (155) disposed on the second conductor; and a second insulator (152) disposed on the first insulator. The first insulator has regions that respectively contact a side surface of the metal nitride film, and a side surface and the top surface of the second conductor. The metal nitride film is ferroelectric and includes a first element, a second element, and nitride. The first element is at least one element selected from the Group 13 elements. The second element is at least one element selected from the Group 13 elements excluding the first element, and is at least one element selected from the Groups 2-6 elements. The first conductor and the second conductor each include nitride. The first insulator includes aluminum and oxygen, and the second insulator includes silicon and nitride.

Description

Technical Field

[0001] One aspect of the present invention relates to a metal nitride film, a ferroelectric device using the metal nitride film, and a method for manufacturing them. Alternatively, one aspect of the present invention relates to a transistor, a semiconductor device, and an electronic device. Alternatively, one aspect of the present invention relates to a method for manufacturing a semiconductor device. Alternatively, one aspect of the present invention relates to a semiconductor wafer and a module.

[0002] Note that in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are one aspect of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, imaging devices, electronic devices, etc. may be said to have semiconductor devices.

[0003] Note that one aspect of the present invention is not limited to the above technical fields. One aspect of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Also, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter.

Background Art

[0004] In recent years, the development of semiconductor devices has advanced, and LSIs, CPUs, memories, etc. are mainly used in semiconductor devices. A CPU is an aggregate of semiconductor elements obtained by processing a semiconductor wafer into a chip-shaped semiconductor integrated circuit (at least a transistor and a memory) and having electrodes as connection terminals formed thereon.

[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on a circuit board, for example, a printed wiring board, and used as one of the components of various electronic devices.

[0006] In addition, a technique for constructing a transistor using a semiconductor thin film formed on a substrate having an insulating surface has attracted attention. The transistor is widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also simply referred to as display devices). As semiconductor thin films applicable to transistors, silicon-based semiconductor materials, oxide semiconductors, and the like are known.

[0007] In addition, as shown in Non-Patent Document 1, research and development of memory arrays using ferroelectrics have been actively carried out. Also, for next-generation ferroelectric memories, as shown in Non-Patent Document 2, research on ferroelectric HfO₂-based materials has been actively carried out. In recent years, research on the ferroelectricity of nitride semiconductors of Group 13 elements, as shown in Non-Patent Document 3, has been reported.

Prior Art Documents

Non-Patent Documents

[0008]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0009] As shown in Non-Patent Documents 1 to 3, various research and developments have been carried out on ferroelectrics. For example, Non-Patent Document 1 reports that in "orthorhombic phase Ferroelectric", the sign of polarization (P) changes due to the movement of oxygen atoms. Further, Non-Patent Document 2 reports that the magnitude of polarization and the dielectric constant (ε r ) change depending on the composition ratio of Hf and Zr. Further, Non-Patent Document 3 reports that ferroelectric switching occurs in Al 1-x Sc x N.

[0010] Therefore, one aspect of the present invention aims to provide a material having good ferroelectricity, that is, a metal nitride film having ferroelectricity. Or, one aspect of the present invention aims to provide a capacitive element using a material that can have ferroelectricity. Or, one aspect of the present invention aims to provide a transistor using a material that can have ferroelectricity. Or, one aspect of the present invention aims to provide a capacitive element and a diode using a material that can have ferroelectricity. Or, one aspect of the present invention aims to provide an element using a material that can have ferroelectricity and using a tunnel junction.

[0011] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description of the specification, drawings, claims, etc., and it is possible to extract these other problems from the description of the specification, drawings, claims, etc.

Means for Solving the Problems

[0012] One aspect of the present invention is a ferroelectric device having an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator. The first conductor, the metal nitride film, and the second conductor are surrounded by the insulating film, the first insulator, and the second insulator. The metal nitride film has ferroelectricity. The metal nitride film has a first element, a second element, and nitrogen. The first element is one or more elements selected from Group 13 elements. The second element is a Group 13 element other than the first element, and one or more elements selected from Group 2 to Group 6 elements. Each of the first conductor and the second conductor has nitrogen. The first insulator has aluminum and oxygen. Each of the insulating film and the second insulator has silicon and nitrogen.

[0013] Also, one aspect of the present invention is a ferroelectric device having a first conductor, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator. The first insulator has a region in contact with the side surface of the metal nitride film, a region in contact with the side surface of the second conductor, and a region in contact with the upper surface of the second conductor. The metal nitride film has ferroelectricity. The metal nitride film has a first element, a second element, and nitrogen. The first element is one or more elements selected from Group 13 elements. The second element is a Group 13 element other than the first element, and one or more elements selected from Group 2 to Group 6 elements. Each of the first conductor and the second conductor has nitrogen. The first insulator has aluminum and oxygen. The second insulator has silicon and nitrogen.

[0014] In the above ferroelectric device, the first insulator preferably has an amorphous structure.

[0015] Another aspect of the present invention is a ferroelectric device having an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, and an insulator on the first conductor, on the metal nitride film, and on the second conductor. The insulator has a region in contact with the upper surface of the insulating film, a region in contact with the side surface of the metal nitride film, a region in contact with the side surface of the second conductor, and a region in contact with the upper surface of the second conductor. The metal nitride film has ferroelectricity. The metal nitride film has a first element, a second element, and nitrogen. The first element is one or more elements selected from Group 13 elements. The second element is one or more elements selected from Group 13 elements excluding the first element, and Group 2 to Group 6 elements. Each of the first conductor and the second conductor has nitrogen. Each of the insulating film and the insulator has silicon and nitrogen.

[0016] In the ferroelectric device, the metal nitride film preferably has a wurtzite structure.

[0017] Also, in the ferroelectric device, the first element is preferably any one or more of aluminum (Al), gallium (Ga), and indium (In).

[0018] Also, in the ferroelectric device, the second element is preferably any one or more of boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodymium (Nd), and europium (Eu).

[0019] Alternatively, in the ferroelectric device, the first element is preferably aluminum (Al), and the second element is preferably one or more selected from lanthanoids and actinoids.

[0020] Alternatively, in the ferroelectric device, the first element is aluminum (Al), and the second element is preferably one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta).

[0021] Also, in the ferroelectric device, the first conductor preferably has a crystal with a sodium chloride type structure.

[0022] Also, in the ferroelectric device, a silicon nitride film may be provided between the first conductor and the metal nitride film. Alternatively, a silicon nitride film may be provided between the metal nitride film and the second conductor.

[0023] Another aspect of the present invention is a semiconductor device having the ferroelectric device and a transistor including an oxide semiconductor in a channel formation region.

[0024] Another aspect of the present invention is a metal nitride film having ferroelectricity, the metal nitride film having aluminum, one or more selected from lanthanoids and actinoids, and nitrogen.

[0025] Another aspect of the present invention is a metal nitride film having ferroelectricity, the metal nitride film having aluminum, one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta), one or more selected from magnesium (Mg), calcium (Ca), zinc (Zn), etc., and nitrogen.

Advantages of the Invention

[0026] According to one aspect of the present invention, a material having good ferroelectricity, that is, a metal nitride film having ferroelectricity can be provided. Or, according to one aspect of the present invention, a capacitive element using a material that can have ferroelectricity can be provided. Or, according to one aspect of the present invention, a transistor using a material that can have ferroelectricity can be provided. Or, according to one aspect of the present invention, a capacitive element and a diode using a material that can have ferroelectricity can be provided. Or, according to one aspect of the present invention, an element using a material that can have ferroelectricity and using a tunnel junction can be provided.

[0027] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other effects from the descriptions in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0028] FIGS. 1A to 1C are cross-sectional views of a capacitive element according to one aspect of the present invention. FIGS. 2A to 2C are diagrams for explaining the atomic arrangement of a metal nitride. FIGS. 2D and 2E are diagrams for explaining a calculation model. FIGS. 3A and 3B are diagrams for explaining calculation results. FIGS. 4A to 4C are schematic diagrams of a ferroelectric body included in a capacitive element. FIGS. 5A to 5C are cross-sectional views showing a method for manufacturing a capacitive element according to one aspect of the present invention. FIG. 6A is a diagram showing a film formation sequence of a metal nitride film according to one aspect of the present invention. FIG. 6B is a cross-sectional view of a manufacturing apparatus for a metal nitride film according to one aspect of the present invention. FIG. 6C is a diagram showing a film formation sequence of an oxide. FIGS. 7A1, 7B1, and 7C1 are diagrams for explaining a circuit diagram of a semiconductor device according to one aspect of the present invention. FIGS. 7A2, 7B2, 7C2, 7C3, and 7C4 are diagrams for explaining a cross-sectional structure of a semiconductor device according to one aspect of the present invention. FIG. 8A is a top view of a semiconductor device according to one embodiment of the present invention. FIGS. 8B to 8D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. FIGS. 9A and 9B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. FIG. 10A is a diagram for explaining the classification of the crystal structure of IGZO. FIG. 10B is a diagram for explaining the XRD spectrum of the CAAC-IGZO film. FIG. 10C is a diagram for explaining the electron backscatter diffraction pattern of the CAAC-IGZO film. FIG. 11A is a top view of a semiconductor device according to one embodiment of the present invention. FIGS. 11B and 11C are cross-sectional views of a semiconductor device according to one embodiment of the present invention. FIG. 12A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 12B to 12D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 13A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 13B to 13D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 14A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 14B to 14D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 15A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 15B to 15D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 16A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 16B to 16D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 17A is a top view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIGS. 17B to 17D are cross-sectional views showing a method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 18A is a top view of a semiconductor device according to one embodiment of the present invention. FIG. 18B is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIGS. 19A to 19D are cross-sectional views of a capacitive element according to one embodiment of the present invention. FIGS. 20A to 20C are cross-sectional views of a semiconductor device according to one embodiment of the present invention. Figs. 21A to 21C are cross-sectional views showing the configuration of an element according to an aspect of the present invention. Fig. 22 is a cross-sectional view showing the configuration of a memory device according to an aspect of the present invention. Fig. 23 is a cross-sectional view showing the configuration of a memory device according to an aspect of the present invention. Figs. 24A and 24B are cross-sectional views showing the configuration of a memory device according to an aspect of the present invention. Fig. 25 is a cross-sectional view showing the configuration of a memory device according to an aspect of the present invention. Fig. 26 is a cross-sectional view showing the configuration of a memory device according to an aspect of the present invention. Figs. 27A and 27B are cross-sectional views showing the configuration of a memory device according to an aspect of the present invention. Fig. 28A is a block diagram showing a configuration example of a memory device according to an aspect of the present invention. Fig. 28B is a perspective view showing a configuration example of a memory device according to an aspect of the present invention. Fig. 29A is a circuit diagram showing a configuration example of a memory cell. Fig. 29B1 is a graph showing an example of the hysteresis characteristics of a ferroelectric layer. Fig. 29B2 is a graph showing an example of the hysteresis characteristics of an ideal ferroelectric layer. Fig. 29C is a timing chart showing an example of a method for driving a memory cell. Figs. 30A to 30E are schematic views of a memory device according to an aspect of the present invention. Figs. 31A to 31H are views showing an electronic device according to an aspect of the present invention.

Embodiments for Carrying Out the Invention

[0029] Hereinafter, embodiments will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiments can be implemented in many different modes, and the forms and details thereof can be variously changed without departing from the spirit and scope. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0030] In the drawings, the size, layer thickness, or area may be exaggerated for clarity. Thus, it is not necessarily limited to that scale. Note that the drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, etc. may unintentionally become thinner due to processes such as etching, but this may not be reflected in the figures for ease of understanding. Also, in the drawings, the same reference numerals are commonly used for the same parts or parts having similar functions among different drawings, and repeated explanations may be omitted. Also, when referring to similar functions, the hatch patterns may be the same and may not be particularly labeled.

[0031] Also, especially in top views (also referred to as "plan views"), perspective views, etc., descriptions of some components may be omitted for ease of understanding of the invention. Also, descriptions of some hidden lines, etc. may be omitted.

[0032] Also, in this specification, etc., ordinal numbers such as "first", "second", etc. are used for convenience and do not indicate the process order or stacking order. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third", etc. and described. Also, the ordinal numbers described in this specification, etc. may not match the ordinal numbers used to specify an aspect of the present invention.

[0033] Also, in this specification, etc., terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components appropriately changes according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0034] For example, in this specification and the like, when it is explicitly described that X and Y are connected, it shall be disclosed in this specification and the like that X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in a figure or text, and those other than the connection relationship shown in the figure or text are also considered to be disclosed in the figure or text. Here, X and Y are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0035] Also, in this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. And it has a region (hereinafter also referred to as a channel formation region) where a channel is formed between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification and the like, the channel formation region refers to the region where current mainly flows.

[0036] Also, the functions of the source or the drain may be interchanged when transistors of different polarities are employed, or when the direction of current changes in circuit operation. For this reason, in this specification and the like, the terms source or drain may be used interchangeably.

[0037] Note that the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the portion where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in the channel formation region. Note that in one transistor, the channel length does not necessarily take the same value in all regions. That is, the channel length of one transistor may not be determined to be a single value. Therefore, in this specification, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the channel formation region.

[0038] The channel width is, for example, in the top view of the transistor, the region where the semiconductor (or the portion where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the length of the channel formation region in the direction perpendicular to the channel length direction in the channel formation region. Note that in one transistor, the channel width does not necessarily take the same value in all regions. That is, the channel width of one transistor may not be determined to be a single value. Therefore, in this specification, the channel width is taken as any one value, the maximum value, the minimum value, or the average value in the channel formation region.

[0039] Note that in this specification and the like, depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter, also referred to as the "effective channel width") may be different from the channel width shown in the top view of the transistor (hereinafter, also referred to as the "apparent channel width"). For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width may be larger than the apparent channel width, and the influence may become non-negligible. For example, in a fine transistor in which the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, the effective channel width is larger than the apparent channel width.

[0040] In such a case, it may be difficult to estimate the effective channel width by measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, when the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0041] In this specification, when simply described as the channel width, it may refer to the apparent channel width. Or, in this specification, when simply described as the channel width, it may refer to the effective channel width. Note that the channel length, channel width, effective channel width, apparent channel width, etc. can be determined, for example, by analyzing a cross-sectional TEM image.

[0042] Note that the impurities in the semiconductor refer to, for example, components other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% can be said to be an impurity. When impurities are included, for example, the density of defect levels in the semiconductor may increase, and the crystallinity may decrease. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition metals other than the main components of the oxide semiconductor, etc., such as hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Note that water may also function as an impurity. Also, for example, due to the incorporation of impurities, oxygen vacancies (also referred to as V O :oxygen vacancy) may be formed in the oxide semiconductor.

[0043] Note that in this specification, etc., oxynitride refers to a substance having a higher oxygen content than nitrogen in its composition. For example, silicon oxynitride has a higher oxygen content than nitrogen in its composition. Also, nitride oxide refers to a substance having a higher nitrogen content than oxygen in its composition. For example, silicon nitride oxide has a higher nitrogen content than oxygen in its composition.

[0044] In addition, in this specification and the like, the term "insulator" can be rephrased as an insulating film or an insulating layer. Also, the term "conductor" can be rephrased as a conductive film or a conductive layer. Further, the term "semiconductor" can be rephrased as a semiconductor film or a semiconductor layer.

[0045] In this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, the case of -5 degrees or more and 5 degrees or less is also included. Also, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. Further, "perpendicular" means a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, the case of 85 degrees or more and 95 degrees or less is also included. Also, "substantially perpendicular" means a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0046] In this specification and the like, a metal oxide is an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS), etc. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when described as an OS transistor, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

[0047] In addition, in this specification and the like, normally-off means that when no potential is applied to the gate or the gate is given a ground potential, the drain current per 1 μm of channel width flowing through the transistor is -20 1×10 -18 A or less at room temperature, 1×10 -16 A or less at 85 °C, or 1×10

[0048] In addition, in this specification, when upper and lower numerical values are defined, a configuration in which the upper and lower numerical values can be freely combined is also disclosed.

[0049] In this specification, the barrier insulating film refers to an insulating film having barrier properties. In this specification, the barrier property means a function of suppressing the diffusion of the corresponding substance (also referred to as low permeability). Or, it means a function of capturing or fixing the corresponding substance (also referred to as gettering).

[0050] In addition, in this specification and the like, descriptions such as "A covers B", "A encloses B", or "A envelops B" do not necessarily mean that the entire B is hidden by A. Descriptions such as "A covers B", "A encloses B", or "A envelops B" include a state in which a part of B is exposed from A. Also, in this specification and the like, the description "A covers B" can be rephrased as "A encloses B" or "A envelops B".

[0051] (Embodiment 1) In this embodiment, with reference to FIGS. 1 to 7, a configuration example of a capacitive element and a ferroelectric device according to one aspect of the present invention will be described.

[0052] <Configuration of Capacitive Element> As shown in FIG. 1A, a capacitive element 100 according to one aspect of the present invention includes a conductor 110, a conductor 120, and an insulator 130 sandwiched between the conductor 110 and the conductor 120. For example, the conductor 110 may be disposed on the insulator 105, the insulator 130 may be disposed on the conductor 110, and the conductor 120 may be disposed on the insulator 130. Here, the conductor 110 functions as a lower electrode of the capacitive element 100, the conductor 120 functions as an upper electrode of the capacitive element 100, and the insulator 130 functions as a dielectric of the capacitive element 100.

[0053] Furthermore, as shown in FIG. 1A, an insulator 152 is disposed so as to surround the capacitive element 100, and an insulator 155 is disposed at least between the insulator 152 and the insulator 130. For example, as shown in FIG. 1A, the insulator 155 is disposed so as to surround the conductor 110, the insulator 130, and the conductor 120, and the insulator 152 is disposed so as to surround the insulator 155. At this time, the insulator 155 may be in contact with the insulator 105 in a region where it does not overlap with the conductor 110. Also, as shown in FIG. 1A, the insulator 155 has regions in contact with the side surfaces of the conductor 110, the insulator 130, the side surface of the conductor 120, and the upper surface of the conductor 120, respectively.

[0054] Here, at least one of the insulator 152 and the insulator 155 functions as a hydrogen barrier insulating film. The insulator 152 has a function of suppressing the diffusion of at least one of hydrogen and a substance to which hydrogen is bonded (for example, OH - etc.). Therefore, the insulator 152 is assumed to have a higher ability to suppress the diffusion of at least one of hydrogen and a substance to which hydrogen is bonded (for example, OH - etc.) than the insulator 130. Also, the insulator 155 has a function of capturing or fixing (also referred to as gettering) at least one of hydrogen and a substance to which hydrogen is bonded. Therefore, the insulator 155 is assumed to have a higher ability to capture or fix at least one of hydrogen and a substance to which hydrogen is bonded than the insulator 130.

[0055] It is preferable to use a material that may have ferroelectricity for the insulator 130. As one of the materials having ferroelectricity, a metal nitride having a wurtzite structure (space group: P63mc) can be mentioned. In the wurtzite structure, spontaneous polarization occurs along the c-axis. Also, depending on the type and combination of cations arranged in the cation sites of the wurtzite structure, the polarity of the polarization is reversed by an external electric field within a range where dielectric breakdown does not occur. It is presumed that by changing the direction or strength of the external electric field, some of the nitrogen atoms in the metal nitride move and the sign of the polarization generated inside is changed. At this time, ferroelectricity is exhibited.

[0056] In view of the above, a metal nitride having a first element, a second element, and nitrogen may have ferroelectricity. Here, the first element is one or more elements selected from Group 13 elements. Further, the second element is an element that lowers a barrier (also referred to as an inversion barrier) when the polarity of polarization is inverted. For example, it is preferable that the metal nitride containing the second element as a main component may have a crystal structure other than the wurtzite-type structure, and more preferably may have a layered hexagonal crystal structure (space group: P63 / mmc) or a sodium chloride-type structure (NaCl-type structure, space group: Fm-3m). Specifically, the second element is one or more elements selected from Group 13 elements excluding the first element, Group 2 elements to Group 6 elements, and the like. The metal nitride having the first element as a main component tends to have a crystal structure of the wurtzite-type structure. Furthermore, when the second element is contained in the metal nitride, the polarity of the polarization of the metal nitride may be inverted by an external electric field within a range where dielectric breakdown does not occur.

[0057] Examples of materials that can have ferroelectricity include metal nitrides having an element M1, an element M2, and nitrogen. Here, the element M1 corresponds to the first element, and the element M2 corresponds to the second element. Here, the element M1 is one or more selected from aluminum (Al), gallium (Ga), indium (In), and the like. Further, the element M2 is one or more selected from boron (B), rare earth elements, and actinoids (15 elements from actinium (Ac) to lawrencium (Lr)). Since the rare earth elements are a general term for scandium (Sc), yttrium (Y), and lanthanoids (15 elements from lanthanum (La) to lutetium (Lu)), the element M2 is one or more selected from boron (B), scandium (Sc), yttrium (Y), lanthanoids, and actinoids. In particular, the element M2 is preferably one or more selected from boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodymium (Nd), europium (Eu), and the like. Note that the ratio of the sum of the number of atoms of the element M1 and the element M2 to the number of atoms of nitrogen may be 1:1 or in the vicinity thereof. Here, the vicinity includes the range of ±30% of the desired atomic ratio. Here, the ratio of the number of atoms of the element M1 to the number of atoms of the element M2 can be set as appropriate. For example, the number of atoms of the element M1 is preferably larger than the number of atoms of the element M2, and more preferably 1.5 times or more the number of atoms of the element M2. Note that the ratio of the number of atoms of the element M1 to the number of atoms of the element M2 is preferably in the range in which the metal nitride can form a solid solution. When two or more are selected from aluminum, gallium, indium, and the like as the element M1, the metal nitride having the element M1 and nitrogen may have ferroelectricity even if it does not contain the element M2.

[0058] Typical examples of the metal nitride having the element M1, the element M2, and nitrogen include aluminum scandium nitride (Al 1-a Sc a N b (a is a real number greater than 0 and less than 0.5, and b is 1 or a value in the vicinity thereof.)), Al-Ga-Sc nitride (Al1- c-d Ga c Sc d N b (Each of c and d is a positive real number, c + d is greater than 0 and less than 0.5, and b is 1 or a value in the vicinity thereof.)), and Ga-Sc nitride (Ga 1-e Sc e N b (e is a real number greater than 0 and less than 1, and b is 1 or a value in the vicinity thereof.)), and there are metal nitrides such as this. That is, examples of materials that can have ferroelectricity include materials having aluminum nitride and / or scandium nitride.

[0059] Note that in some cases, it may be preferable to use an Al-Ga-Sc nitride rather than an aluminum scandium nitride as a material that can have ferroelectricity. The ionic radius of gallium is larger than the ionic radius of aluminum and smaller than the ionic radius of scandium. Therefore, it is presumed that by adding gallium to aluminum scandium nitride, the crystal structure of aluminum scandium nitride and its lattice constant can be adjusted so that ferroelectricity is likely to appear. Therefore, ferroelectricity is expected to appear in the Al-Ga-Sc nitride. Also, the band gap of gallium nitride is smaller than the band gap of aluminum nitride and larger than the band gap of scandium nitride. Therefore, by adding gallium to aluminum scandium nitride, the insulation of aluminum scandium nitride is enhanced and it can be used for the ferroelectric device described later.

[0060] In addition, examples of materials that can have ferroelectricity include metal nitrides having, for example, element M1, element M3, and nitrogen. Here, element M1 corresponds to the first element, and element M3 corresponds to the second element. Here, element M1 is one or more selected from aluminum (Al), gallium (Ga), indium (In), and the like. Element M3 is one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), and the like. In the metal nitrides of titanium, zirconium, hafnium, vanadium, niobium, tantalum, or chromium, the valence of these metal elements is +3. Therefore, also in the metal nitride having element M1, element M3, and nitrogen, the valence of element M3 can be +3. Therefore, when the ratio of the sum of the number of atoms of element M1 and element M3 to the number of atoms of nitrogen is 1:1 or in the vicinity thereof, the electrical neutrality of the metal nitride may be maintained.

[0061] In addition, the metal nitride having element M1, element M3, and nitrogen may contain element M4. Here, element M4 is an element that can maintain the electrical neutrality of the metal nitride. Element M4 is, for example, an element that tends to take a valence of +1 or an element that tends to take a valence of +2. Specifically, element M4 is one or more selected from sodium (Na), potassium (K), rubidium (Ru), cesium (Cs), magnesium (Mg), calcium (Ca), strontium (Sr), zinc (Zn), and cadmium (Cd). Titanium, zirconium, hafnium, vanadium, niobium, tantalum, and chromium exemplified as element M3 can take a valence of +4 or higher. Therefore, it is presumed that the electrical neutrality of the metal nitride is maintained by including element M4 that can maintain the electrical neutrality of the metal nitride. Note that the atomic ratio of element M3 and element M4 can be appropriately set according to the types of elements selected as element M3 or element M4. For example, when element M4 is an element that tends to take a valence of +2 (such as Mg, Ca, Sr, Zn, and Cd) and element M3 is an element that can take a valence of +4 (such as Ti, Zr, and Hf), the atomic ratio of element M4 to the atomic number of element M3 is preferably 1:1 or in the vicinity thereof. Or, when element M4 is an element that tends to take a valence of +2 and element M3 is an element that can take a valence of +5 (such as V, Nb, and Ta), the atomic ratio of element M4 to the atomic number of element M3 is preferably 2:1 or in the vicinity thereof. Or, when element M4 is an element that tends to take a valence of +1 (such as Na, K, Ru, and Cs) and element M3 is an element that can take a valence of +5, the atomic ratio of element M4 to the atomic number of element M3 is preferably 1:1 or in the vicinity thereof. Note that the atomic ratio of element M1, element M3, and element M4 can be appropriately set. For example, the atomic number of element M1 is preferably larger than the sum of the atomic numbers of element M3 and element M4.

[0062] In addition, the metal nitride having element M1, element M2, and nitrogen may contain element M3 or element M4. At this time, the ratio of the number of atoms of element M3 or element M4 to the sum of the number of atoms of element M1 and element M2 is preferably 0.05 or less, more preferably 0.02 or less. Thereby, the number of defects formed to maintain the electrical neutrality of the metal nitride can be suppressed. By suppressing the number of defects, the crystallinity of the metal nitride is improved, and ferroelectricity is likely to be exhibited.

[0063] In addition, the metal nitride having element M1, element M3, and nitrogen may contain element M2. At this time, there is no particular limitation on the ratio of the sum of the number of atoms of element M1 and element M3 to the number of atoms of element M2. This is because even if element M2 is contained in the metal nitride, the electrical neutrality of the metal nitride is maintained.

[0064] In addition, the metal nitride having element M1, element M3, element M4, and nitrogen may contain element M2. At this time, there is no particular limitation on the ratio of the sum of the number of atoms of element M1, element M3, and element M4 to the number of atoms of element M2. This is because even if element M2 is contained in the metal nitride, the electrical neutrality of the metal nitride is maintained.

[0065] Note that since the above metal nitride contains at least a Group 13 element and nitrogen which is a Group 15 element, the metal nitride may be referred to as a ferroelectric material of the III-V group, a ferroelectric material of the Group III nitride, etc.

[0066] <Calculation of materials that can have ferroelectricity> The materials that can have ferroelectricity will be described using the results of first-principles calculations. Here, metal nitrides are cited as materials that can have ferroelectricity.

[0067] The atomic arrangements of the metal nitride are shown in FIGS. 2A to 2C. FIGS. 2A and 2C show the atomic arrangement of the wurtzite structure, and FIG. 2B shows the atomic arrangement of the layered hexagonal structure. In FIGS. 2A to 2C, the white spheres are cations (cation sites), and the black spheres are nitrogen (N) (nitrogen (N) sites). Also, the arrows in FIGS. 2A to 2C indicate the c-axis direction (c-axis) of the crystal structure of the metal nitride. Further, the plane perpendicular to the c-axis is the a-b plane of the crystal structure of the metal nitride.

[0068] As described above, in the metal nitride having the wurtzite structure, polarization occurs along the c-axis. For example, when the metal nitride has the atomic arrangement shown in FIG. 2A, polarization occurs along the c-axis. Also, the polarity of the polarization is reversed by an external electric field within a range where dielectric breakdown does not occur. For example, when the metal nitride changes from the atomic arrangement shown in FIG. 2A to the atomic arrangement shown in FIG. 2C, the polarity of the polarization is reversed.

[0069] From FIGS. 2A and 2C, it is presumed that the inversion of the polarity of the polarization occurs by the movement of the nitrogen atoms across the layer containing the cations and parallel to the a-b plane. That is, in the process in which the inversion of the polarity of the polarization occurs, it is presumed that the metal nitride temporarily has an atomic arrangement in which nitrogen atoms are located within the layer containing the cations and parallel to the a-b plane. In the process in which the inversion of the polarity of the polarization occurs, the metal nitride temporarily has, for example, the atomic arrangement shown in FIG. 2B. In other words, it is presumed that the polarity of the polarization is reversed when the metal nitride changes from the atomic arrangement shown in FIG. 2A via the atomic arrangement shown in FIG. 2B to the atomic arrangement shown in FIG. 2C.

[0070] It can be said that the lower the barrier (also referred to as the inversion barrier) when the polarity of the polarization is inverted, the easier it is for the inversion of the polarity of the polarization to occur. Therefore, using the calculation models of the wurtzite structure and the layered hexagonal structure, the inversion barrier with respect to the type and ratio of the atoms located at the cation sites is calculated by first-principles calculation.

[0071] First, the calculation model used for the first-principles calculation will be described.

[0072] First, prepare a unit cell of the wurtzite structure and a unit cell of the layered hexagonal structure. In both of these two unit cells, the cation:nitrogen ratio is 1:1 [atomic ratio]. Next, for each of the two unit cells, expand the unit cell to create a supercell with 32 atoms. At this time, the number of cations (cation sites) contained in the supercell is 16, and the number of nitrogens (nitrogen sites) contained in the supercell is 16. From the above, a supercell of the wurtzite structure and a supercell of the layered hexagonal structure can be prepared.

[0073] Figures 2D and 2E show the above two supercells. The supercell shown in Figure 2D has a wurtzite crystal structure, and the periodicity of the atomic arrangement is the same as that of the atomic arrangement of the structure shown in Figure 2A. Also, the calculation model shown in Figure 2E has a layered hexagonal crystal structure, and the periodicity of the atomic arrangement is the same as that of the atomic arrangement of the structure shown in Figure 2B. Note that the arrows in Figures 2D and 2E indicate the c-axis direction of the crystal structure of the supercell. Also, the plane perpendicular to the c-axis is the a-b plane of the crystal structure of the supercell.

[0074] Next, in each of the above two supercells, by arranging an aluminum atom (Al) or a metal atom different from the aluminum atom at each cation site, a calculation model of the wurtzite structure and a calculation model of the layered hexagonal structure are created. Hereinafter, a metal atom different from the aluminum atom is denoted as atom M0. Also, let the ratio of the number of atoms M0 arranged at the cation sites in the calculation model to the number of cation sites in the calculation model be a [%]. For example, when arranging atom M0 at one cation site in the calculation model, the ratio is 6.25% (1 / 16).

[0075] Next, by changing the type and / or ratio a of atom M0, 20 calculation models of the wurtzite-type structure and 20 calculation models of the layered hexagonal structure are created. In this calculation, atom M0 is a scandium atom (Sc), a titanium atom (Ti), a zirconium atom (Zr), a hafnium atom (Hf), a vanadium atom (V), a niobium atom (Nb), or a tantalum atom (Ta). Also, the ratio a is 6.25%, 12.5%, 25%, or 50%. Note that one of the 20 calculation models is a calculation model in which aluminum atoms are arranged at all cation sites.

[0076] For each of the above 40 calculation models, structural optimization is performed using first-principles calculations. Note that the first-principles calculation software VASP (The Vienna Ab initio simulation) is used for the first-principles calculation. The calculation conditions are shown in Table 1.

[0077]

Table 1

[0078] For the electronic state pseudo-potential, a potential generated by the Projector Augmented Wave (PAW) method is used, and for the functional, GGA / PBE (Generalized-Gradient-Approximation / Perdew-Burke-Ernzerhof) is used. Also, symmetry is considered.

[0079] Also, the structural optimization of the calculation model is performed by repeatedly performing calculations to optimize the atomic coordinates while fixing the shape and volume of the cell, and calculations to optimize the shape and volume of the cell as well as the atomic coordinates.

[0080] The inversion barrier is calculated using the computational model of the layered hexagonal structure after structure optimization and the computational model of the wurtzite structure after structure optimization. Specifically, the inversion barrier is the value obtained by dividing, by 16, the value obtained by subtracting the total energy calculated based on the computational model of the wurtzite structure after structure optimization from the total energy calculated based on the computational model of the layered hexagonal structure after structure optimization.

[0081] The inversion barrier calculated using the computational model with the ratio a of 6.25% is shown in Fig. 3A. In Fig. 3A, the horizontal axis represents the atom M0, and the vertical axis represents the inversion barrier [meV / f.u.] (f.u.: formula unit). Also, for comparison, the inversion barrier calculated using the computational model in which aluminum atoms are arranged at all cation sites in the computational model (the computational model with the ratio a of 0%) is also shown in Fig. 3A. Note that the computational model with the ratio a of 0% is referred to as the computational model in which the atom M0 is Al.

[0082] From Fig. 3A, it is suggested that the inversion barrier decreases by adding Sc, Ti, Zr, Hf, V, Nb, or Ta to aluminum nitride. In particular, it is suggested that the inversion barrier decreases more when the atom added to aluminum nitride is Ti, V, Nb, or Ta. Therefore, it is estimated that a metal nitride having one or more selected from Sc, Ti, Zr, Hf, V, Nb, and Ta, Al, and nitrogen may have ferroelectricity.

[0083] Next, the relationship between the ratio a and the inversion barrier will be described with reference to FIG. 3B. FIG. 3B is a diagram for explaining the relationship between the ratio a and the inversion barrier. The inversion barrier shown in FIG. 3B is calculated using a calculation model in which the atom M0 is Sc, Ti, Nb, or Ta. In FIG. 3B, the horizontal axis represents the ratio a [%], and the vertical axis represents the inversion barrier [meV / f.u.]. When the ratio a is 50% and the atom M0 is Ti, Nb, or Ta, and the calculation model of the wurtzite structure is optimized, it changes to a layered hexagonal crystal structure. Therefore, it is difficult to calculate the inversion barrier using a calculation model in which the ratio a is 50% and the atom M0 is Ti, Nb, or Ta. Therefore, the inversion barrier for the calculation model in which the ratio a is 50% and the atom M0 is Ti, Nb, or Ta is not plotted in FIG. 3B.

[0084] From FIG. 3B, it is confirmed that as the ratio a increases, the inversion barrier tends to decrease. Also, when the atom M0 is Ti, Nb, or Ta and the ratio a is 50%, it is suggested that polarization may not occur. Therefore, it is estimated that a metal nitride having Ti, Nb, or Ta, Al, and nitrogen can have ferroelectricity by making the number of Al atoms larger than the number of Ti, Nb, or Ta atoms.

[0085] The above is an explanation of a material that may have ferroelectricity using the results of first-principles calculations.

[0086] As a material that may have ferroelectricity, for example, a mixture or compound composed of a plurality of materials selected from the materials listed above can be used. Alternatively, the insulator 130 can be formed into a laminated structure composed of a plurality of materials selected from the materials listed above. By the way, materials such as those listed above may change in crystal structure (characteristics) not only depending on film formation conditions but also depending on various processes. Therefore, in this specification, etc., not only a material that exhibits ferroelectricity is called a ferroelectric, but also a material that may have ferroelectricity is called. Also, ferroelectrics shall include not only materials that exhibit ferroelectricity but also materials that may have ferroelectricity.

[0087] Among these, as a material that can have ferroelectricity, the above-described metal nitride, particularly a material having aluminum nitride and / or scandium nitride, is preferable because it can have ferroelectricity even when processed into a thin film with a thickness of several nm. Here, the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less (typically, 2 nm or more and 9 nm or less). For example, it is preferable to set the film thickness to 8 nm or more and 12 nm or less. By setting the film thickness of the material that can have ferroelectricity as described above, it is possible to make the film thinner and achieve the manifestation of ferroelectricity. By using a ferroelectric layer that can be made thinner, the capacitor element 100 can be combined with a semiconductor element such as a miniaturized transistor to form a semiconductor device. In this specification and the like, a material having a ferroelectricity-capable material formed in layers may be referred to as a ferroelectric layer or a metal nitride film. Further, in this specification and the like, a device having such a ferroelectric layer (metal nitride film) may be referred to as a ferroelectric device.

[0088] By using the above-described metal nitride layer for the insulator 130, it is possible to suppress the oxidation of the conductor 110 and the conductor 120 and the decrease in conductivity.

[0089] A material that can have ferroelectricity is an insulator, and has the property that polarization occurs inside when an electric field is applied from the outside, and the polarization remains even when the electric field is set to zero. Therefore, a non-volatile memory element can be formed using a capacitor element (hereinafter sometimes referred to as a ferroelectric capacitor) using the material as a dielectric. A non-volatile memory element using a ferroelectric capacitor is a FeRAM (Ferroelectric Random Access Memory), and is sometimes called a ferroelectric memory. For example, a ferroelectric memory can have a transistor and a ferroelectric capacitor, and one of the source and drain of the transistor can be electrically connected to one terminal of the ferroelectric capacitor. Therefore, the capacitive element 100 shown in this embodiment and the semiconductor device using a transistor can function as a ferroelectric memory.

[0090] Here, FIGS. 4A to 4C show enlarged views of the vicinity of the insulator 130 that functions as a ferroelectric layer shown in FIG. 1A and the like.

[0091] In the insulator 130, as shown in FIG. 4A, it is preferable that crystals form a layer and the crystal structure in which the layers are stacked. Further, the layer preferably includes a single crystal structure. The broken line of the insulator 130 shown in FIG. 4A indicates the crystal layer, and the arrow 132 indicates the c-axis of the crystal.

[0092] The crystal layer included in the insulator 130 extends in the a-b plane direction. Also, the crystal layer included in the insulator 130 grows in the c-axis direction (sometimes called axial growth), and a plurality of crystal layers are stacked in the c-axis direction. The c-axis preferably faces a direction substantially perpendicular to the surface to be formed or the upper surface of the insulator 130. For example, the angle θ formed by the normal to the upper surface of the conductor 110 and the arrow 132 is preferably 30° or less, and more preferably 5° or less.

[0093] In the above, an example of using a ferroelectric layer having a single crystal structure as shown in FIG. 4A and the like for the insulator 130 has been shown, but the present invention is not limited to this. For example, as shown in FIG. 4B, the insulator 130 may have a polycrystalline structure having a plurality of grains 136 with different crystallinities. Here, at least a part of the plurality of grains 136 preferably has a hexagonal crystal structure, and more preferably has a wurtzite structure. By having a hexagonal crystal structure in at least a part of the plurality of grains 136, ferroelectricity is preferably exhibited in the insulator 130.

[0094] Alternatively, the insulator 130 may be configured to include a layer 138a having a single crystal structure and a polycrystalline layer 138b. For example, as shown in FIG. 4C, a layer 138a having a plurality of single crystal structures and a plurality of polycrystalline layers 138b may be stacked on the conductor 110.

[0095] The insulator 130 preferably has a hexagonal crystal structure because ferroelectricity is exhibited. Alternatively, the insulator 130 may have an amorphous structure. Or, the insulator 130 may have a composite structure including an amorphous structure and a crystal structure.

[0096] Also, in order to form the insulator 130 with good crystallinity, it is preferable that impurities such as hydrogen, carbon, hydrocarbon, or chlorine in the insulator 130 are reduced. Here, the above impurities do not refer only to single atoms. In the insulator 130, it is preferable that substances combined with the above impurity elements are also reduced. For example, substances combined with hydrogen (e.g., OH - etc.) in the insulator 130 are also preferably reduced. These impurities may form nitrogen deficiencies in the crystals in the insulator 130. Further, impurity elements such as hydrogen may bond to the nitrogen deficiency sites, resulting in a decrease in the crystallinity of the insulator 130. Therefore, the inclusion of these impurities in the insulator 130 may inhibit the crystallization of the insulator 130. As described above, ferroelectricity is exhibited by the displacement of nitrogen by an external electric field. Therefore, in order to improve the ferroelectricity of the insulator 130, it is preferable to reduce impurities such as hydrogen, carbon, hydrocarbon, or chlorine.

[0097] Therefore, it is preferable to use a material in which the insulator 130 does not contain impurities such as hydrogen, carbon, hydrocarbon, or chlorine, or the content thereof is extremely small. For example, the concentration of hydrogen contained in the insulator 130 is preferably 5×10 20 atoms / cm 3 or less, and preferably 1×10 20 atoms / cm 3The following is more preferable. For example, the concentration of hydrocarbons contained in the insulator 130 is 5×10 20 atoms / cm 3 or less is preferable, 1×10 20 atoms / cm 3 or less is more preferable, and 5×10 19 atoms / cm 3 or less is even more preferable. For example, the concentration of carbon contained in the insulator 130 is 5×10 20 atoms / cm 3 or less is preferable, 1×10 20 atoms / cm 3 or less is more preferable, and 5×10 19 atoms / cm 3 or less is even more preferable. For example, the concentration of chlorine contained in the insulator 130 is 5×10 21 atoms / cm 3 or less is preferable, 1×10 21 atoms / cm 3 or less is more preferable, and 5×10 20 atoms / cm 3 or less is even more preferable.

[0098] Note that the quantification of the above impurities can be performed using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES). For example, SIMS analysis can be used to quantify impurities such as hydrogen, carbon, hydrocarbons, or chlorine in the insulator 130.

[0099] ​Therefore, in one aspect of the present invention, an insulator 152 is provided so as to surround the capacitive element 100, and an insulator 155 is provided between the insulator 152 and the insulator 130. By the insulator 152, it is possible to suppress the diffusion of impurities such as hydrogen from the outside of the insulator 152 to the insulator 130. Furthermore, impurities such as hydrogen present in the region surrounded by the insulator 152 can be captured or fixed by the insulator 155, and the concentration of impurities such as hydrogen contained in the insulator 130 can be reduced.

[0100] As the insulator 152 and the insulator 155, for example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. As the insulator 152 having a high ability to suppress the diffusion of impurities such as hydrogen, for example, silicon nitride (SiN x : x is an arbitrary number greater than 0.) is preferably used. In this case, the insulator 152 becomes an insulator having at least nitrogen and silicon.

[0101] Also, as the insulator 155 having a high ability to capture or fix impurities such as hydrogen, an oxide having an amorphous structure is preferably used. For example, aluminum oxide (AlO x : x is an arbitrary number greater than 0), or magnesium oxide (MgO y : y is an arbitrary number greater than 0) and other metal oxides are preferably used. When aluminum oxide is used for the insulator 155, the insulator 155 becomes an insulator having at least oxygen and aluminum. In such a metal oxide having an amorphous structure, oxygen atoms have dangling bonds, and there are cases where the dangling bonds have the property of capturing or fixing hydrogen. By using such a metal oxide having an amorphous structure as a component of the capacitive element 100 or providing it around the capacitive element 100, hydrogen contained in the capacitive element 100 or hydrogen present around the capacitive element 100 can be captured or fixed. It is particularly preferable to capture or fix hydrogen contained in the insulator 130.

[0102] Note that the insulator 155 preferably has an amorphous structure, but a crystal region may be partially formed. Further, the insulator 155 may have a multilayer structure in which a layer having an amorphous structure and a layer having a crystal region are laminated. For example, the insulator 155 may have a laminated structure in which a layer having a crystal region, typically a polycrystalline structure layer, is formed on the layer having an amorphous structure.

[0103] Further, it is preferable that the insulator 105 is configured to use an insulator having a high ability to suppress the diffusion of impurities such as hydrogen, similar to the insulator 152. Further, the insulator 155 and the insulator 105 are in contact with each other in a region that does not overlap with the capacitor element 100. That is, the conductor 110, the insulator 130, and the conductor 120 are surrounded by the insulator 105 and the insulators 152 and 155. In other words, the capacitor element 100 is sealed by the insulators 155 and 152 and the insulator 105. Here, the insulators 155, 152, and 105 function as a sealing film. Thereby, the diffusion of hydrogen from the outside of the insulators 152 and 105 into the capacitor element 100 is suppressed, and further, the insulator 155 captures or fixes the hydrogen inside the insulators 152 and 105, and the hydrogen concentration of the insulator 130 of the capacitor element 100 can be reduced. Therefore, the ferroelectricity of the insulator 130 can be enhanced.

[0104] However, it is not limited to this, and any insulating material may be used as the insulator 105. For example, the insulating material described in the <<Insulator>> item of Embodiment 2 described later can be used.

[0105] As described above, in the insulator 130, by making the insulator 130 free of impurities such as hydrogen or making the content of impurities such as hydrogen extremely small, the crystallinity of the insulator 130 can be improved, and a structure having high ferroelectricity can be obtained.

[0106] Also, as the conductor 110, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above-described metal element as a component, or an alloy obtained by combining the above-described metal elements. As the alloy containing the above-described metal element as a component, a nitride of the alloy or an oxide of the alloy may be used. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Also, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Further, a semiconductor having a high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, or a silicide such as nickel silicide may be used.

[0107] Also, a plurality of conductive layers formed of the above materials may be laminated and used. For example, a laminated structure combining a material containing the above-described metal element and a conductive material containing oxygen may be used. Also, a laminated structure combining a material containing the above-described metal element and a conductive material containing nitrogen may be used. Also, a laminated structure combining a material containing the above-described metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be used.

[0108] Also, in order to form the insulator 130 containing layered crystals as described above, it is preferable that the flatness of the upper surface of the conductor 110 serving as the base of the insulator 130 is good. For example, the roughness of the upper surface of the conductor 110 serving as the base may be 2 nm or less, preferably 1 nm or less, more preferably 0.8 nm or less, still more preferably 0.5 nm or less, and even more preferably 0.4 nm or less, in terms of arithmetic mean roughness (Ra) or root mean square roughness (RMS). By thus improving the flatness of the upper surface of the conductor 110, the crystallinity of the insulator 130 can be improved and the ferroelectricity of the insulator 130 can be enhanced.

[0109] Also, a layer for enhancing the crystallinity of the insulator 130 may be provided between the insulator 130 and the conductor 110 and / or between the insulator 130 and the conductor 120. When using the above-described metal nitride for the insulator 130, it is preferable to use, for example, a material in which the wurtzite structure becomes stable as the layer for enhancing the crystallinity. Also, as the layer for enhancing the crystallinity, it is preferable to use, for example, a layer containing at least one of the elements that the insulator 130 has. Note that it is preferable that the composition of the layer for enhancing the crystallinity is different from the composition of the insulator 130. When using Al-Ga-Sc nitride for the insulator 130, specifically, a metal nitride such as aluminum nitride, gallium nitride, or scandium nitride, or aluminum, gallium, or scandium is preferably used as the layer for enhancing the crystallinity.

[0110] Note that the composition of the layer for enhancing the crystallinity does not necessarily have to include the elements that the insulator 130 has. In this case, examples of the elements that can be used include indium, silicon, yttrium, hafnium, zirconium, and the like. By providing the layer for enhancing the crystallinity, the crystallinity of the insulator 130 can be improved and the ferroelectricity of the insulator 130 can be enhanced. Since the ferroelectricity of the insulator 130 can be enhanced by improving the crystallinity of the insulator 130, the layer for enhancing the crystallinity can be rephrased as a layer that increases the remanent polarization of the insulator 130.

[0111] In addition, the conductor 120 may be made of a conductive material that can be used for the conductor 110.

[0112] When the above-described metal nitride is used for the insulator 130, the conductor 110 or the conductor 120 preferably contains nitrogen, and more preferably each of the conductor 110 and the conductor 120 contains nitrogen. In particular, it is preferable to use tantalum nitride or titanium nitride as the conductor 110 and / or the conductor 120. With this configuration, the formation of a different layer at the interface between the insulator 130 and the conductor 110 and / or the conductor 120 can be suppressed, and the insulator 130 including the layered crystal as described above can be formed. Note that the different layer is a layer having a compound containing the component of the insulator 130 and the component of the conductor 110 (conductor 120).

[0113] In addition, when the above-described metal nitride is used for the insulator 130, the crystallinity of the insulator 130 may be improved by using tantalum nitride or titanium nitride as the conductor 110. Tantalum nitride and titanium nitride tend to have a sodium chloride-type structure. In addition, the atomic arrangement when the sodium chloride-type structure is viewed from the

[0111] direction is similar to the atomic arrangement when the wurtzite-type structure is viewed from the

[0001] direction. That is, depending on the composition and the combination of elements, the lattice matching between the conductor 110 and the insulator 130 may be high. Therefore, the conductor 110 preferably has a crystal having a sodium chloride-type structure. Further, the crystal is preferably (111)-oriented with respect to the surface of the insulator 105. When the conductor 110 has such a crystal, the crystallinity of the insulator 130 may be improved.

[0114] Note that the above crystal can be confirmed, for example, by observing the regularity of metal ions with a cross-sectional TEM. Further, for example, it can be confirmed by an FFT pattern obtained by subjecting the cross-sectional TEM to fast Fourier transform (FFT) processing. Further, for example, it can be confirmed by a diffraction pattern observed by an electron beam diffraction method. Fourier Transform) processing. Further, for example, it can be confirmed by a diffraction pattern observed by an electron beam diffraction method.

[0115] When the conductor 110 has a laminated structure of two or more layers, tantalum nitride or titanium nitride may be used as the layer in contact with the insulator 130. By adopting such a configuration, the formation of different layers at the interface between the insulator 130 and the conductor 110 can be suppressed, and the insulator 130 including the layered crystal as described above can be formed. Note that, as the layer not in contact with the insulator 130 (for example, the layer in contact with the insulator 105), a conductive material mainly composed of, for example, tungsten, copper, or aluminum can be used.

[0116] Also, when the conductor 120 has a laminated structure of two or more layers, tantalum nitride or titanium nitride may be used as the layer in contact with the insulator 130. By adopting such a configuration, the formation of different layers at the interface between the insulator 130 and the conductor 120 can be suppressed. Note that, as the layer not in contact with the insulator 130 (for example, the layer in contact with the insulator 155), a conductive material mainly composed of, for example, tungsten, copper, or aluminum can be used.

[0117] Note that the capacitor element 100 shown in FIG. 1A has a configuration in which the side surfaces of the conductor 110, the insulator 130, and the conductor 120 are aligned, but the present invention is not limited to this.

[0118] For example, as shown in FIG. 1B, the side surface of the conductor 110 may be located inside the side surfaces of the insulator 130 and the conductor 120. The insulator 130 is formed to cover the upper surface and the side surface of the conductor 110, and the region of the insulator 130 that does not overlap with the conductor 110 is in contact with the insulator 105. In this case, in a top view, the outer periphery of the conductor 110 is located inside the outer peripheries of the insulator 130 and the conductor 120. By adopting such a configuration, the insulator 130 can sufficiently separate the conductor 110 and the conductor 120.

[0119] Further, for example, as shown in FIG. 1C, the side surfaces of the insulator 130 and the conductor 120 may be positioned inside the side surface of the conductor 110. In this case, in a top view, the outer peripheries of the insulator 130 and the conductor 120 will be positioned inside the outer periphery of the conductor 110.

[0120] With the above-described configuration, the insulator 130 is not formed in the vicinity of the step of the formation surface formed by the conductor 110. Therefore, when forming the insulator 130, a region with low crystallinity formed in the vicinity of the step can be removed, and the capacitor element 100 can be formed. Thus, the insulator 130 shown in FIG. 1C is in contact with the highly flat upper surface of the conductor 110 as a whole, and can have many regions with high crystallinity.

[0121] Further, as shown in FIG. 1C, the insulator 155 may be formed such that its side surface is positioned inside the side surface of the conductor 110. At this time, it is preferable that the side surfaces of the insulator 130, the conductor 120, and the insulator 155 substantially coincide. Also, the insulator 152 is provided to cover the conductor 110, the insulator 130, the conductor 120, and the insulator 155. With this configuration, the insulator 155 can capture or fix impurities such as hydrogen contained in the insulator 130 via the conductor 120. Also, since the insulator 130 and the insulator 155 do not contact each other, even when an oxide is used as the insulator 155, formation of a mixed layer at the interface between the insulator 130 and the insulator 155 can be suppressed. Also, entry of oxygen into the insulator 130 can be suppressed.

[0122] Incidentally, if the concentration of impurities in the insulator 130 can be reduced by optimizing the method of forming the insulator 130 or the like, there may be cases where the insulator 155 does not need to be provided. When the insulator 155 is not provided, the insulator 152 has regions that are in contact with the upper surface of the insulator 105, the side surface of the insulator 130, the side surface of the conductor 120, and the upper surface of the conductor 120, respectively. Further, the capacitor element 100 is sealed by the insulator 152 and the insulator 105. Thereby, it is possible to suppress hydrogen from diffusing into the capacitor element 100 from the outside of the insulator 152 and the insulator 105. Therefore, the ferroelectricity of the insulator 130 can be enhanced.

[0123] Incidentally, the ferroelectric material that can be used for the insulator 130 is not limited to the above-described metal nitride. As the ferroelectric material, metal oxides such as hafnium oxide, zirconium oxide, HfZrO X (where X is a real number greater than 0) may be used. Further, as the ferroelectric material, a material obtained by adding an element J1 (here, the element J1 is one or more selected from zirconium (Zr), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.) to hafnium oxide may be used. Here, the ratio of the number of hafnium atoms to the number of atoms of the element J1 can be set as appropriate. For example, the number of hafnium atoms and the number of atoms of the element J1 may be set to 1:1 or in the vicinity thereof. Further, as the ferroelectric material, a material obtained by adding an element J2 (here, the element J2 is one or more selected from hafnium (Hf), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.) to zirconium oxide, etc. may be used. Further, the ratio of the number of zirconium atoms to the number of atoms of the element J2 can be set as appropriate. For example, the number of zirconium atoms and the number of atoms of the element J2 may be set to 1:1 or in the vicinity thereof. Incidentally, as the crystal structure of the hafnium oxide or the material having hafnium oxide and zirconium oxide, any one or more selected from the cubic system, tetragonal system, orthorhombic system, and monoclinic system may be used.

[0124] In addition, as a material that may have ferroelectricity, lead titanate (PbTiO X ), barium strontium titanate (BST), strontium titanate, lead zirconate titanate (PZT), strontium bismuth tantalate (SBT), bismuth ferrite (BFO), barium titanate, etc., piezoelectric ceramics having a perovskite structure may be used. Further, as a material that may have ferroelectricity, perovskite-type oxynitrides such as SrTaO2N and BaTaO2N, GaFeO3 having a κ-alumina type structure, etc. may be used.

[0125] In the above description, metal oxides and metal nitrides have been exemplified, but the materials that may have ferroelectricity are not limited thereto. For example, metal oxynitrides in which nitrogen is added to the above-mentioned metal oxides, or metal oxynitrides in which oxygen is added to the above-mentioned metal nitrides may be used.

[0126] <Method for manufacturing a capacitor element> In this section, with reference to FIGS. 5A to 5C, a method for manufacturing a capacitor element according to an aspect of the present invention will be described.

[0127] As shown in FIG. 5A, an insulator 105 is formed on a substrate (not shown). When using an insulator similar to the insulator 152 as the insulator 105, the description regarding the insulator 152 described later can be referred to.

[0128] Next, as shown in FIG. 5A, a conductor 110 is formed on the insulator 105. The film formation of the conductor 110 is performed by a sputtering method, chemical vapor deposition (CVD: Chemical Vapor Methods such as chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), or atomic layer deposition (ALD) can be used. The ALD method includes a thermal ALD method that performs the reaction of the precursor and the reactant only with thermal energy, and a PEALD (Plasma Enhanced ALD) method that uses a plasma-excited reactant. By using the ALD method, it may be possible to relatively easily form a conductive film with good flatness as the conductor 110. For example, titanium nitride may be formed using the thermal ALD method.

[0129] Also, the conductor 110 may be appropriately patterned using a lithography method or the like. By patterning the conductor 110 before forming the insulator 130, the capacitive element 100 having the structure shown in FIG. 1B or FIG. 1C can be formed.

[0130] Also, the surface on which the conductor 110 is formed (also referred to as the surface to be formed) or the upper surface of the conductor 110 preferably has higher flatness. For example, the surface on which the conductor 110 is formed or the upper surface of the conductor 110 may be flattened by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness. When the flatness of the surface on which the conductor 110 is formed or the upper surface of the conductor 110 is enhanced, the crystallinity of the insulator 130 above it, more specifically, can be enhanced.

[0131] Next, as shown in FIG. 5A, an insulator 130 is formed on the conductor 110. The formation of the insulator 130 can be performed using a sputtering method, a CVD method, an ALD method, or the like. For example, by using the ALD method, the insulator 130 can be formed with good coverage on the conductor 110. Thereby, it is possible to suppress the occurrence of leakage current between the upper electrode and the lower electrode of the capacitive element 100.

[0132] The insulator 130 is preferably made of a material that can have ferroelectricity. As the material that can have ferroelectricity, the materials described above can be used. Here, the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less (typically, 2 nm or more and 9 nm or less).

[0133] When using the above-mentioned metal nitride as the insulator 130, it is preferable to form the film using the thermal ALD method or the PEALD method. The details of the method for forming the insulator 130 by the ALD method will be described later.

[0134] Also, when forming the insulator 130 using the thermal ALD method, a material that does not contain hydrocarbon (also referred to as HC) may be used as the precursor. If either or both of hydrogen and carbon are contained in the insulator 130, it may inhibit the crystallization of the insulator 130. Therefore, as described above, it is preferable to use a precursor that does not contain hydrocarbon to reduce the concentration of either or both of hydrogen and carbon in the insulator 130. For example, a chlorine-based material can be mentioned as a precursor that does not contain hydrocarbon.

[0135] However, it is not limited to this, and the insulator 130 can also be formed using a precursor that contains hydrocarbon. In this case, it is preferable to sufficiently capture or fix impurities such as hydrogen contained in the insulator 130 by the insulator 155 to reduce the concentration of impurities such as hydrogen in the insulator.

[0136] In addition, for forming the insulator 130 using the above-described metal nitride, it is preferable to use a sputtering method. When using the sputtering method, the impurity concentration in the film can be reduced or a dense film can be formed, so it is suitable for forming the insulator 130. For example, the formation of the insulator 130 by the sputtering method is preferably performed in an atmosphere containing nitrogen. Specifically, nitrogen gas or a mixed gas of nitrogen and a noble gas may be used as the sputtering gas. Further, when forming the insulator 130 by the sputtering method, it is preferable to use a target composed of the elements contained in the insulator 130.

[0137] Note that the insulator 130 may be formed by sputtering one target. For example, when the insulator 130 is composed of two or more elements and nitrogen, a target containing the two or more elements may be used, or a target containing the two or more elements and nitrogen may be used.

[0138] In addition, the insulator 130 may be formed by simultaneously sputtering a plurality of targets. Note that the method of simultaneously sputtering a plurality of targets may be referred to as a co-sputtering method. For example, when the insulator 130 is composed of two or more elements and nitrogen, a first target containing a part of the two or more elements and a second target containing all the other of the two or more elements may be used. Note that nitrogen may be contained in one or both of the first target and the second target. Alternatively, a first target containing a part of the two or more elements, a second target containing another part of the two or more elements, and a third target containing all the other of the two or more elements may be used. Note that nitrogen may be contained in any one or more of the first to third targets.

[0139] Specifically, when the insulator 130 is an Al-Ga-Sc nitride, for forming the insulator 130 by sputtering, a target of an Al-Ga-Sc alloy or a target of an Al-Ga-Sc nitride can be used. Alternatively, a target of metallic aluminum or aluminum nitride and a target of a Ga-Sc nitride may be used. Alternatively, a target of gallium nitride and a target of an Al-Sc alloy may be used. Alternatively, a target of gallium nitride, a target of metallic aluminum or aluminum nitride, and a target of metallic scandium may be used. When using two or more targets, the insulator 130 is formed by co-sputtering.

[0140] Note that when forming the insulator 130 by co-sputtering using at least a target of aluminum nitride, an RF sputtering method is used for the target of aluminum nitride having insulating properties. Also, when the insulator 130 contains gallium, since metallic gallium has a low melting point, a target of a nitride containing gallium or a target of an alloy containing gallium is used.

[0141] Next, as shown in FIG. 5A, a conductor 120 is formed on the insulator 130. Here, the conductor 120 is disposed separately from the conductor 110 with the insulator 130 therebetween. The conductor 120 may be formed using a sputtering method, an ALD method, a CVD method, or the like. For example, titanium nitride may be formed using a thermal ALD method. Here, for forming the conductor 120, a method of forming the film while heating the substrate, such as the thermal ALD method, is preferable. For example, the film may be formed with the substrate temperature being room temperature or higher, preferably 300°C or higher, more preferably 325°C or higher, and still more preferably 350°C or higher. Also, for example, the film may be formed with the substrate temperature being 500°C or lower, preferably 450°C or lower. For example, the substrate temperature may be set to about 400°C.

[0142] By forming the conductor 120 within the temperature range as described above, even without performing a high-temperature baking process (e.g., a baking process with a heat treatment temperature of 400 °C or higher or 500 °C or higher) after the formation of the conductor 120, ferroelectricity can be imparted to the insulator 130. Also, by forming the conductor 120 using the ALD method, which causes relatively little damage to the substrate as described above, it is possible to suppress excessive destruction of the crystal structure of the insulator 130, and thus enhance the ferroelectricity of the insulator 130. Note that, in some cases, improving the crystallinity or ferroelectricity of the insulator 130 by utilizing the temperature during the formation of the conductor 120 without performing a baking process after the formation of the conductor 120 is referred to as self-annealing.

[0143] When forming the conductor 110, the insulator 130, and the conductor 120 using a sputtering method, it is preferable to continuously form the conductor 110, the insulator 130, and the conductor 120 without exposing them to the atmosphere. For example, a multi-chamber type film forming apparatus may be used. By forming the film without opening to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering onto the conductor 110 and the insulator 130, and keep the vicinity of the interface between the conductor 110 and the insulator 130, and the vicinity of the interface between the insulator 130 and the conductor 120 clean.

[0144] Also, the conductor 120 and the insulator 130 may be appropriately patterned using a lithography method or the like. By patterning the conductor 120 and the insulator 130 before forming the insulator 155, the capacitor element 100 having the structure shown in FIG. 1B can be formed. Alternatively, by patterning the conductor 120, the insulator 130, and the conductor 110 before forming the insulator 155, the capacitor element 100 having the structure shown in FIG. 1A can be formed.

[0145] Next, as shown in FIG. 5B, an insulator 155 is formed so as to cover the conductor 110, the insulator 130, and the conductor 120. The formation of the insulator 155 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, as the insulator 155, aluminum oxide is formed by a pulsed DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.

[0146] As the insulator 155, it is preferable to use a metal oxide having an amorphous structure, such as aluminum oxide, which has a high function of capturing or fixing hydrogen. Thereby, impurities such as hydrogen contained in the insulator 130 can be captured or fixed. In particular, as the insulator 155, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide of an amorphous structure because hydrogen can be more effectively captured or fixed in some cases.

[0147] Also, as described above, by forming the insulator 155 using a sputtering method without using a gas containing hydrogen molecules in the film-forming gas, the hydrogen concentration of the insulator 155 and the underlying conductor 120 can be reduced. Thereby, more impurities such as hydrogen contained in the insulator 130 can be captured or fixed.

[0148] Further, the insulator 155 may have a laminated structure of two or more layers. For example, a laminated film of aluminum oxide formed by the ALD method and aluminum oxide formed by the sputtering method thereon may be used. By adopting such a configuration, even if pinholes or discontinuities are formed in the aluminum oxide film formed by the sputtering method, the portions overlapping them can be covered with the aluminum oxide film formed by the ALD method having good covering properties.

[0149] The insulator 155 may be patterned using a lithography method or the like. After forming the insulator 155, by patterning the insulator 155, the conductor 120, and the insulator 130, the capacitor element 100 having the structure shown in FIG. 1C can be formed.

[0150] Next, as shown in FIG. 5C, an insulator 152 is formed so as to cover the conductor 110, the insulator 130, the conductor 120, and the insulator 155. The formation of the insulator 152 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. As the insulator 152, it is preferable to use silicon nitride which has a high ability to suppress the diffusion of hydrogen. In the present embodiment, silicon nitride is formed as the insulator 152 by a pulsed DC sputtering method in an atmosphere containing nitrogen gas.

[0151] Since the sputtering method does not need to use a molecule containing hydrogen in the film-forming gas, by forming the insulator 152 by the sputtering method, the hydrogen concentration of the insulator 152 and the underlying insulator 155 at the time of film formation can be reduced.

[0152] Also, the insulator 152 may have a laminated structure of two or more layers. For example, a laminated film of silicon nitride formed by a sputtering method and silicon nitride formed by a PEALD method thereon may be used. By adopting such a configuration, even if pinholes or steps are formed in the silicon nitride film formed by the sputtering method, the portions overlapping them can be covered with a silicon nitride film formed by an ALD method with good coverage.

[0153] It is preferable to perform a heat treatment after the formation of the insulator 152. For example, the heat treatment may be performed by setting the substrate temperature to 300°C or higher, preferably 325°C or higher, more preferably 350°C or higher. Also, for example, the heat treatment may be performed by setting the substrate temperature to 600°C or lower, preferably 500°C or lower, more preferably 450°C or lower. For example, the substrate temperature may be set to about 400°C. Also, the heat treatment time may be, for example, about 1 hour or more and 10 hours or less. The heat treatment can be performed in an atmosphere containing oxygen gas, nitrogen gas, or an inert gas.

[0154] By performing such heat treatment, hydrogen contained in the insulator 130 and substances combined with hydrogen can be desorbed and diffused from the insulator 130 to the insulator 155. At this time, the hydrogen and substances combined with hydrogen may diffuse through the conductor 120 and reach the insulator 155. In this way, by capturing or fixing the hydrogen diffused into the insulator 155 in the insulator 155, the concentration of hydrogen contained in the insulator 130 can be reduced. Also, at this time, since the insulator 155 and the capacitor element 100 are wrapped by the insulator 152, diffusion of hydrogen from the outside of the insulator 152 can be suppressed. In this way, the ferroelectricity of the insulator 130 can be enhanced.

[0155] As described above, the capacitor element 100 having the insulator 130 between the conductor 110 and the conductor 120 and wrapped by the insulator 155 and the insulator 152 as shown in FIG. 5C can be manufactured.

[0156] <Film formation by ALD method> Hereinafter, with reference to FIGS. 6A and 6B, a method for forming the insulator 130 by the ALD method and a film forming apparatus used for the film formation will be described.

[0157] The ALD method utilizes the self - controllability, which is a property of atoms, and can deposit atoms one by one. Therefore, it has effects such as enabling extremely thin film formation, enabling film formation on structures with a high aspect ratio, enabling film formation with few defects such as pinholes, enabling film formation with excellent coverage, and enabling film formation at low temperatures.

[0158] In the ALD method, a first source gas (also called a precursor) and a second source gas (also called a nitriding agent) for the reaction are alternately introduced into a chamber, and film formation is performed by repeating the introduction of these source gases. Further, when introducing the precursor or the nitriding agent, N2, Ar, etc. may be introduced into the reaction chamber together with the precursor or the nitriding agent as a carrier purge gas. By using the carrier purge gas, adsorption of the precursor or the nitriding agent inside the piping and inside the valve is suppressed, and it becomes possible to introduce the precursor or the nitriding agent into the reaction chamber (also called a carrier gas). Furthermore, it becomes possible to quickly exhaust the precursor or the nitriding agent remaining in the reaction chamber (also called a purge gas). Since it has two roles of introduction (carrier) and exhaust (purge) in this way, N2, Ar, etc. introduced into the reaction chamber together with the precursor or the nitriding agent may be called a carrier purge gas. Also, by using the carrier purge gas, the uniformity of the formed film is improved, which is preferable.

[0159] Fig. 6A shows a film formation sequence of a film of a material that may have ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method. Hereinafter, an example of forming a ferroelectric layer having aluminum nitride and scandium nitride as the insulator 130 will be shown.

[0160] As the precursor 401, a precursor containing aluminum (Al) can be used. Also, as the precursor 402, a precursor containing scandium (Sc) can be used. Note that each of the precursor 401 and the precursor 402 may use a precursor formed of an inorganic substance (sometimes called an inorganic precursor) or a precursor formed of an organic substance (sometimes called an organic precursor). As the precursor containing aluminum, trimethylaluminum, triethylaluminum, triisobutylaluminum, dimethylaluminum hydride, tris(dimethylamino)aluminum, tris(diethylamino)aluminum, aluminum trichloride, etc. can be used.

[0161] Note that the precursors 401 and 402 are formed by heating and gasifying a liquid raw material or a solid raw material. It is preferable that the precursors 401 and 402 have reduced impurities. For example, examples of such impurities include Ba, Co, Cu, Fe, Li, Mn, Na, Ni, etc.

[0162] Also, ammonia (NH3) can be used as the nitriding agent 405. Further, as the carrier purge gas 404, any one or more selected from N2, He, Ar, Kr, and Xe can be used. In this item, N2 is used as the carrier purge gas 404.

[0163] First, the carrier purge gas 404 is introduced into the reaction chamber (ON). Next, the nitriding agent 405 is introduced into the reaction chamber (step S01). Next, the introduction of the nitriding agent 405 is stopped (OFF), and only the carrier purge gas 404 is used to purge the nitriding agent 405 remaining in the reaction chamber (step S02). Next, the precursor 401 is introduced into the reaction chamber, and the pressure in the reaction chamber is kept constant (step S03). In this way, the precursor 401 is adsorbed on the surface to be formed. Next, the introduction of the precursor 401 is stopped, and only the carrier purge gas 404 is used to purge the precursor 401 remaining in the reaction chamber (step S04). Next, the nitriding agent 405 is introduced into the reaction chamber (step S05). By introducing the nitriding agent 405, the precursor 401 is nitrided to form aluminum nitride. Next, the introduction of the nitriding agent 405 is stopped, and only the carrier purge gas 404 is used to purge the nitriding agent 405 remaining in the reaction chamber (step S06).

[0164] Next, precursor 402 is introduced into the reaction chamber, and the pressure inside the reaction chamber is maintained constant (step S07). In this way, precursor 402 is adsorbed onto the nitrogen layer of the aluminum nitride. Next, the introduction of precursor 402 is stopped, and only carrier purge gas 404 is used to purge the precursor 402 remaining in the reaction chamber (step S08). Next, return to step S01, and introduce nitriding agent 405 into the reaction chamber. By introducing nitriding agent 405, precursor 402 is nitrided to form scandium nitride on the aluminum nitride.

[0165] Taking the above steps S01 to S08 as one cycle, the cycle is repeated until the desired film thickness is reached. Each of steps S01 to S08 may be performed in a temperature range of 250°C or higher and 450°C or lower, and is preferably performed in a temperature range of 350°C or higher and 400°C or lower.

[0166] Also, when forming the ferroelectric layer using the PEALD method, as nitriding agent 405, any one or more selected from nitrogen (N2), ammonia (NH3), and a mixed gas of nitrogen (N2) and hydrogen (H2) may be plasma-excited and introduced into the reaction chamber. As the mixed gas, for example, a mixed gas of 95 vol% nitrogen (N2) and 5 vol% hydrogen (H2) can be used. By performing film formation while introducing plasma-excited nitrogen and / or ammonia, the ferroelectric layer can be formed.

[0167] Note that when forming the ferroelectric layer using the PEALD method, nitriding agent 405 may also serve as carrier purge gas 404. For example, when nitrogen (N2) is used as carrier purge gas 404, by turning on the plasma generation device in the steps of introducing nitriding agent 405 (steps S01 and S05), nitrogen can be plasma-excited and the nitrogen plasma can be made to function as nitriding agent 405.

[0168] Note that by controlling the introduction amount and the number of introductions (also referred to as the number of pulses) of the source gas, a film with an arbitrary composition can be formed.

[0169] As described above, by forming a film using the ALD method, a layered crystal structure can be formed. Further, as described above, by forming a film using a precursor with reduced impurities, it is possible to suppress the mixing of impurities during film formation and prevent the formation of the layered crystal structure from being hindered. In this way, by making the insulator 130 have a highly crystalline, layered crystal structure, the insulator 130 can be made to have high ferroelectricity.

[0170] However, the insulator 130 does not necessarily exhibit ferroelectricity immediately after film formation. As described above, the insulator 130 may exhibit ferroelectricity not immediately after film formation, but after the conductor 120 is formed on the insulator 130.

[0171] Next, the film formation of Al-Ga-Sc nitride will be shown as an example. Since the method of forming a ferroelectric layer having aluminum nitride and scandium nitride has already been described, the different parts will be mainly described, and the previous description can be referred to for the common parts.

[0172] When forming Al-Ga-Sc nitride, in addition to the above-mentioned precursors 401 and 402, a precursor containing gallium (Ga) is used. Note that as the precursor containing gallium, an inorganic precursor or an organic precursor may be used. As the organic precursor containing gallium, trimethylgallium, triethylgallium, tris(dimethylamide)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, diethylchlorogallium, dimethylgallium isopropoxide, etc. can be used. Further, as the inorganic precursor containing gallium, halogen-based gallium compounds such as gallium trichloride, gallium tribromide, and gallium triiodide can be used.

[0173] After performing step S07, a nitriding agent 405 is introduced into the reaction chamber. By introducing the nitriding agent 405, the precursor 402 is nitrided to form scandium nitride. Next, the introduction of the nitriding agent 405 is stopped, and only the carrier purge gas 404 is used to purge the nitriding agent 405 remaining in the reaction chamber. Next, a precursor containing gallium is introduced into the reaction chamber, and the pressure in the reaction chamber is kept constant. In this way, the precursor containing gallium is adsorbed on the nitrogen layer of the above-mentioned scandium nitride. Next, the introduction of the precursor containing gallium is stopped, and only the carrier purge gas 404 is used to purge the precursor containing gallium remaining in the reaction chamber. Next, return to step S01 and introduce the nitriding agent 405 into the reaction chamber. By introducing the nitriding agent 405, the precursor containing gallium is nitrided to form gallium nitride on the scandium nitride.

[0174] Taking the above steps from step S01 to the step of purging the precursor containing gallium remaining in the reaction chamber as one cycle, the cycle is repeated until the desired film thickness is reached. Thus, an Al-Ga-Sc nitride film can be formed.

[0175] Note that the order of introducing the precursor 401, the precursor 402, and the precursor containing gallium into the reaction chamber is not limited to the above. For example, the precursor 402 may be introduced in step S03 and the precursor 401 may be introduced in step S07. Also, by controlling the introduction amount and the number of introductions (also referred to as the number of pulse times) of the source gas, a film with an arbitrary composition can be formed.

[0176] Next, an example of forming a ferroelectric layer having hafnium oxide and zirconium oxide as the insulator 130 is shown. Since the method of forming the ferroelectric layer using the ALD method has already been described, the different parts will be mainly described, and the previous description can be referred to for the common parts.

[0177] As the precursor 401, a precursor containing hafnium and further containing any one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used. Also, as the precursor 402, a precursor containing zirconium and further containing any one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used. In this item, HfCl4 is used as the precursor 401 containing hafnium, and ZrCl4 is used as the precursor 402 containing zirconium.

[0178] The precursor 401 is formed from a solid raw material of HfCl4, and the precursor 402 is formed from a solid raw material of ZrCl4. These solid raw materials preferably have reduced impurities. For example, examples of such impurities include Ba, Cd, Co, Cr, Cu, Fe, Ga, Li, Mg, Mn, Na, Ni, Sr, V, Zn, etc. In the solid raw material of HfCl4 and the solid raw material of ZrCl4, the above impurities are preferably less than 1000 wppb. Here, wppb is a unit representing the concentration of impurities in parts per billion in terms of weight.

[0179] Also, instead of the nitriding agent 405, an oxidizing gas is used. As the oxidizing gas, any one or more selected from O2, O3, N2O, NO 2、 H2O, and H2O2 can be used. In this item, a gas containing H2O is used as the oxidizing gas.

[0180] Next, the manufacturing apparatus used for film formation by the above ALD method will be described with reference to FIG. 6B. FIG. 6B is a schematic diagram of a manufacturing apparatus 900 by the ALD method.

[0181] As shown in FIG. 6B, the manufacturing apparatus 900 has a reaction chamber 901, a gas inlet 903, a reaction chamber inlet 904, an exhaust port 905, a wafer stage 907, and a shaft 908. In FIG. 6B, a wafer 950 is disposed on the wafer stage 907.

[0182] The reaction chamber 901 may be provided with a heater system for heating the interior of the reaction chamber 901, the precursors 401 and 402, the nitriding agent 405, and the carrier purge gas 404. Further, the wafer stage 907 may be provided with a heater system for heating the wafer 950. Further, the wafer stage 907 may be provided with a rotation mechanism that rotates horizontally about the axis 908 as the rotation axis. Although not shown, a gas supply system for introducing the precursors 401 and 402, the nitriding agent 405, and the carrier purge gas 404 into the gas inlet 903 at an appropriate flow rate for an appropriate time at an appropriate timing is installed in front of the gas inlet 903. Although not shown, an exhaust system having a vacuum pump is installed at the tip of the exhaust port 905.

[0183] As shown in FIG. 6B, the manufacturing apparatus 900 is an ALD apparatus called a cross-flow type. The flow of the precursors 401 and 402, the nitriding agent 405, and the carrier purge gas 404 in the cross-flow type will be described below. The precursors 401 and 402, the nitriding agent 405, and the carrier purge gas 404 flow from the gas inlet 903 into the reaction chamber 901 through the reaction chamber inlet 904, reach the wafer 950, and are exhausted through the exhaust port 905. The arrows shown in FIG. 6B schematically indicate the direction in which the gas flows.

[0184] As described above, in step S05 of introducing the nitriding agent 405 into the reaction chamber 901 shown in FIG. 6A, the precursor 401 adsorbed on the wafer 950 is nitrided by the nitriding agent 405 to form aluminum nitride. Due to the structure of the manufacturing apparatus 900 of the cross-flow type, the nitriding agent 405 reaches the wafer 950 after contacting the heated reaction chamber member for a long time. When the wafer stage 907 rotates horizontally about the axis 908, the peripheral portion of the wafer 950 reaches the nitriding agent 405 first, so the film thickness of the aluminum nitride is thicker at the peripheral portion of the wafer 950 and thinner at the central portion than at the peripheral portion.

[0185] Therefore, it is necessary to set the heating temperature of the reaction chamber to an appropriate temperature in order to suppress the decomposition of the nitriding agent 405 and the decrease in nitriding power. In the above description, the nitridation of the precursor 401 has been described as an example, but the same applies to the nitridation of the precursor 402.

[0186] As described above, a ferroelectric layer excellent in in-plane film thickness uniformity of the substrate can be formed. The in-plane film thickness uniformity of the substrate is preferably ±1.5% or less, more preferably ±1.0% or less. Further, when the maximum film thickness in the substrate plane - the minimum film thickness in the substrate plane is defined as RANGE, and the in-plane film thickness uniformity of the substrate is defined as ±PNU (Percent Non Uniformity) (%), ±PNU (%) can be obtained by (RANGE × 100) / (2 × average value of the film thickness in the substrate plane).

[0187] By using the above method, an insulator 130 made of a material that can have ferroelectricity can be formed. By forming the capacitor element 100 using such an insulator 130, the capacitor element 100 can be made into a ferroelectric capacitor.

[0188] According to one aspect of the present invention, a capacitor element including a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, the above capacitor element can be provided with good productivity. Alternatively, according to one aspect of the present invention, a capacitor element capable of miniaturization or high integration can be provided.

[0189] <Modification example of ferroelectric device> In the present embodiment, a ferroelectric device according to one aspect of the present invention will be described with reference to FIGS. 7A1, 7A2, 7B1, 7B2, 7C1, 7C2, 7C3, and 7C4. Since the ferroelectric device described in this section is a modification example of a ferroelectric device having the above-described conductor 110, insulator 130, and conductor 120, the above description can be referred to for the conductor 110, insulator 130, and conductor 120.

[0190] FIG. 7A1, FIG. 7B1, and FIG. 7C1 are circuit diagrams of ferroelectric devices according to one aspect of the present invention, respectively. The circuit diagram shown in FIG. 7A1 has one transistor (also referred to as a field effect transistor, FET) and one capacitive element, and the capacitive element includes a material that may have ferroelectricity. The circuit diagram shown in FIG. 7B1 has one transistor, and the gate insulating film of the transistor includes a material that may have ferroelectricity. The circuit diagram shown in FIG. 7C1 has one capacitive element and a diode, and the capacitive element includes a material that may have ferroelectricity. In the circuit diagram shown in FIG. 7C1, one capacitive element and one diode are separately described, but it is not limited thereto. For example, when one element has the functions of both one capacitive element and one diode, it is not necessary to separate the respective functions. For example, as a configuration corresponding to the circuit diagram shown in FIG. 7C1, an element configuration using a tunnel junction between an insulator and electrodes can be used between a pair of electrodes.

[0191] Note that the circuit diagram shown in FIG. 7A1 can be regarded as an element configuration of 1Tr1C (one transistor, one capacitor), and may be referred to as FeRAM (Ferroelectric Random Access Memory), or a Type1 structure. The circuit diagram shown in FIG. 7B1 can be regarded as an element configuration of 1Tr (one transistor), and may be referred to as FeFET (Ferroelectric Field Effect Transistor), or a Type2 structure. The circuit diagram shown in FIG. 7C1 can be regarded as an element configuration of one capacitor using a tunnel junction, and may be referred to as an FTJ (Ferroelectric Tunnel Junction) element, or a Type3 structure.

[0192] Next, an example of a ferroelectric device according to an aspect of the present invention applicable to the configuration shown in the circuit diagrams shown in FIGS. 7A1, 7B1, and 7C1 will be described with reference to FIGS. 7A2, 7B2, 7C2, 7C3, and 7C4. FIGS. 7A2, 7B2, 7C2, 7C3, and 7C4 are cross-sectional views showing an example of a ferroelectric device according to an aspect of the present invention. In the circuit diagrams shown in FIGS. 7A1, 7B1, and 7C1, white circles represent terminals.

[0193] FIG. 7A2 is a cross-sectional view corresponding to the capacitor element shown in FIG. 7A1, FIG. 7B2 is a cross-sectional view corresponding to the transistor including a material that may have ferroelectricity shown in FIG. 7B1, and FIGS. 7C2, 7C3, and 7C4 are cross-sectional views corresponding to the capacitor element and the diode shown in FIG. 7C1, respectively.

[0194] FIG. 7A2 includes a conductor 110, an insulator 130 on the conductor 110, and a conductor 120 on the insulator 130. Note that the insulator 130 is preferably made of a material that may have ferroelectricity. Note that the insulator 130 may be read as a dielectric or a ferroelectric. Although not shown in FIG. 7A2, as shown in FIG. 7A1, the conductor 120 may be configured to be connected to the source or drain of the transistor.

[0195] FIG. 7B2 includes an oxide 230, an insulator 130 on the oxide 230, and a conductor 120 on the insulator 130. Note that the insulator 130 is preferably made of a material that may have ferroelectricity. Also, in FIG. 7B2, it can be said that the oxide 230 and the insulator 130, that is, the material that may have ferroelectricity, are in contact with each other. Details of the oxide 230 will be described later (see Embodiment 2).

[0196] FIG. 7C2 includes a conductor 110, an insulator 115a on the conductor 110, an insulator 130 on the insulator 115a, and a conductor 120 on the insulator 130. Note that FIG. 7C2 can also be said to have a structure with an insulator 115a between the conductor 110 and the insulator 130 in FIG. 7A2. Further, FIG. 7C3 includes a conductor 110, an insulator 130 on the conductor 110, an insulator 115b on the insulator 130, and a conductor 120 on the insulator 115b. Note that FIG. 7C3 can also be said to have a structure with an insulator 115b between the insulator 130 and the conductor 120 in FIG. 7A2.

[0197] Moreover, FIG. 7C4 includes a conductor 110, an insulator 115a on the conductor 110, an insulator 130 on the insulator 115a, an insulator 115b on the insulator 130, and a conductor 120 on the insulator 115b. In the configuration of the circuit diagram of FIG. 7C1, it is preferable that a certain polarization is obtained in the P-E (Polarization density - Electric field) characteristic. For example, in the I-V characteristic, when the first section is defined as from 0 (V) to 3 (V), the second section is from 3 (V) to 0 (V), the third section is from -Va (V) to Va (V), the fourth section is from 0 (V) to -3 (V), the fifth section is from -3 (V) to 0 (V), and the sixth section is from -Va (V) to Va (V), it is preferable that the current values in the third section and the sixth section are different. Also, Va is preferably a voltage below the breakdown electric field (Ec) in this circuit diagram. To satisfy this characteristic, for example, the insulator 115a and the insulator 115b may have a configuration where at least one of the film type, film quality, or film thickness is different.

[0198] The insulator 115a and the insulator 115b may each be a ferroelectric material. For example, silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxide, aluminum oxynitride, etc. can be used. In particular, as the insulator 115a and the insulator 115b, a silicon nitride film is preferable. Further, the insulator 115a and the insulator 115b can each be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In particular, as the insulator 115a and the insulator 115b, it is preferable to form a film using the PEALD method. For example, when forming a silicon nitride film using the PEALD method, it is suitable to use a precursor containing a halogen such as fluorine, chlorine, bromine, or iodine. Further, after introducing the above precursor, a high-quality silicon nitride film can be formed by performing plasma treatment in an atmosphere into which a nitriding agent such as N2, N2O, NH3, NO, NO2, or N2O2 is introduced.

[0199] Further, when a silicon nitride film is used as the insulator 115a, the insulator 130 having a metal nitride and the insulator 115a have nitrogen as a common main component. Therefore, it is possible to suppress the formation of a mixed layer at and near the interface between the insulator 130 and the insulator 115a, and improve the crystallinity of the insulator 130.

[0200] Also, when the PEALD method is used for forming the insulator 115a, it is preferable to use the PEALD method for forming the insulator 130. At this time, the manufacturing apparatus can be shared. Further, by switching the precursor without switching the nitriding agent, the insulator 130 can be continuously formed on the insulator 115a. Therefore, the insulator 115a and the insulator 130 can be continuously formed without exposing them to the atmosphere, and the vicinity of the interface between the insulator 115a and the insulator 130 can be kept clean.

[0201] According to one aspect of the present invention, a material that can have ferroelectricity, that is, a metal nitride film having ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a ferroelectric device using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a capacitive element using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a transistor using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a capacitive element and a diode using a material that can have ferroelectricity can be provided.

[0202] In other words, the metal nitride film of one aspect of the present invention can be used for any one or more ferroelectric devices such as a capacitive element, a transistor, and a diode.

[0203] Note that the configurations shown in FIGS. 7A1 and 7A2 are the same as those of the capacitive element 100 shown in FIG. 1 and the like, and the description thereof can be referred to. Similarly, for the configurations shown in FIGS. 7B1 and 7B2, and FIGS. 7C1, 7C2, 7C3, and 7C4, the configuration according to FIG. 1 and the like can be applied by changing some of the configurations (for example, the oxide 230, the insulator 115a, the insulator 115b, etc.). Also, the following description in this specification and the like can be applied in the same manner.

[0204] As described above, at least a part of the configurations, methods, etc. shown in this embodiment can be implemented in appropriate combination with other embodiments described in this specification.

[0205] (Embodiment 2) In this embodiment, an example of a semiconductor device having a transistor 200 according to one aspect of the present invention, an example of a semiconductor device having a transistor 200 and a capacitive element 100 according to one aspect of the present invention, and a manufacturing method thereof will be described with reference to FIGS. 8A to 21C. Here, the capacitive element 100 used in the semiconductor device can refer to the description related to the capacitive element 100 shown in Embodiment 1.

[0206] <Configuration Example of Semiconductor Device> Figs. 8A to 8D are a top view and cross-sectional views of a semiconductor device having a transistor 200. Fig. 8A is a top view of the semiconductor device. Figs. 8B to 8D are cross-sectional views of the semiconductor device. Here, Fig. 8B is a cross-sectional view of the portion indicated by the dashed line A1 - A2 in Fig. 8A and is also a cross-sectional view in the channel length direction of the transistor 200. Fig. 8C is a cross-sectional view of the portion indicated by the dashed line A3 - A4 in Fig. 8A and is also a cross-sectional view in the channel width direction of the transistor 200. Fig. 8D is a cross-sectional view of the portion indicated by the dashed line A5 - A6 in Fig. 8A. Note that in the top view of Fig. 8A, some elements are omitted for clarity of the figure.

[0207] A semiconductor device according to one aspect of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a transistor 200 on the insulator 214, an insulator 280 on an insulator 275 provided on the transistor 200, an insulator 282 on the insulator 280, an insulator 283 on the insulator 282, an insulator 274 on the insulator 283, and an insulator 285 on the insulator 283 and on the insulator 274. The insulator 212, the insulator 214, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 274 function as interlayer films. Also, the insulator 283 is in contact with a part of the upper surface of the insulator 214, the side surfaces of the insulator 275, the side surfaces of the insulator 280, and the side surfaces and the upper surface of the insulator 282.

[0208] Here, the transistor 200 includes a semiconductor layer, a first gate, a second gate, a source, and a drain. Note that an insulator 271 (insulator 271a and insulator 271b) is provided in contact with the source and the drain of the transistor 200.

[0209] [Transistor 200] As shown in FIGS. 8A to 8D, the transistor 200 includes an insulator 216 on an insulator 214, conductors 205 (conductor 205a and conductor 205b) disposed to be embedded in the insulator 214 and / or the insulator 216, an insulator 222 on the insulator 216 and on the conductors 205, an insulator 224 on the insulator 222, an oxide 230a on the insulator 224, an oxide 230b on the oxide 230a, a conductor 242a on the oxide 230b, an insulator 271a on the conductor 242a, a conductor 242b on the oxide 230b, an insulator 271b on the conductor 242b, an insulator 252 on the oxide 230b, an insulator 250 on the insulator 252, an insulator 254 on the insulator 250, conductors 260 (conductor 260a and conductor 260b) located on the insulator 254 and overlapping a part of the oxide 230b, and an insulator 275 disposed on the insulator 222, the insulator 224, the oxide 230a, the oxide 230b, the conductor 242a, the conductor 242b, the insulator 271a, and the insulator 271b. Here, as shown in FIGS. 8B and 8C, the insulator 252 is in contact with the upper surface of the insulator 222, the side surface of the insulator 224, the side surfaces of the oxide 230a and the oxide 230b, the side surfaces and the upper surface of the conductor 242, the side surfaces of the insulator 271 and the insulator 275, the side surface of the insulator 280, and the lower surface of the insulator 250. Also, the upper surface of the conductor 260 is arranged to be substantially flush with the uppermost part of the insulator 254, the uppermost part of the insulator 250, the uppermost part of the insulator 252, and the upper surface of the insulator 280. Further, the insulator 282 is in contact with at least a part of the upper surfaces of the conductor 260, the insulator 252, the insulator 250, the insulator 254, and the insulator 280.

[0210] In the following, the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230. Also, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. Also, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271.

[0211] Insulators 280 and 275 are provided with openings reaching the oxide 230b. Inside the openings, an insulator 252, an insulator 250, an insulator 254, and a conductor 260 are arranged. Also, in the channel length direction of the transistor 200, a conductor 260, an insulator 252, an insulator 250, and an insulator 254 are provided between the insulator 271a and the conductor 242a and between the insulator 271b and the conductor 242b. The insulator 254 has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.

[0212] The oxide 230 preferably has an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the oxide 230a. By having the oxide 230a under the oxide 230b, diffusion of impurities from a structure formed below the oxide 230a to the oxide 230b can be suppressed.

[0213] Note that in the transistor 200, the oxide 230 is shown having a structure in which two layers of the oxide 230a and the oxide 230b are stacked, but the present invention is not limited to this. For example, a single layer of the oxide 230b or a stacked structure of three or more layers may be provided, or each of the oxide 230a and the oxide 230b may have a stacked structure.

[0214] The conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode. Also, the insulators 252, 250, and 254 function as a first gate insulator, and the insulators 222 and 224 function as a second gate insulator. Note that the gate insulator may also be referred to as a gate insulating layer or a gate insulating film. Also, the conductor 242a functions as one of a source or a drain, and the conductor 242b functions as the other of the source or the drain. Also, at least a part of the region of the oxide 230 that overlaps with the conductor 260 functions as a channel formation region.

[0215] Here, an enlarged view of the vicinity of the channel formation region in FIG. 8B is shown in FIG. 9A. By supplying oxygen to the oxide 230b, a channel formation region is formed in the region between the conductor 242a and the conductor 242b. Thus, as shown in FIG. 9A, the oxide 230b has a region 230bc that functions as the channel formation region of the transistor 200, and regions 230ba and 230bb that are provided so as to sandwich the region 230bc and function as a source region or a drain region. At least a part of the region 230bc overlaps with the conductor 260. In other words, the region 230bc is provided in the region between the conductor 242a and the conductor 242b. The region 230ba is provided to overlap with the conductor 242a, and the region 230bb is provided to overlap with the conductor 242b.

[0216] The region 230bc that functions as the channel formation region has less oxygen deficiency or lower impurity concentration than the regions 230ba and 230bb, so it is a high-resistance region with a low carrier concentration. Therefore, the region 230bc can be said to be of i-type (intrinsic) or substantially i-type. The region 230bc is easily formed, for example, by performing microwave treatment in an oxygen-containing atmosphere. Here, the microwave treatment refers to a treatment using a device having a power source for generating high-density plasma using microwaves, for example. Also, in this specification and the like, microwaves are assumed to refer to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less.

[0217] Also, the regions 230ba and 230bb that function as the source region or the drain region have an increased carrier concentration and a reduced resistance due to a large amount of oxygen deficiency or a high impurity concentration such as hydrogen, nitrogen, and metal elements. That is, the regions 230ba and 230bb are n-type regions with a high carrier concentration and low resistance compared to the region 230bc.

[0218] Here, the carrier concentration of the region 230bc that functions as the channel formation region is preferably 18 cm -3 or less, and preferably17 cm -3 It is more preferably less than, and 1×10 16 cm -3 It is even more preferably less than, and 1×10 13 cm -3 It is even more preferably less than, and 1×10 12 cm -3 It is even more preferably less than. Regarding the lower limit value of the carrier concentration of the region 230bc that functions as the channel formation region, there is no particular limitation. For example, it can be 1×10 -9 cm -3 and can be set as such.

[0219] Also, a region may be formed between the region 230bc and the region 230ba or the region 230bb, where the carrier concentration is equal to or lower than the carrier concentrations of the regions 230ba and 230bb and equal to or higher than the carrier concentration of the region 230bc. That is, the said region functions as a junction region between the region 230bc and the region 230ba or the region 230bb. The hydrogen concentration in the said junction region may be equal to or lower than the hydrogen concentrations of the regions 230ba and 230bb and equal to or higher than the hydrogen concentration of the region 230bc. Also, the oxygen deficiency in the said junction region may be equal to or less than the oxygen deficiencies of the regions 230ba and 230bb and equal to or more than the oxygen deficiency of the region 230bc.

[0220] In addition, in Fig. 9A, an example where the regions 230ba, 230bb, and 230bc are formed in the oxide 230b is shown, but the present invention is not limited to this. For example, each of the above regions may be formed not only in the oxide 230b but also in the oxide 230a.

[0221] In the oxide 230, it may be difficult to clearly detect the boundaries of the respective regions. The concentrations of the metal elements detected within each region, as well as impurity elements such as hydrogen and nitrogen, may not be limited to stepwise changes from region to region, but may also change continuously within each region. That is, the closer the region is to the channel formation region, the more the concentrations of the metal elements and impurity elements such as hydrogen and nitrogen may decrease.

[0222] For the transistor 200, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor for the oxide 230 (oxide 230a and oxide 230b) including the channel formation region.

[0223] In addition, as the metal oxide that functions as a semiconductor, it is preferable to use one having a band gap of 2 eV or more, and more preferably 2.5 eV or more. By using a metal oxide having a large band gap in this way, the off-current of the transistor can be reduced.

[0224] As the oxide 230, for example, a metal oxide such as an In-M-Zn oxide having indium, element M, and zinc (element M is one or more selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used. Further, as the oxide 230, an In-Ga oxide, an In-Zn oxide, or an indium oxide may be used.

[0225] The oxide 230b preferably has crystallinity. In particular, it is preferable to use CAAC-OS (c-axis aligned crystalline oxide semiconductor) as the oxide 230b.

[0226] CAAC-OS is a metal oxide that has a highly crystalline and dense structure and has few impurities and defects (such as oxygen deficiencies). In particular, after the formation of the metal oxide, by performing heat treatment at a temperature (for example, 400 °C or higher and 600 °C or lower) at which the metal oxide does not polycrystallize, CAAC-OS can be made to have a more highly crystalline and dense structure. By increasing the density of CAAC-OS in this way, the diffusion of impurities or oxygen in the CAAC-OS can be further reduced.

[0227] On the other hand, since it is difficult to confirm clear grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to grain boundaries is unlikely to occur. Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable.

[0228] In a transistor using an oxide semiconductor, if impurities and oxygen deficiencies are present in the region where the channel in the oxide semiconductor is formed, the electrical characteristics are likely to fluctuate and the reliability may deteriorate. In addition, hydrogen near the oxygen deficiency may form a defect in which hydrogen enters the oxygen deficiency (hereinafter sometimes referred to as V O H), and may generate electrons serving as carriers. For this reason, if the region where the channel in the oxide semiconductor is formed contains oxygen deficiencies, the transistor tends to have normally-on characteristics (characteristics in which a channel exists even when no voltage is applied to the gate electrode and current flows through the transistor). Therefore, in the region where the channel in the oxide semiconductor is formed, it is preferable that impurities, oxygen deficiencies, and V O H are reduced as much as possible. In other words, the region where the channel in the oxide semiconductor is formed preferably has a reduced carrier concentration and is of i-type (intrinsic) or substantially i-type.

[0229] On the other hand, by providing an insulator containing oxygen that desorbs by heating (hereinafter sometimes referred to as excess oxygen) near the oxide semiconductor and performing heat treatment, oxygen is supplied from the insulator to the oxide semiconductor, and oxygen deficiencies and V OH can be reduced. However, if an excessive amount of oxygen is supplied to the source region or the drain region, it may cause a decrease in the on-current of the transistor 200 or a decrease in the field-effect mobility. Furthermore, variations in the amount of oxygen supplied to the source region or the drain region within the plane of the substrate will result in variations in the characteristics of the semiconductor device having the transistor.

[0230] Therefore, in the oxide semiconductor, the region 230bc that functions as the channel formation region preferably has a reduced carrier concentration and is of the i-type or substantially i-type, while the regions 230ba and 230bb that function as the source region or the drain region preferably have a high carrier concentration and are of the n-type. That is, the oxygen deficiency in the region 230bc of the oxide semiconductor and V O It is preferable to reduce H and prevent an excessive amount of oxygen from being supplied to the regions 230ba and 230bb.

[0231] Also, as shown in FIG. 8C, in a cross-sectional view in the channel width direction of the transistor 200, a curved surface may be provided between the side surface and the upper surface of the oxide 230b. That is, the end of the side surface and the end of the upper surface may be curved (hereinafter, also referred to as rounded).

[0232] The radius of curvature of the curved surface is preferably greater than 0 nm and less than the film thickness of the oxide 230b in the region overlapping with the conductor 242, or less than half of the length of the region without the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and 20 nm or less, preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less. By adopting such a shape, the covering properties of the insulator 252, the insulator 250, the insulator 254, and the conductor 260 on the oxide 230b can be enhanced.

[0233] The oxide 230 preferably has a laminated structure of a plurality of oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to the metal element that is the main component is preferably larger than the atomic ratio of the element M to the metal element that is the main component in the metal oxide used for the oxide 230b. Also, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. Further, in the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a.

[0234] Also, the oxide 230b is preferably an oxide having crystallinity such as CAAC-OS. An oxide having crystallinity such as CAAC-OS has a dense structure with few impurities and defects (such as oxygen deficiencies) and high crystallinity. Therefore, it is possible to suppress the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode. As a result, even when heat treatment is performed, the extraction of oxygen from the oxide 230b can be reduced, so the transistor 200 is stable against a high temperature (so-called thermal budget) in the manufacturing process.

[0235] Here, at the junction of the oxide 230a and the oxide 230b, the lower end of the conduction band changes smoothly. In other words, it can also be said that the lower end of the conduction band at the junction of the oxide 230a and the oxide 230b changes continuously or is continuously joined. To achieve this, it is preferable to lower the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.

[0236] Specifically, since the oxide 230a and the oxide 230b have a common element other than oxygen as the main component, the density of defect levels at the interface between the oxide 230a and the oxide 230b can be reduced. Or, a mixed layer with a low density of defect levels can be formed. For example, when the oxide 230b is an In-M-Zn oxide, as the oxide 230a, an In-M-Zn oxide, an M-Zn oxide, an oxide of element M, an In-Zn oxide, or an indium oxide may be used.

[0237] Specifically, as the oxide 230a, a metal oxide having a composition of In:M:Zn = 1:3:4 [atomic ratio] or in the vicinity thereof, or a composition of In:M:Zn = 1:1:0.5 [atomic ratio] or in the vicinity thereof may be used. Also, as the oxide 230b, a metal oxide having a composition of In:M:Zn = 1:1:1 [atomic ratio] or in the vicinity thereof, In:M:Zn = 1:1:2 [atomic ratio] or in the vicinity thereof, or In:M:Zn = 4:2:3 [atomic ratio] or in the vicinity thereof may be used. The vicinity of the composition includes a range of ±30% of the desired atomic ratio. Also, as the element M, it is preferable to use gallium.

[0238] Note that when forming a metal oxide film by sputtering, the above atomic ratio is not limited to the atomic ratio of the formed metal oxide film, and may be the atomic ratio of the sputtering target used for forming the metal oxide film.

[0239] Also, as shown in FIG. 8C and the like, by providing an insulator 252 formed of aluminum oxide or the like in contact with the upper surface and the side surface of the oxide 230, indium contained in the oxide 230 may be unevenly distributed at the interface between the oxide 230 and the insulator 252 and in the vicinity thereof. As a result, the vicinity of the surface of the oxide 230 has an atomic ratio close to that of indium oxide or an atomic ratio close to that of In-Zn oxide. By increasing the atomic ratio of indium in the vicinity of the surface of the oxide 230, particularly the oxide 230b, the field-effect mobility of the transistor 200 can be improved.

[0240] By configuring the oxide 230a and the oxide 230b as described above, the density of defect levels at the interface between the oxide 230a and the oxide 230b can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics.

[0241] At least one of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200 into the transistor 200. Therefore, it is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (the above oxygen is difficult to permeate).

[0242] As the insulators 212, 214, 271, 275, 282, 283, and 285, it is preferable to use insulators having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. For example, as the insulators 212, 275, and 283, it is preferable to use silicon nitride or the like having higher hydrogen barrier properties, similar to the insulator 152 shown in the previous embodiment. Further, for example, as the insulators 214, 271, 282, and 285, it is preferable to use aluminum oxide or magnesium oxide or the like having a high function of capturing or fixing hydrogen, similar to the insulator 155 shown in the previous embodiment. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulators 212 and 214. Alternatively, it is possible to suppress the diffusion of impurities such as water and hydrogen from an interlayer insulating film or the like disposed outside the insulator 285 to the transistor 200 side. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulators 212 and 214. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 280 or the like above the transistor 200 through the insulator 282 or the like. In this way, it is preferable to form the structure in which the transistor 200 is surrounded by the insulators 212, 214, 271, 275, 282, 283, and 285 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.

[0243] Here, as the insulators 212, 214, 271, 275, 282, 283, and 285, it is preferable to use oxides having an amorphous structure. For example, AlO x (x is an arbitrary number greater than 0), or MgO yIt is preferable to use a metal oxide such as (y is an arbitrary number greater than 0). In such a metal oxide having an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have the property of capturing or fixing hydrogen. By using such a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen existing around the transistor 200 can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200. By using a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, a transistor 200 and a semiconductor device having good characteristics and high reliability can be fabricated.

[0244] In addition, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 preferably have an amorphous structure, but a region having a polycrystalline structure may be formed partially. Further, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 may have a multilayer structure in which a layer having an amorphous structure and a layer having a polycrystalline structure are laminated. For example, a laminated structure in which a layer having a polycrystalline structure is formed on a layer having an amorphous structure may be used.

[0245] The film formation of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 may be performed, for example, by using a sputtering method. Since the sputtering method does not require a molecule containing hydrogen in the film formation gas, the hydrogen concentration of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 can be reduced. Note that the film formation method is not limited to the sputtering method, and a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like may be appropriately used.

[0246] Also, it may be preferable to lower the resistivity of the insulator 212, the insulator 275, and the insulator 283. For example, by setting the resistivity of the insulator 212, the insulator 275, and the insulator 283 to approximately 1×10 13 Ωcm, in a process using plasma or the like in the semiconductor device manufacturing process, the insulator 212, the insulator 275, and the insulator 283 may be able to mitigate the charge-up of the conductor 205, the conductor 242, the conductor 260, or the conductor 110. The resistivity of the insulator 212, the insulator 275, and the insulator 283 is preferably 1×10 10 Ωcm or more and 1×10 15 Ωcm or less.

[0247] Also, the insulator 216, the insulator 274, the insulator 280, and the insulator 285 preferably have a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced. For example, as the insulator 216, the insulator 274, the insulator 280, and the insulator 285, silicon oxide, silicon oxynitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, etc. may be appropriately used.

[0248] The conductor 205 is arranged to overlap with the oxide 230 and the conductor 260. Here, the conductor 205 is preferably provided by being embedded in an opening formed in the insulator 216. Also, a part of the conductor 205 may be embedded in the insulator 214.

[0249] The conductor 205 has a conductor 205a and a conductor 205b. The conductor 205a is provided in contact with the bottom surface and the side wall of the above-described opening. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the height of the upper surface of the conductor 205b is substantially the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.

[0250] Here, it is preferable to use a conductive material for the conductor 205a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0251] By using a conductive material for the conductor 205a that has a function of reducing the diffusion of hydrogen, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the oxide 230 through the insulator 224, the insulator 216, etc. Also, by using a conductive material for the conductor 205a that has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 205b and the decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, as the conductor 205a, the above conductive material may be used as a single layer or a laminate. For example, the conductor 205a may use titanium nitride.

[0252] Also, for the conductor 205b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. For example, the conductor 205b may use tungsten.

[0253] The conductor 205 may function as a second gate electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage (Vth) of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, it is possible to increase the Vth of the transistor 200 and reduce the off-current. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0V than when no negative potential is applied.

[0254] In addition, when the oxide 230 is highly pure and free of impurities as much as possible, it may be possible to turn off the transistor 200 normally (make the threshold voltage of the transistor 200 greater than 0V) without applying a potential to the conductor 205 and / or the conductor 260. In this case, it is preferable to connect the conductor 260 and the conductor 205 so that the same potential is applied.

[0255] Also, the electrical resistivity of the conductor 205 is designed in consideration of the potential applied to the conductor 205, and the film thickness of the conductor 205 is set according to the electrical resistivity. Also, the film thickness of the insulator 216 is made substantially the same as that of the conductor 205. Here, it is preferable to reduce the film thicknesses of the conductor 205 and the insulator 216 within the range allowed by the design of the conductor 205. By reducing the film thickness of the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, so that the diffusion of the impurities into the oxide 230 can be reduced.

[0256] Note that, as shown in FIG. 8A, the conductor 205 may be provided larger than the size of the region that does not overlap with the conductors 242a and 242b of the oxide 230. In particular, as shown in FIG. 8C, the conductor 205 preferably extends also in a region outside the end portions in the channel width direction of the oxides 230a and 230b. That is, outside the side surface in the channel width direction of the oxide 230, it is preferable that the conductor 205 and the conductor 260 overlap with each other via an insulator. By having such a configuration, the channel formation region of the oxide 230 can be electrically surrounded by the electric field of the conductor 260 functioning as the first gate electrode and the electric field of the conductor 205 functioning as the second gate electrode. In this specification, the structure of the transistor in which the channel formation region is electrically surrounded by the electric fields of the first gate and the second gate is called a surrounded channel (S-channel) structure.

[0257] In addition, in this specification and the like, the transistor with an S-channel structure refers to a structure of a transistor that electrically surrounds a channel formation region by the electric fields of one and the other of a pair of gate electrodes. Further, the S-channel structure disclosed in this specification and the like is different from the Fin type structure and the planar type structure. By adopting the S-channel structure, it is possible to enhance the resistance to the short-channel effect, in other words, to make a transistor in which the short-channel effect hardly occurs.

[0258] By setting the transistor 200 to normally-off and having the above-described S-Channel structure, the channel formation region can be electrically surrounded. Therefore, the transistor 200 can also be regarded as having a GAA (Gate All Around) structure or an LGAA (Lateral Gate All Around) structure. By setting the transistor 200 to have an S-Channel structure, a GAA structure, or an LGAA structure, the channel formation region formed at or near the interface between the oxide 230 and the gate insulating film can be made to cover the entire bulk of the oxide 230. In other words, by setting the transistor 200 to have an S-Channel structure, a GAA structure, or an LGAA structure, a so-called Bulk-Flow type can be achieved in which the carrier path is used as the entire bulk. By adopting the Bulk-Flow type transistor structure, it becomes possible to improve the current density flowing through the transistor, and thus it can be expected to improve the on-current of the transistor or enhance the field-effect mobility of the transistor.

[0259] Also, as shown in FIG. 8C, the conductor 205 is extended to function also as a wiring. However, it is not limited to this, and a configuration may be adopted in which a conductor functioning as a wiring is provided under the conductor 205. Further, it is not always necessary to provide one conductor 205 for each transistor. For example, a configuration may be adopted in which the conductor 205 is shared by a plurality of transistors.

[0260] Note that in the transistor 200, although the conductor 205 is shown as a structure in which the conductor 205a and the conductor 205b are laminated, the present invention is not limited thereto. For example, the conductor 205 may be provided as a single layer or a laminated structure of three or more layers.

[0261] The insulators 222 and 224 function as gate insulators.

[0262] The insulator 222 preferably has a function of suppressing the diffusion of hydrogen (for example, at least one of a hydrogen atom, a hydrogen molecule, etc.). Further, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.

[0263] As the insulator 222, an insulator containing one or both of oxides of aluminum and hafnium, which are insulating materials, may be used. As the insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. Alternatively, an oxide containing hafnium and zirconium, for example, hafnium zirconium oxide is preferably used. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the oxide 230 to the substrate side and the diffusion of impurities such as hydrogen from the peripheral portion of the transistor 200 to the oxide 230. Therefore, by providing the insulator 222, it is possible to suppress the diffusion of impurities such as hydrogen into the inside of the transistor 200 and suppress the generation of oxygen vacancies in the oxide 230. Further, it is possible to suppress the reaction between the conductor 205 and the oxygen possessed by the insulator 224 and the oxide 230.

[0264] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. Further, the insulator 222 may be used by laminating silicon oxide, silicon oxynitride, or silicon nitride on these insulators.

[0265] Alternatively, the insulator 222 may be used as a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, or hafnium zirconium oxide. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator that functions as a gate insulator, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Further, as the insulator 222, a substance with a high dielectric constant such as lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST) may also be used.

[0266] For the insulator 224 in contact with the oxide 230, for example, silicon oxide, silicon oxynitride, etc. may be appropriately used.

[0267] Also, during the manufacturing process of the transistor 200, it is preferable to perform a heat treatment while the surface of the oxide 230 is exposed. The heat treatment may be performed, for example, at 100°C or higher and 600°C or lower, more preferably 350°C or higher and 550°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 230 to reduce oxygen deficiency. Further, the heat treatment may be performed under reduced pressure. Or, after performing the heat treatment in an atmosphere of nitrogen gas or an inert gas, in order to supplement the desorbed oxygen, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. Or, after performing the heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, the heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.

[0268] Note that by performing an oxygen addition treatment on the oxide 230, the oxygen deficiency in the oxide 230 is repaired by the supplied oxygen, in other words, the reaction of "V O +O→null" can be promoted. Further, by reacting the oxygen supplied to the hydrogen remaining in the oxide 230, the hydrogen can be removed (dehydrated) as H2O. Thereby, it is possible to suppress the recombination of the hydrogen remaining in the oxide 230 with the oxygen deficiency to form V O H.

[0269] Note that the insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used. Further, the insulator 224 may be formed in an island shape by overlapping with the oxide 230a. In this case, the insulator 275 is configured to contact the side surface of the insulator 224 and the upper surface of the insulator 222.

[0270] The conductor 242a and the conductor 242b are provided in contact with the upper surface of the oxide 230b. The conductor 242a and the conductor 242b each function as a source electrode or a drain electrode of the transistor 200.

[0271] As the conductor 242 (conductor 242a and conductor 242b), for example, nitrides containing tantalum, nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten, nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum, etc. are preferably used. In one aspect of the present invention, nitrides containing tantalum are particularly preferred. Also, for example, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. may be used. These materials are preferred because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen.

[0272] Note that hydrogen contained in the oxide 230b or the like may diffuse into the conductor 242a or the conductor 242b. In particular, by using a nitride containing tantalum for the conductor 242a and the conductor 242b, hydrogen contained in the oxide 230b or the like easily diffuses into the conductor 242a or the conductor 242b, and the diffused hydrogen may combine with nitrogen possessed by the conductor 242a or the conductor 242b. That is, hydrogen contained in the oxide 230b or the like may be absorbed by the conductor 242a or the conductor 242b.

[0273] Also, it is preferable that a curved surface is not formed between the side surface and the upper surface of the conductor 242. By making the conductor 242 without the formation of the curved surface, as shown in FIG. 8D, the cross-sectional area of the conductor 242 in the cross-section in the channel width direction can be increased. Thereby, the conductivity of the conductor 242 can be increased, and the on-current of the transistor 200 can be increased.

[0274] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b. The insulator 271 preferably functions as at least a barrier insulating film against oxygen. Therefore, the insulator 271 preferably has a function of suppressing the diffusion of oxygen. For example, the insulator 271 preferably has a function of suppressing the diffusion of oxygen more than the insulator 280. As the insulator 271, for example, an insulator such as aluminum oxide or magnesium oxide may be used.

[0275] The insulator 275 is provided so as to cover the insulator 224, the oxide 230a, the oxide 230b, the conductor 242, and the insulator 271. The insulator 275 preferably has a function of capturing or fixing hydrogen. In that case, the insulator 275 preferably contains an insulator such as silicon nitride or a metal oxide having an amorphous structure, for example, aluminum oxide or magnesium oxide. Further, for example, as the insulator 275, a laminated film of aluminum oxide and silicon nitride on the aluminum oxide may be used.

[0276] By providing the insulator 271 and the insulator 275 as described above, the conductor 242 can be wrapped with an insulator having barrier properties against oxygen. That is, it is possible to prevent oxygen contained in the insulator 224 and the insulator 280 from diffusing into the conductor 242. Thereby, it is possible to suppress the direct oxidation of the conductor 242 by oxygen contained in the insulator 224 and the insulator 280, an increase in resistivity, and a reduction in on-current.

[0277] The insulator 252 functions as part of the gate insulator. As the insulator 252, it is preferable to use a barrier insulating film against oxygen. As the insulator 252, an insulator that can be used for the above-described insulator 282 may be used. As the insulator 252, an insulator containing one or both of aluminum oxide and hafnium oxide may be used. As such an insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate), etc. can be used. In the present embodiment, aluminum oxide is used as the insulator 252. In this case, the insulator 252 becomes an insulator having at least oxygen and aluminum.

[0278] As shown in FIG. 8C, the insulator 252 is provided in contact with the upper surface and side surface of the oxide 230b, the side surface of the oxide 230a, the side surface of the insulator 224, and the upper surface of the insulator 222. That is, the region where the conductors 260 of the oxide 230a, the oxide 230b, and the insulator 224 overlap is covered with the insulator 252 in the cross section in the channel width direction. Thereby, when heat treatment or the like is performed, the desorption of oxygen by the oxides 230a and 230b can be blocked by the insulator 252 having barrier properties against oxygen. Therefore, the formation of oxygen vacancies in the oxides 230a and 230b can be reduced. Thereby, the oxygen vacancies and V O H formed in the region 230bc can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be enhanced.

[0279] Conversely, even if the insulators 280 and 250 contain an excessive amount of oxygen, it is possible to suppress the excessive supply of the oxygen to the oxides 230a and 230b. Therefore, it is possible to suppress the excessive oxidation of the regions 230ba and 230bb through the region 230bc, which causes a decrease in the on-current or a decrease in the field-effect mobility of the transistor 200.

[0280] Also, as shown in FIG. 8B, the insulator 252 is provided in contact with the side surfaces of the conductor 242, the insulator 271, the insulator 275, and the insulator 280, respectively. Therefore, oxidation of the side surface of the conductor 242 can be reduced, and formation of an oxide film on the side surface can be suppressed. As a result, it is possible to suppress a decrease in the on-current of the transistor 200 or a decrease in the field-effect mobility.

[0281] Further, the insulator 252 needs to be provided together with the insulator 254, the insulator 250, and the conductor 260 in an opening formed in the insulator 280 or the like. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 252 is thin. The film thickness of the insulator 252 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, more preferably 1.0 nm or more and 3.0 nm or less. In this case, the insulator 252 may have a region with the above-described film thickness at least partially. Also, it is preferable that the film thickness of the insulator 252 is thinner than the film thickness of the insulator 250. In this case, the insulator 252 may have a region with a film thickness thinner than that of the insulator 250 at least partially.

[0282] In order to form the insulator 252 with a thin film thickness as described above, it is preferable to form the film using the ALD method. The ALD method includes a thermal ALD method in which the reaction of a precursor and a reactant is performed only with thermal energy, a PEALD method using a plasma-excited reactant, and the like. In the PEALD method, plasma is used, and film formation at a lower temperature may be possible, which is preferable in some cases.

[0283] The ALD method utilizes the self-limiting property, which is a property of atoms, and can deposit atoms one by one. Therefore, it is possible to form an extremely thin film, form a film on a structure with a high aspect ratio, form a film with few defects such as pinholes, form a film with excellent coverage, and form a film at a low temperature. Therefore, the insulator 252 can be formed with a good coverage on the side surface of an opening formed in the insulator 280 or the like with the above-described thin film thickness.

[0284] Note that some of the precursors used in the ALD method contain carbon and the like. Therefore, the film formed by the ALD method may contain more impurities such as carbon compared to the film formed by other film formation methods. The quantification of impurities can be performed using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).

[0285] The insulator 250 functions as part of the gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the insulator 252. As the insulator 250, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or the like can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat. In this case, the insulator 250 is an insulator having at least oxygen and silicon.

[0286] Similar to the insulator 224, it is preferable that the impurity concentrations of water, hydrogen, etc. in the insulator 250 are reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less, and more preferably 0.5 nm or more and 15.0 nm or less. In this case, the insulator 250 may have a region with the above film thickness at least in part.

[0287] In FIGS. 8A to 8D and the like, a configuration in which the insulator 250 is a single layer is shown, but the present invention is not limited to this, and a laminated structure of two or more layers may be used. For example, as shown in FIG. 9B, the insulator 250 may have a two-layer laminated structure of an insulator 250a and an insulator 250b on the insulator 250a.

[0288] As shown in FIG. 9B, when the insulator 250 has a two-layer stacked structure, the lower-layer insulator 250a is preferably formed using an insulator that easily permeates oxygen, and the upper-layer insulator 250b is preferably formed using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, it is possible to suppress the oxygen contained in the insulator 250a from diffusing into the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. Further, it is possible to suppress the oxidation of the conductor 260 by the oxygen contained in the insulator 250a. For example, the insulator 250a may be provided using a material that can be used for the above-described insulator 250, and the insulator 250b may be an insulator containing one or both of aluminum oxide and hafnium oxide. As the insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate), or the like can be used. In the present embodiment, hafnium oxide is used as the insulator 250b. In this case, the insulator 250b becomes an insulator having at least oxygen and hafnium. Further, the film thickness of the insulator 250b is 0.5 nm or more and 5.0 nm or less, preferably 1.0 nm or more and 5.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less. In this case, the insulator 250b may have a region having the above-described film thickness at least partially.

[0289] When silicon oxide or silicon oxynitride is used for the insulator 250a, the insulator 250b may be an insulating material that is a high-k material having a high relative dielectric constant. By forming the gate insulator into a stacked structure of the insulator 250a and the insulator 250b, a stacked structure that is stable against heat and has a high relative dielectric constant can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. Further, it is possible to thin the equivalent oxide film thickness (EOT) of the insulator functioning as the gate insulator. Therefore, the breakdown voltage of the insulator 250 can be increased.

[0290] The insulator 254 functions as part of the gate insulator. As the insulator 254, it is preferable to use a barrier insulating film against hydrogen. Thereby, impurities such as hydrogen contained in the conductor 260 can be prevented from diffusing into the insulator 250 and the oxide 230b. As the insulator 254, an insulator that can be used for the above-described insulator 283 may be used. For example, silicon nitride formed by the PEALD method may be used as the insulator 254. In this case, the insulator 254 is an insulator having at least nitrogen and silicon.

[0291] Also, the insulator 254 may further have barrier properties against oxygen. Thereby, diffusion of oxygen contained in the insulator 250 into the conductor 260 can be suppressed.

[0292] Also, the insulator 254 needs to be provided in an opening formed in the insulator 280 or the like together with the insulator 252, the insulator 250, and the conductor 260. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 254 is thin. The film thickness of the insulator 254 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, more preferably 1.0 nm or more and 3.0 nm or less. In this case, the insulator 254 may have a region with the above-described film thickness at least in part. Also, it is preferable that the film thickness of the insulator 254 is thinner than the film thickness of the insulator 250. In this case, the insulator 254 may have a region with a film thickness thinner than that of the insulator 250 at least in part.

[0293] The conductor 260 functions as the first gate electrode of the transistor 200. The conductor 260 preferably has a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, the conductor 260a is preferably disposed so as to wrap the bottom surface and the side surface of the conductor 260b. Also, as shown in FIGS. 8B and 8C, the uppermost part of the conductor 260 substantially coincides with the uppermost part of the insulator 250. Note that in FIGS. 8B and 8C, the conductor 260 is shown as a two-layer structure of the conductor 260a and the conductor 260b, but it may be a single-layer structure or a laminated structure of three or more layers.

[0294] For the conductor 260a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0295] In addition, since the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to suppress the conductor 260b from being oxidized by the oxygen contained in the insulator 250 and the conductivity from decreasing. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0296] In addition, since the conductor 260 also functions as a wiring, it is preferable to use a conductor having high conductivity. For example, for the conductor 260b, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 260b may have a laminated structure, for example, a laminated structure of titanium, titanium nitride, or the like and the above conductive material.

[0297] In the transistor 200, the conductor 260 is self-alignedly formed so as to fill an opening formed in an insulator 280 or the like. By forming the conductor 260 in this way, it can be surely arranged in the region between the conductors 242a and 242b without aligning the conductor 260.

[0298] Also, as shown in FIG. 8C, in the channel width direction of the transistor 200, when the bottom surface of the insulator 222 is used as a reference, the height of the bottom surface of the region of the conductor 260 where the conductor 260 and the oxide 230b do not overlap is preferably lower than the height of the bottom surface of the oxide 230b. By configuring the conductor 260 that functions as a gate electrode to cover the side surface and the upper surface of the channel formation region of the oxide 230b via an insulator 250 or the like, the electric field of the conductor 260 can be easily applied to the entire channel formation region of the oxide 230b. Therefore, the on-current of the transistor 200 can be increased and the frequency characteristics can be improved. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the region where the oxide 230a and the oxide 230b and the conductor 260 do not overlap when the bottom surface of the insulator 222 is used as a reference is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 nm or more and 20 nm or less.

[0299] The insulator 280 is provided on the insulator 275, and an opening is formed in the region where the insulator 250 and the conductor 260 are provided. Also, the upper surface of the insulator 280 may be planarized.

[0300] The insulator 280 that functions as an interlayer film preferably has a low dielectric constant. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced. The insulator 280 is preferably provided using, for example, the same material as the insulator 216. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having pores are preferable because they can easily form a region containing oxygen that desorbs by heating.

[0301] The insulator 280 preferably has an excess oxygen region or contains excess oxygen. Also, it is preferable that the impurity concentrations such as water and hydrogen in the insulator 280 are reduced. For example, the insulator 280 may be appropriately silicon oxide, silicon oxynitride, etc. By providing an insulator having excess oxygen near the oxide 230, oxygen vacancies in the oxide 230 can be reduced, and the reliability of the transistor 200 can be improved.

[0302] The insulator 282 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen into the insulator 280 from above, and preferably has a function of capturing impurities such as hydrogen. Also, the insulator 282 preferably functions as a barrier insulating film that suppresses oxygen permeation. As the insulator 282, an insulator having an amorphous structure, such as aluminum oxide, may be used. In this case, the insulator 282 is an insulator having at least oxygen and aluminum. By providing the insulator 282 having a function of capturing impurities such as hydrogen in contact with the insulator 280 within the region sandwiched between the insulator 212 and the insulator 283, impurities such as hydrogen contained in the insulator 280 can be captured, and the amount of hydrogen in the region can be made a constant value. In particular, using aluminum oxide having an amorphous structure as the insulator 282 may be preferable because hydrogen can be captured or fixed more effectively. Thereby, a transistor 200 and a semiconductor device having good characteristics and high reliability can be fabricated.

[0303] The insulator 283 functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280. The insulator 283 is disposed on the insulator 282. As the insulator 283, it is preferable to use a nitride containing silicon, such as silicon nitride or silicon oxynitride. For example, silicon nitride formed by a sputtering method may be used as the insulator 283. By using the sputtering method, a silicon nitride film with high density can be formed as the insulator 283. Further, as the insulator 283, silicon nitride formed by a PEALD method or a CVD method may be laminated on the silicon nitride formed by the sputtering method.

[0304] <Constituent Materials of Semiconductor Devices> Hereinafter, the constituent materials that can be used in semiconductor devices will be described.

[0305] <<Substrate>> As the substrate on which the transistor 200 is formed, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), and a resin substrate. Examples of the semiconductor substrate include a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Further, there is a semiconductor substrate having an insulator region inside the aforementioned semiconductor substrate, such as an SOI (Silicon On Insulator) substrate. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Or, there is a substrate having a metal nitride or a substrate having a metal oxide. Further, there is a substrate in which a conductor or a semiconductor is provided on an insulator substrate, a substrate in which a conductor or an insulator is provided on a semiconductor substrate, or a substrate in which a semiconductor or an insulator is provided on a conductor substrate. Or, those with elements provided on these substrates may also be used. Examples of the elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light emitting element, and a memory element.

[0306] <<Insulator>> Examples of insulators include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, metal nitride oxides, etc. that have insulating properties.

[0307] For example, as the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator that functions as a gate insulator, it is possible to lower the operating voltage of the transistor while maintaining the physical film thickness. On the other hand, for the insulator that functions as an interlayer film, by using a material with a low relative permittivity, the parasitic capacitance generated between wirings can be reduced. Therefore, it is advisable to select a material according to the function of the insulator.

[0308] Examples of insulators with a high relative permittivity include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0309] Examples of insulators with a low relative permittivity include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin.

[0310] In addition, a transistor using a metal oxide can have its electrical characteristics stabilized by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. As the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a stacked layer. Specifically, as the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, and metal nitrides such as aluminum nitride, silicon oxynitride, silicon nitride can be used.

[0311] In addition, the insulator functioning as a gate insulator is preferably an insulator having a region containing oxygen that desorbs upon heating. For example, by forming a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that desorbs upon heating is in contact with the oxide 230, the oxygen deficiency of the oxide 230 can be compensated.

[0312] <<Conductor>> As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Also, a semiconductor having a high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, or a silicide such as nickel silicide may be used.

[0313] Further, a plurality of conductive layers formed of the above materials may be laminated and used. For example, a laminated structure combining a material containing the above-described metal element and a conductive material containing oxygen may be used. Also, a laminated structure combining a material containing the above-described metal element and a conductive material containing nitrogen may be used. Also, a laminated structure combining a material containing the above-described metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be used.

[0314] In addition, when an oxide is used in the channel formation region of the transistor, it is preferable to use a laminated structure combining a material containing the above-described metal element and a conductive material containing oxygen as the conductor functioning as the gate electrode. In this case, it is advisable to provide the conductive material containing oxygen on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen detached from the conductive material is easily supplied to the channel formation region.

[0315] In particular, as the conductor functioning as the gate electrode, it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed. Further, a conductive material containing the aforementioned metal element and nitrogen may also be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Further, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon may be used. Further, indium gallium zinc oxide containing nitrogen may also be used. By using such a material, it may be possible to capture hydrogen contained in the metal oxide in which the channel is formed. Or, it may be possible to capture hydrogen mixed from an external insulator or the like.

[0316] <<Metal Oxide>> As the oxide 230, it is preferable to use a metal oxide (oxide semiconductor) that functions as a semiconductor. Hereinafter, the metal oxide applicable to the oxide 230 according to the present invention will be described.

[0317] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. Further, in addition to those, it is preferable that aluminum, gallium, yttrium, tin, etc. are contained. Further, one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. may be contained.

[0318] Here, consider the case where the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. Note that element M is aluminum, gallium, yttrium, or tin. Other elements applicable to element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. However, there may be cases where a plurality of the aforementioned elements are combined as element M.

[0319] Note that in this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

[0320] <Classification of Crystal Structure> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 10A. FIG. 10A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0321] As shown in FIG. 10A, the oxide semiconductor is roughly classified into "Amorphous", "Crystalline", and "Crystal". Further, "completely amorphous" is included in "Amorphous". Further, "CAAC (c-axis-aligned crystalline)", "nc (nanocrystalline)", and "CAC (cloud-aligned composite)" are included in "Crystalline". Note that the classification of "Crystalline" excludes single crystal and poly crystal. Further, "single crystal" and poly crystal are included in "Crystal".

[0322] Note that the structure within the thick frame shown in FIG. 10A is in an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). That is, the structure can be described as an energetically unstable "Amorphous" and a structure completely different from "Crystal".

[0323] Note that the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Here, the GIXD (Grazing-Incidence XRD) measurement of the CAAC-IGZO film classified as "Crystalline" is shown in FIG. 10B. Note that the GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in FIG. 10B may be simply referred to as the XRD spectrum in this specification. Note that the composition of the CAAC-IGZO film shown in FIG. 10B is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the thickness of the CAAC-IGZO film shown in FIG. 10B is 500 nm.

[0324] In FIG. 10B, the horizontal axis is 2θ [deg.] and the vertical axis is intensity [a.u.]. As shown in FIG. 10B, a peak indicating clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected at around 2θ = 31°. Note that, as shown in FIG. 10B, the peak at around 2θ = 31° is asymmetric about the angle at which the peak intensity was detected.

[0325] Also, the crystal structure of the film or substrate can be determined by nano-beam electron diffraction (NBED) It can be evaluated by the diffraction pattern observed by Electron Diffraction (also referred to as the nano-beam electron diffraction pattern). The diffraction pattern of the CAAC-IGZO film is shown in Fig. 10C. Fig. 10C is a diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in Fig. 10C is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, in the nano-beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0326] As shown in Fig. 10C, in the diffraction pattern of the CAAC-IGZO film, a plurality of spots showing c-axis orientation are observed.

[0327] [[Structure of Oxide Semiconductor]] Note that when focusing on the crystal structure, the oxide semiconductor may be classified differently from Fig. 10A. For example, the oxide semiconductor can be divided into a single-crystalline oxide semiconductor and other non-single-crystalline oxide semiconductors. Examples of the non-single-crystalline oxide semiconductor include the above-mentioned CAAC-OS and nc-OS. Also, the non-single-crystalline oxide semiconductor includes polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), amorphous oxide semiconductors, and the like.

[0328] Here, the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0329] [[CAAC-OS]] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axes of the plurality of crystal regions are oriented in a specific direction. Note that the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. Also, a crystal region is a region having periodicity in the atomic arrangement. Note that when the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region where the lattice arrangements are aligned. Further, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. Note that strain refers to a portion where the orientation of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in a region where a plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor having c-axis orientation and no obvious orientation in the a-b plane direction.

[0330] Each of the plurality of crystal regions is composed of one or more minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. Also, when a crystal region is composed of a number of minute crystals, the size of the crystal region may be about several tens of nm.

[0331] Also, in an In-M-Zn oxide (element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter, (M,Zn) layer) are laminated. Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0332] When performing a structural analysis on a CAAC-OS film using, for example, an XRD apparatus, in an Out-of-plane XRD measurement using a θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in its vicinity. Note that the position of the peak indicating c-axis orientation (the value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0333] Also, for example, in the electron diffraction pattern of a CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as the direct spot) as the center of symmetry.

[0334] When observing the crystal region from the above specific direction, the lattice arrangement within the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, in the above distortion, there may be a lattice arrangement such as a pentagon or a heptagon. Note that in CAAC-OS, even in the vicinity of the distortion, a clear grain boundary cannot be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed due to the distortion of the lattice arrangement. This is presumably because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal atoms.

[0335] Note that a crystal structure in which a clear grain boundary is confirmed is called a so-called polycrystal. Grain boundaries can become recombination centers, and carriers are likely to be captured, causing a decrease in the on-current of the transistor and a decrease in the field-effect mobility. Therefore, CAAC-OS in which no clear grain boundary is confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor. Note that for forming CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more than In oxide.

[0336] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct crystal grain boundaries. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to crystal grain boundaries is less likely to occur. Also, since the crystallinity of an oxide semiconductor may decrease due to impurity incorporation, defect generation, etc., CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the oxide semiconductor having CAAC-OS are stable. For this reason, the oxide semiconductor having CAAC-OS is heat-resistant and highly reliable. Also, CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for an OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0337] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Since the size of the minute crystals is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystals are also called nano-crystals. Also, nc-OS has no regularity in the crystal orientation among different nano-crystals. Therefore, no orientation is observed in the entire film. Therefore, depending on the analysis method, nc-OS may not be distinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when structural analysis is performed on an nc-OS film using an XRD apparatus, no peak indicating crystallinity is detected in the Out-of-plane XRD measurement using θ / 2θ scan. Also, when electron beam diffraction (also called restricted-view electron beam diffraction) using an electron beam with a probe diameter larger than that of the nano-crystals (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when electron beam diffraction (also called nano-beam electron beam diffraction) using an electron beam with a probe diameter close to or smaller than that of the nano-crystals (for example, 1 nm or more and 30 nm or less) is performed on the nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be obtained.

[0338] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a loose or low-density region. That is, the a-like OS has lower crystallinity compared to the nc-OS and the CAAC-OS. Also, the a-like OS has a higher hydrogen concentration in the film compared to the nc-OS and the CAAC-OS.

[0339] [[Constitution of Oxide Semiconductor]] Next, the details of the above-mentioned CAC-OS will be described. Note that the CAC-OS relates to the material constitution.

[0340] [CAC-OS] The CAC-OS is, for example, a configuration of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed, and the region having the metal element is in a state of being mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof, which is also referred to as a mosaic state or a patch state.

[0341] Furthermore, the CAC-OS is a configuration in which the material is separated into a first region and a second region to form a mosaic state, and the first region is distributed in the film (hereinafter also referred to as a cloud state). That is, the CAC-OS is a composite metal oxide having a configuration in which the first region and the second region are mixed.

[0342] Here, the atomic number ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. Also, the second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. Also, the second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0343] Specifically, the above-mentioned first region is a region mainly composed of indium oxide, indium zinc oxide, etc. Also, the above-mentioned second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the above-mentioned first region can be rephrased as a region mainly composed of In. Also, the above-mentioned second region can be rephrased as a region mainly composed of Ga.

[0344] Note that there may be cases where no clear boundary can be observed between the above-mentioned first region and the above-mentioned second region.

[0345] For example, in the CAC-OS of In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the region mainly composed of In (the first region) and the region mainly composed of Ga (the second region) are unevenly distributed and have a mixed structure.

[0346] When using CAC-OS in a transistor, the conductivity caused by the first region and the insulating property caused by the second region act complementarily, enabling the function of switching (turning on / off) to be imparted to the CAC-OS. That is, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and has a semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximally enhanced. Therefore, by using CAC-OS in a transistor, a high on-current (I on )、high field-effect mobility (μ), and good switching operation can be realized.

[0347] Oxide semiconductors have various structures, each with different characteristics. The oxide semiconductor according to one aspect of the present invention may have two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0348] <Transistor having an oxide semiconductor> Subsequently, the case of using the above oxide semiconductor in a transistor will be described.

[0349] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0350] For the channel formation region of the transistor, it is preferable to use an oxide semiconductor with a low carrier concentration. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, even more preferably 1×10 11 cm -3 or less, still more preferably 1×10 10 cm -3is less than 1×10 -9 cm -3 or more. When reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be decreased and the density of defect levels may be decreased. In this specification and the like, the fact that the impurity concentration is low and the density of defect levels is low is referred to as highly pure intrinsic or substantially highly pure intrinsic. Note that an oxide semiconductor with a low carrier concentration may be referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor.

[0351] In addition, an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic may have a low trap level density because the density of defect levels is low.

[0352] In addition, the charge trapped in the trap levels of the oxide semiconductor may take a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics.

[0353] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In addition, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0354] <Impurity> Here, the influence of each impurity in the oxide semiconductor will be described.

[0355] When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor, defect levels are formed in the oxide semiconductor. For this reason, the concentration of silicon and carbon in the channel formation region of the oxide semiconductor and the concentration of silicon or carbon (the concentration obtained by secondary ion mass spectrometry (SIMS)) near the interface between the channel formation region of the oxide semiconductor and the oxide semiconductor are 2×10 18atoms / cm 3 Hereinafter, it is preferably 2×10 17 atoms / cm 3 or less.

[0356] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 or less, preferably 2×10 1 6 atoms / cm 3 or less.

[0357] In addition, in the oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as the semiconductor tends to have normally-on characteristics. Or, in the oxide semiconductor, when nitrogen is contained, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is 5×10 19 atoms / cm 3 or less, preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, still more preferably 5×10 17 atoms / cm 3 or less.

[0358] In addition, since hydrogen contained in the oxide semiconductor reacts with oxygen that binds to metal atoms to form water, oxygen vacancies may be formed. When hydrogen enters these oxygen vacancies, electrons that are carriers may be generated. Also, a part of the hydrogen may bind to oxygen that binds to metal atoms to generate electrons that are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the channel formation region of the oxide semiconductor is reduced as much as possible. Specifically, in the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 20 atoms / cm 3 less than, preferably less than 5×10 19 atoms / cm 3 less than, more preferably less than 1×10 19 atoms / cm 3 less than, still more preferably less than 5×10 18 atoms / cm 3 less than, still more preferably less than 1×10 18 atoms / cm 3 less than.

[0359] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0360] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-described metal oxides. As the oxide 230, a semiconductor material having a bandgap (a semiconductor material that is not a zero-gap semiconductor) may be used. For example, it is preferable to use a single-element semiconductor such as silicon, a compound semiconductor such as gallium arsenide, or a layer material that functions as a semiconductor (also referred to as an atomic layer material, a two-dimensional material, etc.) as the semiconductor material. In particular, it is suitable to use a layer material that functions as a semiconductor as the semiconductor material.

[0361] Here, in this specification and the like, the layered material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via a bond weaker than covalent bonds or ionic bonds, such as van der Waals forces. The layered material has high electrical conductivity within the unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-current can be provided.

[0362] Examples of the layered material include graphene, silicene, and chalcogenides. A chalcogenide is a compound containing a chalcogen. Also, chalcogen is a general term for elements belonging to Group 16, including oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.

[0363] As the oxide 230, for example, it is preferable to use a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides applicable as the oxide 230 include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), and the like.

[0364] <Application Examples of Semiconductor Devices> Hereinafter, an example of a semiconductor device according to one aspect of the present invention will be described with reference to FIG. 11.

[0365] FIG. 11A shows a top view of the semiconductor device 500. The x-axis shown in FIG. 11A is taken parallel to the channel length direction of the transistor 200, and the y-axis is taken perpendicular to the x-axis. Further, FIG. 11B is a cross-sectional view corresponding to the portion indicated by the dashed line A1 - A2 shown in FIG. 11A, and is also a cross-sectional view in the channel length direction of the transistor 200. FIG. 11C is a cross-sectional view corresponding to the portion indicated by the dashed line A3 - A4 shown in FIG. 11A, and is also a cross-sectional view of the opening region 400 and its vicinity. Note that in the top view of FIG. 11A, some elements are omitted for clarity of the figure.

[0366] In the semiconductor device shown in FIGS. 11A to 11C, structures having the same functions as the structures constituting the semiconductor device shown in <Configuration Example of Semiconductor Device> are assigned the same reference numerals. Note that also in this section, as the constituent materials of the semiconductor device, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0367] The semiconductor device 500 shown in FIGS. 11A to 11C is a modified example of the semiconductor device shown in FIGS. 8A to 8D. The semiconductor device 500 shown in FIGS. 11A to 11C is different from the semiconductor device shown in FIGS. 8A to 8D in that the opening region 400 is formed in the insulator 282 and the insulator 280. Further, the semiconductor device 500 shown in FIGS. 11A to 11C is different from the semiconductor device shown in FIGS. 8A to 8D in that the sealing portion 265 is formed so as to surround the plurality of transistors 200.

[0368] The semiconductor device 500 has a plurality of transistors 200 and a plurality of opening regions 400 arranged in a matrix. Further, a plurality of conductors 260 that function as gate electrodes of the transistors 200 are provided to extend in the y-axis direction. The opening region 400 is formed in the oxide 230 and a region that does not overlap with the conductor 260. Further, a sealing portion 265 is formed so as to surround the plurality of transistors 200, the plurality of conductors 260, and the plurality of opening regions 400. Note that the number, arrangement, and size of the transistors 200, the conductors 260, and the opening regions 400 are not limited to the structures shown in FIGS. 11A to 11C, and may be appropriately set according to the design of the semiconductor device 500.

[0369] As shown in FIGS. 11B and 11C, the sealing portion 265 is provided so as to surround a plurality of transistors 200, insulators 216, 222, 275, 280, and 282. In other words, the insulator 283 is provided so as to cover the insulators 216, 222, 275, 280, and 282. Further, in the sealing portion 265, the insulator 283 is in contact with the upper surface of the insulator 214. Further, on the sealing portion 265, an insulator 274 is provided between the insulator 283 and the insulator 285. The upper surface of the insulator 274 is substantially flush with the uppermost surface of the insulator 283. Further, as the insulator 274, an insulator similar to the insulator 280 can be used.

[0370] With such a structure, a plurality of transistors 200 can be wrapped (sealed) with the insulator 283, the insulator 214, and the insulator 212. Here, one or more of the insulator 283, the insulator 214, and the insulator 212 preferably function as a hydrogen barrier insulating film. Thereby, it is possible to suppress hydrogen contained outside the region surrounded by the sealing portion 265 from mixing into the region surrounded by the sealing portion 265. The insulator 283, the insulator 214, and the insulator 212 having such a function may be referred to as a sealing film.

[0371] As shown in FIG. 11C, in the opening region 400, the insulator 282 has an opening. Further, in the opening region 400, the insulator 280 may overlap the opening of the insulator 282 and have a groove portion. The depth of the groove portion of the insulator 280 only needs to be deep enough to expose the upper surface of the insulator 275, for example, about 1 / 4 or more and 1 / 2 or less of the maximum film thickness of the insulator 280.

[0372] Also, as shown in FIG. 11C, the insulator 283 contacts the side surface of the insulator 282, the side surface of the insulator 280, and the upper surface of the insulator 280 inside the opening region 400. Further, a part of the insulator 274 may be formed so as to fill the recess formed in the insulator 283 within the opening region 400. At this time, the upper surface of the insulator 274 formed within the opening region 400 and the uppermost surface of the insulator 283 may be substantially flush.

[0373] With such an opening region 400 formed and the insulator 280 exposed from the opening of the insulator 282, by performing a heat treatment, while supplying oxygen to the oxide 230, a part of the oxygen contained in the insulator 280 can be diffused outward from the opening region 400. Thereby, sufficient oxygen can be supplied from the insulator 280 containing oxygen desorbed by heating to the region functioning as the channel formation region in the oxide semiconductor and its vicinity, and an excessive amount of oxygen can be prevented from being supplied.

[0374] At this time, the hydrogen contained in the insulator 280 can be combined with oxygen and released to the outside through the opening region 400. The hydrogen combined with oxygen is released as water. Therefore, the hydrogen contained in the insulator 280 can be reduced, and the mixing of the hydrogen contained in the insulator 280 into the oxide 230 can be reduced.

[0375] Also, in FIG. 11A, the shape of the opening region 400 in a top view is substantially rectangular, but the present invention is not limited to this. For example, the shape of the opening region 400 in a top view may be rectangular, elliptical, circular, rhombic, or a combination thereof. Further, the area and the arrangement interval of the opening region 400 can be appropriately set according to the design of the semiconductor device including the transistor 200. For example, in a region where the density of the transistor 200 is low, the area of the opening region 400 may be increased or the arrangement interval of the opening region 400 may be narrowed. Also, for example, in a region where the density of the transistor 200 is high, the area of the opening region 400 may be decreased or the arrangement interval of the opening region 400 may be widened.

[0376] <Method for manufacturing semiconductor device> Next, a method for manufacturing a semiconductor device according to an aspect of the present invention, shown in FIGS. 8A to 8D, will be described with reference to FIGS. 12A to 17D.

[0377] In each figure, A shows a top view. Also, B in each figure is a cross-sectional view corresponding to the portion indicated by the one-dot chain line A1 - A2 in A of each figure, and is also a cross-sectional view in the channel length direction of the transistor 200. Further, C in each figure is a cross-sectional view corresponding to the portion indicated by the one-dot chain line A3 - A4 in A of each figure, and is also a cross-sectional view in the channel width direction of the transistor 200. Also, D in each figure is a cross-sectional view of the portion indicated by the one-dot chain line A5 - A6 in A of each figure. Note that in the top view of A in each figure, some elements are omitted for clarity of the figure.

[0378] Hereinafter, an insulating material for forming an insulator, a conductive material for forming a conductor, or a semiconductor material for forming a semiconductor can be formed into a film by appropriately using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0379] Note that the sputtering method includes an RF sputtering method using a high-frequency power source for the sputtering power source, a DC sputtering method using a DC power source, and a pulsed DC sputtering method in which the voltage applied to the electrode is changed pulsingly. The RF sputtering method is mainly used when forming an insulating film, and the DC sputtering method is mainly used when forming a metal conductive film. Also, the pulsed DC sputtering method is mainly used when forming a compound such as an oxide, a nitride, or a carbide by a reactive sputtering method.

[0380] Note that the CVD method can be classified into a plasma CVD (PECVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, a photo CVD (Photo CVD) method using light, and the like. Further, it can be divided into a metal CVD (MCVD: Metal CVD) method and a metal organic CVD (MOCVD: Metal Organic CVD) method according to the source gas used.

[0381] In the plasma CVD method, a high-quality film can be obtained at a relatively low temperature. Also, since the thermal CVD method does not use plasma, it is a film-forming method capable of reducing plasma damage to the object to be processed. For example, wirings, electrodes, elements (such as transistors and capacitor elements) included in a semiconductor device may be charged up by receiving charges from plasma. At this time, the wirings, electrodes, elements, etc. included in the semiconductor device may be damaged by the accumulated charges. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of the semiconductor device can be increased. Also, in the thermal CVD method, since plasma damage does not occur during film formation, a film with few defects can be obtained.

[0382] Also, as the ALD method, a thermal ALD method that performs the reaction of the precursor and the reactant only with thermal energy, a PEALD method that uses a plasma-excited reactant, etc. can be used.

[0383] The CVD method and the ALD method are different from the sputtering method in which particles emitted from a target or the like are deposited. Therefore, it is a film-forming method that is hardly affected by the shape of the object to be processed and has good step coverage. In particular, the ALD method is suitable for covering the surface of an opening with a high aspect ratio because it has excellent step coverage and excellent thickness uniformity. However, since the ALD method has a relatively slow film-forming rate, it may be preferably used in combination with other film-forming methods such as the CVD method with a high film-forming rate in some cases.

[0384] Also, in the CVD method, a film with an arbitrary composition can be formed depending on the flow rate ratio of the source gases. For example, in the CVD method, a film with a continuously changing composition can be formed by changing the flow rate ratio of the source gases while forming the film. When forming a film while changing the flow rate ratio of the source gases, the time required for film formation can be shortened because it does not require the time for transportation or pressure adjustment compared to the case of forming a film using a plurality of film-forming chambers. Therefore, the productivity of the semiconductor device may be increased in some cases.

[0385] In addition, in the ALD method, a film with an arbitrary composition can be formed by simultaneously introducing a plurality of different types of precursors. Alternatively, when introducing a plurality of different types of precursors, a film with an arbitrary composition can be formed by controlling the number of cycles of each precursor.

[0386] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (see FIGS. 12A to 12D). The formation of the insulator 212 is preferably performed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen as a film-forming gas, the hydrogen concentration in the insulator 212 can be reduced. However, the formation of the insulator 212 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used. In the present embodiment, as the insulator 212, silicon nitride is formed by a pulsed DC sputtering method using a silicon target in an atmosphere containing nitrogen gas.

[0387] By using an insulator such as silicon nitride through which impurities such as water and hydrogen hardly permeate, the diffusion of impurities such as water and hydrogen contained in the lower layer than the insulator 212 can be suppressed. Further, by using an insulator such as silicon nitride as the insulator 212 through which copper hardly permeates, even if a metal such as copper that easily diffuses is used for the conductor in the lower layer (not shown) than the insulator 212, the diffusion of the metal upward through the insulator 212 can be suppressed.

[0388] Next, an insulator 214 is formed on the insulator 212 (see FIGS. 12A to 12D). The formation of the insulator 214 is preferably performed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen as a film formation gas, the hydrogen concentration in the insulator 214 can be reduced. However, the formation of the insulator 214 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used. In the present embodiment, as the insulator 214, aluminum oxide is formed by a pulsed DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.

[0389] As the insulator 214, it is preferable to use a metal oxide having an amorphous structure, such as aluminum oxide, which has a high function of capturing or fixing hydrogen. Thereby, hydrogen contained in the insulator 216 or the like can be captured or fixed, and the diffusion of the hydrogen into the oxide 230 can be prevented. In particular, as the insulator 214, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide of an amorphous structure because hydrogen can be more effectively captured or fixed in some cases. Thereby, a transistor 200 and a semiconductor device having good characteristics and high reliability can be manufactured.

[0390] Next, an insulator 216 is formed on the insulator 214. The formation of the insulator 216 is preferably performed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen as a film formation gas, the hydrogen concentration in the insulator 216 can be reduced. However, the formation of the insulator 216 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used. In the present embodiment, as the insulator 216, silicon oxide is formed by a pulsed DC sputtering method using a silicon target in an atmosphere containing oxygen gas.

[0391] The insulator 212, the insulator 214, and the insulator 216 are preferably formed continuously without being exposed to the atmosphere. For example, a multi-chamber film forming apparatus may be used. Thereby, the insulator 212, the insulator 214, and the insulator 216 can be formed while reducing hydrogen in the film, and further, the mixing of hydrogen into the film during the intervals of the respective film forming steps can be reduced.

[0392] Next, an opening reaching the insulator 214 is formed in the insulator 216. The opening includes, for example, a groove, a slit, etc. Also, when referring to the region where the opening is formed as an opening portion. The opening may be formed using wet etching, but dry etching is more preferable for microfabrication. Further, it is preferable to select the insulator 214 as an etching stopper film when forming a groove by etching the insulator 216. For example, when silicon oxide or silicon oxynitride is used for the insulator 216 forming the groove, the insulator 214 may use silicon nitride, aluminum oxide, or hafnium oxide.

[0393] As the dry etching apparatus, a capacitively coupled plasma (CCP) etching apparatus having parallel plate electrodes can be used. The capacitively coupled plasma etching apparatus having parallel plate electrodes may be configured to apply a high-frequency voltage to one of the parallel plate electrodes. Or it may be configured to apply a plurality of different high-frequency voltages to one of the parallel plate electrodes. Or it may be configured to apply high-frequency voltages of the same frequency to each of the parallel plate electrodes. Or it may be configured to apply high-frequency voltages of different frequencies to each of the parallel plate electrodes. Or a dry etching apparatus having a high-density plasma source can be used. The dry etching apparatus having a high-density plasma source can use, for example, an inductively coupled plasma (ICP) etching apparatus or the like.

[0394] After forming the opening, a conductive film that becomes the conductor 205a is formed. It is desirable that the conductive film contains a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. Alternatively, it can be a laminated film of a conductor having a function of suppressing oxygen permeation and tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, etc. The formation of the conductive film can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0395] In this embodiment, titanium nitride is formed as the conductive film that becomes the conductor 205a. By using such a metal nitride as the lower layer of the conductor 205b, it is possible to suppress the oxidation of the conductor 205b by the insulator 216 or the like. Also, even if a metal such as copper that is easy to diffuse is used as the conductor 205b, it is possible to prevent the metal from diffusing out from the conductor 205a.

[0396] Next, a conductive film that becomes the conductor 205b is formed. As the conductive film, tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, etc. can be used. The formation of the conductive film can be performed using a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, tungsten is formed as the conductive film.

[0397] Next, by performing CMP processing, a part of the conductive film that becomes the conductor 205a and the conductive film that becomes the conductor 205b are removed to expose the insulator 216 (see FIGS. 12A to 12D). As a result, only in the opening, the conductor 205a and the conductor 205b remain. Note that a part of the insulator 216 may be removed by the CMP processing.

[0398] Next, an insulator 222 is formed on the insulator 216 and the conductor 205 (see FIGS. 12A to 12D). As the insulator 222, an insulator containing one or both of oxides of aluminum and hafnium may be formed. Note that, as the insulator containing one or both of oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. Alternatively, it is preferable to use hafnium zirconium oxide. The insulator containing one or both of oxides of aluminum and hafnium has barrier properties against oxygen, hydrogen, and water. Since the insulator 222 has barrier properties against hydrogen and water, hydrogen and water contained in the structure provided around the transistor 200 are suppressed from diffusing into the inside of the transistor 200 through the insulator 222, and generation of oxygen vacancies in the oxide 230 can be suppressed.

[0399] The formation of the insulator 222 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, hafnium oxide is formed as the insulator 222 using the ALD method.

[0400] Subsequently, heat treatment is preferably performed. The heat treatment may be performed at 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when performing heat treatment in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be set to about 20%. Further, the heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere of nitrogen gas or an inert gas and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen.

[0401] Also, the gas used in the heat treatment is preferably highly purified. For example, the moisture content in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent moisture and the like from being incorporated into the insulator 222 as much as possible.

[0402] Next, an insulating film 224A is formed on the insulator 222 (see FIGS. 12A to 12D). The insulating film 224A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, as the insulating film 224A, silicon oxide is formed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen in the film-forming gas, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A comes into contact with the oxide 230a in a later process, it is preferable that the hydrogen concentration is reduced in this way.

[0403] Next, an oxide film 230A and an oxide film 230B are sequentially formed on the insulating film 224A (see FIGS. 12A to 12D). Note that it is preferable to form the oxide film 230A and the oxide film 230B continuously without exposing them to the atmospheric environment. By forming the films without opening to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230A and the oxide film 230B, and it is possible to keep the vicinity of the interface between the oxide film 230A and the oxide film 230B clean.

[0404] The oxide film 230A and the oxide film 230B can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, the oxide film 230A and the oxide film 230B are formed using a sputtering method.

[0405] For example, when forming the oxide films 230A and 230B by sputtering, oxygen or a mixed gas of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. Further, when forming the above oxide film by sputtering, the above In-M-Zn oxide target or the like can be used.

[0406] In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulating film 224A. Therefore, the proportion of oxygen contained in the sputtering gas may be 70% or more, preferably 80% or more, more preferably 100%.

[0407] Also, when forming the oxide film 230B by sputtering, if the proportion of oxygen contained in the sputtering gas is more than 30% and 100% or less, preferably 70% or more and 100% or less, an oxygen-excess type oxide semiconductor is formed. A transistor using an oxygen-excess type oxide semiconductor in the channel formation region can obtain relatively high reliability. However, one aspect of the present invention is not limited to this. When forming the oxide film 230B by sputtering, if the proportion of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less, an oxygen-deficient type oxide semiconductor is formed. A transistor using an oxygen-deficient type oxide semiconductor in the channel formation region can obtain relatively high field-effect mobility. Further, by performing film formation while heating the substrate, the crystallinity of the oxide film can be improved.

[0408] In this embodiment, the oxide film 230A is formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:4. Also, the oxide film 230B is formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 4:2:4.1, an oxide target with an atomic ratio of In:Ga:Zn = 1:1:1, or an oxide target with an atomic ratio of In:Ga:Zn = 1:1:2. Note that each oxide film may be formed according to the characteristics required for the oxide 230a and the oxide 230b by appropriately selecting the film formation conditions and the atomic ratio.

[0409] Note that it is preferable to continuously form the insulating film 224A, the oxide film 230A, and the oxide film 230B by a sputtering method without exposing them to the atmosphere. For example, a multi-chamber type film formation apparatus may be used. Thereby, it is possible to reduce the incorporation of hydrogen into the film during the intervals of each film formation step for the insulating film 224A, the oxide film 230A, and the oxide film 230B.

[0410] The oxide film 230A and the oxide film 230B may be formed using the ALD method. Here, the film formation method of the oxide film 230A and the oxide film 230B using the ALD method will be described. Note that since the film formation method using the ALD method has also been described in the previous embodiment, the different parts will be mainly described, and for the common parts, the description of the previous embodiment can be referred to.

[0411] The In-M-Zn oxide that can be used for the oxide film 230A and the oxide film 230B tends to have a layered crystal structure in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter, (M,Zn) layer) are laminated. Note that the number of (M,Zn) layers contained between two In layers is correlated with the composition of the In-M-Zn oxide. For example, when the composition is In:M:Zn = 1:1:m, the number of (M,Zn) layers contained between two In layers tends to be (m + 1) layers.

[0412] As an example of the method for forming the oxide films 230A and 230B using ALD, the method for forming an In-M-Zn oxide film will be described with reference to FIG. 6C. FIG. 6C shows an example of a film formation sequence for forming a film using precursors 411 to 413 and an oxidizing gas 414. The film formation sequence includes steps S11 to S13.

[0413] As the precursor 411, a precursor containing indium can be used. As the precursor 412, a precursor containing element M can be used. As the precursor 413, a precursor containing zinc can be used. Each of the precursors 411 to 413 may be an inorganic precursor or an organic precursor. As the oxidizing gas 414, a gas applicable to the oxidizing gas described in the previous embodiment can be used.

[0414] First, step S11 is performed. In step S11, the precursor 411 is introduced to adsorb the precursor having indium onto the surface to be formed, the introduction of the precursor 411 is stopped, and the excess precursor 411 in the chamber is purged. Then, the oxidizing gas 414 is introduced to oxidize the precursor 411 to form an In layer. After that, the introduction of the oxidizing gas 414 is stopped, and the excess oxidizing gas 414 in the chamber is purged. These steps are performed in sequence.

[0415] Next, step S12 is performed. In step S12, the precursor 412 is introduced to adsorb the precursor having element M onto the surface of the In layer, the introduction of the precursor 412 is stopped, and the excess precursor 412 in the chamber is purged. Then, the oxidizing gas 414 is introduced to oxidize the precursor 412 to form a layer having element M and oxygen (hereinafter referred to as the M layer). After that, the oxidizing gas 414 is stopped, and the excess oxidizing gas 414 in the chamber is purged. These steps are performed in sequence.

[0416] Next, step S13 is performed. In step S13, a precursor 413 is introduced, and a precursor having zinc is adsorbed on the surface of the M layer. Then, the introduction of the precursor 413 is stopped, and the excess precursor 413 in the chamber is purged. Next, an oxidizing gas 414 is introduced to oxidize the precursor 413 to form a layer having zinc (Zn) and oxygen (hereinafter referred to as the Zn layer). Then, the introduction of the oxidizing gas 414 is stopped, and the excess oxidizing gas 414 in the chamber is purged. These steps are performed in order.

[0417] Taking steps S11 to S13 as one cycle, by repeating the cycle, an In-M-Zn oxide with a desired film thickness can be formed. During or after film formation, heat treatment may cause elements M or Zn to mix into the In layer. Also, In or Zn may mix into the M layer. Additionally, In or Ga may mix into the Zn layer.

[0418] Note that the number of times steps S11 to S13 are performed in one cycle is not limited to once. The number of times steps S11 to S13 are performed in one cycle may be set respectively so that an In-M-Zn oxide with a desired composition can be obtained. For example, when forming an In-M-Zn oxide with an atomic ratio of In:M:Zn = 1:1:2, steps S11, S13, S12, and S13 can be taken as one cycle and the cycle can be repeated. Also, for example, an In-Zn oxide can be formed by repeating the cycle composed of steps S11 and S12. In the step of introducing the precursor 412 in step S12, the precursor 413 can also be introduced simultaneously to form an (M,Zn) layer in step S12. In the step of introducing the precursor 411 in step S11, the precursor 412 or the precursor 413 can also be introduced simultaneously to form an In layer containing element M or Zn in step S11. By appropriately combining these, the desired oxide films 230A and 230B can be formed.

[0419] In addition, the manufacturing apparatus used for film formation by ALD method can refer to the description of the previous embodiment. By forming the oxide film 230A, the oxide film 230B, and the ferroelectric layer by ALD method, the manufacturing apparatus can be made common. Further, when manufacturing the element shown in FIG. 7B2, after forming the oxide film 230A and the oxide film 230B, by switching the precursor and the oxidizing gas, the insulator 130 can be continuously formed on the oxide film 230B. Therefore, the oxide film 230B and the insulator 130 can be formed without exposing to the atmosphere, and the vicinity of the interface between the oxide film 230B and the insulator 130 can be kept clean.

[0420] In addition, two or more manufacturing apparatuses used for film formation by ALD method may be incorporated into a multi-chamber type film formation apparatus. At this time, by setting to form the oxide film 230A, the oxide film 230B, and the ferroelectric layer with different manufacturing apparatuses, the oxide film 230A, the oxide film 230B, and the ferroelectric layer can be continuously formed without switching the precursor and the oxidizing gas.

[0421] Next, it is preferable to perform heat treatment. The heat treatment may be performed in a temperature range in which the oxide film 230A and the oxide film 230B do not crystallize, and may be performed at 250°C or higher and 650°C or lower, preferably 400°C or higher and 600°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas. For example, when performing heat treatment in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be set to about 20%. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas to supplement the desorbed oxygen after performing heat treatment in an atmosphere of nitrogen gas or inert gas.

[0422] Also, the gas used in the above heat treatment is preferably highly purified. For example, the moisture content in the gas used in the above heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent moisture and the like from being incorporated into the oxide film 230A, the oxide film 230B, and the like as much as possible.

[0423] By performing the heat treatment, hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B moves to the insulator 222 and is absorbed into the insulator 222. In other words, hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B diffuses into the insulator 222. Therefore, the hydrogen concentration of the insulator 222 increases, but the hydrogen concentrations in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B each decrease.

[0424] In particular, the insulating film 224A functions as a gate insulator of the transistor 200, and the oxide films 230A and 230B function as channel formation regions of the transistor 200. Therefore, the transistor 200 having the insulating film 224A, the oxide films 230A and 230B with reduced hydrogen concentration is preferable because it has good reliability.

[0425] Next, a conductive film 242A is formed on the oxide film 230B (see FIGS. 12A to 12D). The formation of the conductive film 242A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, as the conductive film 242A, tantalum nitride may be formed using a sputtering method. Note that a heat treatment may be performed before the formation of the conductive film 242A. The heat treatment is performed under reduced pressure, and the conductive film 242A may be continuously formed without being exposed to the atmosphere. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the oxide film 230B can be removed, and further, the moisture concentration and hydrogen concentration in the oxide film 230A and the oxide film 230B can be reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the temperature of the heat treatment is set to 200° C.

[0426] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 12A to 12D). The formation of the insulating film 271A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. As the insulating film 271A, an insulating film having a function of suppressing oxygen permeation is preferably used. For example, as the insulating film 271A, aluminum oxide or silicon nitride may be formed by a sputtering method.

[0427] Note that it is preferable to continuously form the conductive film 242A and the insulating film 271A by a sputtering method without exposing them to the atmosphere. For example, a multi-chamber type film forming apparatus may be used. Thereby, the conductive film 242A and the insulating film 271A can be formed while reducing hydrogen in the film, and further, the entry of hydrogen into the film during the intervals between the respective film forming steps can be reduced. Also, when a hard mask is provided on the insulating film 271A, the film serving as the hard mask may be continuously formed without being exposed to the atmosphere.

[0428] Next, using a lithography method, the insulating film 224A, oxide film 230A, oxide film 230B, conductive film 242A, and insulating film 271A are processed into island shapes to form the insulator 224, oxide 230a, oxide 230b, conductive layer 242B, and insulating layer 271B (see FIGS. 13A to 13D). Here, the insulator 224, oxide 230a, oxide 230b, conductive layer 242B, and insulating layer 271B are formed so as to overlap at least partially with the conductor 205. The above processing can use a dry etching method or a wet etching method. Processing by the dry etching method is suitable for microfabrication. Also, the processing of the insulating film 224A, oxide film 230A, oxide film 230B, conductive film 242A, and insulating film 271A may be performed under different conditions respectively.

[0429] In the lithography method, first, the resist is exposed through a mask. Next, the exposed area is removed or left intact using a developer to form a resist mask. Next, by performing an etching process through the resist mask, conductors, semiconductors, insulators, etc. can be processed into a desired shape. For example, a resist mask may be formed by exposing the resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, etc. Also, a liquid immersion technique may be used in which a liquid (e.g., water) is filled between the substrate and the projection lens for exposure. Also, instead of the light described above, an electron beam or an ion beam may be used. Note that when an electron beam or an ion beam is used, a mask is not required. The resist mask can be removed by performing a dry etching process such as ashing, performing a wet etching process, performing a wet etching process after a dry etching process, or performing a dry etching process after a wet etching process.

[0430] Furthermore, a hard mask made of an insulator or a conductor may be used under the resist mask. When using a hard mask, an insulating film or a conductive film serving as a hard mask material is formed on the conductive film 242A, a resist mask is formed thereon, and a hard mask having a desired shape can be formed by etching the hard mask material. Etching of the conductive film 242A or the like may be performed after removing the resist mask, or may be performed with the resist mask remaining. In the latter case, the resist mask may disappear during etching. The hard mask may be removed by etching after etching the conductive film 242A or the like. On the other hand, if the material of the hard mask has no influence on the subsequent process or can be used in the subsequent process, it is not always necessary to remove the hard mask. In the present embodiment, the insulating layer 271B is used as a hard mask.

[0431] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, as shown in FIGS. 13B to 13D, the conductive layer 242B does not have a curved surface between the side surface and the upper surface. As a result, the ends where the side surfaces and the upper surfaces of the conductors 242a and 242b shown in FIGS. 8B and 8D intersect are angular. Since the ends where the side surfaces and the upper surfaces of the conductor 242 intersect are angular, the cross-sectional area of the conductor 242 is larger than when the ends have a curved surface. As a result, the resistance of the conductor 242 is reduced, so that the on-current of the transistor 200 can be increased.

[0432] Also, as shown in FIGS. 13B to 13D, the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be tapered. In this specification and the like, the tapered shape refers to a shape in which at least a part of the side surface of the structure is provided inclined with respect to the substrate surface. For example, it is preferable that the angle formed by the inclined side surface and the substrate surface (hereinafter sometimes referred to as the taper angle) is less than 90°. The insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be formed, for example, so that the taper angle is 60° or more and less than 90°. By tapering the side surfaces in this way, the covering property of the insulator 275 and the like can be improved in subsequent processes, and defects such as looseness can be reduced.

[0433] However, the present invention is not limited to the above, and the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be configured to be substantially perpendicular to the upper surface of the insulator 222. By adopting such a configuration, when a plurality of transistors 200 are provided, it is possible to reduce the area and increase the density.

[0434] In addition, by-products generated in the etching process may be formed in layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B. In this case, the layered by-products will be formed between the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B and the insulator 275. Therefore, it is preferable to remove the layered by-products formed in contact with the upper surface of the insulator 222.

[0435] Next, an insulator 275 is formed to cover the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B. Here, it is preferable that the insulator 275 is in close contact with the upper surface of the insulator 222 and the side surface of the insulator 224. The formation of the insulator 275 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. It is preferable to use an insulating film having a function of suppressing oxygen permeation as the insulator 275. For example, as the insulator 275, aluminum oxide can be formed using a sputtering method, and then silicon nitride can be formed thereon using a PEALD method. By forming the insulator 275 into such a laminated structure, the function of suppressing the diffusion of impurities such as water and hydrogen and oxygen may be improved.

[0436] In this way, the oxide 230a, the oxide 230b, and the conductive layer 242B can be covered with the insulator 275 and the insulating layer 271B having a function of suppressing oxygen diffusion. Thereby, in a subsequent process, it is possible to reduce the direct diffusion of oxygen from the insulator 280 or the like into the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B.

[0437] Next, an insulating film that becomes the insulator 280 is formed on the insulator 275. The formation of the insulating film can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, as the insulating film, a silicon oxide film may be formed using a sputtering method. By forming the insulating film in an atmosphere containing oxygen by a sputtering method, an insulator 280 containing excess oxygen can be formed. Also, by using a sputtering method that does not require a molecule containing hydrogen in the film-forming gas, the hydrogen concentration in the insulator 280 can be reduced. Note that a heat treatment may be performed before the formation of the insulating film. The heat treatment is performed under reduced pressure, and the insulating film may be continuously formed without being exposed to the atmosphere. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the insulator 275 and the like can be removed, and further, the moisture concentration and hydrogen concentration in the oxide 230a, the oxide 230b, and the insulator 224 can be reduced. The above-described heat treatment conditions can be used for the heat treatment.

[0438] Also, for example, the insulator 280 may have a laminated structure of silicon oxide formed by a sputtering method and silicon oxynitride formed by a CVD method laminated thereon. Further, silicon nitride may be laminated thereon.

[0439] Next, a CMP process is performed on the insulating film that becomes the insulator 280 to form an insulator 280 having a flat upper surface. Note that, for example, a silicon nitride film may be formed on the insulator 280 by a sputtering method, and the CMP process may be performed until the silicon nitride reaches the insulator 280.

[0440] Next, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B are processed to form an opening that reaches the oxide 230b. The opening is preferably formed so as to overlap with the conductor 205. By forming the opening, an insulator 271a, an insulator 271b, a conductor 242a, and a conductor 242b are formed (see FIGS. 14A to 14D).

[0441] Here, as shown in FIGS. 14B and 14C, the side surfaces of the insulator 280, the insulator 275, the insulator 271, and the conductor 242 may be tapered. Also, the taper angle of the insulator 280 may be larger than the taper angle of the conductor 242. Although not shown in FIGS. 14A to 14C, when forming the above opening, the upper portion of the oxide 230b may be removed.

[0442] Also, for the processing of a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B, a dry etching method or a wet etching method can be used. Processing by the dry etching method is suitable for microfabrication. Also, the processing may be performed under different conditions. For example, a part of the insulator 280 may be processed by the dry etching method, a part of the insulator 275 and a part of the insulating layer 271B may be processed by the wet etching method, and a part of the conductive layer 242B may be processed by the dry etching method.

[0443] Here, there may be adhesion of impurities to the side surfaces of the oxide 230a, the upper and side surfaces of the oxide 230b, the side surface of the conductor 242, the side surface of the insulator 280, etc., or diffusion of the impurities into these. A step of removing such impurities may be performed. Also, when the dry etching is performed, a damaged region may be formed on the surface of the oxide 230b. Such a damaged region may be removed. Examples of such impurities include those resulting from components contained in the insulator 280, the insulator 275, a part of the insulating layer 271B, and the conductive layer 242B, components contained in members used in the apparatus used when forming the above opening, and components contained in the gas or liquid used for etching. Examples of such impurities include hafnium, aluminum, silicon, tantalum, fluorine, chlorine, etc.

[0444] In particular, impurities such as aluminum or silicon inhibit the CAAC-OS conversion of the oxide 230b. Therefore, it is preferable that impurity elements that inhibit CAAC-OS conversion, such as aluminum or silicon, are reduced or removed. For example, the concentration of aluminum atoms in the oxide 230b and in its vicinity may be 5.0 atomic% or less, preferably 2.0 atomic% or less, more preferably 1.5 atomic% or less, still more preferably 1.0 atomic% or less, and even more preferably less than 0.3 atomic%.

[0445] Note that a region of a metal oxide in which CAAC-OS conversion is inhibited by impurities such as aluminum or silicon and which becomes a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor) may be referred to as a non-CAAC region. In the non-CAAC region, since the density of the crystal structure is reduced, a large amount of V O H is formed, and the transistor is likely to be normally turned on. Therefore, it is preferable that the non-CAAC region of the oxide 230b is reduced or removed.

[0446] On the other hand, it is preferable that the oxide 230b has a layered CAAC structure. In particular, it is preferable that the oxide 230b has a CAAC structure up to the lower end of the drain. Here, in the transistor 200, the conductor 242a or the conductor 242b and its vicinity function as a drain. That is, it is preferable that the oxide 230b in the vicinity of the lower end of the conductor 242a (conductor 242b) has a CAAC structure. In this way, even at the drain end that significantly affects the drain breakdown voltage, the damaged region of the oxide 230b is removed and having a CAAC structure can further suppress fluctuations in the electrical characteristics of the transistor 200. In addition, the reliability of the transistor 200 can be improved.

[0447] To remove impurities and the like adhering to the surface of the oxide 230b in the above etching process, a cleaning process is performed. As the cleaning method, wet cleaning using a cleaning solution or the like (which can also be called wet etching treatment), plasma treatment using plasma, cleaning by heat treatment, etc. are available, and the above cleaning may be appropriately combined. Note that the groove portion may become deeper due to the cleaning process.

[0448] As the wet cleaning, it may be performed using an aqueous solution obtained by diluting ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. with carbonated water or pure water, pure water, carbonated water, etc. Alternatively, ultrasonic cleaning using these aqueous solutions, pure water, or carbonated water may be performed. Alternatively, these cleanings may be appropriately combined.

[0449] In this specification etc., an aqueous solution obtained by diluting hydrofluoric acid with pure water may be called diluted hydrofluoric acid, and an aqueous solution obtained by diluting ammonia water with pure water may be called diluted ammonia water. Also, the concentration, temperature, etc. of the aqueous solution may be appropriately adjusted according to the impurities to be removed, the configuration of the semiconductor device to be cleaned, etc. The ammonia concentration of the diluted ammonia water may be 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less. Also, the hydrofluoric acid concentration of the diluted hydrofluoric acid may be 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.

[0450] Note that for ultrasonic cleaning, it is preferable to use a frequency of 200 kHz or more, and more preferably to use a frequency of 900 kHz or more. By using the frequency, damage to the oxide 230b etc. can be reduced.

[0451] Also, the above cleaning process may be performed multiple times, and the cleaning solution may be changed for each cleaning process. For example, as the first cleaning process, a process using diluted hydrofluoric acid or diluted ammonia water may be performed, and as the second cleaning process, a process using pure water or carbonated water may be performed.

[0452] As the above cleaning process, in the present embodiment, wet cleaning is performed using diluted aqueous ammonia. By performing this cleaning process, impurities adhering to the surface or diffused inside the oxide 230a, oxide 230b, etc. can be removed. Furthermore, the crystallinity of the oxide 230b can be enhanced.

[0453] After the above etching or after the above cleaning, a heat treatment may be performed. The heat treatment may be performed at 100°C or higher and 450°C or lower, preferably 350°C or higher and 400°C or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 230a and the oxide 230b to reduce oxygen deficiency. Also, by performing such a heat treatment, the crystallinity of the oxide 230b can be improved. Also, the heat treatment may be performed in a reduced pressure state. Or, after heat treatment in an oxygen atmosphere, heat treatment may be continuously performed in a nitrogen atmosphere without exposure to the atmosphere.

[0454] Next, an insulating film 252A is formed (see FIGS. 15A to 15D). The insulating film 252A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. It is preferable to form the insulating film 252A using the ALD method. As described above, it is preferable to form the insulating film 252A with a thin film thickness and to reduce the variation in film thickness. On the other hand, the ALD method is a film formation method in which a precursor and a reactant (for example, an oxidizing agent, etc.) are alternately introduced, and the film thickness can be adjusted by the number of times this cycle is repeated, so precise film thickness adjustment is possible. Also, as shown in FIGS. 15B and 15C, the insulating film 252A needs to be formed with good coverage on the bottom surface and the side surface of the opening formed in the insulator 280, etc. In particular, it is preferable to form the insulating film 252A with good coverage on the upper surface and the side surface of the oxide 230 and the side surface of the conductor 242. On the bottom surface and the side surface of the above opening, since atomic layers can be deposited one by one, the insulating film 252A can be formed with good coverage for the opening.

[0455] Also, when forming the insulating film 252A by ALD method, ozone (O3), oxygen (O2), water (H2O), etc. can be used as the oxidizing agent. By using ozone (O3), oxygen (O2), etc. that do not contain hydrogen as the oxidizing agent, the hydrogen diffusing into the oxide 230b can be reduced.

[0456] In this embodiment, aluminum oxide is formed as the insulating film 252A by thermal ALD method.

[0457] Next, it is preferable to perform microwave treatment in an oxygen-containing atmosphere. For the microwave treatment, it is preferable to use a microwave treatment apparatus having a power source for generating high-density plasma using microwaves, for example. Here, the frequency of the microwave treatment apparatus is 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less. For example, it may be set to 2.45 GHz. By using high-density plasma, high-density oxygen radicals can be generated. Also, the power of the power source for applying microwaves to the microwave treatment apparatus may be 1000 W or more and 10000 W or less, preferably 2000 W or more and 5000 W or less. Also, the microwave treatment apparatus may have a power source for applying RF to the substrate side. Also, by applying RF to the substrate side, the oxygen ions generated by high-density plasma can be efficiently introduced into the oxide 230b.

[0458] Also, the above microwave treatment is preferably performed under reduced pressure, and the pressure may be 10 Pa or more and 1000 Pa or less, preferably 300 Pa or more and 700 Pa or less. Also, the treatment temperature may be 750 °C or lower, preferably 500 °C or lower, for example, about 400 °C. Also, after performing the oxygen plasma treatment, heat treatment may be continuously performed without exposing to the outside air. For example, heat treatment may be performed at 100 °C or more and 750 °C or less, preferably 300 °C or more and 500 °C or less.

[0459] Further, for example, the above microwave treatment may be performed using oxygen gas and argon gas. Here, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 0% and 100% or less. Preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 0% and 50% or less. More preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be 10% or more and 40% or less. Even more preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be 10% or more and 30% or less. Thus, by performing the microwave treatment in an atmosphere containing oxygen, the carrier concentration in region 230bc can be reduced. Also, in the microwave treatment, by preventing an excessive amount of oxygen from being introduced into the chamber, it is possible to prevent the carrier concentration from decreasing excessively in regions 230ba and 230bb.

[0460] By performing the microwave treatment in an atmosphere containing oxygen, oxygen gas can be plasmaized using microwaves or high-frequency waves such as RF, and the oxygen plasma can be made to act on the region between conductor 242a and conductor 242b of oxide 230b. At this time, microwaves or high-frequency waves such as RF can also be irradiated to region 230bc. That is, microwaves, high-frequency oxygen plasma, etc. can be made to act on region 230bc. Due to the action of plasma, microwaves, etc., the V O H in region 230bc is split, and hydrogen can be removed from region 230bc. That is, in region 230bc, the reaction "V O H→H+V O " occurs, and the V O H contained in region 230bc can be reduced. Therefore, the oxygen deficiency and V O H in region 230bc can be reduced, and the carrier concentration can be decreased. Also, by supplying oxygen radicals generated by the oxygen plasma or oxygen contained in insulator 250 to the oxygen deficiency formed in region 230bc, the oxygen deficiency in region 230bc can be further reduced, and the carrier concentration can be decreased.

[0461] On one side, a conductor 242a and a conductor 242b are provided on a region 230ba and a region 230bb shown in FIG. 9A, respectively. Here, the conductor 242 preferably functions as a shielding film against the action of high-frequency waves such as microwaves and RF, and oxygen plasma when performing microwave treatment in an oxygen-containing atmosphere. For this reason, the conductor 242 preferably has a function of shielding electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less. By using such a conductor 242, by microwave treatment, in the regions 230ba and 230bb, V O The reduction of H and the generation of an excessive amount of oxygen supply do not occur, so that a decrease in the carrier concentration in the regions 230ba and 230bb can be prevented.

[0462] In addition, an insulator 252 having a barrier property against oxygen is provided in contact with the side surfaces of the conductor 242a and the conductor 242b. Thereby, the formation of an oxide film on the side surfaces of the conductor 242a and the conductor 242b by microwave treatment can be suppressed.

[0463] As described above, oxygen deficiency and V can be selectively removed in the region 230bc of the oxide semiconductor. O H can be removed to make the region 230bc of the i-type or substantially i-type. Further, the supply of excessive oxygen to the regions 230ba and 230bb functioning as the source region or the drain region can be suppressed, and the state of the n-type region before the microwave treatment can be maintained. Thereby, the variation in the electrical characteristics of the transistor 200 can be suppressed, and the variation in the electrical characteristics of the transistor 200 within the substrate surface can be suppressed.

[0464] Next, an insulating film 250A is formed (see FIGS. 15A to 15D). Heat treatment may be performed before forming the insulating film 250A. The heat treatment may be performed under reduced pressure, and the insulating film 250A may be continuously formed without being exposed to the atmosphere. Further, the heat treatment is preferably performed in an atmosphere containing oxygen. By performing such treatment, moisture and hydrogen adsorbed on the surface of the insulating film 252A and the like can be removed, and further, the moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b can be reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower.

[0465] The insulating film 250A can be formed using a sputtering method, a CVD method, a PECVD method, an MBE method, a PLD method, an ALD method, or the like. Further, the insulating film 250A is preferably formed by a film formation method using a gas in which hydrogen atoms are reduced or removed. Thereby, the hydrogen concentration of the insulating film 250A can be reduced. Since the insulating film 250A becomes an insulator 250 facing the oxide 230b via a thin insulator 252 in a later process, it is preferable that the hydrogen concentration is reduced in this way.

[0466] In the present embodiment, silicon oxynitride is formed as the insulating film 250A by the PECVD method.

[0467] Also, when the insulator 250 is formed into a two-layer stacked structure shown in FIG. 9B, an insulating film that will become the insulator 250b may be formed after the formation of the insulating film 250A. For the formation of the insulating film that will become the insulator 250b, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like can be used. The insulating film that will become the insulator 250b is preferably formed using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, it is possible to suppress the diffusion of oxygen contained in the insulator 250a to the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. In addition, it is possible to suppress the oxidation of the conductor 260 by the oxygen contained in the insulator 250a. The insulating film that will become the insulator 250b can be provided using the same material as the insulator 222. For example, hafnium oxide may be formed as the insulating film that will become the insulator 250b by thermal ALD method.

[0468] Microwave treatment may be performed after the formation of the insulating film 250A. The microwave treatment may use the microwave treatment conditions performed after the formation of the insulating film 252A described above. Also, instead of performing the microwave treatment after the formation of the insulating film 252A, microwave treatment may be performed after the formation of the insulating film 250A. Further, when the insulating film that will become the insulator 250b is provided as described above, microwave treatment may be performed after the formation of the insulating film 250A. The microwave treatment may use the microwave treatment conditions performed after the formation of the insulating film 252A described above. Also, instead of performing the microwave treatment after the formation of the insulating film 252A or the insulating film 250A, microwave treatment may be performed after the formation of the insulating film that will become the insulator 250b.

[0469] Also, after forming the insulating films 252A and 250A, and after forming the insulating film that becomes the insulator 250b, heat treatment may be performed while maintaining a reduced pressure state after each microwave treatment. By performing such a process, hydrogen in the insulating film 252A, the insulating film 250A, the insulating film that becomes the insulator 250b, the oxide 230b, and the oxide 230a can be efficiently removed. Also, a part of the hydrogen may be gettered by the conductor 242 (conductor 242a and conductor 242b). Alternatively, the step of performing heat treatment may be repeated a plurality of times while maintaining a reduced pressure state after the microwave treatment. By repeatedly performing the heat treatment, hydrogen in the insulating film 252A, the insulating film 250A, the insulating film that becomes the insulator 250b, the oxide 230b, and the oxide 230a can be removed more efficiently. Note that the heat treatment temperature is preferably 300°C or higher and 500°C or lower. Also, the above microwave treatment, that is, microwave annealing may also serve as the heat treatment. When the oxide 230b and the like are sufficiently heated by microwave annealing, the heat treatment may not be performed.

[0470] Also, by performing microwave treatment to modify the film quality of the insulating films 252A, 250A, and the insulating film that becomes the insulator 250b, diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, in a subsequent process such as forming a conductive film that becomes the conductor 260, or in a post-treatment such as heat treatment, diffusion of hydrogen, water, impurities, etc. through the insulator 252 into the oxide 230b, oxide 230a, etc. can be suppressed.

[0471] Next, the insulating film 254A is formed (see FIGS. 15A to 15D). For forming the insulating film 254A, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like can be used. The insulating film 254A is preferably formed using the ALD method in the same manner as the insulating film 252A. By using the ALD method, the insulating film 254A can be formed with a good coating property and a thin film thickness. In this embodiment, silicon nitride is formed as the insulating film 254A by the PEALD method.

[0472] Next, a conductive film to be the conductor 260a and a conductive film to be the conductor 260b are formed in sequence. The formation of the conductive film to be the conductor 260a and the conductive film to be the conductor 260b can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, using the ALD method, titanium nitride is formed as the conductive film to be the conductor 260a, and using the CVD method, tungsten is formed as the conductive film to be the conductor 260b.

[0473] Next, by polishing the insulating film 252A, the insulating film 250A, the insulating film 254A, the conductive film to be the conductor 260a, and the conductive film to be the conductor 260b by CMP processing until the insulator 280 is exposed, the insulator 252, the insulator 250, the insulator 254, and the conductor 260 (the conductor 260a and the conductor 260b) are formed (see FIGS. 16A to 16D). Thereby, the insulator 252 is disposed so as to cover the opening reaching the oxide 230b. Further, the conductor 260 is disposed so as to fill the opening through the insulator 252, the insulator 250, and the insulator 254.

[0474] Next, heat treatment may be performed under the same conditions as the above heat treatment. In the present embodiment, the treatment is performed at a temperature of 400°C for 1 hour in a nitrogen atmosphere. By this heat treatment, the moisture concentration and hydrogen concentration in the insulator 250 and the insulator 280 can be reduced. Note that after the above heat treatment, the film formation of the insulator 282 may be continuously performed without exposing to the atmosphere.

[0475] Next, an insulator 282 is formed on the insulator 252, on the insulator 250, on the insulator 254, on the conductor 260, and on the insulator 280 (see FIGS. 16A to 16D). The film formation of the insulator 282 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The film formation of the insulator 282 is preferably performed using a sputtering method. By using a sputtering method in which it is not necessary to use a molecule containing hydrogen as the film formation gas, the hydrogen concentration in the insulator 282 can be reduced.

[0476] In this embodiment, aluminum oxide is formed by pulsed DC sputtering using an aluminum target in an atmosphere containing oxygen gas as the insulator 282. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved.

[0477] Also, by forming the insulator 282 in an atmosphere containing oxygen using the sputtering method, oxygen can be added to the insulator 280 while forming the film. As a result, the insulator 280 can be made to contain excess oxygen. At this time, it is preferable to form the insulator 282 while heating the substrate.

[0478] Next, an etching mask is formed on the insulator 282 by lithography, and a part of the insulator 282, a part of the insulator 280, a part of the insulator 275, a part of the insulator 222, and a part of the insulator 216 are processed until the upper surface of the insulator 214 is exposed. The processing may use wet etching, but dry etching is more preferable for fine processing.

[0479] Next, heat treatment may be performed. The heat treatment may be performed at 250°C or higher and 650°C or lower, preferably 350°C or higher and 600°C or lower. Also, the heat treatment temperature is preferably lower than the heat treatment temperature performed after forming the oxide film 230B. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas. By performing the heat treatment, a part of the oxygen added to the insulator 280 diffuses into the oxide 230 through the insulator 250 or the like.

[0480] Also, by performing the heat treatment, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside from the side surface of the insulator 280 formed by processing the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216. Note that hydrogen bonded to oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.

[0481] Furthermore, in a region overlapping with the conductor 260 of the oxide 230, an insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230. Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the diffusion of an excessive amount of oxygen into the oxide 230. Thereby, oxygen can be supplied so that an excessive amount of oxygen is not supplied to the region 230bc and its vicinity. Thereby, while suppressing the oxidation of the side surface of the conductor 242 by excessive oxygen, oxygen deficiency and V O H formed in the region 230bc can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be enhanced.

[0482] On the other hand, when the transistors 200 are integrated at high density, the volume of the insulator 280 for one transistor 200 may become excessively small. In this case, in the above heat treatment, the amount of oxygen diffusing into the oxide 230 becomes significantly small. When the oxide 230 is heated in a state in which an insulating oxide (for example, the insulator 250 or the like) that does not sufficiently contain oxygen is in contact therewith, the oxygen constituting the oxide 230 may desorb. However, in the transistor 200 shown in the present embodiment, in a region overlapping with the conductor 260 of the oxide 230, an insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230. Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the desorption of oxygen from the oxide 230 even in the above heat treatment. Thereby, oxygen deficiency and V O H formed in the region 230bc can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be enhanced.

[0483] As described above, in the semiconductor device according to the present embodiment, a transistor having good electrical characteristics and good reliability can be formed regardless of whether the supply amount of oxygen from the insulator 280 is large or small. Therefore, it is possible to provide a semiconductor device in which variations in the electrical characteristics of the transistors 200 within the substrate surface are suppressed.

[0484] Next, an insulator 283 is formed on the insulator 282 (see FIGS. 17A to 17D). The film formation of the insulator 283 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The film formation of the insulator 283 is preferably performed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen as a film formation gas, the hydrogen concentration in the insulator 283 can be reduced. Further, the insulator 283 may be a multilayer. For example, silicon nitride may be formed by a sputtering method, and silicon nitride may be formed on the silicon nitride by an ALD method. By surrounding the transistor 200 with the insulator 283 having high barrier properties and the insulator 214, it is possible to prevent moisture and hydrogen from entering from the outside.

[0485] Next, an insulating film that becomes the insulator 274 is formed on the insulator 283. The film formation of the insulating film that becomes the insulator 274 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the present embodiment, silicon oxide is formed as the insulating film that becomes the insulator 274 by a CVD method.

[0486] Next, by CMP processing, the insulating film that becomes the insulator 274 is polished until the insulator 283 is exposed, thereby flattening the upper surface and forming the insulator 274 (see FIGS. 17A to 17D). By the CMP processing, a part of the upper surface of the insulator 283 may be removed.

[0487] Next, an insulator 285 is formed on the insulator 274 and on the insulator 283 (see FIGS. 8A to 8D). The film formation of the insulator 285 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The film formation of the insulator 285 is preferably performed using a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen as a film formation gas, the hydrogen concentration in the insulator 285 can be reduced.

[0488] In the present embodiment, silicon oxide is formed as the insulator 285 by a sputtering method.

[0489] As described above, a semiconductor device having the transistor 200 shown in FIGS. 8A to 8D can be manufactured. Further, as described above, by thoroughly removing at least one or more of impurities, here hydrogen, hydrocarbons, and carbon, in the film of the insulator 130, a film having high-purity intrinsic ferroelectricity can be formed. The film having high-purity intrinsic ferroelectricity and the high-purity intrinsic oxide semiconductor have very high manufacturing process compatibility. Therefore, a method for manufacturing a highly productive semiconductor device can be provided.

[0490] <Configuration example of a semiconductor device having a transistor 200 and a capacitor element 100> FIGS. 18A and 18B show a semiconductor device having the above-described transistor 200 and the capacitor element 100 according to the previous embodiment. FIG. 18A is a top view of the semiconductor device. FIG. 18B is a cross-sectional view of a portion indicated by a one-dot chain line A1 - A2 in FIG. 18A, and is also a cross-sectional view in the channel length direction of the transistor 200. In the top view of FIG. 18A, some elements are omitted for clarity of the drawing.

[0491] In the semiconductor device shown in FIGS. 18A and 18B, the capacitor element 100 and the conductor 246 functioning as wiring are disposed on the transistor 200. Here, in a top view, it is preferable that the overlapping area of the capacitor element 100 and the transistor 200 be large. With such a configuration, the occupied area of the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. Thereby, miniaturization or high integration of the semiconductor device can be achieved.

[0492] The semiconductor device has conductors 240 (conductor 240a and conductor 240b) that are electrically connected to the source and drain of the transistor 200 and function as plugs. As shown in FIG. 18B, conductor 240a contacts the upper surface of conductor 242a, and conductor 240b contacts the upper surface of conductor 242b. Also, conductor 240a contacts the lower surface of conductor 246, and conductor 240b contacts the lower surface of conductor 110. Note that an insulator 241a is provided in contact with the side surface of conductor 240a, and an insulator 241b is provided in contact with the side surface of conductor 240b.

[0493] The capacitor element 100 shown in FIG. 18B has the same configuration as the capacitor element 100 shown in FIG. 1A. However, the conductor 120 has a laminated structure of a conductor 120a and a conductor 120b provided in contact with the conductor 120a. Also, the insulator 155 has a laminated structure of an insulator 155a and an insulator 155b provided in contact with the insulator 155a. Also, the insulator 152 has a laminated structure of an insulator 152a and an insulator 152b provided in contact with the insulator 152a. Also, instead of the insulator 105 shown in FIG. 1A, an insulator 287 is provided, which can use an insulator similar to the insulator 152. Note that the present invention is not limited to the above, and the conductor 120, the insulator 155, and the insulator 152 may have a single-layer or three-layer or more structure, or the insulator 105 may be provided under the conductor 110. Also, instead of providing the insulator 287, a configuration may be adopted in which the lower surface of the conductor 246, the lower surface of the insulator 155a, and the lower surface of the conductor 110 contact the upper surface of the insulator 285.

[0494] The conductor 120a may be formed by using a conductor that can be used for the conductor 120 shown in the previous embodiment by a film formation method such as the ALD method or the CVD method. For example, titanium nitride may be formed by using the thermal ALD method. Here, for the film formation of the conductor 120a, a method of forming a film while heating the substrate, such as the thermal ALD method, is preferable. For example, the film may be formed with the substrate temperature being room temperature or higher, preferably 300°C or higher, more preferably 325°C or higher, and even more preferably 350°C or higher. Also, for example, the film may be formed with the substrate temperature being 500°C or lower, preferably 450°C or lower. For example, the substrate temperature may be set to about 400°C.

[0495] The conductor 120b may be formed by using a conductor that can be used for the conductor 120 shown in the previous embodiment by a film formation method such as the sputtering method, the ALD method, or the CVD method. For example, tungsten may be formed by using the metal CVD method.

[0496] The insulator 155a is preferably formed by using an insulator that can be used for the insulator 155 shown in the previous embodiment by the ALD method, particularly the thermal ALD method. For example, aluminum oxide formed by the ALD method can be used as the insulator 155a. Thereby, even if pinholes or steps are formed in the insulator 155b formed by the sputtering method, the portions overlapping them can be blocked with aluminum oxide formed by the ALD method having good coverage.

[0497] The insulator 155b may be formed by using an insulator that can be used for the insulator 155 shown in the previous embodiment by the sputtering method. For example, aluminum oxide formed by the sputtering method can be used as the insulator 155b. Since the sputtering method does not require the use of a molecule containing hydrogen in the film formation gas, the hydrogen concentration of the insulator 155 and the underlying conductor 120 can be reduced. Thereby, more impurities such as hydrogen contained in the insulator 130 can be captured or fixed.

[0498] The insulator 152a may be formed by a sputtering method using an insulator that can be used for the insulator 152 shown in the previous embodiment. For example, silicon nitride formed by a sputtering method can be used as the insulator 152a. Since the sputtering method does not require the use of a molecule containing hydrogen in the film-forming gas, the hydrogen concentration of the insulator 152a and the insulator 155 serving as a base during film formation can be reduced.

[0499] The insulator 152b is preferably formed by an ALD method, particularly a PEALD method, using an insulator that can be used for the insulator 152 shown in the previous embodiment. For example, silicon nitride formed by the PEALD method can be used as the insulator 152b. Thereby, since the insulator 152b can be formed with good coverage, even if pinholes or steps are formed in the insulator 152a due to the unevenness of the base, by covering them with the insulator 152b, it is possible to reduce the diffusion of hydrogen to the insulator 130 or the like.

[0500] With the above configuration, the capacitor element 100 is sealed by the insulator 155a, the insulator 155b, the insulator 152a, the insulator 152b, and the insulator 287. Here, the insulator 155a, the insulator 155b, the insulator 152a, the insulator 152b, and the insulator 287 function as a sealing film. Thereby, it is possible to suppress the diffusion of impurities such as hydrogen from the outside of the insulator 152b and the insulator 287 to the capacitor element 100, and further, the insulator 155 captures or fixes impurities such as hydrogen inside the insulator 152b and the insulator 287, and the hydrogen concentration of the insulator 130 of the capacitor element 100 can be reduced. Therefore, the ferroelectricity of the insulator 130 can be enhanced.

[0501] Also, similar to the capacitor element 100 shown in FIG. 1B, the transistor 200 is also encapsulated by the insulator 283, and the insulators 282, the insulator 214, and the insulator 212. Therefore, when performing a heat treatment for capturing or fixing impurities such as hydrogen in the capacitor element 100 to the insulator 155, impurities such as hydrogen in the transistor 200 can be simultaneously captured or fixed to the insulator 282 and the insulator 214.

[0502] Furthermore, as shown in FIG. 18B, the insulators 155a, 155b, 152a, and 152b are provided so as to enclose not only the capacitor element 100 but also the conductor 246. Thereby, during the above heat treatment, it is possible to suppress the diffusion of impurities such as hydrogen into the oxide 230 through the capacitor element 100, the conductor 246, and the conductor 240. Thus, the capacitor element having high-purity true ferroelectricity with reduced impurities such as hydrogen and the oxide semiconductor with high-purity true nature with reduced impurities such as hydrogen have very high manufacturing process compatibility. Therefore, it is possible to provide a method for manufacturing a highly productive semiconductor device.

[0503] The conductor 240 is provided so as to fill the openings formed in the insulators 271, 275, 280, 282, 283, 285, and 287. The lower surface of the conductor 240 is in contact with the upper surface of the conductor 242. The conductor 240 is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 240 may have a laminated structure of a first conductor with a thin film thickness provided along the side surface and the bottom surface of the opening and a second conductor on the first conductor.

[0504] When the conductor 240 has a laminated structure, it is preferable to use a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen for the first conductor disposed in the vicinity of the insulator 285 and the insulator 280. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like. Further, the conductive material having a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or in a laminate. In addition, it is possible to suppress impurities such as water and hydrogen contained in the upper layer than the insulator 283 from mixing into the oxide 230 through the conductor 240. As the second conductor, a conductive material mainly composed of the above-mentioned tungsten, copper, or aluminum may be used.

[0505] Note that in the conductor 240 shown in FIG. 18B, a configuration in which the first conductor and the second conductor are laminated is shown, but the present invention is not limited thereto. For example, the conductor 240 may be provided in a single layer or a laminated structure of three or more layers.

[0506] Further, the conductor 246 may be disposed in contact with the upper surface of the conductor 240. The conductor 246 is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Further, the conductor 246 may have a laminated structure, for example, a laminate of titanium or titanium nitride and the above conductive material. Further, the conductor 246 is preferably configured to be formed of the same material in the same layer as the conductor 110.

[0507] Insulator 241a is provided in contact with the inner walls of the openings of insulator 271, insulator 275, insulator 280, insulator 282, insulator 283, insulator 285, and insulator 287, and conductor 240a is provided in contact with the side surface of insulator 241a. Also, insulator 241b is provided in contact with the inner walls of the openings of insulator 271, insulator 27...

Claims

1. An insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator, wherein the first conductor, the metal nitride film, and the second conductor are surrounded by the insulating film, the first insulator, and the second insulator, the metal nitride film has ferroelectricity, the metal nitride film has a first element, a second element, and nitrogen, the first element is one or more elements selected from Group 13 elements, the second element is one or more elements selected from Group 13 elements other than the first element, and one or more elements selected from Group 2 to Group 6 elements, each of the first conductor and the second conductor has nitrogen, the first insulator has aluminum and oxygen, each of the insulating film and the second insulator has silicon and nitrogen, a ferroelectric device.

2. A first conductor, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator, wherein the first insulator has regions in contact with the side surface of the metal nitride film, the side surface of the second conductor, and the upper surface of the second conductor, the metal nitride film has ferroelectricity, the metal nitride film has a first element, a second element, and nitrogen, the first element is one or more elements selected from Group 13 elements, the second element is one or more elements selected from Group 13 elements other than the first element, and one or more elements selected from Group 2 to Group 6 elements, each of the first conductor and the second conductor has nitrogen, the first insulator has aluminum and oxygen, the second insulator has silicon and nitrogen, a ferroelectric device.

3. In any one of Claim 1 or Claim 2, the first insulator has an amorphous structure, a ferroelectric device.

4. An insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, It has an insulator on the first conductor, on the metal nitride film, and on the second conductor. The insulator has a region in contact with the upper surface of the insulating film, a region in contact with the side surface of the metal nitride film, a region in contact with the side surface of the second conductor, and a region in contact with the upper surface of the second conductor. The metal nitride film has ferroelectricity. The metal nitride film has a first element, a second element, and nitrogen. The first element is one or more elements selected from Group 13 elements. The second element is one or more elements selected from Group 13 elements excluding the first element, and one or more elements selected from Group 2 to Group 6 elements. Each of the first conductor and the second conductor has nitrogen. Each of the insulating film and the insulator has silicon and nitrogen. Ferroelectric device.

5. In any one of Claims 1 to 4, The metal nitride film has a wurtzite structure. Ferroelectric device.

6. In any one of Claims 1 to 5, The first element is aluminum. The second element is one or more selected from lanthanoids and actinoids. Ferroelectric device.

7. In any one of Claims 1 to 5, The first element is aluminum. The second element is one or more selected from titanium, zirconium, hafnium, vanadium, niobium, and tantalum. Ferroelectric device.

8. In any one of Claims 1 to 7, The first conductor has a crystal with a sodium chloride type structure. Ferroelectric device.

9. In any one of Claims 1 to 8, There is a silicon nitride film between the first conductor and the metal nitride film. Ferroelectric device.

10. In any one of Claims 1 to 8, There is a silicon nitride film between the metal nitride film and the second conductor. Ferroelectric device.

11. A semiconductor device having the ferroelectric device according to any one of Claims 1 to 8 and a transistor including an oxide semiconductor in a channel formation region.

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