Solar cell, method for manufacturing the same, photovoltaic module, and photovoltaic system

Abstract

To provide a solar cell and a manufacturing method thereof, a photovoltaic module, and a photovoltaic system.SOLUTION: A solar cell includes a substrate and a passivation contact structure. The passivation contact structure includes a first tunnel oxide layer, a polysilicon-doped conductive layer, and a second tunnel oxide layer which are sequentially disposed on one surface of the substrate. The polysilicon-doped conductive layer and the first tunnel oxide layer are formed with a plurality of holes at intervals in at least partial regions. Each of the holes penetrates the polysilicon-doped conductive layer and extends into the first tunnel oxide layer. The second tunnel oxide layer is filled at least in a part of each hole located in the first tunnel oxide layer. The present invention can improve the surface passivation effect of the passivation contact structure, reduce the surface recombination, and improve the conversion efficiency of the solar cell.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic power generation, and particularly to solar cells and their manufacturing methods, photovoltaic modules, and photovoltaic power systems.

Background Art

[0002] With the development of photovoltaic power generation technology, the requirements for the photoelectric conversion efficiency of crystalline silicon solar cells are becoming increasingly high. However, the improvement of the efficiency of industrialized solar cells still faces many challenges. In the solar cells in related technologies, in order to reduce the recombination rate, extend the lifetime of minority carriers, and improve the photoelectric conversion efficiency of solar cells, generally, passivation treatment is performed on the silicon substrate to form a passivation contact structure on the surface of the silicon substrate to reduce the recombination of surface carriers, thereby reducing the influence of internal defects of the silicon substrate. In addition, a general passivation contact structure combines a tunnel oxide layer and a highly doped polycrystalline silicon layer, and the chemical passivation effect of the tunnel oxide layer reduces the interface recombination between the silicon substrate and the polycrystalline silicon. Moreover, the tunnel oxide layer can also perform a good tunneling effect, enabling majority carriers to be transported by the tunneling principle. On the other hand, due to the high potential barrier, it is difficult for minority carriers to tunnel through the tunnel oxide layer and enter the polycrystalline silicon layer for recombination. However, in the solar cells of related technologies, there is always a problem that the structure of the passivation contact structure is discontinuous and the integrity is poor, thereby resulting in a poor surface passivation effect of the passivation contact structure and affecting the conversion efficiency of the solar cell.

Summary of the Invention

Problems to be Solved by the Invention

[0003] In view of this, the present application provides a solar cell and its manufacturing method, a photovoltaic module, and a photovoltaic power system.

Means for Solving the Problems

[0004] The first aspect according to the embodiment of the present application is including a substrate and a passivation contact structure, The passivation contact structure includes a first tunnel oxide layer, a polycrystalline silicon doped conductive layer, and a second tunnel oxide layer that are sequentially provided on one surface of the substrate. A plurality of holes are formed at intervals in at least a part of the region between the polycrystalline silicon doped conductive layer and the first tunnel oxide layer. Each hole penetrates the polycrystalline silicon doped conductive layer and extends into the first tunnel oxide layer. The second tunnel oxide layer is filled at least in the portion located in the first tunnel oxide layer of each hole. A solar cell is provided.

[0005] In any embodiment, the second tunnel oxide layer is filled in each hole.

[0006] In any embodiment, at least some of the holes penetrate the first tunnel oxide layer.

[0007] In any embodiment, the contour of the cross section of the hole is circular, and the diameter of the hole is 100 nm or more, or the contour of the cross section of the hole is polygonal, and at least one side length of the polygon is 100 nm or more.

[0008] In any embodiment, the thickness of the first tunnel oxide layer is equal to the thickness of the second tunnel oxide layer, and / or the material of the first tunnel oxide layer is the same as the material of the second tunnel oxide layer.

[0009] In any embodiment, the thickness of the second tunnel oxide layer is 0.5 nm to 5 nm.

[0010] In any embodiment, the polycrystalline silicon doped conductive layer includes a first polycrystalline silicon doped conductive layer and a second polycrystalline silicon doped conductive layer that are stacked. The first polycrystalline silicon doped conductive layer is adjacent to the first tunnel oxide layer, and the second polycrystalline silicon doped conductive layer is adjacent to the second tunnel oxide layer. The doping concentration of the first polycrystalline silicon doped conductive layer is lower than that of the second polycrystalline silicon doped conductive layer.

[0011] In any embodiment, the reflectivity of the first surface of the substrate is greater than 30%, and / or the roughness of the first surface of the substrate is less than 1 μm. The first surface is the surface of the substrate where the first tunnel oxide layer is provided.

[0012] In any embodiment, the solar cell further includes a first passivation film layer laminated and installed on the surface of the second tunnel oxide layer away from the substrate, and a doped conductive layer and a second passivation film layer laminated and installed in sequence on the surface of the substrate away from the first tunnel oxide layer.

[0013] A second aspect according to the embodiments of the present application is forming a first tunnel oxide layer and a polycrystalline silicon doped conductive layer laminated in sequence on one surface of the substrate, wherein a plurality of holes are formed at intervals in at least a part of the region between the polycrystalline silicon doped conductive layer and the first tunnel oxide layer, each hole penetrates the polycrystalline silicon doped conductive layer and extends into the first tunnel oxide layer, and forming a second tunnel oxide layer on the surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxide layer, and filling the second tunnel oxide layer at least in the part located in the first tunnel oxide layer of each hole. A method for manufacturing a solar cell is provided.

[0014] In any embodiment, forming a first tunnel oxide layer and a polycrystalline silicon doped conductive layer laminated in sequence on one surface of the substrate specifically means Forming a first tunnel oxidation material layer, a polycrystalline silicon doped material layer, and a first oxide material layer in sequence on a first surface of a substrate, forming a plurality of through holes in the polycrystalline silicon doped material layer and the first oxide material layer to expose a region corresponding to the through holes in the first tunnel oxidation material layer, Removing the first tunnel oxidation material layer, the polycrystalline silicon doped material layer, and the first oxide material layer plated around the second surface and each side surface of the substrate, and forming a first tunnel oxidation layer, a polycrystalline silicon doped conductive layer, and a first oxide layer in sequence on the first surface of the substrate, wherein the first surface and the second surface are arranged opposite to each other, and each side surface of the substrate is adjacent between the first surface and the second surface, Removing the first oxide layer, and at least partially removing in the thickness direction of itself a region corresponding to the through holes in the first tunnel oxidation layer to define a hole together with the corresponding through holes.

[0015] In any embodiment, forming a first tunnel oxidation material layer, a polycrystalline silicon doped material layer, and a first oxide material layer in sequence on a first surface of a substrate specifically includes Forming a first tunnel oxidation material layer, an amorphous silicon doped material layer, and a first oxide material layer in sequence on the first surface of the substrate, Performing an annealing process to convert the amorphous silicon doped material layer into a polycrystalline silicon doped material layer, and forming a plurality of through holes in the polycrystalline silicon doped material layer and the first oxide material layer.

[0016] In any embodiment, the process conditions of the annealing process are as follows: Raising the reaction temperature from 25°C to a first predetermined temperature at a rate greater than 5°C / min and holding for a predetermined time, where the first predetermined temperature is greater than 600°C, Lowering the reaction temperature from the first predetermined temperature to a second predetermined temperature at a rate greater than 2°C / min, where the second predetermined temperature is less than the first predetermined temperature and greater than 600°C, Lowering the reaction temperature from the second predetermined temperature to a third predetermined temperature at a rate greater than 20°C / min, where the third predetermined temperature is less than 100°C.

[0017] In some embodiments, forming the amorphous silicon doped material layer is by sequentially laminating a first amorphous silicon material layer and a second amorphous silicon material layer on the surface of the first tunnel oxidation material layer away from the substrate, and the effective electrical active doping concentration of the first amorphous silicon material layer is smaller than that of the second amorphous silicon material layer.

[0018] In some embodiments, the effective electrical active doping concentration of the first amorphous silicon material layer is less than 2E20 cm -3 and the effective electrical active doping concentration of the second amorphous silicon material layer is 2E20 cm -3 or more.

[0019] In some embodiments, forming the second tunnel oxidation layer on the surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxidation layer is forming the second tunnel oxidation layer on the surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxidation layer and filling the second tunnel oxidation layer with holes.

[0020] Before sequentially laminating the first tunnel oxidation layer and the polycrystalline silicon doped conductive layer on one surface of the substrate, further performing an etching process on the first surface of the substrate and making the reflectivity of the first surface greater than 30%, and / or performing an etching process on the first surface of the substrate and making the roughness of the first surface of the substrate less than 1 μm, including the first surface is the surface of the substrate where the first tunnel oxidation layer is provided.

[0021] In some embodiments, after forming the second tunnel oxidation layer on the surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxidation layer, further including the following forming a first passivation film layer on the surface of the second tunnel oxidation layer away from the substrate.

[0022] A third aspect according to an embodiment of the present application provides a photovoltaic module including at least one battery string, the battery string including at least two of the above-described solar cells.

[0023] A fourth aspect according to an embodiment of the present application provides a photovoltaic system including the above-described photovoltaic module.

Advantages of the Invention

[0024] The beneficial effects of the above-described solar cell and its manufacturing method, photovoltaic module, and photovoltaic system are as follows. In the embodiment of the present application, a second tunnel oxide layer is provided, and the second tunnel oxide layer is filled at least in a portion located in the first tunnel oxide layer of each hole. Thereby, a region corresponding to the hole in the first tunnel oxide layer, that is, a discontinuous region, can be filled by the second tunnel oxide layer, and a region corresponding to the hole on the surface of the substrate can also be covered. Compared with a form in which the passivation contact structure is not continuous in the related art and the passivation effect in the hole region is inferior, the quality of surface passivation can be improved, surface recombination can be reduced, and the conversion efficiency of the solar cell can be improved.

Brief Description of the Drawings

[0025]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Embodiments for Carrying Out the Invention

[0026] Hereinafter, for the purpose of making the above objects, features, and advantages of the present invention easier to understand, specific embodiments of the present invention will be described in detail with reference to the drawings. In order to fully understand the present invention, various specific details will be described in the following explanation. However, the present invention can be implemented in various forms different from those described here, and those skilled in the art can make similar improvements without departing from the spirit of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0027] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as "center", "longitudinal direction", "lateral direction", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial direction", "radial direction", "circumferential direction", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or device must be configured and operated in a specific orientation or in a specific orientation, so it should not be understood as limiting the present invention.

[0028] Note that the terms "first" and "second" are used only for the purpose of description, and should not be understood as indicating or implying relative importance, or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first" and "second" can explicitly or implicitly include at least one of the corresponding features. In the description of the present invention, unless otherwise clearly limited, "a plurality" means at least two, for example, two, three, etc.

[0029] In the present invention, unless otherwise clearly defined and limited, terms such as "attach", "connect", "connect", "fix", etc. should be understood broadly unless otherwise clearly limited. For example, they may be fixedly connected, removably connected, integrated, mechanically connected, electrically connected, directly connected, indirectly connected through a medium, or the internal communication of two elements or the interaction relationship between two elements. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on specific situations.

[0030] In the present invention, unless otherwise clearly defined or limited, if the first feature is "above" or "below" the second feature, the first feature may be in direct contact with the second feature, or the first feature may be in indirect contact with the second feature through an intermediate medium. Further, if the first feature is "above", "upper" or "upper surface" of the second feature, the first feature may be directly above or obliquely above the second feature, or it only represents that the horizontal height of the first feature is higher than that of the second feature. If the first feature is "below", "lower" or "lower surface" of the second feature, the first feature may be directly below or obliquely below the second feature, or it only represents that the horizontal height of the first feature is smaller than that of the second feature.

[0031] It should be noted that when an element is said to be "fixed" or "installed" on another element, it may be in direct contact with the other element, or there may be intervening elements. When an element is considered to be "connected" to another element, it may be directly connected to the other element, or there may be an intervening element at the same time. The terms "vertical", "horizontal", "above", "below", "left", "right" and similar expressions used here are for illustrative purposes only and do not represent the only embodiment.

[0032] Hereinafter, with reference to the drawings, a solar cell, a method for manufacturing the same, a photovoltaic module, and a photovoltaic system according to an embodiment of the present application will be described.

[0033] It should be noted that in the present application, the case where the solar cell is a TOPCon cell (Tunnel Oxide Passivated Contact) is described as an example, and the solar cell may be other types of solar cells. When the solar cell is of other types, the same applies, so it will not be repeated here.

[0034] FIG. 1 is a schematic diagram of the configuration of the solar cell provided by the embodiment of the present application, and FIG. 2 is a schematic diagram of another configuration of the solar cell provided by the embodiment of the present application.

[0035] Referring to FIGS. 1 and 2, a first aspect according to an embodiment of the present application provides a solar cell 200. The solar cell includes a substrate 40 and a passivation contact structure 100. The passivation contact structure 100 includes a first tunnel oxide layer 10, a polycrystalline silicon doped conductive layer 30, and a second tunnel oxide layer 20 that are sequentially provided on one surface of the substrate 40.

[0036] Further, a plurality of holes 50 are formed at intervals in at least a partial region between the polycrystalline silicon doped conductive layer 30 and the first tunnel oxide layer 10. Each hole 50 penetrates the polycrystalline silicon doped conductive layer 30 and extends into the first tunnel oxide layer 10. The second tunnel oxide layer 20 is filled in at least a portion located in the first tunnel oxide layer 10 of each hole 50.

[0037] In the solar cell 200 according to the embodiment of the present application, the second tunnel oxide layer 20 is provided, and the second tunnel oxide layer 20 is filled in at least a portion located in the first tunnel oxide layer 10 of each hole 50. Thereby, the region corresponding to the hole 50 in the first tunnel oxide layer 10, that is, the discontinuous region, can be filled by the second tunnel oxide layer 20, and the region corresponding to the hole 50 on the surface of the substrate 40 can also be covered. Compared with the form in the related art where the passivation contact structure is not continuous and the passivation effect in the region of the hole is poor, the quality of surface passivation can be improved, surface recombination can be reduced, and the conversion efficiency of the solar cell 200 can be improved.

[0038] The fact that the first tunnel oxide layer 10, the polycrystalline silicon doped conductive layer 30, and the second tunnel oxide layer 20 are provided in sequence on one surface of the substrate 40 means that the first tunnel oxide layer 10 is provided on one surface of the substrate 40, the polycrystalline silicon doped conductive layer 30 is provided on the surface of the first tunnel oxide layer 10 that is away from the substrate 40, and the second tunnel oxide layer 20 is provided on the surface of the polycrystalline silicon doped conductive layer 30 that is away from the first tunnel oxide layer 10. A part of the material in the second tunnel oxide layer 20 fills a position that is not continuous with the surface defects caused by the holes 50 in the first tunnel oxide layer 10.

[0039] Also, the installation positions of the plurality of holes 50 in the polycrystalline silicon doped conductive layer 30 and the first tunnel oxide layer 10 are random, and may be distributed in some regions, or may be distributed across the entire installation range of the polycrystalline silicon doped conductive layer 30 and the first tunnel oxide layer 10. Each hole 50 may include a partial hole section located in the polycrystalline silicon doped conductive layer 30 and a partial hole section located in the first tunnel oxide layer 10.

[0040] The fact that the second tunnel oxide layer 20 is filled at least in the portion of each hole 50 located in the first tunnel oxide layer 10 means that, among all the holes 50, the partial hole sections located in the first tunnel oxide layer 10 are all covered by the second tunnel oxide layer 20. In other words, the material of the second tunnel oxide layer 20 filled in each hole 50 needs to completely cover the partial hole section of the hole 50 located in the first tunnel oxide layer 10, and in addition, some material may also be filled in the partial hole section of the hole 50 located in the polycrystalline silicon doped conductive layer 30.

[0041] In some embodiments, the second tunnel oxide layer 20 is filled in each hole 50. In this way, it is easy for the second tunnel oxide layer 20 to also form a film layer with good integrity and continuity, and it is possible to obtain a better passivation effect at the position corresponding to the hole 50 in the substrate 40.

[0042] In the embodiment of the present application, at least some of the holes 50 penetrate the first tunnel oxide layer 10. Since a part of the surface of the substrate 40 is exposed through the holes 50 and the second tunnel oxide layer 20 fills the holes 50, the second tunnel oxide layer 20 can be in direct contact with the position corresponding to the holes 50 in the substrate 40, greatly enhancing the passivation effect at this position.

[0043] In the embodiment of the present application, the contour of the cross-section of the hole 50 is circular, and the diameter of the hole 50 is 100 nm or more. Alternatively, the contour of the cross-section of the hole 50 is polygonal, and at least one side length of the polygon is 100 nm or more.

[0044] Thereby, the structure of the polycrystalline silicon doped conductive layer 30 becomes a discontinuous structure. As can be understood, the polygon here may be a regular or irregular polygon.

[0045] In the embodiment of the present application, the thickness of the first tunnel oxide layer 10 is equal to the thickness of the second tunnel oxide layer 20. And / or, the material of the first tunnel oxide layer 10 is the same as the material of the second tunnel oxide layer 20.

[0046] Since the thickness of the first tunnel oxide layer 10 is equal to the thickness of the second tunnel oxide layer 20, when the second tunnel oxide layer 20 fills the holes 50, it can be ensured that at least the partial hole sections of the first tunnel oxide layer 10 corresponding to each hole 50 are filled.

[0047] Specifically, a part of the material of the second tunnel oxide layer 20 is filled in the partial hole section located in the first tunnel oxide layer 10 of each hole 50. The thickness range of the first tunnel oxide layer 10 is the same as that of the second tunnel oxide layer 20, and the materials of both are the same. Thereby, both the first tunnel oxide layer 10 and the second tunnel oxide layer 20 can form ultra-thin oxide layers, and the uniformity and consistency of the performance at each location of the first tunnel oxide layer 10 can be guaranteed. The materials of the first tunnel oxide layer 10 and the second tunnel oxide layer 20 may be dielectric materials. For example, they may be at least one of silicon oxide, silicon carbide, silicon nitride, and silicon oxynitride.

[0048] Furthermore, the thickness of the second tunnel oxide layer 20 is 0.5 nm to 5 nm, and the thickness range of the first tunnel oxide layer 10 may also be 0.5 nm to 5 nm.

[0049] In the embodiment of the present application, in the process of forming the polycrystalline silicon doped conductive layer 30, in order to reduce the impact of the dopant on the first tunnel oxide layer 10, the polycrystalline silicon doped conductive layer 30 may be made into a multilayer structure, and the doping concentration of a part of the layer structure close to the first tunnel oxide layer 10 may be lowered.

[0050] Specifically, when implementing, referring to FIG. 2, the polycrystalline silicon doped conductive layer 30 includes a first polycrystalline silicon doped conductive layer 31 and a second polycrystalline silicon doped conductive layer 32 which are stacked and installed.

[0051] The first polycrystalline silicon doped conductive layer 31 is adjacent to the first tunnel oxide layer 10, and the second polycrystalline silicon doped conductive layer 32 is adjacent to the second tunnel oxide layer 20. The doping concentration of the first polycrystalline silicon doped conductive layer 31 is lower than that of the second polycrystalline silicon doped conductive layer 32.

[0052] In this way, while being able to mitigate the impact on the first tunnel oxide layer 10 during the formation of the second polycrystalline silicon doped conductive layer 32 with a high doping concentration, the hydrogen content of the first polycrystalline silicon doped conductive layer 31 with a low doping concentration is higher, and it can assist the first tunnel oxide layer 10 to achieve better surface passivation.

[0053] When specifically implemented, for example, the first polycrystalline silicon doped conductive layer 31 includes a plurality of polycrystalline silicon doped sub-layers (not shown), and the plurality of polycrystalline silicon doped sub-layers are sequentially stacked in the direction pointing to the second tunnel oxide layer 20 along the substrate 40, and the doping concentration gradually increases.

[0054] In the embodiment of the present application, referring to FIGS. 1 and 2, the substrate 40 may include an oppositely arranged first surface F and a second surface S, and may also include a plurality of side surfaces adjacent between the first surface F and the second surface S. The first surface F corresponds to the back or front of the solar cell 200, and the second surface S may correspond to the front or back of the solar cell 200. In the embodiment of the present application, taking the example where the first surface F corresponds to the back of the solar cell 200 and the first tunnel oxide layer 10 is provided on the first surface F of the substrate 40 for explanation.

[0055] Furthermore, the reflectivity of the first surface F of the substrate 40 is greater than 30%, preferably, the reflectivity is 38%, 40%, 42%, 45%.

[0056] Furthermore, the roughness of the first surface F of the substrate 40 is less than 1 μm.

[0057] In this way, the first surface F of the substrate 40 can be made into a polished surface, and the first surface F of the substrate 40 has fewer surface defect forms, thereby enabling a better surface passivation effect to be easily obtained.

[0058] Furthermore, the solar cell 200 further includes a first passivation film layer 70, a doped conductive layer 60, a second passivation film layer 80, a first electrode 91, and a second electrode 92.

[0059] The first passivation film layer 70 is laminated and disposed on the surface of the second tunnel oxide layer 20 away from the substrate 40. The first passivation film layer 70 can use a single-layer or multi-layer structure, and the material of the first passivation film layer 70 may be silicon oxide, silicon nitride, or silicon oxynitride. With the development of the technology of the solar cell 200, the back surface of the solar cell 200 has also come to receive the energy of sunlight, mainly the reflected light or scattered light in the surrounding environment. The first passivation film layer 70 may include, for example, at least one first antireflection layer (not shown). In this way, the reflectivity of the back surface of the solar cell 200 to sunlight is reduced, and the absorption rate of the back surface of the solar cell 200 to sunlight is improved. Thus, the first passivation film layer 70 can simultaneously perform the functions of passivation and antireflection.

[0060] The doped conductive layer 60 and the second passivation film layer 80 are sequentially laminated and disposed on the surface of the substrate 40 away from the first tunnel oxide layer 10.

[0061] In actual cases, the solar cell 200 may include an N-type cell and a P-type cell. The substrate 40 of the N-type cell is doped with an N-type element, and the doped conductive layer 60 is doped with a P-type element. The substrate 40 of the P-type cell is doped with a P-type element, and the doped conductive layer 60 is doped with an N-type element. The doped conductive layer 60 is for forming a PN junction with the substrate 40. In the embodiments of the present application, the case where the substrate 40 is an N-type substrate is taken as an example for description. At this time, the doped conductive layer 60 may be a P-type doping, for example, a doped conductive layer 60 doped with boron element. Also, the doped conductive layer 60 doped with boron element is also called a P+ type emitter electrode.

[0062] The second passivation film layer 80 is laminated on the doped conductive layer 60. The second passivation film layer 80 performs a surface passivation function and an antireflection function in the solar cell 200, performs good chemical passivation on the dangling bonds on the surface of the substrate 40, and can achieve an antireflection effect on the front surface of the solar cell 200.

[0063] Exemplarily, the second passivation film layer 80 may include a second passivation layer (not shown) and a second antireflection layer (not shown) sequentially laminated on the doped conductive layer 60.

[0064] The second antireflection layer is located on the second surface S side of the substrate 40, that is, on the surface that receives the incident light of the solar cell 200. Also, the surface that receives the incident light of the solar cell 200 is called the front surface or the light-receiving surface, and the second antireflection layer exhibits an antireflection effect on the front surface of the solar cell 200. The second antireflection layer can use a multilayer structure. In the second antireflection layer with a multilayer structure, the material of each layer may be silicon oxide, silicon nitride, or silicon oxynitride.

[0065] The second passivation layer can use a single-layer structure or a multilayer structure, and the material of the second passivation layer may be at least one of aluminum oxide, silicon oxide, silicon nitride, or silicon oxynitride. Also, the second passivation layer can be formed by means of chemical deposition.

[0066] Further, the first electrode 91 is provided on the first passivation film layer 70 and connected to the polycrystalline silicon doped conductive layer 30, and the second electrode 92 is provided on the second passivation film layer 80 and connected to the doped conductive layer 60.

[0067] FIG. 3 is a schematic diagram of the flow of the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 4 is a schematic diagram of performing an etching process on the first surface of a substrate in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 5 is a schematic diagram of forming a first tunnel oxidation material layer, a polycrystalline silicon doped conductive material layer, and a first oxide material layer on the first surface of a substrate in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 6 is a schematic diagram of forming a first tunnel oxidation layer and a polycrystalline silicon doped conductive layer on the first surface F of a substrate in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 7 is a scanning electron microscope photograph of the holes formed in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 8 is a microscope photograph of the holes formed in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 9 is a schematic diagram of forming a second tunnel oxidation layer in the method for manufacturing a solar cell provided by an embodiment of the present application. FIG. 10 is a schematic diagram of the solar cell formed in the method for manufacturing a solar cell provided by an embodiment of the present application.

[0068] Referring to FIG. 3, a second aspect according to an embodiment of the present application provides a method for manufacturing a passivation contact structure, and the solar cell 200 of the above embodiment can be manufactured by this manufacturing method.

[0069] The method for manufacturing a solar cell includes the following.

[0070] In S10, a first tunnel oxidation layer 10 and a polycrystalline silicon doped conductive layer 30 are sequentially laminated and formed on one surface of a substrate 40, and a plurality of holes 50 arranged at intervals are formed in at least a part of the regions of the polycrystalline silicon doped conductive layer 30 and the first tunnel oxidation layer 10. Each hole 50 penetrates the polycrystalline silicon doped conductive layer 30 and extends into the first tunnel oxidation layer 10.

[0071] In S20, a second tunnel oxidation layer 20 is formed on the surface of the polycrystalline silicon doped conductive layer 30 away from the first tunnel oxidation layer 10, and the second tunnel oxidation layer 20 is filled in at least the part located in the first tunnel oxidation layer 10 of each hole 50.

[0072] A second tunnel oxide layer 20 is formed on the surface of the polycrystalline silicon doped conductive layer 30 away from the first tunnel oxide layer 10, and the second tunnel oxide layer 20 is filled at least in the portion located in the first tunnel oxide layer 10 of each hole 50. Thereby, the surface of the substrate 40 and the region corresponding to the hole 50 in the first tunnel oxide layer 10 can be covered and filled by the second tunnel oxide layer 20. Compared with the form in the related art where the structure is not continuous and the passivation effect in the hole region is poor, the quality of surface passivation can be improved, surface recombination can be reduced, and the conversion efficiency of the solar cell can be improved.

[0073] The inventor of the present application also conducted tests on the case where the second tunnel oxide layer 20 is filled in the hole 50. Compared with the case where the hole is not covered by the tunnel oxide layer, the open-circuit voltage Uoc changed from 728 mV to 729 mV. As can be seen from this, the performance of the solar cell 200 manufactured using the manufacturing method in the embodiment of the present application was improved to a certain extent.

[0074] In the embodiment of the present application, referring to FIG. 1, in step S10, forming the first tunnel oxide layer 10 and the polycrystalline silicon doped conductive layer 30 sequentially laminated on one surface of the substrate 40 specifically includes the following.

[0075] In S11, a first tunnel oxide material layer 11, a polycrystalline silicon doped material layer 301, and a first oxide material layer 302 are sequentially formed on the first surface F of the substrate 40. Also, as shown in FIG. 5, a plurality of through holes 303 are formed in the polycrystalline silicon doped material layer 301 and the first oxide material layer 302, and the region corresponding to the through hole 303 in the first tunnel oxide material layer 11 is exposed.

[0076] In S12, referring to FIG. 6, the first tunnel oxide material layer 11, the polycrystalline silicon doped material layer 301, and the first oxide material layer 302 plated around the second surface S of the substrate 40 and each side surface of the substrate 40 are removed, and the first tunnel oxide layer 10, the polycrystalline silicon doped conductive layer 30, and the first oxide layer are sequentially formed on the first surface F of the substrate 40.

[0077] In S13, the first oxide layer is removed, and at least a part of the region corresponding to the through hole 303 in the first tunnel oxide material layer 11 is removed along its thickness direction, thereby defining a hole 50 together with the corresponding through hole 303.

[0078] Furthermore, in step S11, the step of sequentially forming the first tunnel oxide material layer 11, the polycrystalline silicon doped material layer 301, and the first oxide material layer 302 on the first surface F of the substrate 40 specifically includes the following.

[0079] In S111, the first tunnel oxide material layer 11, the amorphous silicon doped material layer, and the first oxide material layer 302 are sequentially formed on the first surface F of the substrate 40.

[0080] In S112, an annealing process is performed to convert the amorphous silicon doped material layer into the polycrystalline silicon doped material layer 301, and a plurality of through holes 303 are formed in the polycrystalline silicon doped material layer 301 and the first oxide material layer 302.

[0081] Furthermore, in step S112, the process conditions of the annealing process are as follows.

[0082] The reaction temperature is increased from room temperature, for example, about 25°C, to the first predetermined temperature at a rate greater than 5°C / min, held for a predetermined time, for example, held for 2 minutes to 60 minutes, and the first predetermined temperature is greater than 600°C.

[0083] The reaction temperature is decreased from the first predetermined temperature to the second predetermined temperature at a rate greater than 2°C / min, and the second predetermined temperature is smaller than the first predetermined temperature and greater than 600°C.

[0084] The reaction temperature is decreased from the second predetermined temperature to the third predetermined temperature at a rate greater than 20°C / min, and the third predetermined temperature is smaller than 100°C.

[0085] Thus, in the annealing process, by setting a rapid temperature increase and decrease and a high thermal annealing temperature, that is, setting the thermal annealing temperature to a first predetermined temperature, rapid movement and diffusion of hydrogen are realized in the first tunnel oxide layer 10 and the polycrystalline silicon doped conductive layer 30, assisting the first tunnel oxide layer 10 to achieve better surface passivation, releasing excess hydrogen in the first tunnel oxide layer 10 and the polycrystalline silicon doped conductive layer 30, and forming holes 50 in the polycrystalline silicon doped conductive layer 30.

[0086] The first predetermined temperature may be 850°C to 990°C.

[0087] Furthermore, in step S111, the step of forming the amorphous silicon doped material layer includes the following.

[0088] A first amorphous silicon material layer and a second amorphous silicon material layer are sequentially laminated and formed on the surface of the first tunnel oxide material layer 11 away from the substrate 40, and the effective electrical active doping concentration of the first amorphous silicon material layer is lower than that of the second amorphous silicon material layer.

[0089] Thus, the first amorphous silicon material layer can mitigate the impact of the dopant in the second amorphous silicon material layer on the first tunnel oxide layer 10 during high-temperature annealing crystallization. On the other hand, the hydrogen content of the first amorphous silicon material layer doped undoped or at a low concentration is higher and can provide more hydrogen, thereby assisting the first tunnel oxide layer 10 to achieve better surface passivation.

[0090] The inventor of the present application also conducted tests on the case of forming the polycrystalline silicon doped conductive layer 30 using the first amorphous silicon material layer and the second amorphous silicon material layer. Compared with the case of a single-layer polycrystalline silicon doped conductive layer, the open-circuit voltage Uoc changed from 727 mV to 729 mV. As can be seen from this, the performance of the solar cell 200 manufactured using the method in the embodiments of the present application was improved to a certain extent.

[0091] Specifically, when implementing, the effective electrical active doping concentration of the first amorphous silicon material layer is less than 2E20 cm -3 and the effective electrical active doping concentration of the second amorphous silicon material layer is 2E20 cm -3 or more.

[0092] As can be understood, the effective electrical active doping concentration of the first amorphous silicon material layer may be 0, that is, the first amorphous silicon material layer may be an intrinsic amorphous silicon material layer.

[0093] In the embodiment of the present application, in step S13, removing the first oxide layer and at least partially removing the region corresponding to the through hole 303 in the first tunnel oxide layer 10 along its thickness direction to define the hole 50 together with the corresponding through hole 303 can be specifically implemented by cleaning using an acidic solution containing HF. Naturally, in this step S13, if a second oxide layer is formed on the second surface S side of the substrate 40 on the doped conductive layer 60, the second oxide layer can be removed synchronously.

[0094] In the embodiment of the present application, referring to FIG. 9, in step S20, the step of forming the second tunnel oxide layer 20 on the surface of the polycrystalline silicon doped conductive layer 30 away from the first tunnel oxide layer 10 includes the following.

[0095] Form the second tunnel oxide layer 20 on the surface of the polycrystalline silicon doped conductive layer 30 away from the first tunnel oxide layer 10 and fill the hole 50 with the second tunnel oxide layer 20.

[0096] Furthermore, referring to FIG. 10, before the step of sequentially laminating and forming the first tunnel oxide layer 10 and the polycrystalline silicon doped conductive layer 30 on one surface of the substrate 40 in step S10, the following is further included.

[0097] An etching process is performed on the first surface F of the substrate 40, and the reflectivity of the first surface F is made greater than 30%, and / or an etching process is performed on the first surface F of the substrate 40, and the roughness of the first surface F of the substrate 40 is made less than 1 μm. Also, the first surface F is the surface on which the first tunnel oxide layer 10 of the substrate 40 is formed.

[0098] In this way, by making the first surface F of the substrate 40 have fewer surface defect forms, a better surface passivation effect can be easily obtained.

[0099] Furthermore, the step of performing an etching process on the first surface F of the substrate 40 includes the following.

[0100] A doped conductive material layer is formed on the second surface S of the substrate 40. This doped conductive material layer can be formed, for example, by performing boron diffusion on the second surface S of the substrate 40 when the doped conductive layer is P-type and boron elements are used.

[0101] As shown in FIG. 4, the doped conductive material layer plated around each side surface and the first surface F of the substrate 40 is removed by etching to form a doped conductive layer 60 on the second surface S of the substrate 40. Here, it should be noted that the doped conductive layer 60 here is for forming a PN junction with the substrate 40, and the doped conductive layer 60 and the polycrystalline silicon doped conductive layer 30 have opposite doping types.

[0102] Furthermore, referring to FIG. 10, after the step of forming the second tunnel oxide layer 20 on the surface of the polycrystalline silicon doped conductive layer 30 away from the first tunnel oxide layer 10 in step S20, the following is further included.

[0103] A second passivation film layer 80 is formed on the surface of the doped conductive layer 60 away from the substrate 40. A first passivation film layer 70 is formed on the surface of the second tunnel oxide layer 20 away from the substrate 40.

[0104] Hereinafter, a manufacturing method of a solar cell in an embodiment of the present application will be described with reference to one specific example, and this method includes the following.

[0105] In step 1, a substrate 40 is provided, a doped conductive material layer is formed on the second surface S of the substrate 40, and at the same time, the doped conductive material layer is also wound and plated on the first surface F and each side surface of the substrate 40.

[0106] In step 2, referring to FIG. 4, the doped conductive material layer wound and plated on each side surface and the first surface F of the substrate 40 is removed by etching to form a doped conductive layer 60 on the second surface S of the substrate 40, and the first surface F of the substrate 40 is formed in a smooth and flat surface polishing form. Also, the reflectivity of the first surface F is greater than 30%, or the roughness of the first surface F is less than 1 μm.

[0107] In step 3, a first tunnel oxide material layer 11, a first amorphous silicon material layer, a second amorphous silicon material layer, and a first oxide material layer 302 are sequentially formed on the first surface F of the substrate 40. At the same time, the first tunnel oxide material layer 11, the first amorphous silicon material layer, the second amorphous silicon material layer, and the first oxide material layer 302 are also formed on the second surface S and each side surface of the substrate 40.

[0108] Also, the step of forming the first tunnel oxide material layer 11 includes the following. At a temperature of 300 °C or higher, an oxygen source is introduced, and the oxygen source may be, for example, N2O, CO, CO2, etc. The oxygen source is ionized by the action of a microwave power source to generate oxygen ions, which react with the surface of the substrate 40 to generate an ultra-thin first tunnel oxide material layer 11, and the thickness range of this layer is 0.5 nm to 5 nm.

[0109] The step of forming the first amorphous silicon material layer includes the following. Introduce a certain ratio of silane and hydrogen gas, or a certain ratio of silane and argon gas, and under the action of a microwave power source, deposit and grow a layer of intrinsic amorphous silicon rich in hydrogen to form the first amorphous silicon material layer. Alternatively, introduce a certain ratio of silane, phosphine and hydrogen gas, or a certain ratio of silane, phosphine and argon gas, and under the action of a microwave power source, deposit and grow a layer of low-doped amorphous silicon rich in hydrogen to form the first amorphous silicon material layer.

[0110] The step of forming the second amorphous silicon material layer includes the following. Introduce another ratio of silane and phosphine, and the phosphine / silane ratio is greater than that of the first amorphous silicon material layer, and deposit and grow a layer of doped amorphous silicon with a higher doping concentration to form the second amorphous silicon material layer.

[0111] In step 4, an annealing treatment is performed on the structure formed in step 3 at a temperature of 800 degrees Celsius or higher to crystallize the first tunnel oxidation material layer 11, the first amorphous silicon material layer, and the second amorphous silicon material layer, and convert them into a polycrystalline silicon doped material layer 301, that is, the first polycrystalline silicon doped material layer and the second polycrystalline silicon doped material layer. At the same time, excess hydrogen on the surface of the first tunnel oxidation material layer 11 partially escapes, and through holes 303 with a size of 100 nm or more are formed in the polycrystalline silicon doped material layer 301 and the first oxide material layer 302. Thereby, the region corresponding to the through hole 303 in the first tunnel oxidation material layer 11 is exposed to form the structure shown in FIG. 5.

[0112] In step 5, the first tunnel oxide material layer 11, the polycrystalline silicon doped material layer 301, and the first oxide material layer 302 plated by winding around the second surface S of the substrate 40 and each side surface of the substrate 40 are removed, and a first tunnel oxide layer 10, a polycrystalline silicon doped conductive layer 30, and a first oxide layer are sequentially formed on the first surface F of the substrate 40. Also, the polycrystalline silicon doped conductive layer 30 is, namely, a first polycrystalline silicon doped conductive layer 31 and a second polycrystalline silicon doped conductive layer 32. The first oxide layer is removed, and at least a part of the region corresponding to the through hole 303 in the first tunnel oxide layer 10 is removed along its thickness direction, defining a hole 50 together with the corresponding through hole 303. The formed structure is as shown in FIG. 6, and the structure of the hole 50 is as shown in FIGS. 7 and 8.

[0113] In step 6, by means of PECVD, a second tunnel oxide layer 20 is formed on the polycrystalline silicon doped conductive layer 30, and the second tunnel oxide layer 20 is filled in the hole 50. The thickness range of the second tunnel oxide layer 20 is the same as that of the first tunnel oxide layer 10 and is as shown in FIG. 9.

[0114] In step 7, referring to FIG. 10, a second passivation film layer 80 is formed on the surface of the doped conductive layer 60 away from the substrate 40, a first passivation film layer 70 is formed on the surface of the second tunnel oxide layer 20 away from the substrate 40, and a first electrode 91 and a second electrode 92 are formed on the first passivation film layer 70 and the second passivation film layer 80, respectively. Also, the materials of the first passivation film layer 70 and the second passivation film layer 80 may include aluminum oxide, silicon nitride, silicon oxynitride, silicon oxide, and the like.

[0115] The solar cell 200 manufactured by the method in the embodiment of the present application provides more hydrogen to passivate the surface of the substrate 40, has a sufficient passivation effect, and at the same time, when too much hydrogen escapes, the second tunnel oxide layer 20 is deposited on the surface of the polycrystalline silicon doped conductive layer 30. In addition, the polycrystalline silicon doped conductive layer 30 has holes 50, whereby the quality of surface passivation is improved and supplemented. Compared with the structure without holes, the quality of surface passivation can be improved, surface recombination can be reduced, and the conversion efficiency of the solar cell 200 can be improved.

[0116] The third aspect according to the embodiment of the present application provides a photovoltaic module (not shown), which includes at least one battery string. The battery string includes at least two of the above-described solar cells 200, and between each solar cell 200, they are connected in a series welding manner.

[0117] The fourth aspect according to the embodiment of the present application provides a photovoltaic system (not shown), which includes the above-described photovoltaic module.

[0118] The photovoltaic system may be applied to a photovoltaic power station, such as a ground power station, a rooftop power station, a water surface power station, etc., and may also be applied to a device or apparatus that generates electricity using solar energy, such as a user's solar energy power source, a solar energy street lamp, a solar energy vehicle, a solar energy building, etc. Of course, as can be understood, the application scenarios of the photovoltaic system are not limited to this. That is, the photovoltaic system may be applied to all fields that need to generate electricity using solar energy. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a power collection box, and an inverter. The photovoltaic array may be a combination of an array of a plurality of photovoltaic modules. For example, a plurality of photovoltaic modules may form a plurality of photovoltaic arrays. The photovoltaic array is connected to the power collection box, and the power collection box can collect the current generated by the photovoltaic array. The collected current is converted into alternating current power required by the commercial power grid by the inverter and then introduced into the commercial power grid to realize solar energy power supply.

[0119] As described above, each technical feature of the embodiments can be arbitrarily combined. For the sake of brevity of description, not all possible combinations of each technical feature in the above embodiments are described. However, as long as there is no contradiction in these combinations of technical features, they should all be considered to be within the scope described in this specification.

[0120] The above embodiments only represent some embodiments of the present invention, and their descriptions are relatively specific and detailed, but should not be understood as limiting the scope of the invention patent claims. For those skilled in the art, on the premise of not departing from the concept of the present invention, some modifications and improvements can be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent claims is based on the appended patent claims.

Description of Reference Numerals

[0121] 100 passivation contact structure, 10 first tunnel oxide layer, 11 first tunnel oxide material layer, 20 second tunnel oxide layer, 30 polycrystalline silicon doped conductive layer, 301 polycrystalline silicon doped material layer, 302 first oxide material layer, 303 through hole, 31 first polycrystalline silicon doped conductive layer, 32 second polycrystalline silicon doped conductive layer, 40 substrate, 50 hole, 60 doped conductive layer, 70 first passivation film layer, 80 second passivation film layer, 91 first electrode, 92 second electrode, 200 solar cell, F first surface, S second surface.

Claims

1. A solar cell, comprising: a substrate and a passivation contact structure; the passivation contact structure includes a first tunnel oxide layer and a polycrystalline silicon doped conductive layer sequentially provided on one surface of the substrate; a plurality of holes are formed at intervals in at least a partial region of the polycrystalline silicon doped conductive layer and the first tunnel oxide layer, and each of the holes penetrates the polycrystalline silicon doped conductive layer and extends into the first tunnel oxide layer; the passivation contact structure further includes a second tunnel oxide layer; the second tunnel oxide layer has: a first portion formed on a surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxide layer; and a second portion filled in each of the holes; Characterized in that it is a solar cell.

2. At least some of the holes penetrate the first tunnel oxide layer. The solar cell according to claim 1, characterized in that.

3. The cross-sectional contour of the hole is circular, and the diameter of the hole is 100 nm or more, or The cross-sectional contour of the hole is polygonal, and at least one side length of the polygon is 100 nm or more. The solar cell according to claim 1, characterized in that.

4. The thickness of the first tunnel oxide layer is equal to the thickness of the first portion of the second tunnel oxide layer, and / or The material of the first tunnel oxide layer is the same as the material of the second tunnel oxide layer. The solar cell according to claim 1, characterized in that.

5. The thickness of the first portion of the second tunnel oxide layer is 0.5 nm to 5 nm. The solar cell according to claim 4, characterized in that.

6. The polycrystalline silicon doped conductive layer includes a first polycrystalline silicon doped conductive layer and a second polycrystalline silicon doped conductive layer which are stacked; The first polycrystalline silicon doped conductive layer is adjacent to the first tunnel oxide layer, the second polycrystalline silicon doped conductive layer is adjacent to the first portion of the second tunnel oxide layer, and the doping concentration of the first polycrystalline silicon doped conductive layer is lower than the doping concentration of the second polycrystalline silicon doped conductive layer. The solar cell according to any one of claims 1 to 5, characterized in that.

7. The reflectivity of the first surface of the substrate is greater than 30%, and / or The roughness of the first surface of the substrate is less than 1 μm. The first surface is the surface of the substrate where the first tunnel oxide layer is provided. The solar cell according to any one of claims 1 to 5, characterized in that.

8. A first passivation film layer laminated and installed on the surface of the first part of the second tunnel oxide layer away from the substrate; Further comprising a doped conductive layer and a second passivation film layer laminated and installed in sequence on the surface of the substrate away from the first tunnel oxide layer. The solar cell according to claim 7, characterized in that.

9. A method for manufacturing a solar cell, comprising: Forming a first tunnel oxide layer and a polycrystalline silicon doped conductive layer laminated in sequence on one surface of a substrate, wherein a plurality of holes are formed at intervals in at least a part of the region between the polycrystalline silicon doped conductive layer and the first tunnel oxide layer, and each of the holes penetrates the polycrystalline silicon doped conductive layer and extends into the first tunnel oxide layer; Forming a second tunnel oxide layer having a first part on the surface of the polycrystalline silicon doped conductive layer away from the first tunnel oxide layer and a second part filling each of the holes. The method for manufacturing a solar cell, characterized in that.

10. Forming a first tunnel oxide layer and a polycrystalline silicon doped conductive layer laminated in sequence on one surface of the substrate described above means: Forming a first tunnel oxide material layer, a polycrystalline silicon doped material layer, and a first oxide material layer in sequence on the first surface of the substrate, forming a plurality of through holes in the polycrystalline silicon doped material layer and the first oxide material layer, and exposing the region of the first tunnel oxide material layer corresponding to the through holes; Removing the first tunnel oxide material layer, the polycrystalline silicon doped material layer, and the first oxide material layer plated by winding on the second surface of the substrate and each side surface of the substrate, and forming the first tunnel oxide layer, the polycrystalline silicon doped conductive layer, and the first oxide layer in sequence on the first surface of the substrate, wherein the first surface and the second surface are arranged opposite to each other, and each side surface of the substrate is adjacent between the first surface and the second surface; Removing the first oxide layer, and at least partially removing the region of the first tunnel oxide layer corresponding to the through holes along the thickness direction of itself to define the holes together with the corresponding through holes. The method for manufacturing a solar cell according to claim 9, characterized in that.

11. Forming a first tunnel oxide material layer, a polycrystalline silicon doped material layer, and a first oxide material layer in sequence on the first surface of the substrate described above means that forming a first tunnel oxide material layer, an amorphous silicon doped material layer, and a first oxide material layer in sequence on the first surface of the substrate; and performing an annealing process to convert the amorphous silicon doped material layer into a polycrystalline silicon doped material layer, and forming a plurality of through holes in the polycrystalline silicon doped material layer and the first oxide material layer, including The method for manufacturing a solar cell according to claim 10, characterized in that.

12. The process conditions of the annealing process are as follows: The reaction temperature is raised from 25°C to a first predetermined temperature at a rate greater than 5°C / min and held for a predetermined time. The first predetermined temperature is greater than 600°C. The reaction temperature is lowered from the first predetermined temperature to a second predetermined temperature at a rate greater than 2°C / min. The second predetermined temperature is smaller than the first predetermined temperature and greater than 600°C. The reaction temperature is lowered from the second predetermined temperature to a third predetermined temperature at a rate greater than 20°C / min. The third predetermined temperature is smaller than 100°C. The method for manufacturing a solar cell according to claim 11, characterized in that.

13. Forming the amorphous silicon doped material layer described above means that forming a first amorphous silicon material layer and a second amorphous silicon material layer in sequence on the surface of the first tunnel oxide material layer away from the substrate, and the effective electrical activation doping concentration of the first amorphous silicon material layer is smaller than that of the second amorphous silicon material layer, including The method for manufacturing a solar cell according to claim 11, characterized in that.

14. The effective electrical active doping concentration of the first amorphous silicon material layer is less than 2E20 cm -3 and the effective electrical active doping concentration of the second amorphous silicon material layer is 2E20 cm -3 or more. The method for manufacturing a solar cell according to claim 13, characterized in that.

15. Before forming a first tunnel oxide layer and a polycrystalline silicon doped conductive layer in sequence on one surface of the substrate described above, further performing an etching process on the first surface of the substrate and making the reflectivity of the first surface greater than 30%, and / or performing an etching process on the first surface of the substrate and making the roughness of the first surface of the substrate smaller than 1μm, including The first surface is the surface of the substrate where the first tunnel oxide layer is provided. The method for manufacturing a solar cell according to claim 9, characterized in that...

16. After forming the first portion of the second tunnel oxidation layer on the surface of the polycrystalline silicon doped conductive layer that is away from the first tunnel oxidation layer as described above, further... Forming a first passivation film layer on the surface of the first portion of the second tunnel oxidation layer that is away from the substrate, including... The method for manufacturing a solar cell according to claim 15, characterized in that...

17. A photovoltaic module, comprising... At least one cell string, the cell string including at least two solar cells according to any one of claims 1 to 5... The photovoltaic module, characterized in that...

18. A photovoltaic system, comprising... Including the photovoltaic module according to claim 17... The photovoltaic system, characterized in that...

Images