In-vehicle camera

Abstract

To provide an on-vehicle camera capable of efficiently transmitting images to a vehicle.SOLUTION: The on-vehicle camera has an image sensor, an optical system, and a memory. The image sensor includes X1 pixels arranged in the row direction, and Y1 pixels arranged in the column direction in an effective pixel area R1. The optical system has at least one lens in which an optical axis AX of the lens intersects with the effective pixel area of the image sensor. The memory stores a position of the recording pixel area. The recording pixel area is an area inside the effective pixel area. In the recording pixel area, X2 pixels are arranged in the row direction, and Y2 pixels are arranged in the column direction. X2 is smaller than X1. Y2 is smaller than Y1. The on-vehicle camera reads the position of the recording pixel area from the memory in response to the activation of the image sensor and outputs an output image corresponding to the recording pixel area from the effective pixel area of the image sensor and the position of the recording pixel area.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present disclosure relates to an in-vehicle camera.

Background Art

[0002] When an in-vehicle camera connected to a vehicle acquires an image around the vehicle, it transfers the image to the vehicle side. In the in-vehicle camera, it is desired to transfer the image to the vehicle side efficiently.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides an in-vehicle camera capable of efficiently transferring an image to the vehicle side.

Means for Solving the Problems

[0005] The in-vehicle camera according to the present disclosure has an imaging sensor, an optical system, and a memory. The imaging sensor has a first pixel region. In the first pixel region, X1 pixels are arranged in a first direction, and Y1 pixels are arranged in a second direction. The second direction intersects the first direction. The first pixel region is a region of a first quadrilateral. The optical system has at least one lens. The optical system has an optical axis. The optical axis intersects the first pixel region of the imaging sensor. The memory stores the position of a second pixel region. The second pixel region is an inner region of the first pixel region. In the second pixel region, X2 pixels are arranged in the first direction, and Y2 pixels are arranged in the second direction. X2 is smaller than X1. Y2 is smaller than Y1. The second pixel region is a region of a second quadrilateral. The in-vehicle camera reads out the position of the second pixel region from the memory in response to activation of the imaging sensor. The in-vehicle camera , the corresponding to the 2 pixel regions , horizontal synchronization signal, vertical synchronization signal, number of vertical blanking pixels, and number of horizontal blanking pixels are given to the imaging sensor, and correspondingly, the imaging sensor outputs output image externally outputs, and outputs the position of the second pixel region externally as well.

Advantages of the Invention

[0006] According to the in-vehicle camera of the present disclosure, an image can be efficiently transferred to the vehicle side.

Brief Description of the Drawings

[0007] [Figure 1] Top view showing a vehicle equipped with the in-vehicle camera according to the first embodiment. [Figure 2] Front view showing the configuration of the in-vehicle camera according to the first embodiment. [Figure 3] Cross-sectional view showing the configuration of the in-vehicle camera according to the first embodiment. [Figure 4] Block diagram showing the configuration of the in-vehicle camera according to the first embodiment. [Figure 5] Diagram showing the effective pixel region and the recording pixel region of the pixel array in the first embodiment. [Figure 6] Flowchart showing the manufacturing method of the in-vehicle camera according to the first embodiment. [Figure 7] Flowchart showing the operation of the in-vehicle camera according to the first embodiment. [Figure 8] Diagram showing the operation of the in-vehicle camera according to the first embodiment. [Figure 9] Diagram showing the effective pixel region and the recording pixel region of the pixel array in the second embodiment. [Figure 10] Flowchart showing the manufacturing method of the in-vehicle camera according to the second embodiment. [Figure 11] Flowchart showing the operation of the in-vehicle camera according to the second embodiment. [Figure 12] Diagram showing the operation of the in-vehicle camera according to the second embodiment.

Modes for Carrying Out the Invention

[0008] Hereinafter, embodiments of the in-vehicle camera according to the present disclosure will be described with reference to the drawings.

[0009] (First Embodiment)

[0010] The in-vehicle camera according to the first embodiment is connected to a vehicle, acquires an image around the vehicle 100, and transfers the image to the vehicle side. However, a device is provided for efficiently transferring the image to the vehicle side.

[0011] The in-vehicle camera 1 can be mounted on a vehicle 100 as shown in FIG. 1. FIG. 1 is a top view showing the vehicle 100 on which the in-vehicle camera 1 is mounted. The in-vehicle camera 1 is installed outside the vehicle body 101 and can acquire an image around the vehicle. The vehicle 100 can process the image around the vehicle acquired by the in-vehicle camera 1 and output the processed image to a predetermined display device.

[0012] In FIG. 1, a configuration in which a plurality of in-vehicle cameras 1_1, 1_2, 1_3, 1_4 are installed at the rear end 101a, the side end (right side in FIG. 1) 101b, the side end (left side in FIG. 1) 101c, and the front end 101d of the vehicle body 101, respectively, is illustrated. The images acquired by the in-vehicle cameras 1_1, 1_2, 1_3, 1_4 can be displayed on the display 102, respectively.

[0013] In FIG. 1, four in-vehicle cameras 1_1 to 1_4 are illustrated, but the number of the in-vehicle cameras 1 may be three or less or five or more. The installation location of the in-vehicle camera 1 may be other locations where images around the vehicle in the vehicle body 101 can be acquired. Alternatively, the installation location of the in-vehicle camera 1 may be other locations where images inside the vehicle cabin in the vehicle body 101 can be acquired. The output destination of the image may be an output device other than the display 102.

[0014] As shown in FIGS. 2 and 3, the in-vehicle camera 1 has a configuration suitable for being mounted on the vehicle 100. FIG. 2 is a plan view showing the configuration of the in-vehicle camera 1. FIG. 3 is a cross-sectional view showing the configuration of the in-vehicle camera. FIG. 3 shows a cross-section when FIG. 2 is cut along line A-A. Hereinafter, the optical axis direction of the in-vehicle camera 1 is defined as the Z direction, and two directions orthogonal to each other in a plane perpendicular to the Z direction are defined as the X direction and the Y direction.

[0015] The in-vehicle camera 1 includes an optical system 2, a housing 31, an imaging sensor 3, an ISP (Image Signal Processor) 4, a non-volatile memory 5, a circuit board 34, a connector 7, potting 32, and a welding ring 33.

[0016] The optical system 2 includes a lens 2a and a lens barrel 2b. The lens 2a is arranged on the upstream side (+Z side) of the optical axis AX in the in-vehicle camera 1. The lens 2a can form a subject image on its imaging surface. The lens 2a may have distortion aberration. The lens 2a is formed of a light-transmissive member such as glass. In FIG. 1, a configuration in which the optical system 2 has one lens 2a is illustrated, but the optical system 2 may have a plurality of lenses 2a.

[0017] The lens barrel 2b holds the lens 2a from the outside in the XY direction. The lens barrel 2b has a cavity 2c through which the optical axis AX passes inside in the XY direction, and guides the light of the lens 2a along the optical axis AX to its downstream side (-Z side). The lens barrel 2b may be formed of a light-shielding material.

[0018] The housing 31 is a box-shaped member with the +Z side open. The housing 31 can be formed of a light-shielding material. The housing 31 is arranged on the -Z side of the optical system 2. The housing 31 houses the imaging sensor 3, the ISP 4, the non-volatile memory 5, and the circuit board 34.

[0019] The -Z side end of the lens barrel 3b is connected. The portion outside the XY direction of the lens barrel 3b at the +Z side end of the housing 31 is covered with the welding ring 33.

[0020] The circuit board 34 is fixed to the housing 31 by screwing or the like. At least the imaging sensor 3 is mounted on the circuit board 34. The ISP 4 and the non-volatile memory 5 may be further mounted on the circuit board 34. The imaging sensor 3, the ISP 4, and the non-volatile memory 5 may be mounted on separate chips, and each may be mounted on the main surface on the +Z side of the circuit board 34. Potting 32 may be interposed between the circuit board 34 and the housing 31. The potting 32 can be formed of a waterproof material.

[0021] Note that the imaging sensor 3, the ISP 4, and the non-volatile memory 5 may be mounted on one chip or may be mounted separately on a plurality of chips. The imaging sensor 3 and the ISP 4 may be mounted on one chip, and the non-volatile memory 5 may be mounted on another chip.

[0022] The imaging sensor 3, the ISP 4, and the non-volatile memory 5 may be mounted on different circuit boards. For example, the in-vehicle camera 1 may further have a circuit board 35 (not shown), the imaging sensor 3 and the ISP 4 may be mounted on the same circuit board 34 as one chip or separate chips, and the non-volatile memory 5 may be mounted on another circuit board 35. Alternatively, the imaging sensor 3 may be mounted on the same circuit board 34 as one chip, and the ISP 4 and the non-volatile memory 5 may be mounted on another circuit board 35 as one chip or separate chips.

[0023] The imaging sensor 3 is arranged near the imaging plane of the lens 2a. The imaging sensor 3 may be, for example, a CMOS (Complementary Metal Oxide Semiconductor) type image sensor or a CCD (Charge Coupled Device) type image sensor.

[0024] The ISP 4 is capable of performing predetermined processing on the signal output from the imaging sensor 3. In the ISP 4, the predetermined processing may be implemented in hardware, may be implemented in software, or some processing may be implemented in hardware and the remaining processing may be implemented in software. The ISP 4 may be arranged near the imaging sensor 3.

[0025] The non-volatile memory 5 can store the information received from the ISP 4 in a non-volatile manner. The non-volatile memory 5 may be arranged near the ISP 4. The non-volatile memory 5 may be a flash memory, a ReRAM (Resistive Random Access Memory), a FeRAM (Ferroelectric Random Access Memory), an MRAM (Magnetoresistive Random Access Memory), or the like.

[0026] The connector 7 functions as a mechanical connector for connecting the in-vehicle camera 1 to the vehicle body 101 of the vehicle 100.

[0027] The connector 7 is arranged on the -Z side of the housing 31 and is connected to the housing 31. The connector 7 is connected to the vehicle body 101 via a fixing member (not shown). Thereby, the in-vehicle camera 1 is installed on the vehicle body 101.

[0028] As shown in FIG. 4, the connector 7 also functions as an electrical connector for connecting the in-vehicle camera 1 to the camera ECU (Electronic Control Unit) 100 via the cable 20 (production location in FIG. 4). FIG. 4 is a block diagram showing the configuration of the in-vehicle camera 1.

[0029] In this specification, when the first element and the second element are "electrically connected", it shall include that a third element is interposed and connected between the first element and the second element within a range that does not interfere with the respective functions of the first element and the second element.

[0030] The camera ECU 100 can be arranged within the vehicle body 101 of the vehicle 100. One end of the cable 20 has a connector 27 that can be connected to the connector 7, and the connector at the other end can be connected to a part in the vehicle 100 (for example, a connector for connecting to the camera ECU 100). In FIG. 4, for the sake of simplicity, the illustration of the connector at the other end of the cable 20 is omitted.

[0031] The cable 20 can mediate serial communication between the in-vehicle camera 1 and the camera ECU 100. The cable 20 may transmit a single-ended signal or a differential signal between the in-vehicle camera 1 and the camera ECU 100.

[0032] Due to channel loss caused by skin effect of the conductor, dielectric loss, etc. of the cable 20, the high-frequency component of the signal intensity loss in the transmitted signal is more likely to be larger than the low-frequency component. Therefore, the bandwidth capable of transmitting signals by the cable 20 may be limited to be below the upper limit frequency Fth. The upper limit frequency Fth may be 148.5 MHz. By performing signal transmission via the cable 20 at a frequency below the upper limit frequency Fth, the signal quality in serial communication can be guaranteed.

[0033] When the cable 20 transmits a single-ended signal, it may be a coaxial cable. Accordingly, the connector 7 of the in-vehicle camera 1 and the connector 27 of the cable 20 may each be a coaxial connector.

[0034] When the cable 20 transmits differential signals, it may be a twisted pair cable. The cable 20 may be a twisted pair cable compliant with the C2B (Car Camera Bus) (registered trademark) standard. Accordingly, the connector 7 of the in-vehicle camera 1 and the connector 27 of the cable 20 may each be a connector for a twisted pair cable. In FIGS. 3 and 4, the configuration when the cable 20 transmits differential signals is illustrated.

[0035] The connector 7 shown in FIG. 3 has a cavity 7a. The connector 7 has a plurality of connection terminals 71, 72, 73, 74 in the cavity 7a. Each of the connection terminals 71, 72, 73, 74 may be a male connection terminal. Each of the connection terminals 71, 72, 73, 74 projects from the bottom surface 7a1 of the cavity 7a toward the -Z side.

[0036] The connector 27 of the cable 20 shown in FIG. 4 may be insertable into the cavity 7a of the connector 7. The connector 27 has a plurality of terminals 21 to 24. The connection terminals 21, 22, 23, 24 of the connector 27 correspond to the connection terminals 71, 72, 73, 74 of the connector 7. Each of the connection terminals 21 to 24 may be a female connection terminal configured to be engageable with a corresponding connection terminal (for example, the male connection terminal shown in FIG. 3).

[0037] The cable 20 has a plurality of communication lines CL1 to CL4 corresponding to the plurality of connection terminals 21, 22, 23, 24. The camera ECU 110 has a CPU (Central Processing Unit) 111, a decoder (DECODER) 112, and a main power supply 113. The communication lines CL1 and CL2 connect the in-vehicle camera 1 and the decoder 112 and transmit differential signals SIG+ and SIG- between the in-vehicle camera 1 and the decoder 112. The communication lines CL3 and CL4 connect the in-vehicle camera 1 and the main power supply 113 and transmit the ground potential GND and the power supply potential PWR from the main power supply 113 to the in-vehicle camera 1, respectively.

[0038] The in-vehicle camera 1 includes an oscillator 6, an encoder (ENCODER) 8, and a power supply circuit 9 in addition to an optical system 2, an imaging sensor 3, an ISP 4, a non-volatile memory 5, and a connector 7. The imaging sensor 3 includes a pixel array 3a and a peripheral circuit 3b.

[0039] Note that the oscillator 6, the encoder 8, and the power supply circuit 9 may be mounted on the same circuit board 34 (see FIG. 3) as the imaging sensor 3, or may be mounted on another circuit board 35 (not shown).

[0040] The connector 7 has a plurality of connection terminals 71 to 74. Among the plurality of connection terminals 71 to 74, the connection terminals 71 and 72 form a differential pair and function as terminals for differential signals with opposite phases to each other. The connection terminals 71 and 72 are each electrically connected to the ISP 4 via the encoder 8. The connection terminal 73 functions as a ground terminal, and the connection terminal 74 functions as a power supply terminal. The connection terminals 73 and 74 are each electrically connected to the power supply circuit 9.

[0041] The power supply circuit 9 receives a ground potential GND and a power supply potential PWR via the connection terminals 73 and 74 of the connector 7. The power supply circuit 9 is connected to the oscillator 6, the imaging sensor 3, the ISP 4, the non-volatile memory 5, and the encoder 8 via power supply lines. The power supply circuit 9 can supply power to each of the oscillator 6, the imaging sensor 3, the ISP 4, the non-volatile memory 5, and the encoder 8 via the power supply lines.

[0042] The optical axis AX of the optical system 2 intersects the pixel array 3a of the imaging sensor 3.

[0043] In the pixel array 3a of the imaging sensor 3, as shown in FIG. 5, a plurality of pixels are arranged so as to form a plurality of rows and a plurality of columns. FIG. 5 is a diagram showing an effective pixel region R1 and a recording pixel region R2 of the pixel array 3a. The direction along a row is called the row direction, and the direction along a column is called the column direction. The row direction and the column direction may be orthogonal, or may intersect at a predetermined angle (for example, 89 to 91°). The row direction is also called the horizontal direction. The column direction is also called the vertical direction.

[0044] In FIG. 5, a pixel array 3a in which pixels of Y1 rows × X1 columns are arranged is illustrated. A region corresponding to the entire pixel array 3a is referred to as an effective pixel region R1. In the effective pixel region R1, X1 pixels are arranged in the row direction, and Y1 pixels are arranged in the column direction. X1 and Y1 are each natural numbers. The effective pixel region R1 has a first quadrilateral. The first quadrilateral may be a first rectangle having the row direction as the longitudinal direction. In this case, for example, X1 may be 1572 and Y1 may be 1016.

[0045] The peripheral circuit 3b shown in FIG. 4 is connected to the oscillator 6 via the control line 61 and can receive a timing signal via the control line 61.

[0046] The ISP4 is connected to the peripheral circuit 3b via the control line 41 and connected to the encoder 8 via the control line 44. The control line 44 may conform to the I2C (Inter-Integrated Circuit) system. The ISP4 and the encoder 8 may establish communication with a connection destination via the control line 44 in accordance with the I2C system with each other. The ISP4 generates a synchronization signal and a control signal, supplies them to the peripheral circuit 3b via the control line 41, and supplies them to the encoder 8 via the control line 44 in accordance with the I2C system. The synchronization signal includes a horizontal synchronization signal HREF, a vertical synchronization signal Vsync, and a pixel clock PCLK. The control signal includes the number of vertical blanking pixels V1 and V2.

[0047] Here, the in-vehicle camera 1 acquires, for example, a moving image and transfers it to the vehicle 100 side (camera ECU110 side) via the cable 20, but it is required to satisfy a predetermined frame rate according to the specifications of the vehicle 100. As described above, the cable 20 can have a transmission band for signals limited to a maximum frequency Fth or less. For example, when an image of the effective pixel region R1 is transmitted to the vehicle 100 side via the cable 20 at a speed of the maximum frequency Fth or less, the data amount of the image is too large, and it tends to be difficult to satisfy a predetermined frame rate.

[0048] Therefore, ISP4 can control the peripheral circuit 3b to output the signal of the output image corresponding to the recording pixel region R2 in the effective pixel region R1. The recording pixel region R2 is an inner region of the effective pixel region R1 and is a partial region of the effective pixel region R1. The peripheral circuit 3b can drive the pixel array 3a so that pixel signals are selectively output from the recording pixel region R2 according to the timing signal from the oscillator 6, the synchronization signals (horizontal synchronization signal HREF, vertical synchronization signal Vsync, pixel clock PCLK) from ISP4, and the control signals (number of vertical blanking pixels V1, V2).

[0049] For example, the recording pixel region R2 shown in FIG. 5 can be defined according to the horizontal synchronization signal HREF, the vertical synchronization signal Vsync, the number of vertical blanking pixels V1, V2, etc.

[0050] The recording pixel region R2 is an inner region of the effective pixel region R1 in the pixel array 3a. In the recording pixel region R2, X2 pixels are arranged in the row direction and Y2 pixels are arranged in the column direction. X2 and Y2 are natural numbers respectively. X2 and Y2 can be determined experimentally in advance according to the upper limit frequency Fth at which signals can be transmitted by the cable 20 respectively.

[0051] The peripheral circuit 3b performs a readout scan of reading pixel signals from the pixels in each column included in the selected pixel row while sequentially selecting a plurality of pixel rows according to the horizontal synchronization signal HREF, the vertical synchronization signal Vsync, the pixel clock PCLK, and the number of vertical blanking pixels V1, V2.

[0052] For example, the peripheral circuit 3b starts the readout scan from the first row in response to the rising edge of the vertical synchronization signal Vsync. The peripheral circuit 3b counts which row the selected pixel row is. The peripheral circuit 3b skips the first row to the V1-th row according to the number of vertical blanking pixels V1. The peripheral circuit 3b sequentially selects the pixels of the (V1 + 1)-th row from left to right in FIG. 5 according to the pixel clock PCLK, and starts outputting the pixel signals of the selected pixels to the signal line 42 when the horizontal synchronization signal HREF changes from the non-active level (e.g., L level) to the active level (e.g., H level). The peripheral circuit 3b further sequentially selects the pixels of the (V1 + 1)-th row according to the pixel clock PCLK, and stops outputting to the signal line 42 of the pixel signals when the horizontal synchronization signal HREF changes from the active level to the non-active level. When the peripheral circuit 3b selects the pixels of the (V1 + 1)-th row to the right end according to the pixel clock PCLK, it increments the row number to V1 + 2, and starts selecting the pixels of the (V1 + 2)-th row from the left according to the pixel clock PCLK. Thereafter, the same operation is repeated until the (V1 + Y2)-th row. When the peripheral circuit 3b selects the pixels of the (V1 + Y2)-th row to the right end according to the pixel clock PCLK, it increments the row number to V1 + Y2 + 1, skips the (V1 + Y2 + 1)-th row to the Y1-th row according to the number of vertical blanking pixels V2 (= Y1 - (V1 + Y2)), and ends the readout scan.

[0053] X2 is smaller than X1, and the following mathematical formula 1 holds. X1 = H1 + X2 + H2 ··· Mathematical formula 1

[0054] In Mathematical formula 1, H1 is the number of horizontal blanking pixels on the left side of the recording pixel region R2 in FIG. 5. H2 is the number of horizontal blanking pixels on the right side of the recording pixel region R2 in FIG. 5.

[0055] The horizontal blanking pixel number H1 corresponds to the number of pixel clocks in the horizontal blanking period during which the horizontal synchronization signal HREF is maintained at the L level before becoming the H level. The horizontal blanking pixel number H2 corresponds to the number of pixel clocks in the horizontal blanking period during which the horizontal synchronization signal HREF is maintained at the L level after changing from the H level to the L level.

[0056] Y2 is smaller than Y1, and the following Equation 2 holds. Y1 = V1 + Y2 + V2 ··· Equation 2

[0057] In Equation 2, V1 is the number of vertical blanking pixels above the recording pixel region R2 in FIG. 5. V2 is the number of vertical blanking pixels below the recording pixel region R2 in FIG. 5.

[0058] The vertical blanking pixel number V1 corresponds to the number of vertical blanking lines that skip the reading of pixel signals from the rising edge timing of the vertical synchronization signal Vsync. The vertical blanking pixel number V2 corresponds to the number of vertical blanking lines that skip the reading of pixel signals after the reading of the pixel signals in the (V1 + Y2)-th row is completed.

[0059] The recording pixel region R2 has a second quadrilateral. The second quadrilateral may be a second rectangle. In this case, for example, X2 may be 1280 and Y2 may be 960.

[0060] The position of the recording pixel region R2 in the effective pixel region R1 can be set such that the center PC of the recording pixel region R2 substantially coincides with the center of the effective pixel region R1. At this time, the following Equation 3 holds. H1 = H2, V1 = V2 ··· Equation 3

[0061] The position in the effective pixel region R1 can be represented by pixel coordinates. Assume that the pixel coordinates are represented by (row number, column number). The position of the pixel at the upper left corner of the effective pixel region R1 in FIG. 5 is set as the origin (1, 1) of the pixel coordinates.

[0062] The pixel coordinates (Bx, By) of the center PC of the recording pixel region R2 can be set to approximately coincide with the center of the effective pixel region R1 and satisfy the following mathematical formula 4. Bx = X1 / 2, By = Y1 / 2 ··· Mathematical formula 4

[0063] On the other hand, the optical axis AX of the optical system 2 intersects at a position deviated from the center of the effective pixel region R1 and also intersects at a position deviated from the center PC of the recording pixel region R2. As described above, the lens 2a of the optical system 2 has distortion aberration and can form a subject image distorted in a barrel shape or a spiral shape in the effective pixel region R1. The distortion center DC of the subject image is at a position deviated from the center of the effective pixel region R1 and also at a position deviated from the center PC of the recording pixel region R2.

[0064] The position of the distortion center DC is stored non-volatilely in the non-volatile memory 5. The position of the distortion center DC is represented by the pixel coordinates (Cx, Cy) of the distortion center DC. The pixel coordinates (Cx, Cy) of the distortion center DC satisfy the following mathematical formula 5. Cx ≠ Bx, Cy ≠ By ··· Mathematical formula 5

[0065] The pixel array 3a shown in FIG. 4 is connected to the ISP4 via the signal line 42.

[0066] The ISP4 can receive a plurality of pixel signals output from the recording pixel region R2 in the pixel array 3a via the signal line 42. The ISP4 performs predetermined processing on the plurality of pixel signals to generate image information of the recording pixel region R2. The image information can include signals in an arbitrary color space system, for example, it can include YUV signals. The YUV signal includes a Y signal indicating the luminance component, a U signal indicating the color difference between the luminance component and the blue component, and a V signal indicating the color difference between the luminance component and the red component. The YUV signal can adopt any data format of the YUV system, and it may adopt the YUV422 format. In YUV422, since the signals of two adjacent pixels are taken as a set and some information is shared, the data amount can be reduced while preventing deterioration of the image quality.

[0067] ISP4 is connected to the encoder 8 via a data bus 43 with a plurality of bit widths (for example, 8-bit width). The data bus 43 may support the I2C system. ISP4 and the encoder 8 may establish communication with the connection destination via the data bus 43 in accordance with the I2C system with each other. ISP4 can transfer the image information of the recording pixel area R2 to the encoder 8 via bus wiring as a parallel signal of a plurality of bits (for example, 8 bits) in accordance with the I2C system.

[0068] The encoder 8 receives the image information of the recording pixel area R2 as a parallel signal. The encoder 8 performs parallel-serial conversion on the image information of the recording pixel area R2 to form the image information of the recording pixel area R2 in the form of a serial signal. The encoder 8 differentializes the serial signal to generate differential signals SIG+, SIG- and outputs them to the decoder 112 of the camera ECU 110 via the connector 7 and the cable 20.

[0069] The non-volatile memory 5 is connected to ISP4 via a control line 51. The control line 51 may support the SPI (Serial Peripheral Interface) system. ISP4 and the non-volatile memory 5 may establish communication with the connection destination via the control line 51 in accordance with the SPI system with each other.

[0070] For example, ISP4 causes the non-volatile memory 5 to store the information on the position of the distortion center DC via the control line 51. The position of the distortion center DC may include the pixel coordinates (Cx, Cy) of the distortion center DC. ISP4 reads the position of the distortion center DC from the non-volatile memory 5 via the control line 51.

[0071] ISP4 is connected to the encoder 8 via a control line 45. The control line 45 may support the I2C system. ISP4 and the encoder 8 may establish communication with the connection destination via the control line 45 in accordance with the I2C system with each other. ISP4 can exchange serial signals with the encoder 8 in accordance with the I2C system.

[0072] For example, ISP4 receives, via control line 45, a serial signal indicating information on the position of distortion center DC from encoder 8. ISP4 supplies, via control line 45, a serial signal indicating information on the position of distortion center DC to encoder 8.

[0073] Encoder 8 receives, from ISP4, a serial signal indicating information on the position of distortion center DC. Encoder 8 may transmit, to camera ECU110 in a time-division manner, the image information of recording pixel region R2 and the information on the position of distortion center DC in accordance with the standard of serial communication (e.g., C2B (registered trademark)). Encoder 8 may add the serial signal of the information on the position of distortion center DC before or after the serial signal of the image information of recording pixel region R2. Encoder 8 may differentialize the serial signal of the information on the position of distortion center DC to generate differential signals SIG+, SIG- and output them to decoder 112 of camera ECU110 via connector 7 and cable 20.

[0074] When encoder 8 receives, via cable 20 from camera ECU110, a serial signal indicating information on the position of distortion center DC, encoder 8 may transfer, via control line 45 to ISP4, the serial signal indicating information on the position of distortion center DC.

[0075] Next, a method for manufacturing in-vehicle camera 1 will be described with reference to FIG. 6. FIG. 6 is a flowchart showing the method for manufacturing in-vehicle camera 1.

[0076] In-vehicle camera 1 is assembled (S1). For example, housing 31 and connector 7 are fabricated. Imaging sensor 3, ISP4, and non-volatile memory 5 are mounted on circuit board 34. Oscillator 6, encoder 8, and power supply circuit 9 may further be mounted on circuit board 34. Circuit board 34 is mounted in housing 31. Thereafter, adjustment of the optical axis AX of optical system 2, adjustment of the focus position of optical system 2, adjustment of the tilt of optical system 2, etc. are performed, and the relative mounting positions of lens barrel 2b of optical system 2 and housing 31 are adjusted. When the mounting position is determined, lens barrel 2b of optical system 2 is adhered to housing 31 with an adhesive or the like, and in-vehicle camera 1 is assembled.

[0077] The position of the distortion center DC of the optical system 2 is measured (S2). For example, a test device (not shown) is connected to the connector 7. For example, a grid-like test pattern is imaged by the imaging sensor 3, and the image of the effective pixel region R1 (see FIG. 5) imaged by the imaging sensor 3 is transferred to the test device via the ISP 4, the encoder 8, and the connector 7. The test device may have a monitor screen, and the transferred image of the effective pixel region R1 may be displayed on the monitor screen. The grid-like test pattern in the image of the effective pixel region R1 may be distorted into a barrel shape or a spool shape. The test device measures the position of the distortion center DC in the effective pixel region R1. The test device may determine, as the position of the distortion center DC, the pixel positions (Cx, Cy) at which the curvature of the distortion of the grid-like test pattern becomes substantially zero in the row direction and the column direction, respectively, in the effective pixel region R1.

[0078] The position of the distortion center DC is written into the non-volatile memory 5 (S3). For example, the test device writes the measurement result of the position of the distortion center DC into the non-volatile memory 5 via the connector 7, the encoder 8, and the ISP 4. Information on the pixel positions (Cx, Cy) of the distortion center DC may be written into the non-volatile memory 5.

[0079] When the test device receives a notification of completion of writing from the non-volatile memory 5 via the ISP 4, the encoder 8, and the connector 7, the test device is removed from the connector 7.

[0080] Thereby, the in-vehicle camera 1 is completed (S4). Thereafter, the connector 7 is connected to the camera ECU 110 via the cable 20 and the connector 7 is connected to the vehicle body 101 via a fixing member. Thereby, the in-vehicle camera 1 is electrically and mechanically installed in the vehicle 100.

[0081] Next, the operation of the in-vehicle camera 1 will be described with reference to FIG. 7. FIG. 7 is a flowchart showing the operation of the in-vehicle camera 1.

[0082] When the camera ECU 110 recognizes that the power-on of the in-vehicle camera 1 is requested in response to the establishment of a predetermined condition, it starts supplying power to the in-vehicle camera 1 (S101). The predetermined condition may be receiving a power-on request for the in-vehicle camera 1 from a higher-level controller (for example, an ECU that controls the entire vehicle 100), or the power supply power received from the battery or the power conversion device reaching a predetermined threshold value. When the camera ECU 110 receives the power supply power from the battery or the power conversion device, it generates the power supply power for the in-vehicle camera 1 using the received power supply power, and starts supplying it to the in-vehicle camera 1 via the communication lines CL3 and CL4 as the ground potential GND and the power supply potential PWR.

[0083] In response to this, the power supply circuit 9 of the in-vehicle camera 1 starts receiving power from the camera ECU 110 (S11) and enters the reset state.

[0084] In the camera ECU 110, when the level of the power supply potential PWR reaches the threshold level and a predetermined time has elapsed, the main power supply 113 locks the control of the level of the power supply potential PWR, and the CPU 111 confirms the lock (S102).

[0085] In the in-vehicle camera 1, when the level of the power supply potential PWR reaches the threshold level and a predetermined time has elapsed, the power supply circuit 9 releases its reset state (S12) and starts supplying power to each part.

[0086] The encoder 8 initializes in response to the start of power supply from the power supply circuit 9 (S13). The encoder 8 sets the values of various parameters to their initial values. For example, the encoder 8 sets the communication parameters such as the video mode and timing to their initial values.

[0087] The ISP 4 establishes communication via the control line 51 with the non-volatile memory 5 in response to the start of power supply from the power supply circuit 9. The ISP 4 may establish communication with the non-volatile memory 5 via the control line 51 according to the SPI method. The ISP 4 reads the information on the position of the distortion center DC from the non-volatile memory 5 via the control line 51 (S14). The ISP 4 holds the information on the position of the distortion center DC.

[0088] ISP4 establishes communication with the encoder 8 via the data bus 43 and the control lines 44, 45. ISP4 may establish communication with the encoder 8 via the data bus 43 and the control lines 44, 45 respectively according to the I2C protocol. Thereby, the data bus 43 and the control lines 44, 45 are opened (S15).

[0089] In the camera ECU 110, the decoder 112 makes settings for communicating with the in-vehicle camera 1 (S103). For example, the decoder 112 assigns the terminals 112a, 112b of the GPIO (General Purpose Input Output) to which the communication lines CL1, CL2 are connected as terminals for serial communication with the in-vehicle camera 1. The decoder 112 transmits the parameters for communication initial setting to the encoder 8 via the terminals 112a, 112b, the communication lines CL1, CL2, the connection terminals 21, 22, and the connection terminals 71, 72. The parameters for communication initial setting include the set values of the parameters for communication such as video mode timing.

[0090] In the in-vehicle camera 1, when the encoder 8 receives the parameters for communication initial setting, it sets the parameters for communication according to the parameters for communication initial setting (S16). For example, the encoder 8 changes the values of the parameters for communication such as video mode timing from the initial values to the set values included in the parameters for communication initial setting. When the setting is completed, the encoder 8 transmits a completion notification to the decoder 112 via the connection terminals 71, 72, the connection terminals 21, 22, the communication lines CL1, CL2, and the terminals 112a, 112b.

[0091] In the camera ECU 110, the decoder 112 receives the completion notification. Thereby, communication between the encoder 8 and the decoder 112 via the cable 20 can be established.

[0092] The decoder 112 establishes communication with the CPU 111 within the camera ECU 110. The decoder 112 may establish communication with the CPU 111 in accordance with the MIPI (Mobile Industry Processor Interface) standard. When communication with the CPU 111 is established, the decoder 112 sets parameters for transferring the image received from the in-vehicle camera 1 to the CPU 111 (S104). The transfer parameters may include the value of the frame rate. The frame rate of the transfer between the decoder 112 and the CPU 111 is higher than the frame rate of the communication between the decoder 112 and the encoder 8 via the cable 20.

[0093] In the in-vehicle camera 1, the ISP 4 controls the imaging sensor 3 to start the imaging operation. In response, the imaging sensor 3 acquires a subject image in the effective pixel region R1 corresponding to the entire pixel array 3a, as shown in FIG. 8(a), but selectively outputs pixel signals from a part thereof, the recording pixel region R2. FIG. 8 is a diagram showing the operation of the in-vehicle camera 1. The position of the center PC of the recording pixel region R2 is shifted from the position of the distortion center DC.

[0094] The ISP 4 acquires the signal of the recording pixel region R2 from the imaging sensor 3. The ISP 4 performs predetermined processing on the signal of the recording pixel region R2 to generate an image IM2 of the recording pixel region R2 as shown in FIG. 8(b). The position of the center PC in the image IM2 corresponds to the position of the center PC in the recording pixel region R2. The position of the center PC of the image IM2 is shifted from the position of the distortion center DC in the image IM2. The ISP 4 starts to output the image (output image) IM2 of the recording pixel region R2 and the position of the distortion center DC to the camera ECU 110 via the encoder 8, the connector 7, and the cable 20 (S17).

[0095] In the camera ECU 110, the CPU 111 receives the image (output image) IM2 of the recording pixel region R2 and the position of the distortion center DC from the in-vehicle camera 1 via the cable 20 and the decoder 112. The CPU 111 generates a display image for output to a predetermined display device using the image (output image) IM2 of the recording pixel region R2 and the position of the distortion center DC (S105). The predetermined display device may be the display 102 (see FIG. 1).

[0096] For example, the position of the center PC of the recording pixel region R2 is set in the camera ECU 110 in advance. The position of the center PC of the recording pixel region R2 corresponds to the pixel position of the center PC of the recording pixel region R2 in the effective pixel region R1.

[0097] When the CPU 111 receives the image IM2 of the recording pixel region R2 and the position of the distortion center DC, the CPU 111 acquires the position of the center PC of the recording pixel region R2. The CPU 111 generates a display image IM3 as shown in FIG. 8(c) according to the image IM2 of the recording pixel region R2, the position of the distortion center DC, and the position of the center PC. The display image IM3 is an image centered on the distortion center DC and having the same number of pixels (X2×Y2 shown in FIG. 5) as the recording pixel region R2.

[0098] The CPU 111 performs an arithmetic process to obtain an image centered on the distortion center DC and having the same number of pixels as the recording pixel region R2 while using the image IM2. For example, the CPU 111 obtains the difference DF between the pixel position of the center PC in the effective pixel region R1 and the pixel position of the distortion center DC. The CPU 111 sets the pixel position obtained by shifting the upper left corner CN1 in FIG. 8(c) of the recording pixel region R2 by the difference DF as the upper left corner CN3 of the display image IM3. The CPU 111 sets the pixel position obtained by shifting the lower right corner CN2 in FIG. 8(c) of the recording pixel region R2 by the difference DF as the lower right corner CN4 of the display image IM3. Thereby, the CPU 111 generates the display image IM3 defined by the corner CN3 and the corner CN4.

[0099] That is, the CPU 111 deletes the partial region PR2 from the image IM2, adds the partial region PR3, and generates the display image IM3. The display image IM3 is shown by a dashed line in Fig. 8(c). The partial region PR2 is shown by hatching with a large pitch in Fig. 8(c). The partial region PR3 is shown by hatching with a small pitch in Fig. 8(c). When generating the display image IM3, the CPU 111 may interpolate pixel values of a single color (such as blue or gray) indicating that image information is missing in the partial region PR3.

[0100] In the in-vehicle camera 1, the ISP 4 performs predetermined processing on the image IM2, and continues to output the image IM2 of the recording pixel region R2 while stabilizing the image IM2 (S18). The predetermined processing includes exposure adjustment, white balance adjustment, gain adjustment, gamma correction, and the like.

[0101] In the camera ECU 110, the CPU 111 supplies the display image IM3 to a predetermined display device (for example, the display 102) in response to the stabilization of the image IM2 from the in-vehicle camera 1. The predetermined display device displays the display image IM3 (S106).

[0102] As described above, in the first embodiment, the in-vehicle camera 1 reads the position of the distortion center DC from the non-volatile memory 5 in response to the activation of the imaging sensor 3, and outputs the output image of the recording pixel region R2, which is a part of the effective pixel region R1, and the position of the distortion center DC to the camera ECU 110 via the cable 20. As a result, the output image can be transmitted to the camera ECU 110 via the cable 20 at a speed equal to or lower than the upper limit frequency Fth, and the predetermined frame rate required for the in-vehicle camera 1 can be satisfied. In addition, since the position of the distortion center DC is transmitted to the camera ECU 110 in addition to the output image, the camera ECU 110 can generate the display image IM3 centered on the distortion center DC and having the same number of pixels (for example, X2×Y2) as the recording pixel region R2. As a result, while satisfying the predetermined frame rate required for the in-vehicle camera 1, a display image with the position of the distortion center DC appropriately adjusted can be displayed on a predetermined display device (for example, the display 102).

[0103] (Second Embodiment) Next, the in-vehicle camera 1 according to the second embodiment will be described. Hereinafter, the description will focus on the parts different from the first embodiment.

[0104] In the first embodiment, the configuration and operation in which the image IM2 of the recording pixel region R2 and the position of the distortion center DC are transmitted to the vehicle 100 side in a state where the centers of both are deviated are exemplified. However, in the second embodiment, the configuration and operation in which they are transmitted to the vehicle 100 side in a state where the centers of both are aligned are exemplified.

[0105] In the in-vehicle camera 1, the non-volatile memory 5 stores the position of the recording pixel region R21 as shown in FIG. 9 instead of the position of the distortion center DC. FIG. 9 is a diagram showing the effective pixel region R1 and the recording pixel region R21 of the pixel array 3a. The position of the recording pixel region R21 may be the position in the effective pixel region R1 of the recording pixel region R21.

[0106] The center PC21 of the recording pixel region R21 substantially coincides with the distortion center DC. The pixel coordinates of the distortion center DC are represented by (Cx, Cy). The recording pixel region R21 can be set such that the pixel coordinates (Bx21, By21) of its center PC21 satisfy the following formula 6. Bx21≒Cx,By21≒Cy···Formula 6

[0107] The position of the center PC21 of the recording pixel region R2 is shifted from the position of the center of the effective pixel region R1. Accordingly, the following formulas 7 to 9 are established. X1=H 11 +X2+H 12 ···Formula 7 Y1=V 11 +Y2+V 12 ···Formula 8 H 11 ≠H 12 ,V 11 ≠V 12 ···Formula 9

[0108] In Formula 7, H 11is the number of horizontal blanking pixels on the left side of the recording pixel region R21 in FIG. 9. H 12 is the number of horizontal blanking pixels on the right side of the recording pixel region R21 in FIG. 9. In Equation 8, V 11 is the number of vertical blanking pixels above the recording pixel region R21 in FIG. 9. V 12 is the number of vertical blanking pixels below the recording pixel region R21 in FIG. 9.

[0109] In FIG. 9, the case where the following Equation 10 holds is illustrated. H 11 >H 12 ,V 11 >V 12 ··· Equation 10

[0110] ISP4 sets the position of the recording pixel region R21. ISP4 may set the position of the recording pixel region R21 by adjusting the horizontal synchronization signal HREF, the vertical synchronization signal Vsync, the number of vertical blanking pixels V 11 ,V 12 and the like.

[0111] The position of the recording pixel region R21 is stored non-volatilely in the non-volatile memory 5. In the non-volatile memory 5, the pixel position of a location representing the recording pixel region R21 may be stored as the position of the recording pixel region R21. In the non-volatile memory 5, the pixel positions of two corners in the diagonal direction may be stored as the pixel positions of a location representing the recording pixel region R21. For example, in the non-volatile memory 5, the pixel position of the upper left corner CN11 and the pixel position of the lower right corner CN12 in FIG. 9 may be stored.

[0112] The pixel position of the corner CN11 is represented by the pixel coordinates (Sx, Sy) of the corner CN11. The pixel coordinates (Sx, Sy) of the corner CN11 satisfy the following Equation 11. Sx = H 11 ,Sy = V 11 ··· Equation 11

[0113] The pixel position of corner CN12 is represented by the pixel coordinates (Ex, Ey) of corner CN12. The pixel coordinates (Ex, Ey) of corner CN12 satisfy the following Equation 12. Ex = H 11 +X2 = X1 - H 12 , Ey = V 11 +Y2 = Y1 - V 12 ··· Equation 12

[0114] At this time, the center PC21 of the recorded pixel region R21 is the midpoint of the diagonal line connecting corners CN11 and CN12. Accordingly, the row number Bx21 of the pixel position of the center PC21 is the average value of the row number Sx of the pixel position of corner CN11 and the row number Ex of the pixel position of corner CN12. The column number By21 of the pixel position of the center PC21 is the average value of the column number Sy of the pixel position of corner CN11 and the column number Ey of the pixel position of corner CN12. That is, the following Equation 13 holds. Bx21 = (Sx + Ex) / 2, By21 = (Sy + Ey) / 2 ··· Equation 13

[0115] According to Equation 6 and Equation 13, the following Equation 14 holds for the pixel coordinates (Cx, Cy) of the distortion center DC. Cx ≒ (Sx + Ex) / 2, Cy ≒ (Sy + Ey) / 2 ··· Equation 14

[0116] As shown in Equation 14, the row number Cx of the pixel position of the distortion center DC is approximately equal to the average value of the row number Sx of the pixel position of corner CN11 and the row number Ex of the pixel position of corner CN12. The column number Cy of the pixel position of the center PC21 is approximately equal to the average value of the column number Sy of the pixel position of corner CN11 and the column number Ey of the pixel position of corner CN12.

[0117] Also, the manufacturing method of the in-vehicle camera 1 is different from the first embodiment in the following points as shown in FIG. 10. FIG. 10 is a flowchart showing the manufacturing method of the in-vehicle camera 1.

[0118] After S1 and S2 are performed, the position in the effective pixel region R1 of the recording pixel region R21 is specified (S102). For example, the test device supplies the measurement result of the position of the distortion center DC to the ISP4 via the connector 7 and the encoder 8 in the in-vehicle camera 1. The ISP4 specifies the position of the recording pixel region R21 such that the center PC21 of the recording pixel region R21 substantially coincides with the distortion center DC according to the measurement result of the position of the distortion center DC. The specified position of the recording pixel region R21 may include the pixel positions of two corners in the diagonal direction. For example, it may include the pixel coordinates (Sx, Sy) of the corner CN11 and the pixel coordinates (Ex, Ey) of the corner CN12. The ISP4 adjusts the horizontal synchronization signal HREF, the vertical synchronization signal Vsync, the number of vertical blanking pixels V 11 ,V 12 and the like (see FIG. 9).

[0119] The position of the recording pixel region R21 is written into the non-volatile memory 5 (S103). For example, the ISP4 writes the position of the recording pixel region R21 into the non-volatile memory 5. The pixel positions of two corners in the diagonal direction may be written into the non-volatile memory 5. For example, the pixel coordinates (Sx, Sy) of the corner CN11 and the pixel coordinates (Ex, Ey) of the corner CN12 may be written.

[0120] When the test device receives a notification of writing completion from the ISP4 via the encoder 8 and the connector 7, the test device is removed from the connector 7.

[0121] Thereby, the in-vehicle camera 1 is completed (S4). Thereafter, the connector 7 is connected to the camera ECU110 via the cable 20 and the connector 7 is connected to the vehicle body 101 via the fixing member. Thereby, the in-vehicle camera 1 is electrically and mechanically installed in the vehicle 100.

[0122] Also, the operation of the in-vehicle camera 1 is different from that of the first embodiment in the following points as shown in FIG. 11. FIG. 11 is a flowchart showing the operation of the in-vehicle camera 1.

[0123] After S101, S102, and S11 to S13 are performed in the same manner as in the first embodiment, in the in-vehicle camera 1, in response to the start of power supply from the power supply circuit 9, the ISP4 establishes communication via the control line 51 with the non-volatile memory 5. The ISP4 reads out the information on the position of the recording pixel region R21 from the non-volatile memory 5 (S214a). The ISP4 holds the information on the position of the recording pixel region R21.

[0124] The ISP4 sets the position of the recording pixel region R21 in the effective pixel region R1 of the pixel array 3a (S214b). The ISP4 acquires the position of the recording pixel region R21 from the non-volatile memory 5. The ISP4 may acquire the pixel position of the location representing the recording pixel region R21 in the effective pixel region R1 as the position of the recording pixel region R21. The ISP4 may acquire the pixel positions of two corners in the diagonal direction as the pixel positions of the location representing the recording pixel region R21. For example, the ISP4 may acquire the pixel position of the upper left corner CN11 and the pixel position of the lower right corner CN12 in FIG. 12(a). FIG. 12 is a diagram showing the operation of the in-vehicle camera 1 according to the second embodiment.

[0125] The ISP4 sets the position of the recording pixel region R21 so as to be the position of the recording pixel region R21 read out from the non-volatile memory 5. The ISP4 adjusts the horizontal synchronization signal HREF, the vertical synchronization signal Vsync, the number of vertical blanking pixels V 11 , V 12 and the like to set the position of the recording pixel region R21. Thereby, as shown in FIG. 12(a), the position of the recording pixel region R21 is set to a position where its center PC21 substantially coincides with the distortion center DC.

[0126] After that, after S15, S103, and S16 are performed in the same manner as in the first embodiment, in in-vehicle camera 1, ISP4 controls imaging sensor 3 to start an imaging operation. In response, imaging sensor 3 acquires a subject image in effective pixel region R1 corresponding to the entire pixel array 3a, as shown in FIG. 12(a), but selectively outputs pixel signals from recording pixel region R21, which is a part thereof. The position of center PC21 of recording pixel region R21 substantially coincides with the position of distortion center DC.

[0127] ISP4 acquires the signal of recording pixel region R21 from imaging sensor 3. ISP4 performs predetermined processing on the signal of recording pixel region R21 to generate an image IM21 of recording pixel region R21 as shown in FIG. 12(b). The position of center PC21 of image IM21 corresponds to the position of center PC21 of recording pixel region R2. Center PC21 of image IM21 substantially coincides with distortion center DC of image IM21. ISP4 starts outputting image (output image) IM21 of recording pixel region R2 and the position of recording pixel region R21 to camera ECU110 via encoder 8, connector 7, and cable 20 (S217).

[0128] ISP4 can output the pixel position of a location representing recording pixel region R21 as the position of recording pixel region R21. ISP4 can output the pixel positions of two corners in the diagonal direction as the pixel positions of a location representing recording pixel region R21. For example, ISP4 may output the pixel position of upper left corner CN11 and the pixel position of lower right corner CN12 in FIG. 12(b).

[0129] In camera ECU110, CPU111 receives image (output image) IM21 of recording pixel region R21 and the position of recording pixel region R21 from in-vehicle camera 1 via cable 20 and decoder 112. CPU111 generates a display image for output to a predetermined display device using image (output image) IM21 of recording pixel region R21 (S205).

[0130] The position of the distortion center DC is set in the camera ECU 110 in advance. The position of the distortion center DC corresponds to the pixel position of the distortion center DC in the image IM21. The CPU 111 may confirm that the center PC21 of the image IM21 substantially coincides with the distortion center DC according to the position of the recording pixel region R21 and the position of the distortion center DC. Accordingly, as shown in FIGS. 12(b) and 12(c), the CPU 111 may generate the display image IM31 using the image IM21 of the recording pixel region R21 as it is. The display image IM31 is an image centered on the distortion center DC and having the same number of pixels as the recording pixel region R21 (for example, X2×Y2 shown in FIG. 9).

[0131] When the image IM21 of the recording pixel region R21 is used as it is when generating the display image IM31, the CPU 111 can omit the arithmetic processing (see FIG. 8(c)) for obtaining an image centered on the distortion center DC and having the same number of pixels as the recording pixel region R21. The CPU 111 can generate the display image IM31 while avoiding the occurrence of the partial region PR2 to be deleted (see FIG. 8(c)). The CPU 111 can generate the display image IM31 that does not include the partial region PR3 (see FIG. 8(c)) substantially lacking in image information. Thereby, the image quality of the display image IM31 can be improved.

[0132] In the in-vehicle camera 1, the ISP 4 performs predetermined processing on the image IM21 and outputs the image IM21 of the recording pixel region R21 and the position of the distortion center DC while stabilizing the image IM21 (S18). The predetermined processing includes exposure adjustment, white balance adjustment, gain adjustment, gamma correction, and the like.

[0133] In the camera ECU 110, the CPU 111 supplies the display image IM31 to a predetermined display device (for example, the display 102) in response to the stabilization of the image IM21 from the in-vehicle camera 1. The predetermined display device displays the display image IM31 (S106).

[0134] As described above, in the second embodiment, the in-vehicle camera 1 reads the position of the recording pixel region R21 from the non-volatile memory 5 in response to the activation of the imaging sensor 3, and outputs the output image of the recording pixel region R21, which is a part of the effective pixel region R1, and the position of the recording pixel region R21 to the camera ECU 110 via the cable 20. As a result, the output image can be transmitted to the camera ECU 110 via the cable 20 at a speed equal to or lower than the upper limit frequency Fth, and a predetermined frame rate required for the in-vehicle camera 1 can be satisfied. Further, since the position of the recording pixel region R21 is transmitted to the camera ECU 110 in addition to the output image, the camera ECU 110 can confirm that the center PC21 of the recording pixel region R21 coincides with the distortion center DC, and the display image IM3 can be generated using the image IM21 of the recording pixel region R21 as it is. As a result, a display image with an appropriate position of the distortion center DC can be displayed on a predetermined display device (for example, the display 102) while satisfying the predetermined frame rate required for the in-vehicle camera 1.

[0135] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, as well as in the invention described in the claims and the equivalent scope thereof.

Explanation of Reference Numerals

[0136] 1,1_1~1_4 In-vehicle camera 2 Lens 3 Imaging sensor 4 ISP 5 Non-volatile memory 7 Connector 20 Cable 31 Housing 34 Circuit board

Claims

1. An imaging sensor including a first pixel region of a first quadrilateral in which X1 pixels are arranged in a first direction and Y1 pixels are arranged in a second direction intersecting the first direction; An optical system including at least one lens and having an optical axis intersecting the first pixel region of the imaging sensor; A memory storing a position of a second pixel region of a second quadrilateral, inside the first pixel region, in which X2 pixels smaller than X1 are arranged in the first direction and Y2 pixels smaller than Y1 are arranged in the second direction; and Reading the position of the second pixel region from the memory in response to activation of the imaging sensor; Giving the imaging sensor a horizontal synchronization signal, a vertical synchronization signal, a number of vertical blanking pixels, and a number of horizontal blanking pixels corresponding to the position of the second pixel region; Outputting an output image output by the imaging sensor accordingly to the outside and outputting the position of the second pixel region to the outside; An in-vehicle camera.

2. The in-vehicle camera according to claim 1, wherein the position of the second pixel region stored in the memory is represented by a first pixel position of a first corner of the second pixel region and a second pixel position of a second corner diagonal to the first corner. An in-vehicle camera.

3. The in-vehicle camera according to claim 1, wherein a position of a center pixel of the second pixel region corresponds to a distortion center of the at least one lens. An in-vehicle camera.

4. The in-vehicle camera according to claim 1, further including a processor, wherein the processor reads the position of the second pixel region from the memory in response to activation of the imaging sensor; outputs the output image corresponding to the second pixel region from the first pixel region of the imaging sensor and outputs the position of the second pixel region. An in-vehicle camera.

5. The in-vehicle camera according to claim 1, wherein the first quadrilateral is a first rectangle, and the second quadrilateral is a second rectangle. An in-vehicle camera.

6. The in-vehicle camera according to claim 1, wherein the first direction is a horizontal direction, and the second direction is a vertical direction. An in-vehicle camera.

7. The in-vehicle camera according to claim 1, including a circuit board on which the imaging sensor is mounted, and a housing, wherein the housing houses at least the imaging sensor, the circuit board, and the memory. An in-vehicle camera.

8. The in-vehicle camera according to claim 7, Furthermore, it includes a processor, the housing includes a connector, the connector includes at least two terminals that electrically connect the outside and the inside of the housing, at least one of the at least two terminals is electrically connected to the processor, the at least one terminal of the connector outputs the output image corresponding to the second pixel region, an in-vehicle camera.

9. The in-vehicle camera according to claim 8, the outside of the housing of the at least two terminals of the connector is configured to be connected to a cable connected to another part of the vehicle, an in-vehicle camera.

10. The in-vehicle camera according to claim 9, the cable is a twisted pair cable, an in-vehicle camera.

Images