Phase change memory cell with projection liner

Abstract

The semiconductor structure includes a heater surrounded by a second dielectric layer, a projection liner on the second dielectric layer, and a phase change material layer on the projection liner. The top surface of the projection liner is substantially flush with the top surface of the heater. The projection liner separates the phase change material layer from the second dielectric layer. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The semiconductor structure can include a bottom electrode below and in electrical contact with the heater, and a top electrode above and in electrical contact with the phase change material layer.

Description

[Technical Field]

[0001] The present invention relates generally to phase change memory cells, and more particularly to methods and structures for forming phase change memory cells of the type having projection liners. [Background technology]

[0002] Phase change memory cells can be used for data storage. They are nonvolatile random access memories. A typical configuration of a phase change memory cell can include a phase change material disposed between and coupled to at least two electrodes. When a phase change memory cell is in use, the phase change material can operate in at least two reversible phases: an amorphous phase and a crystalline phase. The amorphous and crystalline phases are distinct from each other. In the amorphous phase, the phase change material has a significantly higher resistance than in the crystalline phase. To facilitate the phase transition, energy capable of causing the desired phase transition, such as electrical energy, thermal energy, any other suitable form of energy, or a combination thereof, is supplied to the phase change material.

[0003] To facilitate the change from the crystalline phase to the amorphous phase, electrical energy, such as a voltage pulse, can be applied to one of the electrodes, e.g., the bottom electrode, to heat the phase change material at or substantially near that electrode above its melting point. The phase change material is then rapidly cooled below its glass temperature. Treated in this manner, the phase change material is transformed from the crystalline phase to the amorphous phase. Amorphous regions are created in the phase change material where this phase transition has occurred. Summary of the Invention

[0004] According to one embodiment of the present invention, a semiconductor structure includes a heater surrounded by a second dielectric layer, a projection liner on the second dielectric layer, and a phase change material layer on the projection liner. The top surface of the projection liner can be substantially flush with the top surface of the heater. The projection liner can separate the phase change material layer from the second dielectric layer. The semiconductor structure can include a bottom electrode below the heater and in electrical contact with the heater, and a top electrode above the phase change material layer and in electrical contact with the phase change material layer. The semiconductor structure can further include a mask layer above the top electrode and in direct contact with the top electrode, a top electrode contact above the top electrode and in electrical contact with the top electrode, and a bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode. The phase change material layer can include a crystalline phase and an amorphous phase. The amorphous phase can be present directly above the heater. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The projection liner can extend laterally beyond the amorphous phase of the phase change material layer. The heater can include an outer layer, a middle layer, and an inner layer. The middle layer can be between the outer layer and the inner layer, and the inner layer can be surrounded by the middle layer.

[0005] Another embodiment of the present invention provides a semiconductor structure. The semiconductor structure can include a heater in a second dielectric layer, a projection liner on the second dielectric layer, and a phase change material layer on the projection liner. A top portion of the heater can extend vertically above the second dielectric layer. The projection liner can be over the top portion of the heater that extends vertically above the second dielectric layer and in direct contact with the heater. The projection liner can separate the phase change material layer from the heater and the second dielectric layer. The projection liner can provide a conductive path parallel to the crystalline and amorphous phases of the phase change material layer. The semiconductor structure can include a bottom electrode below and in electrical contact with the heater, and a top electrode above and in electrical contact with the phase change material layer. The semiconductor structure may further include a mask layer above the top electrode and in direct contact with the top electrode, a top electrode contact above the top electrode and in electrical contact with the top electrode, and a bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode. The phase change material layer may include a crystalline phase and an amorphous phase. The amorphous phase may be directly above the heater. The projection liner may extend laterally beyond the amorphous phase of the phase change material layer. The heater may include an outer layer, a middle layer, and an inner layer. The middle layer may be between the outer layer and the inner layer, and the inner layer may be surrounded by the middle layer.

[0006] Another embodiment of the present invention provides a semiconductor structure. The semiconductor structure may include a heater in a second dielectric layer and a phase change material layer above the second dielectric layer and in direct contact with the heater. A top portion of the heater may extend vertically above the second dielectric layer. The semiconductor structure may include a bottom electrode below the heater and in electrical contact with the heater, and a top electrode above the phase change material layer and in electrical contact with the phase change material layer. The semiconductor structure may further include a mask layer above the top electrode and in direct contact with the top electrode, a top electrode contact above the top electrode and in electrical contact with the top electrode, and a bottom electrode contact below the bottom electrode and in electrical contact with the bottom electrode. The phase change material layer may include a crystalline phase and an amorphous phase. The amorphous phase may be present directly above the heater. The heater may include an outer layer, an intermediate layer, and an inner layer. The semiconductor structure can further include a first metal layer below and in electrical contact with the bottom electrode contact, a second metal layer above and in electrical contact with the top electrode contact, and a via contact between the first metal layer and the second metal layer and in electrical contact with the first metal layer and the second metal layer. [Brief explanation of the drawings]

[0007] The following detailed description, given by way of example and not intended to be limiting of the invention thereto, will best be understood in conjunction with the accompanying drawings, in which:

[0008] [Figure 1] FIG. 10 is a cross-sectional view illustrating a heater in the second dielectric layer according to an exemplary embodiment. [Figure 2] FIG. 10 is a cross-sectional view of a projection liner above a heater according to an exemplary embodiment. [Figure 3] 2 is a cross-sectional view illustrating a phase change material layer above a heater according to an illustrative embodiment. [Figure 4]FIG. 2 is a cross-sectional view illustrating a top electrode, a top electrode contact, and a via contact according to an exemplary embodiment. [Figure 5] FIG. 10 is a cross-sectional view illustrating a second metal layer over a top electrode contact according to an exemplary embodiment. [Figure 6] FIG. 2 is a cross-sectional view illustrating an organic planarization layer, an anti-reflective coating layer, and a photoresist layer over a second dielectric layer according to an exemplary embodiment. [Figure 7] 1 is a cross-sectional view illustrating an opening around the top of a heater according to an exemplary embodiment. [Figure 8] FIG. 2 is a cross-sectional view showing a projection liner above a second dielectric layer according to an exemplary embodiment. [Figure 9] 4 is a cross-sectional view illustrating a phase change material layer above a second dielectric layer according to an illustrative embodiment. [Figure 10] FIG. 10 is a cross-sectional view illustrating a top electrode, a top electrode contact, a via contact, and a second metal layer over the top electrode contact according to an illustrative embodiment. [Figure 11] FIG. 10 is a cross-sectional view illustrating an upper sidewall portion of a heater extending vertically above a second dielectric layer according to an exemplary embodiment. [Figure 12] 10 is a cross-sectional view illustrating a projection liner between a second dielectric layer and a phase change material layer according to an exemplary embodiment. [Figure 13] FIG. 10 is a cross-sectional view illustrating a top electrode, a top electrode contact, a via contact, and a second metal layer over the top electrode contact according to an illustrative embodiment. [Figure 14] FIG. 10 is a cross-sectional view illustrating an upper sidewall portion of a heater extending vertically above a second dielectric layer according to an exemplary embodiment. [Figure 15] 2 is a cross-sectional view illustrating a phase change material layer directly above a second dielectric layer according to an illustrative embodiment. [Figure 16] FIG. 10 is a cross-sectional view illustrating a top electrode, a top electrode contact, a via contact, and a second metal layer over the top electrode contact according to an illustrative embodiment.

[0009] The drawings are not necessarily to scale. The drawings are merely schematic and are not intended to portray specific parameters of the invention. The drawings are intended to depict only typical embodiments of the invention. In the drawings, like numbers represent like elements. DETAILED DESCRIPTION OF THE INVENTION

[0010] Although detailed embodiments of the claimed structures and methods are disclosed herein, it should be understood that the disclosed embodiments are merely exemplary of the claimed structures and methods, which may be embodied in various forms. However, the present invention may be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In this description, well-known features and techniques may be omitted to avoid unnecessarily obscuring the presented embodiments.

[0011] For purposes of the following description, the terms “upper,” “lower,” “right,” “left,” “vertical,” “horizontal,” “top,” “bottom,” and their derivatives refer to the disclosed structures and methods as oriented in the drawings. The terms “overlying,” “atop,” “on top,” “positioned on,” or “positioned atop” mean that a first element, e.g., a first structure, is above a second element, e.g., a second structure, although intervening elements, e.g., interfacial structures, may be present between the first and second elements. The term “direct contact” means that a first element, e.g., a first structure, and a second element, e.g., a second structure, are connected without any intermediate conductive, insulating, or semiconducting layer at the interface between the two elements.

[0012] In the following detailed description, some process steps or operations known in the art may be combined for purposes of presentation and illustration and may not be described in detail so as not to obscure the presentation of embodiments of the present invention. In other cases, some process steps or operations known in the art may not be described at all. It should be understood that the following description will instead focus on salient features or elements of various embodiments of the present invention.

[0013] When a phase-change memory cell is used, the phase-change material can operate in at least two reversibly convertible phases: an amorphous phase and a crystalline phase. The amorphous phase and the crystalline phase can also be referred to as the amorphous state and the crystalline state. The amorphous state of a phase-change material exhibits high resistance and low conductance, while the crystalline state of a phase-change material exhibits low resistance and high conductance. The amorphous and crystalline states can be used to program various data values in the phase-change memory cell.

[0014] Programming various data values in a phase-change memory cell can be achieved by applying appropriate voltages to the phase-change material using electrodes, such as a bottom electrode and a top electrode. Depending on the applied voltage, the phase-change material changes from a crystalline state to an amorphous state or vice versa. Furthermore, a phase-change memory cell can have various programming levels. Each programming level can correspond to a different voltage applied to the phase-change material to program it. Once a phase-change memory cell is programmed (a write operation), a read voltage can be applied using electrodes to retrieve the information stored at that phase-change material level. The read voltage can be sufficiently low to ensure that application of the read voltage does not disturb the programmed cell state.

[0015] However, once a phase-change memory cell is programmed, its resistance can exhibit resistance drift. More specifically, it is the amorphous state that can exhibit resistance drift. That is, the resistance of an amorphous-state cell can increase over time. This makes the resistance of a phase-change memory cell unpredictable. Therefore, it would be advantageous to mitigate resistance drift and make the resistance of a phase-change material predictable and reproducible. Furthermore, mitigating resistance drift allows a phase-change memory cell to exhibit a resistance that can be linearly changed by the applied programming pulse.

[0016] To mitigate resistance drift without compromising any of the attributes of the phase change memory cell, embodiments of the present invention provide a phase change memory cell structure and method for fabricating the structure with a projection liner. Additionally, embodiments of the present invention provide a phase change memory cell with a heater that extends vertically above the dielectric layer and into the phase change material layer.

[0017] Referring now to FIG. 1 , a structure 100 is shown according to one embodiment. The structure 100 may include a metal layer 102, an NBLOK 104, a first dielectric layer 106, a barrier layer 108, a bottom electrode 110, a bottom electrode contact 112, a second dielectric layer 114, and a heater 116. The metal layer 102 may be made of a metal such as copper. The metal layer 102 may be referred to as the first metal layer. The NBLOK 104 is a barrier film used for copper chips. The NBLOK 104 may be made of nitrogen-doped silicon carbide or carbon-doped silicon nitride. The NBLOK 104 may be formed on the metal layer 102 using standard deposition techniques. The NBLOK 104 may be referred to as the first NBLOK.

[0018] The first dielectric layer 106 can be deposited on top of the NBLOK 104 using known deposition techniques, such as atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD). The first dielectric layer 106 can be made of any suitable low-κ dielectric material, TEOS, or a bilayer of TEOS and NBLOK. The bottom electrode 110 can be formed in a trench in the first dielectric layer 106. Once the trench (not shown) is formed, a barrier layer 108 can be conformally deposited using known deposition techniques, such as ALD. The barrier layer 108 can be made of tantalum nitride (TaN), titanium nitride (TiN), or any combination thereof. The barrier layer 108 prevents the material forming the bottom electrode 110 from migrating into the first dielectric layer 106. The trench is then filled with a conductive metal, such as copper, tungsten, cobalt, or aluminum, to form the bottom electrode 110. A planarization process, such as chemical mechanical polishing (CMP), is performed to remove excess material from the top surface of substrate 100.

[0019] In addition to the bottom electrode 110, the structure includes a bottom electrode contact 112. The bottom electrode contact 112 can be formed using standard deposition and lithography methods. The bottom electrode contact 112 can be made of a conductive metal, such as copper, tungsten, cobalt, or aluminum, to allow current to flow through the bottom electrode 110 and the bottom electrode contact 112. The bottom electrode contact 112 is below and in electrical contact with the bottom electrode 110. The bottom electrode contact 112 is above and in electrical contact with the metal layer 102. Although two bottom electrodes 110 and two bottom electrode contacts 112 are shown, it should be appreciated that embodiments of the present invention can include any number of bottom electrodes 110 and bottom electrode contacts 112.

[0020] Once the bottom electrode 110 is formed, a second dielectric layer 114 is deposited on the top surface of the structure 100 using known deposition techniques, such as ALD, CVD, or PVD. The second dielectric layer 114 may be made of a dielectric material, such as silicon nitride, to a thickness of about 50 nm.

[0021] Continuing with reference to FIG. 1 , a heater 116 is formed in a second dielectric layer 114 above the bottom electrode 110 such that the bottom electrode 110 is below and in electrical contact with the heater 116. The heater 116 is surrounded by the second dielectric layer 114. While two heaters are shown, it should be appreciated that embodiments of the present invention may include any number of heaters 116. Each heater 116 includes an outer layer 118, a middle layer 120, and an inner layer 122. The heater 116 extends through the second dielectric layer 114 to the bottom electrode 110 and is formed in a trench. To remove the second dielectric layer 114 to form the heater 116, a resist such as photoresist can be deposited and patterned. Using the patterned resist as an etch mask, an etching process such as reactive ion etching (RIE) can be performed to remove the second dielectric layer 114 until the bottom electrode 110 is exposed. The outer layer 118 can be conformally deposited within the trench to a thickness of approximately 5 nm using a deposition process such as ALD. The outer layer 118 can be made of a material such as TaN. The intermediate layer 120 can be conformally deposited within the trench on top of the outer layer 118 to a thickness of approximately 6 nm using a deposition process such as ALD. The intermediate layer 120 can be made of a material such as TiN. The inner layer 122 can be conformally deposited on top of the intermediate layer 120 to a thickness of approximately 20 nm using a deposition process such as ALD to fill the trench. The intermediate layer 120 resides between the outer layer 118 and the inner layer 122. The inner layer 122 can be made of a material such as TaN. The inner layer 122 is surrounded by the intermediate layer 120. Once the heater 116 is formed, a CMP process can be used to remove excess portions of the outer layer 118, the intermediate layer 120, and the inner layer 122 remaining on the top surface of the structure 100.

[0022] 2, a structure 100 having a projection liner 124 is shown, according to one embodiment. After the heaters 116 are formed, the second dielectric layer 114 is recessed using an etching process, such as a wet etch or a reactive ion etching (RIE) process, to expose the top of each heater 116. A projection liner 124 is then conformally deposited on the top surface of the structure 100, covering the exposed tops of the heaters 116 such that the top surface of the projection liner 124 is substantially flush with the top surfaces of the heaters 116.

[0023] The projection liner 124 can be made of a non-insulating material, such as a metal or metal nitride, where the metal component can be a refractory material, such as molybdenum, tungsten, titanium, or tantalum. For example, the projection liner 124 can be made of TiN. A CMP process is then performed to remove excess projection liner and expose the top surface of the heater 116. The projection liner 124 extends laterally from the heater 116 and covers the top surface of the second dielectric layer 114. The projection liner 124 can extend laterally beyond the amorphous phase 126b of the phase change material layer 126 that overlies the heater 116. The projection liner 124 allows current to flow from the bottom electrode 110 through the phase change material layer to the top electrode, bypassing the amorphous portion of the phase change material layer.

[0024] Referring now to FIG. 3 , a structure 100 having a phase change material layer 126 is shown, according to one embodiment. The phase change material layer 126 can be deposited on the top surface of the structure 100 using known deposition methods, such as ALD. The phase change material layer 126 can include both a crystalline phase 126 a and an amorphous phase 126 b. The amorphous phase 126 b can be present directly above the heater 116. The phase change material layer 126 can be formed from a class of materials, preferably including chalcogenide-based materials. Chalcogens include any of the four elements that form part of Group VI of the periodic table: oxygen (O), sulfur (S), selenium (Se), and tellurium (Te). Chalcogenides include compounds of chalcogens with more electropositive elements or radicals. Chalcogenide alloys include combinations of chalcogenides with other materials, such as transition metals. Chalcogenide alloys typically contain one or more elements from Group IV of the periodic table of the elements, such as germanium (Ge) and tin (Sn). Chalcogenide alloys often include compounds containing one or more of antimony (Sb), gallium (Ga), indium (In), and silver (Ag).

[0025] Many phase-change based memory materials have been described in the technical literature, including alloys of Ga / Sb, In / Sb, In / Se, Sb / Te, Ge / Te, Ge / Sb / Te, In / Sb / Te, Ga / Se / Te, Sn / Sb / Te, In / Sb / Ge, Ag / In / Sb / Te, Ge / Sn / Sb / Te, Ge / Sb / Se / Te, and Te / Ge / Sb / S. Within the family of Ge / Sb / Te alloys, a wide range of alloy compositions can be processed. This composition is typically TeGe.Sb 100-(a+b) More generally, chromium (Cr), iron (Fe), nickel (Ni), niobium (Nb), palladium (Pd), platinum (Pt), and mixtures or alloys thereof can be combined with Ge / Sb / Te to form phase change alloys with programmable resistance properties.

[0026] Referring now to FIG. 4 , structure 100 is shown having top electrode 128, mask layer 130, third dielectric layer 132, top electrode contact 134, and via contact 136, according to one embodiment. Top electrode 128 is deposited on phase change material layer 126 such that current can flow from bottom electrode 110 through phase change material layer 126 to top electrode 128. Top electrode 128 is above and in electrical contact with phase change material layer 126. Any known suitable deposition technique, such as ALD, CVD, or PVD, can be used to form top electrode 128. Top electrode 128 is in direct contact with phase change material layer 126. Top electrode 128 can be made of substantially the same conductive material as bottom electrode 110, such as TiN.

[0027] The mask layer 130 is deposited on the top electrode 128 using known deposition techniques. The mask layer 130 is in direct contact with the top electrode 128. The mask layer 130 can be made of a dielectric material, such as silicon dioxide, silicon nitride, or silicon oxynitride, or a combination thereof. In some embodiments, the mask layer 130 can be formed using a conventional deposition process, such as CVD or PVD. The mask layer 130 is then patterned (not shown). The patterning can be performed by lithography and etching. An etching process, such as an RIE process, can be performed to remove portions of the mask layer 130, the top electrode 128, the phase change material layer 126, and the projection liner 124. The resulting structure 100 includes the projection liner 124, the phase change material layer 126, the top electrode 128, and the mask layer 130 remaining directly above the heater 116.

[0028] After the mask layer 130 is patterned, a third dielectric layer 132 is deposited on the top surface of the structure 100 to cover the projection liner 124, the phase change material layer 126, the top electrode 128, and the remaining portions of the mask layer 130. The third dielectric layer 132 can be made of any suitable dielectric material, such as silicon nitride, a silicon-based low-κ dielectric, or TEOS. The third dielectric layer 132 can be formed using any suitable known deposition technique, such as ALD, CVD, or PVD. The third dielectric layer 132 is made of a material with low thermal conductivity. As a result, the third dielectric layer 132 functions as a thermal insulator.

[0029] Continuing with reference to FIG. 4 , the structure 100 is patterned to create a via contact opening and a top electrode contact opening (not shown). The top electrode contact opening extends from the top surface of the third dielectric layer 132 through the mask layer 130 to the top electrode 128. The via opening extends from the top surface of the third dielectric layer 132 through the second and first dielectric layers 114, 106, through the NBLOK 104, and to the metal layer 102. A barrier layer 108 is then deposited within both the via opening and the top electrode opening. The openings are then filled with a conductive metal, such as copper, tungsten, cobalt, or aluminum, to form the top electrode contact 134 and the via contact 136. CMP can then be performed to remove excess material from the top surface of the structure 100. The top electrode contact 134 overlies and is in electrical contact with the top electrode. The via contact 136 is between and electrically contacts the first metal layer 102 and the second metal layer 140 .

[0030] After the top electrode contact 134 and via contact 136 are formed, the structure 100 undergoes further processing to form a second NBLOK layer 138 and a second metal layer 140, as shown in FIG. 5 . The second NBLOK layer 138 can be deposited on the top surface of the structure 100 using known deposition techniques. The second NBLOK layer 138 can be made of substantially the same material as the first NBLOK layer 104. A second metal layer 140 can be deposited on the second NBLOK layer 138 using known deposition techniques. The second metal layer can be made of substantially the same material as the first metal layer 102. The bottom surface of the second metal layer 140 is in direct contact with the top surface of the top electrode contact 134 and the top surface of the via contact 136. The second metal layer 140 is then patterned, and a fourth dielectric layer 142 is deposited. The fourth dielectric layer 142 is made of substantially the same material as the first dielectric layer 106 .

[0031] 1-5 provide a method for fabricating a phase change memory cell having a projection liner 124. The phase change memory cell can be referred to as a mushroom-type phase change memory cell due to the shape of the amorphous phase 126b of the phase change material layer 126. The resulting structure 100 includes the projection liner 124 that separates the second dielectric layer 114 from the phase change material layer 126, as shown in FIG. 5. The projection liner 124 is parallel to the phase change material layer 126.

[0032] The resistance of the projection liner 124 is selected so that it has a small effect on the write operation (during which the phase transition occurs) but a large effect on the read operation. This is possible because the electrical transport of the amorphous phase 126b is highly nonlinear. At high electric fields, the amorphous material undergoes so-called electronic threshold switching, transitioning to a low-resistance state (on-state). Therefore, during a high-field write process, when the resistance of the projection liner 124 becomes significantly higher than the on-state resistance of the amorphous phase 126b, most of the current will flow through the phase change material layer 126. However, during a low-field read process, the current will bypass the high-resistivity amorphous phase 126b and flow through the portion of the first projection liner 124 parallel to it. Therefore, the device resistance is dominated by the resistance of that portion of the projection liner 124, which is a good measure of the amorphous / crystalline phase configuration. The information, typically stored in the length of the amorphous phase 126b, is, in a sense, projected onto the projection liner 124. Note that even though the projection liner 124 is present during both read and write operations, the "projection" is designed to occur only during the read process. Thus, the projection liner 124 provides a conductive path parallel to the crystalline phase 126a and amorphous phase 126b of the phase change material layer 126. The projection liner 124 acts as a parallel resistor that diverts current around the amorphous phase 126b.

[0033] Another embodiment for fabricating a phase change memory cell having a projection liner 124 is described in detail below with reference to accompanying Figures 6 to 12. In this embodiment, the projection liner 124 surrounds only the top of the heater 116.

[0034] Referring now to FIG. 6, a structure 200 is shown at an intermediate step in fabrication after heater 116 formation (described above in connection with FIG. 1) in accordance with one embodiment of the present invention. Structure 200 is substantially similar in all respects to structure 100, described in detail above in connection with FIG. 1, except that in this embodiment, structure 200 includes an organic planarization layer (OPL) 144, an antireflective coating layer 146, and a photoresist layer 148. Starting with structure 100 of FIG. 1, OPL 144 is deposited on top of second dielectric layer 114 and heater 116 to a thickness of approximately 200 nm. Next, antireflective coating layer 146 is deposited on top of OPL 144. Antireflective coating layer 146 is approximately 35 nm thick. Antireflective coating layer 146 can be a bottom antireflective coating (BARC) or a silicon-containing antireflective coating (SIARC). Photoresist layer 148 can be deposited on top of antireflective coating layer 146. OPL 144, anti-reflective coating layer 146, and photoresist layer 148 may each be deposited using known deposition techniques, such as spin-on coating. Photoresist layer 148 is patterned to form trench 150. Trench 150 is formed directly above heater 116.

[0035] 7, a structure 200 is shown in which the second dielectric layer 114 is recessed around the top of the heater 116, according to one embodiment. After the trench 500 is formed, both the photoresist layer 148 and the anti-reflective coating layer 146 are removed, but the OPL 144 remains. For example, using an etching process such as an RIE process, the portion of the second dielectric layer 114 surrounding the heater 116 is removed, thereby exposing the top of the heater 116 and creating an opening 152. The OPL 144 is then removed using known methods to expose the top surface of the second dielectric layer 114.

[0036] 8, a structure 200 having a projection liner 124 is shown, according to one embodiment. The projection liner 124 is deposited on the top surface of the structure 200, filling the opening 152. The projection liner 124 surrounds the top of the heater 116. The projection liner 124 is made of a material whose resistivity is between the resistivity of the crystalline phase and the resistivity of the amorphous phase of the phase change material layer.

[0037] After the projection liner 124 is deposited, a CMP process is performed to remove the projection liner 124 from the second dielectric layer 114, exposing the top surface of the heater 116. As a result, the projection liner 124 remains only around the top of the heater 116. The structure 200 is then further processed, as shown in FIG. 9, in which a phase change material layer 126 is deposited. The phase change material layer 126 includes both a crystalline phase 126a and an amorphous phase 126b.

[0038] Referring now to FIG. 10 , structure 200 undergoes additional processing, as described in detail with reference to FIG. 5 . The resulting structure 200 shown in FIG. 10 and the resulting structure 100 shown in FIG. 5 are substantially identical, as both structures include a projection liner 124. However, the projection liner 124 shown in FIG. 5 surrounds the top of the heater 116 and extends laterally over the top surface of the second dielectric layer 114, effectively covering the top surface of the second dielectric layer 114. As a result, the projection liner 124 of structure 100 separates the second dielectric layer 114 from the phase change material layer 128, resulting in a smaller resistance change upon switching compared to structure 200. The projection liner 124 of structure 200 shown in FIG. 10 only surrounds the top of the heater 116. 10 does not extend laterally over the top surface of second dielectric layer 114. As a result, second dielectric layer 114 is in direct contact with phase change material layer 126.

[0039] Another embodiment for fabricating a phase change memory cell having a projection liner 124 will be described in detail below with reference to accompanying Figures 11 to 13. In this embodiment, the projection liner 124 surrounds the top of the heater 116 and covers the top surface of the second dielectric layer 144 and the top surface of the heater 116.

[0040] 11 , there is shown a structure 300 at an intermediate step in fabrication after heater 116 formation (as described above in connection with FIG. 1 ), according to one embodiment of the present invention. Structure 300 may be substantially similar in all respects to structure 100, described in detail above in connection with FIG. 1 , except that in this embodiment, upper sidewall portions of heater 116 are exposed and extend vertically above the top surface of second dielectric layer 114. Starting with structure 100 of FIG. 1 , an etching process, e.g., an RIE process, is performed to recess a portion of second dielectric layer 114, thereby exposing the upper portion of heater 116. As a result, the upper portion of heater 116 extends vertically above second dielectric layer 114.

[0041] 12 , a structure 300 is shown having a projection liner 124 and a phase change material layer 126, according to one embodiment. The projection liner 124 is conformally deposited on top of the structure 300. The structure 300 then undergoes further processing in which the phase change material layer 126 is deposited on top of the projection liner. Known deposition techniques, such as ALD, can be used to deposit the projection liner 124 and the phase change material layer 126.

[0042] The projection liner 124 covers the top surface of the second dielectric layer 114 and extends laterally beyond the amorphous phase 126b of the phase change material layer 126. The projection liner 124 separates the phase change material layer 126 from the second dielectric layer 114 and the heater 116. The projection liner 124 covers the exposed sidewall portions and the top surface of the heater 116. The projection liner 124 is in direct contact with the top of the heater 116, which extends vertically above the second dielectric layer 114. Having the projection liner 124 on top of the heater 116 reduces resistance drift.

[0043] 13, structure 300 is subjected to further processing, as described in detail in connection with FIG. 5. The resulting structure 300 shown in FIG. 13 and the resulting structure 100 shown in FIG. 5 are substantially identical, as both structures include a projection liner 124. However, the projection liner 124 of structure 100 shown in FIG. 5 extends laterally over the top surface of second dielectric layer 114, effectively covering the top surface of second dielectric layer 114. The projection liner 124 of structure 300 shown in FIG. 13 not only extends laterally over the top surface of second dielectric layer 114, but also extends laterally over the top surface of heater 116 and vertically over the sidewalls of heater 116 above second dielectric layer 114.

[0044] Another embodiment for fabricating a phase change memory cell capable of reducing the programming current is described below with reference to accompanying Figures 14 to 16. In this embodiment, the heater 116 extends vertically above the second dielectric layer 114 and into the phase change material layer 126.

[0045] 14, there is shown a structure 400 at an intermediate step in fabrication after heater 116 formation (as described above in connection with FIG. 1), according to one embodiment of the present invention. Structure 400 is substantially similar in all respects to structure 100, described in detail in connection with FIG. 1, except that in this embodiment, upper sidewall portions of heater 116 are exposed and extend vertically above the top surface of second dielectric layer 114. Starting with structure 100 of FIG. 1, an etching process, such as an RIE process, is performed to recess a portion of second dielectric layer 114, thereby exposing the top of heater 116.

[0046] 15-16, structure 400 undergoes further processing in which phase change material layer 126 is deposited on top of second dielectric layer 114. Known deposition techniques, such as ALD, can be used to deposit phase change material layer 126. The bottom surface of phase change material layer 126 is in direct contact with the top surface of second dielectric layer 114. Furthermore, phase change material layer 126 surrounds the portion of heater 116 that is exposed as a result of recessing second dielectric layer 114. Structure 400 then undergoes further processing, as described in detail in connection with FIG. 5, in which top electrode 128 and mask layer 130 are deposited and patterned.

[0047] 16 differs from structure 100 (shown in FIG. 5), structure 200 (shown in FIG. 10), and structure 300 (shown in FIG. 13) because it does not include projection liner 124. Rather, structure 400 includes heater 116 having vertical sidewall portions that extend above second dielectric layer 114. The vertical sidewall portions of heater 116 extend into phase change material layer 126 such that phase change material layer 126 surrounds the entire upper side of heater 116. Furthermore, phase change material layer 126 is above and in direct contact with second dielectric layer 114.

[0048] The above-described embodiments of the present invention illustrate methods and structures for forming a phase change memory cell that includes a projection liner 124 (structures 100, 200, 300) and a heater 116 (structure 400) that extends vertically above the dielectric layer 114 and into the phase change material layer 126. The projection liner 124 and the heater 116 that extends vertically above the dielectric layer 114 provide a solution to the problem of resistance drift in phase change memory cells. The projection liner 124 is self-aligned. The projection liner 124 mitigates resistance drift by providing a current path from the bottom electrode 110 to the top electrode 128 that bypasses the amorphous phase 126b of the phase change material layer 126. Additionally, extending a portion of the heater 116 above the second dielectric layer 114 further enhances the reduction in programming current due to the fact that the heater 116 extends or protrudes vertically into the phase change material layer 126, generating more heat around the heater 116 during programming.

[0049] The description of various embodiments of the present invention has been presented for illustrative purposes, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art that do not depart from the scope of the described embodiments. The terminology used herein has been selected to best explain the principles, practical applications, or technical improvements of the embodiments beyond those found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. a heater surrounded by a second dielectric layer; a projection liner on the second dielectric layer, the projection liner having a top surface substantially flush with a top surface of the heater and in direct contact with a sidewall of the upper portion of the heater; a phase change material layer over the projection liner, the projection liner separating the phase change material layer from the second dielectric layer; and A structure comprising:

2. a bottom electrode below and in electrical contact with the heater; a top electrode above and in electrical contact with the phase change material layer; The structure of claim 1 further comprising:

3. a mask layer above the top electrode and in direct contact with the top electrode; a top electrode contact above and in electrical contact with the top electrode; a bottom electrode contact below and in electrical contact with the bottom electrode; The structure of claim 2 further comprising:

4. 10. The structure of claim 1, wherein the phase change material layer includes a crystalline phase and an amorphous phase, the amorphous phase being directly above the heater.

5. 5. The structure of claim 4, wherein the projection liner provides a conductive path parallel to the crystalline and amorphous phases of the phase change material layer.

6. 5. The structure of claim 4, wherein the projection liner extends laterally beyond the amorphous phase of the phase change material layer.

7. The heater is An outer layer; an intermediate layer between the outer layer and the inner layer; the inner layer surrounded by the intermediate layer; The structure of claim 1 , comprising:

8. a heater in the second dielectric layer, the heater having an upper portion extending vertically above the second dielectric layer; a projection liner on the second dielectric layer, the projection liner overlying an upper portion of the heater that extends vertically above the second dielectric layer and in direct contact with a sidewall and a top surface of the upper portion of the heater; a phase change material layer above the projection liner, the projection liner separating the phase change material layer from the heater and the second dielectric layer; and A structure comprising:

9. a bottom electrode below and in electrical contact with the heater; a top electrode above and in electrical contact with the phase change material layer; 9. The structure of claim 8, further comprising:

10. a mask layer above the top electrode and in direct contact with the top electrode; a top electrode contact above and in electrical contact with the top electrode; a bottom electrode contact below and in electrical contact with the bottom electrode; 10. The structure of claim 9, further comprising:

11. 9. The structure of claim 8, wherein the phase change material layer includes a crystalline phase and an amorphous phase, the amorphous phase being directly above the heater.

12. 12. The structure of claim 11, wherein the projection liner provides a conductive path parallel to the crystalline and amorphous phases of the phase change material layer.

13. 12. The structure of claim 11, wherein the projection liner extends laterally beyond the amorphous phase of the phase change material layer.

14. The heater is An outer layer; an intermediate layer between the outer layer and the inner layer; the inner layer surrounded by the intermediate layer; 9. The structure of claim 8, comprising:

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