Semiconductor device and manufacturing method thereof

Abstract

An insulating film 12 is formed on a surface 11a of a semiconductor layer 11 having a trench 10. A conductor 13 is embedded inside the trench, and the insulating film of the semiconductor layer surface adjacent to the trench is removed by etching to expose the semiconductor layer surface. Furthermore, the semiconductor layer surface is etched and lowered relative to a top end 12a of the insulating film covering the inner surface of the trench. Thereafter, a Schottky junction is formed on the semiconductor layer surface.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] Conventionally, there is a semiconductor device having a Schottky junction, as described in Japanese Patent Laid-Open No. 9-232597. In this semiconductor device, an insulating film is formed on the surface of a semiconductor layer having a trench, a conductor is buried in the trench, the insulating film on the surface of the semiconductor layer adjacent to the trench is removed by etching to expose the surface of the semiconductor layer, and a Schottky junction is formed on the surface of the semiconductor layer. Summary of the Invention

[0003] According to a method for manufacturing a semiconductor device according to one aspect of the present disclosure, an insulating film is formed on the surface of a semiconductor layer having a trench, a conductor is embedded in the trench, and the insulating film on the surface of the semiconductor layer adjacent to the trench is removed by etching to expose the surface of the semiconductor layer. The surface of the semiconductor layer is then etched to lower it relative to the upper end of the insulating film covering the inner surface of the trench. Thereafter, a Schottky junction is formed on the surface of the semiconductor layer. a Schottky junction layer is formed so as to cover at least the conductor and the Schottky junction layer, and an upper electrode is formed so as to be in direct contact with the conductor and the Schottky junction layer; .

[0004] A semiconductor device according to one embodiment of the present disclosure includes a semiconductor layer having a trench, an insulating film covering the inner surface of the trench, a conductor embedded in the trench covered with the insulating film, and a Schottky junction layer forming a Schottky junction with a surface of the semiconductor layer adjacent to the trench. The Schottky junction is located below an upper end of the insulating film covering the inner surface of the trench. an upper surface electrode is formed in a position covering at least the conductor and the Schottky junction layer, and the upper surface electrode is in direct contact with the conductor and the Schottky junction layer; . [Brief explanation of the drawings]

[0005] [Figure 1] 1A to 1C are schematic cross-sectional views illustrating a manufacturing process of a semiconductor device according to an embodiment of the present disclosure. [Figure 2]2 is a schematic cross-sectional view for explaining the manufacturing process following FIG. 1. FIG. [Figure 3] 3 is a schematic cross-sectional view for explaining the manufacturing process following FIG. 2. FIG. [Figure 4] 4 is a schematic cross-sectional view for explaining the manufacturing process following FIG. 3. FIG. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the manufacturing process following FIG. 4, showing a model A4 of the semiconductor device. [Figure 6] FIG. 3 is an enlarged view corresponding to FIG. 2. [Figure 7] FIG. 4 is an enlarged view corresponding to FIG. 3. [Figure 8] FIG. 5 is an enlarged view corresponding to FIG. 4. [Figure 9] FIG. 6 is an enlarged view corresponding to FIG. 5. [Figure 10] FIG. 2 is a cross-sectional view showing a model A1 of the semiconductor device. [Figure 11] FIG. 10 is a cross-sectional view showing a model A2 of the semiconductor device. [Figure 12] FIG. 10 is a cross-sectional view showing a model A3 of the semiconductor device. [Figure 13] FIG. 10 is a cross-sectional view showing a model A5 of the semiconductor device. [Figure 14] 10 is a graph showing the reverse voltage-current characteristics of Models A1-A5. DETAILED DESCRIPTION OF THE INVENTION

[0006] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings.

[0007] A method for manufacturing a semiconductor device will be described with reference to the drawings. [Summary of manufacturing method] 1, an insulating film 12 is formed on the surface of a semiconductor layer 11 having a trench 10, and a conductor 13 is buried in the trench 10. Polysilicon, for example, may be used as the conductor 13. Examples of the semiconductor layer 11 include silicon, and the insulating film 12 includes a silicon oxide film.

[0008] (Insulating film etching process) Next, the insulating film 12 on the semiconductor layer surface 11a adjacent to the trench 10 is removed by etching to expose the semiconductor layer surface 11a as shown in FIG. 2. At this time, in order to fully expose the semiconductor layer surface 11a, the insulating film 12 may be over-etched, and the upper end 12a of the insulating film 12 covering the inner surface 10a of the trench 10 may be etched deeper. FIG. 2 shows a case where the upper end 12a is located below the semiconductor layer surface 11a. In this case, the insulating film on the semiconductor layer surface 11a is sufficiently removed. Note that in the description of the present semiconductor device and its manufacturing method, the terms "up" and "down" refer to the direction in which the trench 10 is dug down from the surface of the semiconductor layer 11 as "down" and the opposite as "up," and do not refer to the vertical direction (direction of gravity) during the manufacturing or use of the present semiconductor device.

[0009] (Semiconductor layer surface etching process) Furthermore, as shown in FIG. 3, the semiconductor layer surface 11a is etched to lower it relative to the upper end 12a of the insulating film 12 covering the inner surface 10a of the trench 10. That is, the semiconductor layer surface 11a is lowered below the position relative to the upper end 12a of the insulating film 12 in FIG. 2. Here, as shown in FIG. 3, the semiconductor layer surface 11a is etched to lower it below the upper end 12a of the insulating film 12. However, it is also possible to lower the semiconductor layer surface 11a to a predetermined position above the upper end 12a of the insulating film 12 or to the same position as the upper end 12a. There is meaning in lowering the height level of the semiconductor layer surface 11a relative to the upper end 12a of the insulating film 12.

[0010] (Schottky junction formation process) 4, a Schottky junction layer 14 is formed on the semiconductor layer surface 11a to form a Schottky junction. Here, the Schottky junction layer 14 may be, for example, nickel silicide or a metal such as nickel, molybdenum, or platinum.

[0011] Next, aluminum is formed as an upper electrode 15 on the metal layer 14, the conductor 13, and the upper end 12a of the insulating film 12. Other necessary steps are carried out to complete the semiconductor device.

[0012] [Supplementary explanation of manufacturing method and explanation of semiconductor device] Enlarged views are shown to clearly show the structure during each of the above steps: Figure 6 is an enlarged view corresponding to Figure 2, Figure 7 is an enlarged view corresponding to Figure 3, Figure 8 is an enlarged view corresponding to Figure 4, and Figure 9 is an enlarged view corresponding to Figure 5.

[0013] 5 and 9 is referred to as Model A4. Due to differences in the positional relationship between the semiconductor layer surface 11a and the upper end 12b of the insulating film 12, the semiconductor device having the structure shown in Fig. 10 is referred to as Model A1, the semiconductor device having the structure shown in Fig. 11 is referred to as Model A2, the semiconductor device having the structure shown in Fig. 12 is referred to as Model A3, and the semiconductor device having the structure shown in Fig. 13 is referred to as Model A5.

[0014] All of the semiconductor devices of Models A1-A5 include a semiconductor layer 11 having a trench 10, an insulating film 12 covering the inner surface of the trench 10, a conductor 13 buried in the trench 10 covered with the insulating film 12, and a Schottky junction layer 14 forming a Schottky junction with the semiconductor layer surface 11a adjacent to the trench 10.

[0015] In the semiconductor device of model A1, the Schottky junction between the semiconductor layer 11 and the Schottky junction layer 14 is at the same vertical position as the upper end 12a of the insulating film 12 covering the inner surface 10a of the trench 10. In the cross-sectional view of Fig. 10, the insulating film 12 and the Schottky junction layer 14 are in contact at a point. In other words, the semiconductor layer 11 and the upper electrode 15 are in contact at a point without the Schottky junction layer 14 in between.

[0016] In the semiconductor devices of Models A2-A5, the Schottky junction between the semiconductor layer 11 and the Schottky junction layer 14 is located below the upper end 12a of the insulating film 12 covering the inner surface 10a of the trench 10.

[0017] 8, 100% of the area of ​​the end face 14a of the Schottky junction layer 14 constituting the Schottky junction is overlapped and brought into contact with the upper end 12b of the insulating film 12 in the thickness direction T. The same applies to model A5. As a result, in model A4 shown in FIG. 9 and model A5 shown in FIG. 13, 100% of the area of ​​the end face 14a of the Schottky junction layer 14 constituting the Schottky junction overlaps and contacts the upper end 12b of the insulating film 12 in the thickness direction T. In model A5, the upper end 12b of the insulating film 12 protrudes above the upper surface, which is the surface opposite the Schottky junction, of the Schottky junction layer 14. Such a structure is easy to manufacture while ensuring a 100% overlap amount as the above-mentioned overlap.

[0018] In the Schottky junction formation process for manufacturing models A3-A5, at least the lower 50% region of the end face 14a of the Schottky junction layer 14 constituting the Schottky junction is overlapped with the upper end 12b of the insulating film 12 in the thickness direction T and brought into contact with each other. As a result, in models A3-A5, at least the lower 50% of the lower region of the end surface 14a of the Schottky junction layer 14 that constitutes the Schottky junction overlaps and contacts the upper end 12b of the insulating film 12 in the thickness direction T. In model A3, the lower 50% region of the end face 14a of the Schottky junction layer 14 that constitutes the Schottky junction overlaps with the upper end 12b of the insulating film 12 in the thickness direction T and is in contact with each other.

[0019] In the Schottky junction formation process when manufacturing models A2-A5, the lower region of the end face 14a of the Schottky junction layer 14 constituting the Schottky junction is overlapped with the upper end 12b of the insulating film 12 in the thickness direction T and brought into contact with each other. In model A2, a small lower region, which is less than 50% of the bottom of the end surface 14a of the Schottky junction layer 14 constituting the Schottky junction, overlaps and contacts the upper end 12b of the insulating film 12 in the thickness direction T. The overlapping length is, for example, 0.01 μm.

[0020] The reverse voltage-current characteristics of the Schottky diodes of the above models A1-A5 were investigated and the results are shown in Figure 14. Model A5 was able to suppress the reverse current the most, followed by Model A4. There was only a small difference between Model A4 and Model A5. Models A4 and A5 are models with an overlap amount of 100%. It is thought that the leakage current was suppressed because the Schottky junction was isolated from the top electrode 15. The model with the next highest suppression of reverse current was Model A3, which has an overlap of 50%, followed by Models A2 and A1. Models A1 and A2 showed almost the same results. The improvement effect of the reverse characteristics due to the semiconductor layer surface etching step was particularly noticeable when the overlap amount was 50% or more.

[0021] (silicide) In the above Schottky junction forming step, the Schottky junction is formed by a silicide process, and the Schottky junction layer 14 constituting the Schottky junction is made of silicide. That is, in models A1 to A5, the Schottky junction layer 14 is a silicide.

[0022] (Relationship between the insulating film etching process and the semiconductor layer surface etching process) The etching step of the semiconductor layer surface may be performed during the etching step of the insulating film. A wafer having a structure before the etching step of the insulating film is placed in an etching chamber, and a gas for etching the semiconductor layer 11 is added in the latter stage of etching the insulating film 12, thereby etching the semiconductor layer 11 and etching the semiconductor layer surface 11a in the latter stage of etching the insulating film 12. Regardless of this, the etching step of the semiconductor layer surface 11a may be performed after the etching step of the insulating film 12. In this case, the etching of the insulating film 12 and the etching of the semiconductor layer surface 11a may be performed in the same chamber, or may be performed in different chambers. Furthermore, when cleaning is performed before forming an electrode after the insulating film etching step and before the Schottky junction forming step, an anisotropic etching liquid may be used on the wafer surface to etch the semiconductor layer surface 11a.

[0023] According to the manufacturing method of the embodiment of the present invention, the semiconductor layer surface etching step brings the semiconductor layer surface 11a closer to or lower than the height level of the upper end 12a of the insulating film 12 covering the inner surface 10a of the trench 10. This makes it possible to reduce leakage current at the edge of the Schottky junction near the end face 14a of the Schottky junction layer 14 when a reverse voltage is applied. Furthermore, since the insulating film on the semiconductor layer surface 11a can be sufficiently removed, a Schottky junction with good characteristics can be obtained. According to the semiconductor device of the above embodiment of the present invention, leakage current at the edge of the Schottky junction near the end face 14a of the Schottky junction layer 14 can be suppressed to a low level when a reverse voltage is applied. The insulating film on the semiconductor layer surface 11a is sufficiently removed, and the Schottky junction characteristics are excellent.

[0024] Although an embodiment of the present disclosure has been described above, this embodiment is shown as an example, and the present disclosure can be implemented in various other forms, and components can be omitted, replaced, or modified within the scope of the gist of the invention. [Industrial Applicability]

[0025] The present disclosure can be used in a semiconductor device and a method for manufacturing a semiconductor device. [Explanation of symbols]

[0026] 10 Trench 10a Inner surface 11 Semiconductor layer 11a Semiconductor layer surface 12 insulating film 12a top end 12b Upper end 13 Conductors 14 Schottky junction layer 14a End face 15 Top electrode A1-A5 Semiconductor device models

Claims

1. forming an insulating film on a surface of a semiconductor layer having a trench, burying a conductor in the trench, and removing the insulating film on the surface of the semiconductor layer adjacent to the trench by etching to expose the surface of the semiconductor layer; Further, the surface of the semiconductor layer is etched to lower it relative to the upper end of the insulating film covering the inner surface of the trench; Thereafter, a Schottky junction layer is formed on the surface of the semiconductor layer so as to form a Schottky junction; A method for manufacturing a semiconductor device, comprising forming a top electrode in a position covering at least the conductor and the Schottky junction layer, and bringing the top electrode into direct contact with the conductor and the Schottky junction layer.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the surface of the semiconductor layer is etched to be lower than the top end of the insulating film.

3. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a lower region of an end face of the Schottky junction layer constituting the Schottky junction overlaps an upper end of the insulating film in a direction perpendicular to the surface of the semiconductor layer and is brought into contact with the upper end of the insulating film.

4. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a lower region of at least a lower 50% of an end face of the Schottky junction layer constituting the Schottky junction overlaps and contacts an upper end of the insulating film in a direction perpendicular to the surface of the semiconductor layer.

5. 3. The method for manufacturing a semiconductor device according to claim 2, wherein 100% of the area of ​​the end face of the Schottky junction layer constituting the Schottky junction overlaps and contacts the upper end of the insulating film in a direction perpendicular to the surface of the semiconductor layer.

6. 6. The method for manufacturing a semiconductor device according to claim 1, wherein the Schottky junction is formed by a silicide process, and a Schottky junction layer constituting the Schottky junction is made of silicide.

7. 7. The method for manufacturing a semiconductor device according to claim 1, wherein a step of etching the surface of the semiconductor layer is carried out during the step of etching the insulating film.

8. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the step of etching the insulating film is followed by the step of etching the surface of the semiconductor layer.

9. a semiconductor layer having a trench; an insulating film covering the inner surface of the trench; a conductor buried in the trench covered with the insulating film; a Schottky junction layer that forms a Schottky junction with a surface of the semiconductor layer adjacent to the trench; Equipped with the Schottky junction is located below an upper end of an insulating film covering the inner surface of the trench, The semiconductor device further comprises a top electrode formed in a position covering at least the conductor and the Schottky junction layer, the top electrode being in direct contact with the conductor and the Schottky junction layer.

10. 10. The semiconductor device according to claim 9, wherein a lower region of at least a lower 50% of an end face of the Schottky junction layer constituting the Schottky junction overlaps and contacts an upper end of the insulating film in a direction perpendicular to the surface of the semiconductor layer.

11. 10. The semiconductor device according to claim 9, wherein 100% of the area of ​​the end face of the Schottky junction layer constituting the Schottky junction overlaps and contacts with the upper end of the insulating film in a direction perpendicular to the surface of the semiconductor layer.

12. 12. The semiconductor device according to claim 11, wherein an upper end of the insulating film protrudes above an upper surface of the Schottky junction layer, which is the surface opposite to the Schottky junction.

13. 13. The semiconductor device according to claim 9, wherein the Schottky junction layer is a silicide.

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