Imaging device

Abstract

This imaging device comprises: a counter electrode; a photoelectric conversion layer that converts light into signal charges; a plurality of pixel electrodes which each collect the signal charges and have a plurality of sets each including a first pixel electrode included in a high-sensitivity pixel and a second pixel electrode included in a low-sensitivity pixel; and an auxiliary electrode that is located between the first pixel electrode and the second pixel electrode in each of the plurality of sets in a plan view and is included in both the high-sensitivity pixel and the low-sensitivity pixel. In each of the plurality of sets, the distance between the first pixel electrode and the auxiliary electrode is different from the distance between the second pixel electrode and the auxiliary electrode.

Description

[Technical Field]

[0001] The present disclosure relates to an imaging device. [Background technology]

[0002] In recent years, proposals have been made to realize wide dynamic range imaging in imaging devices such as CCD (Charge Coupled Device) image sensors and CMOS (Complementary MOS) image sensors. For example, Patent Document 1 discloses an imaging device capable of expanding the dynamic range. In the imaging device of Patent Document 1, a photodiode with a large area is arranged in a high-sensitivity pixel cell, and a photodiode with a small area is arranged in a low-sensitivity pixel cell. Furthermore, Patent Document 2 proposes an imaging device having a photoelectric conversion layer that can expand the dynamic range. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4018820 [Patent Document 2] Patent No. 6213743 [Patent Document 3] Japanese Patent Application Laid-Open No. 2017-46333 [Patent Document 4] Japanese Patent Application Laid-Open No. 2017-135696 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the imaging device of Patent Document 1, when the illuminance is so high that the charge generated in the low-sensitivity pixel cells saturates, it is difficult to dynamically lower the sensitivity to prevent saturation, resulting in a reduced dynamic range. Furthermore, in the imaging device of Patent Document 2, color mixing between adjacent pixels can become a problem. To prevent color mixing, it is necessary to minimize the area of ​​the pixel electrodes that collect signal charge and increase the distance between adjacent pixel electrodes. Therefore, to prevent color mixing, the efficiency of collecting signal charge decreases.

[0005] Therefore, the present disclosure provides an imaging device that can efficiently collect signal charges and capture images with a wide dynamic range while suppressing color mixing between adjacent pixels. [Means for solving the problem]

[0006] An imaging device according to one aspect of the present disclosure includes a counter electrode, a photoelectric conversion layer that converts light into signal charges, a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer, each pixel electrode collecting the signal charges, the plurality of pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having lower sensitivity than the high-sensitivity pixel, and an auxiliary electrode located between the first electrode and the second electrode in each of the pairs in a plan view and facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel. In each of the pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode.

[0007] It should be noted that the general or specific aspects of the present disclosure may be realized by an element, a device, or an apparatus. Furthermore, the general or specific aspects of the present disclosure may be realized by any combination of elements, devices, and apparatus. Additional effects and advantages of the disclosed embodiments will become apparent from the specification and drawings. The effects and / or advantages are provided individually by the various embodiments or features disclosed in the specification and drawings, and not all are required to obtain one or more of them. [Effects of the Invention]

[0008] According to one aspect of the present disclosure, there is provided an imaging device that can efficiently collect signal charges and capture images in a wide dynamic range while suppressing color mixing between adjacent pixels. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram showing an exemplary configuration of an imaging device according to the first embodiment. [Figure 2] FIG. 2 is a diagram showing an example of a circuit configuration of a pixel according to the first embodiment. [Figure 3] FIG. 3 is a diagram showing another example of the circuit configuration of the pixel according to the first embodiment. [Figure 4] FIG. 4 is a plan view showing an exemplary electrode layout of a pixel according to the first embodiment. [Figure 5] FIG. 5 is a schematic cross-sectional view of the pixel according to the first embodiment taken along line VV in FIG. [Figure 6A] 6A is a schematic cross-sectional view of the pixel according to the first embodiment taken along line VIa-VIa in FIG. [Figure 6B] FIG. 6B is a schematic cross-sectional view of a pixel without an auxiliary electrode. [Figure 7] FIG. 7 is a schematic cross-sectional view of a pixel according to a modification of the first embodiment. [Figure 8] FIG. 8 is a plan view showing an exemplary electrode layout of a pixel according to the second embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view of the pixel according to the second embodiment taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a schematic cross-sectional view for explaining the charge trapping region of the pixel electrode. [Figure 11] FIG. 11 is a plan view showing an exemplary electrode layout of a pixel according to the first modification of the second embodiment. [Figure 12] FIG. 12 is a plan view showing an exemplary electrode layout of a pixel according to the third embodiment. [Figure 13] FIG. 13 is a schematic cross-sectional view of the pixel according to the third embodiment taken along line XIII-XIII in FIG. [Figure 14] FIG. 14 is a plan view showing an exemplary electrode layout of a pixel according to the first modification of the third embodiment. [Figure 15] FIG. 15 is a plan view showing an exemplary electrode layout of a pixel according to the second modification of the third embodiment. [Figure 16] FIG. 16 is a schematic cross-sectional view of a pixel according to Modification 2 of Embodiment 3 taken along line XVI-XVI in FIG. [Figure 17] FIG. 17 is a diagram illustrating an example of a circuit configuration of a pixel according to the fourth embodiment. [Figure 18] FIG. 18 is a plan view showing an exemplary electrode layout of a pixel according to the fourth embodiment. [Figure 19] FIG. 19 is a schematic cross-sectional view of the pixel according to the fourth embodiment taken along line XIX-XIX in FIG. [Figure 20] FIG. 20 is a schematic cross-sectional view of another example of a pixel according to the fourth embodiment. [Figure 21] FIG. 21 is a schematic cross-sectional view of yet another example of a pixel according to the fourth embodiment. [Figure 22] FIG. 22 is a schematic cross-sectional view of yet another example of a pixel according to the fourth embodiment. [Figure 23] FIG. 23 is a schematic cross-sectional view of yet another example of a pixel according to the fourth embodiment. [Figure 24] FIG. 24 is a schematic cross-sectional view of yet another example of a pixel according to the fourth embodiment. [Figure 25] FIG. 25 is a plan view showing an exemplary electrode layout of a pixel according to the fifth embodiment. [Figure 26] FIG. 26 is a schematic cross-sectional view of the pixel according to the fifth embodiment taken along the line XXVI-XXVI in FIG. [Figure 27] FIG. 27 is a plan view showing an exemplary electrode layout of a pixel according to the first modification of the fifth embodiment. [Figure 28]FIG. 28 is a plan view showing an exemplary electrode layout of a pixel according to the sixth embodiment. [Figure 29] FIG. 29 is a block diagram showing an example of the configuration of a camera system according to the seventh embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] (Summary of the Disclosure) An imaging device according to one aspect of the present disclosure includes a counter electrode, a photoelectric conversion layer that converts light into signal charges, a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer and each collecting the signal charges, the plurality of pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having lower sensitivity than the high-sensitivity pixel, and an auxiliary electrode located between the first electrode and the second electrode in each of the pairs in a plan view and facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel. In each of the pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode.

[0011] In this way, by arranging the auxiliary electrode common to both the high-sensitivity pixel and the low-sensitivity pixel, the auxiliary electrode can be efficiently arranged, thereby reducing the area of ​​the auxiliary electrode while suppressing color mixing between adjacent pixels. This also prevents the area in which the first electrode and the second electrode can collect signal charge from becoming narrower. Furthermore, by varying the distance between the first electrode and the auxiliary electrode and the distance between the second electrode and the auxiliary electrode, the range in which the first electrode and the second electrode can collect signal charge changes, thereby changing the sensitivity ratio of the high-sensitivity pixel to the low-sensitivity pixel. Therefore, by adjusting the distance between the first electrode and the auxiliary electrode and the distance between the second electrode and the auxiliary electrode to an appropriate distance relationship, the dynamic range can be expanded. Therefore, the imaging device can efficiently collect signal charge and achieve wide dynamic range imaging while suppressing color mixing between adjacent pixels.

[0012] Furthermore, for example, the first electrodes included in each of the plurality of sets may be located on lattice points of a first square lattice in a planar view, the second electrodes included in each of the plurality of sets may be located on lattice points of a second square lattice different from the first square lattice in a planar view, and the length of one side of the unit cell of the first square lattice may be equal to the length of one side of the unit cell of the second square lattice.

[0013] As a result, the length of one side of the first square lattice unit cell is equal to the length of one side of the second square lattice unit cell, so the high-sensitivity pixels and the low-sensitivity pixels have the same vertical and horizontal resolution, allowing the imaging device to achieve wide dynamic range imaging without degrading resolution.

[0014] Furthermore, for example, in each of the plurality of pairs, the distance between the first electrode and the auxiliary electrode may be longer than the distance between the second electrode and the auxiliary electrode.

[0015] As a result, since the distance between the first electrode and the auxiliary electrode is longer than the distance between the second electrode and the auxiliary electrode, the ratio of the area where the first electrode captures signal charges to the area where the second electrode captures signal charges is larger than when the distance between the first electrode and the auxiliary electrode is the same as the distance between the second electrode and the auxiliary electrode. Furthermore, the ratio of the coupling capacitance between the second electrode and the auxiliary electrode to the coupling capacitance between the first electrode and the auxiliary electrode is larger. As a result, the sensitivity ratio of high-sensitivity pixels to low-sensitivity pixels can be increased. This allows the imaging device to further expand its dynamic range. Furthermore, for example, in each of the plurality of pairs, the distance between the first electrode and the auxiliary electrode may be shorter than the distance between the second electrode and the auxiliary electrode.

[0016] Also, for example, the auxiliary electrode may have a first surface facing the photoelectric conversion layer and a second surface opposite the first surface, the imaging device may further include a first auxiliary electrode plug connected to the second surface, the first electrodes of a first set of the plurality of sets and the first electrodes of a second set of the plurality of sets may be adjacent to each other via the auxiliary electrode, and the first auxiliary electrode plug may be located between the first electrodes of the first set and the first electrodes of the second set in a planar view.

[0017] In this way, by disposing the first auxiliary electrode plug between adjacent first electrodes, the capacitance between the plugs connected to the adjacent first electrodes can be reduced, and thus the imaging device can suppress electrical color mixing between adjacent pixels.

[0018] Also, for example, the auxiliary electrode may have a first surface facing the photoelectric conversion layer and a second surface opposite the first surface, the imaging device may further include a plug for a second auxiliary electrode connected to the second surface, the second electrodes of a third set of the plurality of sets and the second electrodes of a fourth set of the plurality of sets may be adjacent to each other via the auxiliary electrode, and the plug for the second auxiliary electrode may be located between the second electrodes of the third set and the second electrodes of the fourth set in a planar view.

[0019] In this way, by disposing the second auxiliary electrode plug between the plugs connected to the adjacent second electrodes, the capacitance between the plugs connected to the adjacent second electrodes can be reduced, and therefore the imaging device can suppress electrical color mixing between adjacent pixels.

[0020] Also, for example, the auxiliary electrode has a first surface facing the photoelectric conversion layer and a second surface opposite the first surface, the imaging device further includes a third auxiliary electrode plug connected to the second surface, the plurality of pixel electrodes include a plurality of first electrodes and a plurality of second electrodes, each of the plurality of first electrodes is the first electrode and each of the plurality of second electrodes is the second electrode, and in a planar view, the distance between the second electrode of the plurality of second electrodes that is closest to the third auxiliary electrode plug and the third auxiliary electrode plug may be shorter than the distance between the first electrode of the plurality of first electrodes that is closest to the third auxiliary electrode plug and the third auxiliary electrode plug.

[0021] In this way, the distance between the second electrode and the third auxiliary electrode plug is shorter than the distance between the first electrode and the third auxiliary electrode plug, so the ratio of the capacitance of the second electrode to the capacitance of the first electrode is larger than when the third auxiliary electrode plug is not provided. As a result, the sensitivity ratio of the low-sensitivity pixel to the high-sensitivity pixel decreases. Therefore, the dynamic range of the imaging device can be further expanded.

[0022] Furthermore, for example, in each of the plurality of pairs, the area of ​​the first electrode may be larger than the area of ​​the second electrode in a plan view.

[0023] This makes the area where the first electrode collects signal charges larger than the area where the second electrode collects signal charges, resulting in a higher sensitivity ratio of the high-sensitivity pixel to the low-sensitivity pixel, thereby expanding the dynamic range of the imaging device.

[0024] Furthermore, for example, in each of the plurality of pairs, the area of ​​the first electrode may be equal to the area of ​​the second electrode in a plan view.

[0025] In this way, the area of ​​the first electrode and the area of ​​the second electrode are the same, which makes it easier to fabricate the electrodes.

[0026] Also, for example, the imaging device may further include a first charge storage section that stores the signal charges collected by the first electrode, and a second charge storage section that stores the signal charges collected by the second electrode, and the capacity of the second charge storage section may be larger than the capacity of the first charge storage section.

[0027] In this way, the capacity of the second charge storage section that stores the signal charge collected by the second electrode included in the low-sensitivity pixel is larger than the capacity of the first charge storage section that stores the signal charge collected by the first electrode included in the high-sensitivity pixel, thereby increasing the sensitivity ratio of the high-sensitivity pixel to the low-sensitivity pixel, and thus enabling the imaging device to expand its dynamic range.

[0028] Furthermore, for example, the imaging device may include a first microlens that faces the photoelectric conversion layer across the counter electrode and overlaps with the first electrode in a plan view.

[0029] As a result, the first microlens focuses the light incident on the first electrode, making it easier to generate signal charges on the first electrode and increasing the sensitivity of the high-sensitivity pixel, thereby further expanding the dynamic range of the imaging device.

[0030] Also, for example, the imaging device may include a second microlens that faces the photoelectric conversion layer via the opposing electrode and overlaps with the second electrode in a planar view, and the light-collecting area of ​​the first microlens may be larger than the light-collecting area of ​​the second microlens.

[0031] In this way, because the light-collecting area of ​​the first microlens is larger than the light-collecting area of ​​the second microlens, more light is incident on the first electrode than on the second electrode, and the sensitivity ratio of the high-sensitivity pixel to the low-sensitivity pixel increases. This further expands the dynamic range of the imaging device. In addition, because light is concentrated on the first electrode and the second electrode, the first electrode and the second electrode can efficiently collect signal charges.

[0032] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0033] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component arrangements and connection forms, steps, and step orders shown in the following embodiments are merely examples and are not intended to limit the present disclosure. The various aspects described in this specification can be combined with each other as long as no contradiction occurs. Furthermore, among the components in the following embodiments, components that are not recited in the independent claims that represent the highest concepts are described as optional components. In the following description, components having substantially the same functions are designated by common reference symbols, and their description may be omitted.

[0034] Furthermore, the drawings are schematic diagrams and are not necessarily drawn to scale.

[0035] Furthermore, in this specification, terms indicating relationships between elements, such as "equal," terms indicating the shapes of elements, such as "square" or "circle," and numerical ranges are not expressions that express only the strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0036] Furthermore, in this specification, the terms "upper" and "lower" do not refer to the upper direction (vertically upper) and lower direction (vertically lower) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in the stacked structure. Specifically, the light-receiving side of the imaging device is referred to as "upper," and the side opposite the light-receiving side is referred to as "lower." Similarly, the "upper surface" and "lower surface" of each component refer to the surface facing the light-receiving side of the imaging device as the "upper surface" and the surface facing the opposite side of the light-receiving side as the "lower surface." Note that the terms "upper," "lower," "upper surface," and "lower surface" are used solely to specify the relative arrangement of components and are not intended to limit the orientation of the imaging device during use. Furthermore, the terms "upper" and "lower" apply not only to cases where two components are arranged with a gap between them and another component is present between them, but also to cases where two components are arranged closely together and the two components are in contact with each other. Furthermore, in this specification, "plan view" refers to a view perpendicular to the semiconductor substrate.

[0037] (Embodiment 1) The configuration of the imaging device according to this embodiment will be described.

[0038] FIG. 1 is a block diagram showing an exemplary configuration of an imaging device 1 according to the present embodiment. As shown in FIG. 1, the imaging device 1 includes a pixel array 30 including a plurality of pixels 10, and peripheral circuits. The pixels 10 are, for example, two-dimensionally arranged on a semiconductor substrate to form an imaging region. In the example shown in FIG. 1, the pixels 10 are arranged in a matrix of m rows and n columns. Here, m and n are integers equal to or greater than 1, and m+n≧3.

[0039] In the example shown in FIG. 1, the center of each pixel 10 is located on a lattice point of a square lattice.

[0040] 1, the peripheral circuits include a row scanning circuit 310, a column circuit 312, a signal processing circuit 313, an output circuit 314, and a control circuit 311. The peripheral circuits may be arranged on the semiconductor substrate on which the pixel array 30 is formed, or a part of the peripheral circuits may be arranged on another substrate.

[0041] The row scanning circuit 310 is connected to reset control lines RSTiA, RSTiB and feedback control line FBi. The reset control lines RSTiA, RSTiB and feedback control line FBi are provided corresponding to each row of the pixel array 30. That is, among the multiple pixels 10, one or more pixels 10 belonging to the i-th row are connected to the reset control lines RSTiA, RSTiB and feedback control line FBi, where i=0, 1, . . . , n-2, n-1.

[0042] The row scanning circuit 310 is connected to address control lines not shown in FIG. 1 (address control lines SELA and SELB in FIG. 2, which will be described later). Like the reset control lines RSTiA and RSTiB and the feedback control line FBi, the address control lines are provided corresponding to each row of the pixel array 30 and are connected to one or more pixels 10 belonging to the i-th row. The row scanning circuit 310 applies a predetermined voltage to the address control lines to select the pixels 10 row by row, read out the signal voltage, and perform a reset operation, which will be described later. The row scanning circuit 310 is also called a vertical scanning circuit.

[0043] The column circuit 312 is connected to vertical signal lines SIGjA and SIGjB. The vertical signal lines SIGjA and SIGjB are provided corresponding to each column of the pixel array 30. That is, of the multiple pixels 10, one or more pixels 10 belonging to the j-th column are connected to the vertical signal lines SIGjA and SIGjB. Here, j = 0, 1, 2, 3, . . . , m-1. Output signals from the pixels 10 selected row by row by the row scanning circuit 310 are read out to the column circuit 312 via the vertical signal lines SIGjA and SIGjB. The column circuit 312 performs noise suppression signal processing, typified by correlated double sampling, and analog-to-digital conversion (AD conversion), on the output signals read out from the pixels 10.

[0044] The signal processing circuit 313 performs various processes on the image signals acquired from the pixels 10. In this specification, the term "image signal" refers to an output signal used to form an image, among signals read out via the vertical signal lines SIGjA and SIGjB. As will be described in detail later, the pixels 10 have a first high-sensitivity imaging cell and a second low-sensitivity, highly saturated imaging cell. The column circuit 312 reads out a high-sensitivity image signal from the first imaging cell and a low-sensitivity image signal from the second imaging cell. In this specification, the first imaging cell is an example of a high-sensitivity pixel, and the second imaging cell is an example of a low-sensitivity pixel. The first imaging cell and the second imaging cell are, for example, sub-pixels included in the pixel 10. The signal processing circuit 313 forms a wide dynamic range image based on, for example, the high-sensitivity image signal and the low-sensitivity image signal read out by the column circuit 312. The output of the signal processing circuit 313 is read out to the outside of the imaging device 1 via the output circuit 314. The signal processing circuit 313 performs processing to generate image data such as a single brightness value for each of the multiple pixels 10, based on at least one of a high-sensitivity image signal and a low-sensitivity image signal output from a first imaging cell and a second imaging cell included in one pixel 10, for example.

[0045] The control circuit 311 receives, for example, command data and a clock provided from outside the imaging device 1, and controls the entire imaging device 1. The control circuit 311 has, for example, a timing generator, and supplies drive signals to the row scanning circuit 310, the column circuit 312, and the like.

[0046] 2 is a diagram showing an example of the circuit configuration of a pixel 10 according to this embodiment. The pixel 10 includes a first imaging cell 100a with high sensitivity and a second imaging cell 100b with lower sensitivity than the first imaging cell 100a. The sensitivity ratio of the first imaging cell 100a to the second imaging cell 100b is greater than 1. The sensitivity ratio is the ratio of the amount of accumulated signal charge of the first imaging cell 100a to the amount of accumulated signal charge of the second imaging cell 100b to the saturation capacity of the first imaging cell 100a when light of the same intensity is incident on the first imaging cell 100a and the second imaging cell 100b for the same period of time.

[0047] The first imaging cell 100a functions as a low-noise cell for capturing images in low-illumination situations. As described below, using the first imaging cell 100a and the second imaging cell 100b makes it easier to capture scenes with a wider dynamic range. The first imaging cell 100a includes a first photoelectric conversion unit 120 that converts light into an electrical signal, and a first detection circuit 200 that is electrically connected to the first photoelectric conversion unit 120 and reads out the electrical signal generated by the first photoelectric conversion unit 120.

[0048] The first photoelectric conversion section 120 generates an electrical signal using light incident on the photosensitive region. The first photoelectric conversion section 120 includes a photoelectric conversion layer 110 formed of, for example, an organic material or an inorganic material such as amorphous silicon. The photoelectric conversion layer 110 generates, for example, hole-electron pairs through photoelectric conversion. The following description will be given taking as an example a stacked structure in which the first photoelectric conversion section 120 includes the photoelectric conversion layer 110.

[0049] The first photoelectric conversion unit 120 is provided on a substrate, such as a semiconductor substrate, on which the first amplification transistor 205 is provided. The first photoelectric conversion unit 120 includes a first pixel electrode 102, a counter electrode 111, and a photoelectric conversion layer 110 disposed between the first pixel electrode 102 and the counter electrode 111. For example, the first pixel electrode 102 and a second pixel electrode 103 (described later) are provided for each of a plurality of pixels 10. For example, two adjacent pixels 10 are electrically isolated by providing a gap between the first pixel electrodes 102 and between the second pixel electrodes 103. The first pixel electrode 102 is also electrically isolated from the second pixel electrode 103. The first pixel electrode 102 is connected to a charge storage node FD1. The charge storage node is also referred to as a "floating diffusion node." In this specification, the charge storage node FD1 is part of a first charge storage unit that accumulates signal charges collected by the first pixel electrode 102. The first charge storage unit includes at least a part of an electrode, a transistor, and a capacitive element connected to the charge storage node FD1.

[0050] The counter electrode 111 is an electrode disposed on the light-receiving surface side of the photoelectric conversion layer 110, and is made of a transparent conductive material such as ITO (Indium Tin Oxide). A predetermined voltage Vp is applied to the counter electrode 111 when the imaging device 1 is in operation. The counter electrode 111 and the photoelectric conversion layer 110 may be formed in common for all pixels 10, or may be formed for each pixel block consisting of several pixels 10. The counter electrode 111 and the photoelectric conversion layer 110 may be formed in common for the first imaging cell 100a and the second imaging cell 100b, or may be formed individually for the first imaging cell 100a and the second imaging cell 100b.

[0051] By applying a voltage Vp to the counter electrode 111, either the holes or the electrons of the hole-electron pairs generated in the photoelectric conversion layer 110 by photoelectric conversion can be collected by the first pixel electrode 102. When holes are used as signal charges, a voltage Vp of, for example, about 10 V is applied to the counter electrode 111. By making the potential of the counter electrode 111 higher than the potential of the first pixel electrode 102, holes can be accumulated in the charge accumulation node FD1. An example in which holes are used as signal charges will be described below. Note that electrons may also be used as signal charges. In this case, the potential of the counter electrode 111 should be lower than that of the first pixel electrode 102.

[0052] The voltage Vp may be a common voltage supplied to all pixels 10, or a different voltage may be supplied to each pixel block consisting of several pixels 10. By supplying a different voltage to each pixel block, the sensitivity of each pixel 10 can be varied. The voltage Vp may be a common voltage supplied to the first imaging cell 100a and the second imaging cell 100b, or a different voltage may be supplied to each of the first imaging cell 100a and the second imaging cell 100b.

[0053] The charge storage node FD1 is connected to a control terminal of the first amplification transistor 205. The control terminal is, for example, a gate.

[0054] The first detection circuit 200 includes a first amplification transistor 205, a first selection transistor 206, a first reset transistor 202, and a feedback circuit.

[0055] In the following, unless otherwise specified, an example will be described in which an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used as the transistor. Note that the semiconductor substrate is not limited to a substrate made entirely of semiconductor. The semiconductor substrate may be an insulating substrate with a semiconductor layer provided on the surface on which the photosensitive region is formed.

[0056] The gate of the first amplification transistor 205 is connected to the first photoelectric conversion unit 120. The first amplification transistor 205 amplifies the electrical signal generated by the first photoelectric conversion unit 120. One of the source and drain of the first amplification transistor 205 is connected to one of the source and drain of the first selection transistor 206. The other of the source and drain of the first amplification transistor 205 is connected to a power supply line that supplies a power supply voltage VDD.

[0057] One of the source and drain of the first selection transistor 206 is connected to one of the source and drain of the first amplification transistor 205. The other of the source and drain of the first selection transistor 206 is connected to a vertical signal line 208a. The vertical signal line 208a corresponds to the vertical signal line SIGjA in FIG. 1. The gate of the first selection transistor 206 is controlled by the voltage of an address control line SELA, which is connected to the row scanning circuit 310. The first selection transistor 206 selectively outputs the signal amplified by the first amplification transistor 205.

[0058] One of the source and drain of the first reset transistor 202 is connected to a charge storage node FD1. The other of the source and drain of the first reset transistor 202 is connected to a node RD. The node RD is a node formed between the band control transistor 207, the first capacitance element 203, and the second capacitance element 204. The gate of the first reset transistor 202 is controlled by the voltage of a reset control line RSTA. The reset control line RSTA corresponds to the reset control line RSTiA in FIG. 1. The first reset transistor 202 resets (in other words, initializes) the charge storage node FD1 connected to the first pixel electrode 102 of the first photoelectric conversion unit 120.

[0059] One of the source and drain of the band control transistor 207 is connected to node RD. The other of the source and drain of the band control transistor 207 is connected to a feedback line 209a. The gate of the band control transistor 207 is controlled by the voltage of a feedback control line FBA. The feedback control line FBA corresponds to the feedback control line FBi in FIG. 1. The band control transistor 207 controls the band of the feedback circuit. The band control transistor 207 is arranged on the feedback path and is connected to the output of an inverting amplifier 300 via a feedback line 209a. One input of the inverting amplifier 300 is a reference voltage VREF, and the other input is connected to a vertical signal line 208a.

[0060] The second capacitance element 204 is electrically connected between the charge storage node FD1 and one of the source and drain of the bandwidth control transistor 207. The first capacitance element 203 has a capacitance value larger than that of the second capacitance element 204, and is connected between the second capacitance element 204 and a reference voltage VR. The first capacitance element 203 and the second capacitance element 204 are, for example, a MOM (Metal-Oxide-Metal) capacitance, a MIM (Metal-Insulator-Metal) capacitance, a MOS (Metal Oxide Semiconductor) capacitance, or a trench capacitance.

[0061] The feedback circuit has an inverting amplifier 300 and forms a feedback path that negatively feeds back kTC noise that occurs when the first reset transistor 202 is turned off. The inverting amplifier 300 increases the gain of the feedback path and improves the noise suppression effect.

[0062] The second imaging cell 100b functions as a highly saturated cell. High saturation means that the accumulated signal charge is less likely to saturate. In other words, the second imaging cell 100b is less likely to saturate the accumulated charge than the first imaging cell 100a due to at least one of the following effects: the amount of signal charge collected is smaller and / or the capacity for accumulating signal charge is larger. Therefore, the sensitivity of the second imaging cell 100b is lower than that of the first imaging cell 100a.

[0063] The second imaging cell 100b has a second photoelectric conversion unit 130 that converts light into an electrical signal, and a second detection circuit 210 that is electrically connected to the second photoelectric conversion unit 130 and reads out the electrical signal generated by the second photoelectric conversion unit 130. Of the components of the second imaging cell 100b, descriptions of components that have the same functions as those of the first imaging cell 100a will be omitted or simplified.

[0064] Similar to the first photoelectric conversion section 120, the second photoelectric conversion section 130 generates an electrical signal using light incident on the photosensitive region.

[0065] The second photoelectric conversion unit 130 is provided on a substrate such as a semiconductor substrate, similar to the first photoelectric conversion unit 120. The second photoelectric conversion unit 130 has a second pixel electrode 103, a counter electrode 111, and a photoelectric conversion layer 110 disposed between the second pixel electrode 103 and the counter electrode 111. The second pixel electrode 103 is connected to a charge storage node FD2. In this specification, the charge storage node FD2 is a part of a second charge storage unit that stores signal charges collected by the second pixel electrode 103. The second charge storage unit also includes at least a part of an electrode, a transistor, and a capacitive element connected to the charge storage node FD2.

[0066] The second detection circuit 210 includes a second amplification transistor 215 , a second selection transistor 216 , and a second reset transistor 217 .

[0067] The gate of the second amplification transistor 215 is connected to the second photoelectric conversion unit 130. The second amplification transistor 215 amplifies the electrical signal generated by the second photoelectric conversion unit 130. One of the source and drain of the second selection transistor 216 is connected to one of the source and drain of the second amplification transistor 215.

[0068] The other of the source and drain of the second selection transistor 216 is connected to the vertical signal line 208b. The vertical signal line 208b corresponds to the vertical signal line SIGjB in FIG. 1. The gate of the second selection transistor 216 is controlled by the voltage of the address control line SELB, which is connected to the row scanning circuit 310. The second selection transistor 216 selectively outputs the signal amplified by the second amplification transistor 215.

[0069] One of the source and drain of the second reset transistor 217 is connected to the charge storage node FD2. The other of the source and drain of the second reset transistor 217 is connected to the reset line 209b. The gate of the second reset transistor 217 is controlled by the voltage of the reset control line RSTB. The reset control line RSTB corresponds to the reset control line RSTiB in FIG. 1. The second reset transistor 217 resets (in other words, initializes) the charge storage node FD2 connected to the second pixel electrode 103 of the second photoelectric conversion unit 130.

[0070] The first imaging cell 100a is responsible for capturing images of dark scenes, so it has low noise characteristics but does not particularly require high saturation characteristics. On the other hand, the second imaging cell 100b is responsible for capturing images of bright scenes, so it has high saturation characteristics. However, when capturing images of bright scenes, a large amount of light enters the imaging device 1, and the imaging characteristics are determined by shot noise, so the second imaging cell 100b does not particularly require low noise characteristics.

[0071] The first imaging cell 100a includes a feedback circuit, which significantly reduces noise that occurs when the first reset transistor 202 is turned off.

[0072] In addition, the noise of the second imaging cell 100b may be reduced by including a feedback circuit in the second imaging cell 100b, such as by providing an inverting amplifier in the second imaging cell 100b in the same way as the first imaging cell 100a and connecting the output of the inverting amplifier to the reset line 209b.

[0073] Furthermore, the circuit configuration of pixel 10 is not limited to the example shown in Fig. 2, and may be, for example, a configuration in which a feedback circuit is formed within the pixel. Fig. 3 is a diagram showing another example of the circuit configuration of a pixel according to this embodiment. The imaging device 1 according to this embodiment may include a pixel 10a instead of pixel 10. The pixel 10a shown in Fig. 3 includes a first imaging cell 100a1 having a first detection circuit 200a, instead of the first imaging cell 100a having the first detection circuit 200 of pixel 10.

[0074] In the first detection circuit 200a of the first imaging cell 100a1, the other of the source and drain of the band control transistor 207 is connected to the first amplification transistor 205 and the first selection transistor 206 via a feedback line 209c. The other of the source and drain of the first amplification transistor 205 is connected to one end of a switch element 51a and one end of a switch element 51b included in the switching circuit 50. The other end of the switch element 51a is connected to a power supply voltage VDD. The other end of the switch element 51b is connected to a reference potential VSS.

[0075] Even in the first imaging cell 100a1 in which a feedback circuit is formed within such a pixel, it is possible to suppress noise that occurs when the first reset transistor 202 is turned off. Details of noise suppression using a feedback circuit are described in Patent Document 3, the entire disclosure of which is incorporated herein by reference.

[0076] The circuit configuration of the pixel 10 may also be other configurations such as those disclosed in Patent Document 4.

[0077] Next, the layout of the multiple pixel electrodes included in the imaging device 1 will be described. Fig. 4 is a plan view showing an exemplary electrode layout of the pixel 10. Fig. 4 is a plan view seen through components above the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 (in other words, on the positive side of the Z axis). This also applies to the plan views showing the electrode layouts described below.

[0078] The pixel electrode region 20 shown in Fig. 4 corresponds to the pixel 10 having the first imaging cell 100a and the second imaging cell 100b in Fig. 2. The pixel electrode region 20 is provided with a first pixel electrode 102, a second pixel electrode 103, and an auxiliary electrode 104. In the following, to distinguish between the two first pixel electrodes 102 provided in each of the adjacent pixels 10, the two first pixel electrodes 102 may be referred to as the first pixel electrode 102a and the first pixel electrode 102b. Similarly, the two second pixel electrodes 103 provided in each of the adjacent pixels 10 may be referred to as the second pixel electrode 103a and the second pixel electrode 103b.

[0079] Each pixel 10 includes a set including a first pixel electrode 102 included in the first imaging cell 100a and a second pixel electrode 103 included in the second imaging cell 100b, and an auxiliary electrode 104. Therefore, the multiple pixel electrodes included in the imaging device 1 include multiple sets, each set including a first pixel electrode 102 included in the first imaging cell 100a and a second pixel electrode 103 included in the second imaging cell 100b. In this specification, a set refers to, for example, the first pixel electrode 102 and the second pixel electrode 103 included in one pixel 10. For example, the first pixel electrode 102 and the second pixel electrode 103 in a certain pixel 10 can be interpreted as the first pixel electrode 102 and the second pixel electrode 103 in a certain set.

[0080] As shown in FIG. 4, a common auxiliary electrode 104 is disposed around the first pixel electrode 102a and the second pixel electrode 103a provided in one pixel electrode region 20. The auxiliary electrode 104 is included in common between the first imaging cell 100a and the second imaging cell 100b. The auxiliary electrode 104 is located between the first pixel electrode 102a and the second pixel electrode 103a. In a plan view, for example, only one auxiliary electrode 104 is disposed between the first pixel electrode 102a and the second pixel electrode 103a. In addition, for example, in a plan view, the first pixel electrode 102a and the second pixel electrode 103a are each surrounded by one common auxiliary electrode 104.

[0081] A common auxiliary electrode 104 is also disposed for adjacent pixel electrode regions 20. The auxiliary electrode 104 is included in common to adjacent pixels 10. The auxiliary electrode 104 may be formed in common to all pixels 10, or may be formed for each pixel block consisting of several pixels 10. For example, only one auxiliary electrode 104 is included in common to adjacent pixels 10. In a plan view, the auxiliary electrode 104 is located between the first pixel electrode 102a and the first pixel electrode 102b provided in each adjacent pixel 10. In a plan view, the auxiliary electrode 104 is located between the second pixel electrode 103a and the second pixel electrode 103b provided in each adjacent pixel 10. In a plan view, the auxiliary electrode 104 is located between the first pixel electrode 102b provided in one of the adjacent pixels 10 and the second pixel electrode 103a provided in the other adjacent pixel 10.

[0082] The auxiliary electrode 104 is connected to, for example, a voltage supply circuit or ground (not shown) and is maintained at a predetermined potential. The auxiliary electrode 104 is electrically isolated from the first pixel electrode 102 and the second pixel electrode 103. As described above, when holes are used as signal charges, the signal charges can be attracted to the auxiliary electrode 104 by making the potential of the auxiliary electrode 104 lower than the potential of the counter electrode 111. Therefore, the auxiliary electrode 104 disposed between adjacent pixels can suppress color mixing between adjacent pixels. The potential of the auxiliary electrode 104 is, for example, a fixed potential, but may be variable.

[0083] A first electrode plug 105 is connected to the first pixel electrode 102 for electrically connecting the first pixel electrode 102 to the charge storage node FD1. A corresponding first electrode plug 105 is connected to the first pixel electrode 102 provided in each of the plurality of pixels 10. The first electrode plug 105 is located, for example, at the center of the corresponding first pixel electrode 102 in a planar view. A second electrode plug 106 is connected to the second pixel electrode 103 for electrically connecting the second pixel electrode 103 to the charge storage node FD2. A corresponding second electrode plug 106 is connected to the second pixel electrode 103 provided in each of the plurality of pixels 10. The second electrode plug 106 is located, for example, at the center of the corresponding second pixel electrode 103 in a planar view.

[0084] In the following, in order to distinguish between the two first electrode plugs 105 connected to adjacent first pixel electrodes 102, the two first electrode plugs 105 may be referred to as first electrode plug 105a and first electrode plug 105b. Similarly, the two second electrode plugs 106 connected to adjacent second pixel electrodes 103 may be referred to as second electrode plug 106a and second electrode plug 106b.

[0085] The first pixel electrodes 102 are arranged in an array with the centers of the first pixel electrodes 102 forming a square lattice at intervals of pitch_h. In other words, the first pixel electrodes 102 included in each of the multiple pixels 10 are located on lattice points of a first square lattice in which the length of one side of the unit lattice is pitch_h in plan view.

[0086] The second pixel electrodes 103 are arranged in an array with the centers of the second pixel electrodes 103 forming a square lattice at intervals of pitch_l. That is, the second pixel electrodes 103 included in each of the multiple pixels 10 are located on lattice points of a second square lattice that is different from the first square lattice and has a side length of the unit cell at pitch pitch_l in a plan view.

[0087] 4, the pitch pitch_h is equal to the pitch pitch_l. In this case, the resolution of the first imaging cell 100a including the first pixel electrode 102 is the same as the resolution of the second imaging cell 100b including the second pixel electrode 103. Therefore, the imaging device 1 can achieve wide dynamic range imaging without degrading the resolution.

[0088] In each of the multiple pixels 10, if the distance between the first pixel electrode 102 (e.g., the first pixel electrode 102a) and the auxiliary electrode 104 is distance S_h and the distance between the second pixel electrode 103 (e.g., the second pixel electrode 103a included in the same pixel 10 as the first pixel electrode 102a) and the auxiliary electrode 104 is distance S_l, in Figure 4, distance S_h and distance S_l are equal.

[0089] The distance S_h is the average value of the gap distance between the first pixel electrode 102 and the auxiliary electrode 104 that are adjacent to each other in a planar view. The average value of the gap distance may be, for example, the average value of the shortest distance between each point on the outer edge of the first pixel electrode 102 and the auxiliary electrode 104 over the entire circumference of the outer edge of the first pixel electrode 102 in a planar view. The distance S_l is the average value of the gap distance between the second pixel electrode 103 and the auxiliary electrode 104 that are adjacent to each other in a planar view. The average value of the gap distance may be, for example, the average value of the shortest distance between each point on the outer edge of the second pixel electrode 103 and the auxiliary electrode 104 over the entire circumference of the outer edge of the second pixel electrode 103 in a planar view. 4, when the adjacent first pixel electrode 102 and auxiliary electrode 104 are spaced apart at a constant interval, the distance S_h is the distance between the first pixel electrode 102 and the auxiliary electrode 104 in a plan view in each pixel 10, that is, the shortest distance between the end of the first pixel electrode 102 and the end of the auxiliary electrode 104. Also, when the adjacent second pixel electrode 103 and the auxiliary electrode 104 are spaced apart at a constant interval, the distance S_l is the distance between the second pixel electrode 103 and the auxiliary electrode 104 in a plan view in each pixel 10, that is, the shortest distance between the end of the second pixel electrode 103 and the end of the auxiliary electrode 104.

[0090] Note that the distance S_h may be different from the distance S_l in each of the multiple pixels 10. As a result, as will be described in detail later, the sensitivity of the first imaging cell 100a and the second imaging cell 100b can be changed, and the dynamic range can be expanded by adjusting the distance relationship appropriately. In addition, the degree of freedom in the layout of the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 is increased, making it easier to fabricate the electrodes.

[0091] In each of the multiple pixels 10, the area of ​​the first pixel electrode 102 is larger than the area of ​​the second pixel electrode 103 in a plan view. This makes it easier for the first pixel electrode 102 to collect signal charges generated in the photoelectric conversion layer 110 than the second pixel electrode 103. Therefore, the first imaging cell 100a having the first pixel electrode 102 tends to have higher sensitivity than the second imaging cell 100b having the second pixel electrode 103.

[0092] Next, the cross-sectional structure of the pixel 10 will be described. FIG. 5 is a schematic cross-sectional view of the pixel 10 taken along line VV in FIG. 4. The imaging device 1 includes a semiconductor substrate 2, an insulating layer 3 located on the semiconductor substrate 2, and a pixel array 30 having a plurality of pixels 10 formed on the semiconductor substrate 2. FIG. 5 mainly shows a cross section of one pixel 10 included in the imaging device 1. As shown in FIG. 5, in the imaging device 1, the pixel 10 includes a first pixel electrode 102, a second pixel electrode 103, an auxiliary electrode 104, a counter electrode 111 that faces the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104, a photoelectric conversion layer 110 sandwiched between the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 and the counter electrode 111, a first detection circuit 200 located on the semiconductor substrate 2 that detects the potential of the first pixel electrode 102, and a second detection circuit 210 that detects the potential of the second pixel electrode 103. The pixel 10 also includes a first electrode plug 105 and a second electrode plug 106. The pixel 10 also includes a buffer layer 4, a sealing layer 5, a color filter 112, a planarization layer 6, a first microlens 113, and a second microlens 114.

[0093] The first detection circuit 200 and the second detection circuit 210 are configured to straddle the interface between the semiconductor substrate 2 and the insulating layer 3. A first pixel electrode 102, a second pixel electrode 103, and an auxiliary electrode 104 are formed on the main surface of the insulating layer 3 on the positive side along the Z axis, i.e., the upper surface. In this specification, the positive direction along the Z axis is defined as upward. The first pixel electrode 102 is connected to the corresponding first detection circuit 200 via a first electrode plug 105. The second pixel electrode 103 is connected to the corresponding second detection circuit 210 via a second electrode plug 106.

[0094] The first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 are electrodes for collecting signal charges generated in the photoelectric conversion layer 110. The first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 face the counter electrode 111 via the photoelectric conversion layer 110. The auxiliary electrode 104 collects signal charges generated in the photoelectric conversion layer 110 located, in plan view, between the first pixel electrode 102 and the second pixel electrode 103 adjacent to each other via the auxiliary electrode 104, between two first pixel electrodes 102 adjacent to each other via the auxiliary electrode 104, or between two second pixel electrodes 103 adjacent to each other via the auxiliary electrode 104.

[0095] The first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 are each made of a metal material such as titanium nitride (TiN). The first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 may each be made of copper (Cu), tungsten (W), titanium (Ti), tantalum (Ta), aluminum (Al), or a compound thereof. The first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 each have a uniform thickness, and the top surfaces of the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 are each flattened. A constituent layer 3e of the insulating layer 3 is disposed in the gap between adjacent first pixel electrodes 102 and auxiliary electrodes 104 and in the gap between adjacent second pixel electrodes 103 and auxiliary electrodes 104.

[0096] The first detection circuit 200 is provided corresponding to each of the multiple first pixel electrodes 102. The second detection circuit 210 is provided corresponding to each of the multiple second pixel electrodes 103. The first detection circuit 200 detects signal charges collected by the corresponding first pixel electrode 102 and outputs a signal voltage corresponding to the charges. The second detection circuit 210 detects signal charges collected by the corresponding second pixel electrode 103 and outputs a signal voltage corresponding to the charges. The first detection circuit 200 and the second detection circuit 210 are configured, for example, by a MOS circuit or a TFT (Thin Film Transistor) circuit. The first detection circuit 200 includes, for example, a first amplification transistor 205 whose gate is connected to the first pixel electrode 102, and the first amplification transistor 205 outputs a signal voltage corresponding to the amount of signal charge. The second detection circuit 210 includes, for example, a second amplification transistor 215 whose gate is connected to the second pixel electrode 103, and the second amplification transistor 215 outputs a signal voltage corresponding to the amount of signal charge.

[0097] The first electrode plug 105 electrically connects the first pixel electrode 102 of each pixel 10 to the corresponding first detection circuit 200. The first electrode plug 105 is connected to the side of the first pixel electrode 102 opposite to the photoelectric conversion layer 110 side. The second electrode plug 106 electrically connects the second pixel electrode 103 of each pixel 10 to the corresponding second detection circuit 210. The second electrode plug 106 is connected to the side of the second pixel electrode 103 opposite to the photoelectric conversion layer 110 side. The first electrode plug 105 and the second electrode plug 106 are formed by embedding a conductive material such as copper (Cu) or tungsten (W) in the insulating layer 3.

[0098] The semiconductor substrate 2 is made of, for example, silicon (Si).

[0099] The insulating layer 3 is formed on the semiconductor substrate 2 and includes multiple constituent layers 3a, 3b, 3c, 3d, and 3e. Hereinafter, the multiple constituent layers 3a, 3b, 3c, 3d, and 3e may be referred to as multiple constituent layers 3a to 3e. The multiple constituent layers 3a to 3e are made of an insulating material such as silicon dioxide (SiO2). Wiring layers such as wiring and contact plugs are disposed in each of the multiple constituent layers 3a to 3e. The number of constituent layers included in the insulating layer 3 can be set arbitrarily and is not limited to the example of the five constituent layers 3a to 3e shown in FIG. 5. Furthermore, insulating films made of an insulating material different from that of the multiple constituent layers 3a to 3e may be disposed between the multiple constituent layers 3a to 3e.

[0100] A photoelectric conversion layer 110 is laminated on the upper surface of the component layer 3e in which the first pixel electrode 102, the second pixel electrode 103, and the auxiliary electrode 104 are embedded. A counter electrode 111, a buffer layer 4, and a sealing layer 5 are laminated on the upper surface of the photoelectric conversion layer 110 in this order.

[0101] The photoelectric conversion layer 110 is a layer made of a photoelectric conversion material that generates signal charges according to the intensity of received light. In other words, the photoelectric conversion layer 110 converts light into signal charges. The photoelectric conversion layer 110 is sandwiched between the first pixel electrode 102, the second pixel electrode 103, the auxiliary electrode 104, and the counter electrode 111. The photoelectric conversion material is, for example, an organic semiconductor material and includes at least one of a p-type organic semiconductor and an n-type organic semiconductor. The photoelectric conversion layer 110 is, for example, commonly formed in the pixel array 30, and has a uniform film thickness.

[0102] The counter electrode 111 is an electrode that faces the first pixel electrode 102 , the second pixel electrode 103 , and the auxiliary electrode 104 .

[0103] In this embodiment, the counter electrode 111 is disposed on the light-incident side of the imaging device 1. The counter electrode 111 may be light-transmitting so as to allow light to enter the photoelectric conversion layer 110. The counter electrode 111 may be made of a transparent conductive oxide material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), for example.

[0104] Color filters 112 having transmission wavelength ranges corresponding to the respective pixels 10 are stacked on the upper surface of the sealing layer 5. For example, the color filters 112 are provided for each pixel 10 in correspondence with the respective pixels 10. For example, the color filters 112 having transmission wavelength ranges corresponding to the respective pixels 10 are shared by the first imaging cell 100a and the second imaging cell 100b included in each pixel 10.

[0105] Furthermore, a planarization layer 6 is laminated on the upper surface of the color filter 112. A first microlens 113 and a second microlens 114 corresponding to the first pixel electrode 102 and the second pixel electrode 103, respectively, are arranged on the upper surface of the planarization layer 6.

[0106] The first microlenses 113 face the photoelectric conversion layer 110 via the counter electrode 111, and are arranged at positions overlapping the corresponding first pixel electrodes 102 in a planar view. For example, in a planar view, the centers of the first microlenses 113 overlap the centers of the corresponding first pixel electrodes 102. The first microlenses 113 focus incident light in a region overlapping the corresponding first pixel electrodes 102 in a planar view.

[0107] The second microlenses 114 face the photoelectric conversion layer 110 via the counter electrode 111, and are disposed at positions overlapping the corresponding second pixel electrodes 103 in a planar view. For example, the centers of the second microlenses 114 overlap the centers of the corresponding second pixel electrodes 103 in a planar view. The second microlenses 114 focus incident light in a region overlapping the corresponding second pixel electrodes 103 in a planar view. The second microlenses 114 focus incident light in a region overlapping the corresponding second pixel electrodes 103 in a planar view.

[0108] The light-collecting area of ​​the first microlens 113 is larger than the light-collecting area of ​​the second microlens 114. This makes it easier for the first imaging cell 100a having the first pixel electrode 102 to have higher sensitivity than the second imaging cell 100b having the second pixel electrode 103, thereby increasing the sensitivity ratio of the first imaging cell 100a to the second imaging cell 100b.

[0109] The imaging device 1 described above can be manufactured using a general semiconductor manufacturing process. In particular, when a silicon substrate is used as the semiconductor substrate 2, it can be manufactured using various silicon semiconductor processes.

[0110] Next, the effect of suppressing color mixing by the auxiliary electrode 104 will be described. Fig. 6A is a schematic cross-sectional view of the pixel 10 taken along line VIa-VIa in Fig. 4. Fig. 6A shows a cross section spanning two adjacent pixels 10. Fig. 6A shows only the first pixel electrodes 102a and 102b, the auxiliary electrode 104, the first electrode plugs 105a and 105b, the photoelectric conversion layer 110, the counter electrode 111, and the component layer 3e, simplifying the illustration.

[0111] As shown in FIG. 6A , an auxiliary electrode 104 is disposed between the first pixel electrode 102a and the first pixel electrode 102b of each of adjacent pixels 10. When a voltage is applied to the counter electrode 111, a first electrode charge capture region 140a, a first electrode charge capture region 140b, and an auxiliary electrode charge capture region 142 are generated in the photoelectric conversion layer 110. The first electrode charge capture region 140a is located on the first pixel electrode 102a and is a region where the first pixel electrode 102a captures signal charges generated in the photoelectric conversion layer 110 in response to the intensity of received light. The first electrode charge capture region 140b is located on the first pixel electrode 102b and is a region where the first pixel electrode 102b captures signal charges. The auxiliary electrode charge capture region 142 is located on the auxiliary electrode 104 and is a region where the auxiliary electrode 104 collects signal charges. Since auxiliary electrode charge trapping region 142 is generated between first electrode charge trapping region 140a and first electrode charge trapping region 140b, the regions that capture signal charges in first pixel electrode 102a and first pixel electrode 102b are spaced apart, thereby suppressing color mixing between adjacent pixels. Furthermore, in pixel electrodes other than first pixel electrode 102a and first pixel electrode 102b that are adjacent to each other across auxiliary electrode 104, color mixing between adjacent pixels is suppressed by a similar effect.

[0112] 6B is a schematic cross-sectional view of the pixel 10 of FIG. 6A when the pixel does not include the auxiliary electrode 104. As shown in FIG. 6B, because the auxiliary electrode 104 is not provided, the auxiliary electrode charge trapping region 142 is not generated. Therefore, the first electrode charge trapping region 140a and the first electrode charge trapping region 140b overlap, creating an adjacent electrode charge trapping region 143. Signal charges generated in the adjacent electrode charge trapping region 143 may be captured in both the first electrode charge trapping region 140a and the first electrode charge trapping region 140b, causing color mixing between adjacent pixels.

[0113] As described above, the imaging device 1 according to this embodiment includes the auxiliary electrode 104 shared by the first imaging cell 100a and the second imaging cell 100b, thereby efficiently collecting signal charges and achieving a wide dynamic range while suppressing color mixing between adjacent pixels. Furthermore, since the pitch pitch_h is equal to the pitch pitch_l, there is no degradation in resolution due to the high-sensitivity image signal and the low-sensitivity image signal in the wide dynamic range image output from the imaging device 1.

[0114] [Variation 1] Next, an imaging device according to Modification 1 of Embodiment 1 will be described. This modification differs from Embodiment 1 in that the pixel does not include the second microlens 114. The following description will focus on the differences from Embodiment 1, and the description of the commonalities will be omitted or simplified.

[0115] 7 is a schematic cross-sectional view of a pixel 10b according to this modification. As shown in FIG. 7, the pixel 10b has a configuration in which the second microlens 114 located above the second pixel electrode 103 is omitted from the pixel 10 shown in FIG. 5. This configuration reduces the light collection efficiency of the photoelectric conversion layer 110 in the region overlapping with the second pixel electrode 103 in a plan view, thereby reducing the sensitivity of the second imaging cell 100b including the second pixel electrode 103. As a result, the sensitivity ratio of the first imaging cell 100a to the second imaging cell 100b increases, and the imaging device according to this modification can expand the dynamic range.

[0116] (Embodiment 2) Next, an imaging device according to embodiment 2 will be described. This embodiment differs from embodiment 1 in that the distance S_h is different from the distance S_l, specifically, the distance S_h is longer than the distance S_l. The following description will focus on the differences from embodiment 1, and the description of the commonalities will be omitted or simplified.

[0117] 8 is a plan view showing an exemplary electrode layout of a pixel 11 according to the present embodiment. As shown in FIG. 8, a pixel electrode region 21 corresponding to the pixel 11 differs from the pixel electrode region 20 shown in FIG. 4 in that the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is different from the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104, specifically, the distance S_h is longer than the distance S_l. In other words, in each of the multiple pixels 11, the distance S_h is longer than the distance S_l. As will be described in detail later, the dynamic range can be expanded by adjusting the distance S_h and the distance S_l to have an appropriate distance relationship in this manner.

[0118] 9 is a schematic cross-sectional view of pixel 11 taken along line IX-IX in FIG. 8. With this configuration, pixel 11 has the same distance S_h as pixel 10, resulting in the same coupling capacitance between the first pixel electrode 102 and the auxiliary electrode 104. However, since distance S_l is shorter, the coupling capacitance between the second pixel electrode 103 and the auxiliary electrode 104 is larger. As a result, in pixel 11, the sensitivity ratio of the first imaging cell 100a including the first pixel electrode 102 to the second imaging cell 100b including the second pixel electrode 103 is even greater than in the configuration of pixel 10. Therefore, the imaging device according to this embodiment can achieve a wider dynamic range while suppressing color mixing between adjacent pixels.

[0119] FIG. 10 is a schematic cross-sectional view illustrating the charge trapping region of a pixel electrode. Part (a) of FIG. 10 is an enlarged view of a portion of FIG. 5, specifically, a portion from the constituent layer 3e of pixel 10 to the counter electrode 111. Part (b) of FIG. 10 is an enlarged view of a portion of FIG. 9, specifically, a portion from the constituent layer 3e of pixel 11 to the counter electrode 111. Part (c) of FIG. 10 is a view illustrating a case where the difference between the distance S_h and the distance S_l is larger than in part (b) of FIG. 10. Parts (a), (b), and (c) of FIG. 10 are simplified and only include the first pixel electrode 102, the auxiliary electrode 104, the first electrode plug 105, the second electrode plug 106, the photoelectric conversion layer 110, the counter electrode 111, and the constituent layer 3e.

[0120] When a voltage is applied to the counter electrode 111, a first electrode charge trapping region 140, a second electrode charge trapping region 141, and an auxiliary electrode charge trapping region 142 are generated in the photoelectric conversion layer 110. The second electrode charge trapping region 141 is located on the second pixel electrode 103, and is a region where the second pixel electrode 103 collects signal charges generated in the photoelectric conversion layer 110 according to the intensity of received light. The first electrode charge trapping region 140 and the auxiliary electrode charge trapping region 142 are as described in the description of FIG. 6A.

[0121] The configuration of FIG. 10 (b) has a shorter distance S_l than the configuration of FIG. 10 (a), resulting in a smaller second electrode charge trapping region 141 on the second pixel electrode 103. As a result, the configuration of FIG. 10 (b) has a lower sensitivity of the second imaging cell 100b including the second pixel electrode 103 than the configuration of FIG. 10 (a), thereby achieving a wider dynamic range. Furthermore, the configuration of FIG. 10 (c) has a longer distance S_h than the configuration of FIG. 10 (b), resulting in a larger first electrode charge trapping region 140 on the first pixel electrode 102. As a result, the configuration of FIG. 10 (c) has a higher sensitivity of the first imaging cell 100a including the first pixel electrode 102 than the configuration of FIG. 10 (b), resulting in a wider dynamic range. In other words, the longer the distance S_h is relative to the distance S_l, the wider the dynamic range.

[0122] As described above, in the imaging device according to this embodiment, the ratio of the capacitance of the first pixel electrode 102 to the capacitance of the second pixel electrode 103 is smaller than when the distances S_h and S_l are the same, and the electrical sensitivity of the first imaging cell 100a is higher. Furthermore, the ratio of the size of the first electrode charge trapping region 140 to the size of the second electrode charge trapping region 141 is larger than when the distances S_h and S_l are the same, and the optical sensitivity of the first imaging cell 100a is higher. As a result, the imaging device according to this embodiment can achieve a wide dynamic range while suppressing color mixing between adjacent pixels.

[0123] [Variation 1] Next, an imaging device according to a modification of embodiment 2 will be described. In this modification, the area of ​​the first pixel electrode 102 is smaller than that of embodiment 2. The following description will focus on the differences from embodiments 1 and 2 and the modifications, and will omit or simplify the description of commonalities.

[0124] 11 is a plan view showing an exemplary electrode layout of a pixel 11a according to this modification. As shown in FIG. 11, in a pixel electrode region 21a corresponding to the pixel 11a, the area of ​​the first pixel electrode 102 is smaller than that of the pixel electrode region 21 shown in FIG. 8, and the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is further increased. Therefore, in the pixel 11a, the coupling capacitance between the first pixel electrode 102 and the auxiliary electrode 104 is further reduced compared to that of the pixel 11, and the electrical sensitivity of the first imaging cell 100a is increased. Therefore, the imaging device according to this modification can increase the sensitivity ratio of the first imaging cell 100a to the second imaging cell 100b, thereby achieving a wide dynamic range. However, due to the effect of the smaller area of ​​the first pixel electrode 102, the area in which the first pixel electrode 102 can collect the signal charge generated in the photoelectric conversion layer 110 becomes smaller, but by increasing the light-collection efficiency of the first microlens 113, it is possible to suppress a decrease in the optical sensitivity of the first imaging cell 100a.

[0125] (Embodiment 3) Next, an imaging device according to embodiment 3 will be described. This embodiment differs from embodiment 2 in that the imaging device includes an auxiliary electrode plug connected to auxiliary electrode 104. The following description will focus on the differences from embodiments 1 and 2 and their respective modifications, and will omit or simplify the description of commonalities.

[0126] FIG. 12 is a plan view showing an exemplary electrode layout of a pixel 12 according to the present embodiment. As shown in FIG. 12, a pixel electrode region 22 corresponds to the pixel 12. The pixel 12 has a configuration in which, compared to the pixel 11 shown in FIG. 8, an auxiliary electrode plug 107 is further provided. In this embodiment, the auxiliary electrode plug 107 connected to the auxiliary electrode 104 is disposed between the adjacent first pixel electrodes 102a and 102b. That is, the auxiliary electrode plug 107 is located between the adjacent first pixel electrodes 102a and 102b via the auxiliary electrode 104 in a plan view. The auxiliary electrode plug 107 is provided in common to, for example, the adjacent pixels 12. In this embodiment, the first pixel electrode 102a is an example of a first electrode of a first set, and the first pixel electrode 102b is an example of a first electrode of a second set. The auxiliary electrode plug 107 is also an example of a first auxiliary electrode plug.

[0127] For example, in a plan view, the auxiliary electrode plug 107 is located on a line connecting the first electrode plug 105a connected to the first pixel electrode 102a and the first electrode plug 105b connected to the first pixel electrode 102b. Note that the auxiliary electrode plug 107 does not necessarily have to be located on the line connecting the first electrode plug 105a and the first electrode plug 105b in a plan view.

[0128] In addition, in the example shown in FIG. 12, the number of auxiliary electrode plugs 107 located between the first pixel electrodes 102a and 102b is one, but multiple auxiliary electrode plugs 107 may be arranged between the first pixel electrodes 102a and 102b.

[0129] 13 is a schematic cross-sectional view of pixel 12 taken along line XIII-XIII in FIG. 12. As shown in FIG. 13, auxiliary electrode plug 107 is connected to the auxiliary electrode 104 on the side opposite to the photoelectric conversion layer 110. Furthermore, auxiliary electrode plug 107 is arranged so that the distance between auxiliary electrode plug 107 and first electrode plug 105a and the distance between auxiliary electrode plug 107 and first electrode plug 105b are shorter than the distance between first electrode plug 105a and first electrode plug 105b. By arranging auxiliary electrode plug 107 between first electrode plug 105a and first electrode plug 105b in this manner, the coupling capacitance between first electrode plug 105a and first electrode plug 105b can be significantly reduced, thereby reducing electrical color mixing between adjacent pixels.

[0130] [Variation 1] Next, an imaging device according to Modification 1 of Embodiment 3 will be described. In this modification, the arrangement of auxiliary electrode plugs differs from that of Embodiment 3. The following description will focus on the differences from Embodiments 1 to 3 and their modifications, and will omit or simplify the description of commonalities.

[0131] FIG. 14 is a plan view showing an exemplary electrode layout of a pixel 12a according to this modification. As shown in FIG. 14, a pixel electrode region 22a corresponds to the pixel 12a. The pixel 12a has a configuration including an auxiliary electrode plug 108 instead of the auxiliary electrode plug 107 in the pixel 12 shown in FIG. 12. In this modification, the auxiliary electrode plug 108 connected to the auxiliary electrode 104 is disposed between the adjacent second pixel electrodes 103a and 103b. That is, the auxiliary electrode plug 108 is located between the adjacent second pixel electrodes 103a and 103b via the auxiliary electrode 104 in a plan view. In this modification, the second pixel electrode 103a is an example of a third set of second electrodes, and the second pixel electrode 103b is an example of a fourth set of second electrodes. The auxiliary electrode plug 108 is also an example of a second auxiliary electrode plug. The auxiliary electrode plug 108 is connected to the auxiliary electrode 104 on the side opposite to the photoelectric conversion layer 110 side, which is not shown in FIG.

[0132] For example, in a plan view, the auxiliary electrode plug 108 is located on the line connecting the second electrode plug 106a connected to the second pixel electrode 103a and the second electrode plug 106b connected to the second pixel electrode 103b. Note that the auxiliary electrode plug 108 does not have to be located on the line connecting the second electrode plug 106a and the second electrode plug 106b in a plan view. Furthermore, in the example shown in FIG. 14, the auxiliary electrode plug 108 is not located on the line connecting the first electrode plug 105a and the first electrode plug 105b.

[0133] In addition, in the example shown in FIG. 14, the number of auxiliary electrode plugs 108 located between the second pixel electrode 103a and the second pixel electrode 103b is two, but the number of auxiliary electrode plugs 108 located between the second pixel electrode 103a and the second pixel electrode 103b may be one, or three or more.

[0134] By disposing the auxiliary electrode plug 108 between the second pixel electrode 103a and the second pixel electrode 103b, coupling capacitance occurs between the second electrode plug 106a and the auxiliary electrode plug 108, and between the second electrode plug 106b and the auxiliary electrode plug 108. This reduces the electrical sensitivity of the second imaging cell 100b, including the second pixel electrode 103. This increases the sensitivity ratio of the first imaging cell 100a to the second imaging cell 100b, and the auxiliary electrode 104 can suppress color mixing between adjacent pixels while expanding the dynamic range.

[0135] Furthermore, by disposing the auxiliary electrode plug 108 between the second electrode plug 106a and the second electrode plug 106b, the coupling capacitance between the second electrode plug 106a and the second electrode plug 106b can be significantly reduced, thereby reducing electrical color mixing between adjacent pixels.

[0136] [Variation 2] Next, an imaging device according to Variation 2 of Embodiment 3 will be described. In this variation, the arrangement of auxiliary electrode plugs differs from that of Embodiment 3 and Variation 1 of Embodiment 3. The following description will focus on the differences with Embodiments 1 to 3 and their variations, and will omit or simplify the description of commonalities.

[0137] 15 is a plan view showing an exemplary electrode layout of pixel 12b according to this modification. As shown in FIG. 15, pixel electrode region 22b is a region corresponding to pixel 12b. Pixel 12b has a configuration including an auxiliary electrode plug 109 instead of the auxiliary electrode plug 107 in pixel 12 shown in FIG. 12. In this modification, the auxiliary electrode plug 109 connected to the auxiliary electrode 104 is disposed between the adjacent first pixel electrode 102 and second pixel electrode 103. In this modification, the auxiliary electrode plug 109 is an example of a third auxiliary electrode plug.

[0138] The auxiliary electrode plug 109 is arranged such that, in a plan view, the distance between the auxiliary electrode plug 109 and the second pixel electrode 103 closest to the auxiliary electrode plug 109 among the second pixel electrodes 103 included in each of the multiple pixels 12b is shorter than the distance between the auxiliary electrode plug 109 and the first pixel electrode 102 closest to the auxiliary electrode plug 109 among the first pixel electrodes 102 included in each of the multiple pixels 12b. The auxiliary electrode plug 109 is located, for example, between the first pixel electrode 102 and the second pixel electrode 103 included in the same pixel 12b in a plan view. In this modification, the auxiliary electrode plug 109 is an example of a third auxiliary electrode plug. Note that the auxiliary electrode plug 109 only needs to be located between the first pixel electrode 102 and the second pixel electrode 103 adjacent to each other, and does not necessarily have to be located between the first pixel electrode 102 and the second pixel electrode 103 included in the same pixel 12b.

[0139] The auxiliary electrode plug 109 is located, for example, on a line connecting the first electrode plug 105 and the second electrode plug 106 that are adjacent to each other in a plan view. Note that the auxiliary electrode plug 109 does not have to be located on a line connecting the first electrode plug 105 and the second electrode plug 106 that are adjacent to each other in a plan view. The auxiliary electrode plug 109 is located, for example, between the first electrode plug 105 and the second electrode plug 106 that are included in the same pixel 12b. Furthermore, the auxiliary electrode plug 109 is located, for example, on a line connecting the first electrode plug 105 included in one of the adjacent pixels 12b and the second electrode plug 106 included in the other pixel 12b.

[0140] 15, there is one auxiliary electrode plug 109 located between the adjacent first pixel electrode 102 and second pixel electrode 103, but a plurality of auxiliary electrode plugs 109 may be arranged between the adjacent first pixel electrode 102 and second pixel electrode 103. A plurality of auxiliary electrode plugs 109 may be arranged around one second pixel electrode 103. One auxiliary electrode plug 109 may be arranged around one second pixel electrode 103.

[0141] 16 is a schematic cross-sectional view of pixel 12b taken along line XVI-XVI in FIG. 15. As shown in FIG. 16, the auxiliary electrode plug 109 is connected to the auxiliary electrode 104 on the side opposite to the photoelectric conversion layer 110. Furthermore, the distance from the first electrode plug 105, which is closest to the auxiliary electrode plug 109, to the auxiliary electrode plug 109 is longer than the distance from the second electrode plug 106, which is closest to the auxiliary electrode plug 109, to the auxiliary electrode plug 109. Therefore, the coupling capacitance between the first electrode plug 105 and the auxiliary electrode plug 109 is smaller than the coupling capacitance between the second electrode plug 106 and the auxiliary electrode plug 109. This increases the ratio of the electrical sensitivity of the first imaging cell 100a, including the first pixel electrode 102, to the electrical sensitivity of the second imaging cell 100b, including the second pixel electrode 103, compared to when the auxiliary electrode plug 109 is not provided, thereby further expanding the dynamic range.

[0142] (Fourth embodiment) Next, an imaging device according to Embodiment 4 will be described. In Embodiments 1 to 3, the area of ​​the first pixel electrode 102 is made larger than the area of ​​the second pixel electrode 103 in order to make the sensitivity ratio of the first imaging cell 100a or 100a1 to the second imaging cell 100b greater than 1. In this embodiment, a capacitive element is connected to the charge storage node of the second imaging cell in order to further increase the sensitivity ratio of the first imaging cell to the second imaging cell. The following description will focus on differences from Embodiments 1 to 3 and their modifications, and will omit or simplify descriptions of commonalities.

[0143] FIG. 17 is a diagram illustrating an example of a circuit configuration of a pixel 13 according to this embodiment. As illustrated in FIG. 17, the pixel 13 includes a first imaging cell 100a and a second imaging cell 100b1. The second imaging cell 100b1 is different from the second imaging cell 100b shown in FIG. 2 in that it further includes a third capacitance element 213 connected to the charge storage node FD2. In this embodiment, the second charge storage unit includes the third capacitance element 213 connected between the charge storage node FD2 and a reference voltage VR. Furthermore, in this embodiment, the capacitance of the second charge storage unit including the charge storage node FD2 is larger than the capacitance of the first charge storage unit including the charge storage node FD1.

[0144] As in the case of the second imaging cell 100b1, by adding not only the parasitic capacitance but also the capacitance of the third capacitive element 213, the sensitivity of the second imaging cell 100b1 can be reduced, and the imaging device according to this embodiment can achieve a wider dynamic range.

[0145] 18 is a plan view showing an exemplary electrode layout of pixel 13 according to the present embodiment. A pixel electrode region 23 is a region corresponding to pixel 13. In the electrode layout of pixel 13 shown in FIG. 18, similar to the electrode layout of pixel 11 shown in FIG. 8, the area of ​​the first pixel electrode 102 is larger than the area of ​​the second pixel electrode 103, and the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is longer than the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104. The electrode layout of pixel 13 shown in FIG. 18 is the same as the electrode layout of pixel 11 according to embodiment 2 described in FIG. 8, and therefore a detailed description thereof will be omitted.

[0146] Fig. 19 is a schematic cross-sectional view of pixel 13 taken along line XIX-XIX in Fig. 18. As shown in Fig. 19, in pixel 13, as the third capacitive element 213 in the circuit configuration of Fig. 17, a MOM capacitor 213a using a wiring layer or the like is connected to a charge storage node FD2 connected to the second pixel electrode 103. This reduces the sensitivity of the second imaging cell 100b1.

[0147] Fig. 20 is a schematic cross-sectional view of a pixel 13a, which is another example of a pixel according to the present embodiment. As shown in Fig. 20, in the pixel 13a, an MIM capacitor 213b is connected to a charge storage node FD2 connected to the second pixel electrode 103, instead of the MOM capacitor 213a in the pixel 13 shown in Fig. 19. This allows the sensitivity of the second imaging cell 100b1 to be reduced.

[0148] Fig. 21 is a schematic cross-sectional view of a pixel 13b, which is yet another example of a pixel according to the present embodiment. As shown in Fig. 21, in the pixel 13b, a MOS capacitor 213c is connected to a charge storage node FD2 connected to a second pixel electrode 103, instead of the MOM capacitor 213a in the pixel 13 shown in Fig. 19. This allows the sensitivity of the second imaging cell 100b1 to be reduced.

[0149] Fig. 22 is a schematic cross-sectional view of a pixel 13c, which is yet another example of a pixel according to the present embodiment. As shown in Fig. 22, in the pixel 13c, a trench capacitor 213d such as that used in a DRAM (Dynamic Random Access Memory) is connected to the charge storage node FD2 connected to the second pixel electrode 103, instead of the MOM capacitor 213a in the pixel 13 shown in Fig. 19. This allows the sensitivity of the second imaging cell 100b1 to be reduced.

[0150] The third capacitive element may be a capacitive element other than the capacitive elements shown in Figures 19 to 22. Furthermore, the third capacitive element may be a combination of the capacitive elements shown in Figures 19 to 22.

[0151] Furthermore, the present embodiment may be combined with the pixel configurations according to the first to third embodiments and the modifications thereof.

[0152] Fig. 23 is a schematic cross-sectional view of pixel 13d, which is yet another example of a pixel according to this embodiment. As shown in Fig. 23, in pixel 13d, a MIM capacitor 213b and a MOS capacitor 213c are connected to the charge storage node FD2, to which the second pixel electrode 103 is connected, instead of the MOM capacitor 213a in pixel 13 shown in Fig. 19. This increases the capacitance of the charge storage node FD2 of the second imaging cell 100b1, further expanding the dynamic range. The example in Fig. 23 corresponds to the combination of pixel 11, pixel 13a, and pixel 13b described above.

[0153] FIG. 24 is a schematic cross-sectional view of pixel 13e, another example of a pixel according to the present embodiment. As shown in FIG. 24, pixel 13e differs from pixel 13a shown in FIG. 20 in that the second microlens 114 located above the second pixel electrode 103 is omitted. This configuration increases the capacitance of the charge storage node FD2 of the second imaging cell 100b1 and reduces the light collection efficiency of the photoelectric conversion layer 110 in the region overlapping with the second pixel electrode 103 in plan view. This further reduces the sensitivity of the second imaging cell 100b1, thereby further expanding the dynamic range. The example in FIG. 24 corresponds to the combination of pixel 10b, pixel 11, and pixel 13a described above.

[0154] As described above, by adopting the configuration of this embodiment, in addition to the above-mentioned facts that the area of ​​the first pixel electrode 102 is larger than the area of ​​the second pixel electrode 103 and that the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is longer than the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104, the capacitance of the second imaging cell 100b1 is increased by the third capacitive element 213. Therefore, the imaging device according to this embodiment can further expand the dynamic range while suppressing color mixing between adjacent pixels by the auxiliary electrode 104.

[0155] In the present embodiment, the configuration has been described in which the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is longer than the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104, but this is not limiting. As in the first embodiment, the distance S_h may be the same as the distance S_l.

[0156] (Embodiment 5) Next, an imaging device according to embodiment 5 will be described. In the above-described embodiments 1 to 4, the area of ​​the first pixel electrode 102 is made larger than the area of ​​the second pixel electrode 103 in a plan view in order to make the sensitivity ratio of the first imaging cell to the second imaging cell larger than 1. In order to make the sensitivity ratio of the first imaging cell to the second imaging cell larger than 1, the area of ​​the first pixel electrode 102 does not necessarily have to be made larger than the area of ​​the second pixel electrode 103. This embodiment differs from embodiment 4 in that the area of ​​the first pixel electrode 102 is equal to the area of ​​the second pixel electrode 103. The following description will focus on the differences from embodiments 1 to 4 and their modifications, and will omit or simplify the description of commonalities.

[0157] FIG. 25 is a plan view showing an exemplary electrode layout of a pixel 14 according to this embodiment. As shown in FIG. 25, in each of the multiple pixels 14, in the pixel electrode region 24 corresponding to the pixel 14, the area of ​​the first pixel electrode 102 is equal to the area of ​​the second pixel electrode 103 in a plan view. The pixel 14 has a circuit configuration similar to that of the pixel 13 shown in FIG. 17 and includes a second imaging cell 100b1 including a third capacitance element 213. Therefore, although the areas of the first pixel electrode 102 and the second pixel electrode 103 are the same, the sensitivity of the second imaging cell 100b1 can be lower than the sensitivity of the first imaging cell 100a. This eliminates the need to form pixel electrodes with different areas, facilitating the fabrication of the pixel electrodes. Furthermore, the auxiliary electrode 104 can suppress color mixing between adjacent pixels while expanding the dynamic range.

[0158] 26 is a schematic cross-sectional view of the pixel 14 taken along line XXVI-XXVI in FIG. 25. As shown in FIG. 26, in the pixel 14, the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is equal to the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104. Furthermore, in the pixel 14, a MOS capacitor 213c is connected as the third capacitance element 213 to the charge storage node FD2 to which the second pixel electrode 103 is connected. This increases the capacitance of the charge storage node FD2 of the second imaging cell 100b1 to which the second pixel electrode 103 is connected, thereby reducing the sensitivity of the second imaging cell 100b1. Therefore, the imaging device according to this embodiment can expand the dynamic range.

[0159] [Variation 1] Next, an imaging device according to Modification 1 of Embodiment 5 will be described. This modification differs from Embodiment 5 in that the distance S_h is longer than the distance S_l. The following description will focus on the differences between Embodiments 1 to 5 and the modifications, and will omit or simplify the description of commonalities.

[0160] 27 is a plan view showing an exemplary electrode layout of a pixel 14a according to this modification. As shown in Fig. 27, in a pixel electrode region 24a corresponding to the pixel 14a, the area of ​​the first pixel electrode 102 and the area of ​​the second pixel electrode 103 are the same in plan view, and the distance S_h between the first pixel electrode 102 and the auxiliary electrode 104 is longer than the distance S_l between the second pixel electrode 103 and the auxiliary electrode 104. This further increases the capacitance of the charge storage node FD2 of the second imaging cell 100b1, due to the same effect as that described in the second embodiment, and the imaging device according to this modification can further expand the dynamic range.

[0161] (Sixth embodiment) 28 is a plan view showing an exemplary electrode layout of a pixel 15 according to the sixth embodiment. As shown in FIG. 28, the sixth embodiment differs from the first embodiment shown in FIG. 4 in that the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is shorter than the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104. That is, in each of the multiple pixels 15, the distance S_h is shorter than the distance S_l. The cross-sectional configuration of the sixth embodiment may be the same as the configuration of the first embodiment shown in FIG. 5, except that the distance S_h from the first pixel electrode 102 to the auxiliary electrode 104 is shorter than the distance S_l from the second pixel electrode 103 to the auxiliary electrode 104.

[0162] According to this embodiment, by increasing the area of ​​the region where the second pixel electrode 103 collects signal charges, it is possible to adjust the incident angle characteristics of the first imaging cell 100a including the first pixel electrode 102 to reduce the difference between the incident angle characteristics of the second imaging cell 100b including the second pixel electrode 103.

[0163] (Embodiment 7) Next, a seventh embodiment will be described with reference to Fig. 29. In the seventh embodiment, a camera system including the imaging device 1 will be described.

[0164] FIG. 29 is a block diagram showing an example of the configuration of a camera system according to this embodiment.

[0165] As shown in Figure 29, a camera system 400 according to this embodiment includes the imaging device 1 according to the above-mentioned embodiment 1, an optical system 401 for collecting light such as a lens, a camera signal processing unit 402 for signal processing data captured by the imaging device 1 and outputting it as an image or data, and a system controller 403 for controlling the imaging device 1 and the camera signal processing unit 402.

[0166] The optical system 401 is a lens or the like for collecting light onto the imaging area of ​​the imaging device 1 .

[0167] The camera signal processing unit 402 functions as a signal processing circuit that processes the output signal from the imaging device 1. The camera signal processing unit 402 performs processes such as gamma correction, color interpolation, spatial interpolation, auto white balance, distance measurement calculation, and wavelength information separation. The camera signal processing unit 402 is realized by, for example, a DSP (Digital Signal Processor) or the like.

[0168] The system controller 403 controls the entire camera system 400. The system controller 403 can be realized by, for example, a processor or a microcomputer that has a built-in program.

[0169] By using the imaging device 1 according to the first embodiment, the camera system 400 according to the present embodiment can efficiently collect signal charges, and can provide a camera system equipped with a stacked imaging element that achieves a wide dynamic range while suppressing color mixing between adjacent pixels.

[0170] Note that camera system 400 may include the imaging devices according to the second to sixth embodiments and their respective modifications, instead of imaging device 1 according to the first embodiment.

[0171] (Other embodiments) While imaging devices and camera systems according to one or more aspects have been described above based on various embodiments and variations, the present disclosure is not limited to these embodiments and variations. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the embodiments and variations, as well as configurations constructed by combining components of different embodiments and variations, are also included within the scope of the present disclosure.

[0172] For example, in the above-described embodiment and each of the modified examples, the configuration of an imaging device that can efficiently collect signal charges, suppress color mixing between adjacent pixels, and achieve a wide dynamic range has been described, but each of the above-described effective configurations may be combined. [Industrial Applicability]

[0173] The imaging device and the like according to the present disclosure can be used in various camera systems and sensor systems, such as digital still cameras, medical cameras, surveillance cameras, in-vehicle cameras, digital single-lens reflex cameras, and digital mirrorless single-lens cameras. [Explanation of symbols]

[0174] 1. Imaging device 2. Semiconductor substrate 3. Insulation layer 3a, 3b, 3c, 3d, 3e composition layers 4 Buffer layer 5. Sealing layer 6 Planarization layer 10, 10a, 10b, 11, 11a, 12, 12a, 12b, 13, 13a, 13b, 13c, 13d, 13e, 14, 14a, 15 pixels 20, 21, 21a, 22, 22a, 22b, 23, 24, 24a pixel electrode areas 30 pixel array 50 Switching circuit 51a, 51b Switch elements 100a, 100a1 First imaging cell 100b, 100b1 Second imaging cell 102, 102a, 102b First pixel electrodes 103, 103a, 103b Second pixel electrodes 104 Auxiliary electrode 105, 105a, 105b First electrode plug 106, 106a, 106b Second electrode plug 107, 108, 109 Auxiliary electrode plug 110 Photoelectric conversion layer 111 Counter electrode 112 Color Filter 113 First microlens 114 Second microlens 120 First photoelectric conversion unit 130 Second photoelectric conversion unit 140, 140a, 140b 1st electrode charge trapping region 141 2nd electrode charge trapping region 142 Auxiliary electrode charge trapping region 143 Adjacent electrode charge trapping region 200, 200a First detection circuit 202 first reset transistor 203 first capacitance element 204 second capacitance element 205 First amplifying transistor 206 First selection transistor 207 Bandwidth Control Transistor 208a, 208b, SIGjA, SIGjB Vertical signal line 209a, 209c Feedback lines 209b Reset line 210 Second detection circuit 213 Third Capacitor 213a MOM capacity 213b MIM capacity 213c MOS capacity 213d trench capacity 215 Second amplifying transistor 216 Second selection transistor 217 Second reset transistor 300 Inverting Amplifier 310 Row scanning circuit 311 Control circuit 312 column circuit 313 Signal Processing Circuit 314 Output circuit 400 Camera System 401 Optical system 402 Camera signal processing unit 403 System Controller FBA, FBi feedback control line FD1, FD2 charge storage nodes RD Node RSTA, RSTB, RSTiA, RSTiB Reset control lines SELA, SELB address control lines

Claims

1. A counter electrode; a photoelectric conversion layer that converts light into signal charges; a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer, each of which collects the signal charges, the pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel; an auxiliary electrode located between the first electrode and the second electrode in each of the plurality of pairs in a plan view, facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel; Equipped with In each of the plurality of pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode; the potential of the auxiliary electrode is a potential that attracts the signal charges to the auxiliary electrode, the auxiliary electrode is a single electrode having a plurality of openings; the first electrode and the second electrode are each located within two adjacent openings among the plurality of openings in a plan view, In each of the plurality of pairs, the distance between the first electrode and the auxiliary electrode is longer than the distance between the second electrode and the auxiliary electrode. Imaging device.

2. An imaging device, A counter electrode; a photoelectric conversion layer that converts light into signal charges; a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer, each of which collects the signal charges, the pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel; an auxiliary electrode located between the first electrode and the second electrode in each of the plurality of pairs in a plan view, facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel; Equipped with In each of the plurality of pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode; the potential of the auxiliary electrode is a potential that attracts the signal charges to the auxiliary electrode, the auxiliary electrode has a first surface facing the photoelectric conversion layer and a second surface opposite to the first surface; the imaging device further includes a first auxiliary electrode plug connected to the second surface; the first electrodes of a first set of the plurality of sets and the first electrodes of a second set of the plurality of sets are adjacent to each other with the auxiliary electrode interposed therebetween; the first auxiliary electrode plug is located between the first electrodes of the first set and the first electrodes of the second set in a plan view; Imaging device.

3. An imaging device, A counter electrode; a photoelectric conversion layer that converts light into signal charges; a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer, each of which collects the signal charges, the pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel; an auxiliary electrode located between the first electrode and the second electrode in each of the plurality of pairs in a plan view, facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel; Equipped with In each of the plurality of pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode; the potential of the auxiliary electrode is a potential that attracts the signal charges to the auxiliary electrode, the auxiliary electrode has a first surface facing the photoelectric conversion layer and a second surface opposite to the first surface; the imaging device further includes a second auxiliary electrode plug connected to the second surface; the second electrodes of a third set of the plurality of sets and the second electrodes of a fourth set of the plurality of sets are adjacent to each other with the auxiliary electrode interposed therebetween; the second auxiliary electrode plug is located between the second electrodes of the third set and the second electrodes of the fourth set in a plan view; Imaging device.

4. An imaging device, A counter electrode; a photoelectric conversion layer that converts light into signal charges; a plurality of pixel electrodes facing the counter electrode via the photoelectric conversion layer, each of which collects the signal charges, the pixel electrodes having a plurality of pairs each including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel; an auxiliary electrode located between the first electrode and the second electrode in each of the plurality of pairs in a plan view, facing the counter electrode via the photoelectric conversion layer, the auxiliary electrode being included in common with the high-sensitivity pixel and the low-sensitivity pixel; Equipped with In each of the plurality of pairs, a distance between the first electrode and the auxiliary electrode is different from a distance between the second electrode and the auxiliary electrode; the potential of the auxiliary electrode is a potential that attracts the signal charges to the auxiliary electrode, the auxiliary electrode has a first surface facing the photoelectric conversion layer and a second surface opposite to the first surface; the imaging device further includes a third auxiliary electrode plug connected to the second surface; the plurality of pixel electrodes include a plurality of first electrodes and a plurality of second electrodes, each of the plurality of first electrodes being the first electrode, and each of the plurality of second electrodes being the second electrode; In a plan view, a distance between the second electrode of the plurality of second electrodes that is closest to the third auxiliary electrode plug and the third auxiliary electrode plug is shorter than a distance between the first electrode of the plurality of first electrodes that is closest to the third auxiliary electrode plug and the third auxiliary electrode plug. Imaging device.

5. the first electrodes included in each of the plurality of sets are located on lattice points of a first square lattice in a plan view, the second electrodes included in each of the plurality of sets are located on lattice points of a second square lattice different from the first square lattice in a plan view, the length of one side of the unit cell of the first square lattice is equal to the length of one side of the unit cell of the second square lattice; The imaging device according to claim 1 .

6. In each of the plurality of pairs, the distance between the first electrode and the auxiliary electrode is longer than the distance between the second electrode and the auxiliary electrode. The imaging device according to any one of claims 2 to 4 and claim 5 which cites any one of claims 2 to 4.

7. In each of the plurality of pairs, the distance between the first electrode and the auxiliary electrode is shorter than the distance between the second electrode and the auxiliary electrode. The imaging device according to any one of claims 2 to 4 and claim 5 which cites any one of claims 2 to 4.

8. In each of the plurality of pairs, an area of ​​the first electrode is larger than an area of ​​the second electrode in a plan view. The imaging device according to claim 1 .

9. In each of the plurality of pairs, an area of ​​the first electrode is equal to an area of ​​the second electrode in a plan view. The imaging device according to claim 1 .

10. a first charge accumulation section that accumulates the signal charges collected by the first electrode; a second charge accumulation section that accumulates the signal charges collected by the second electrode; Furthermore, The capacitance of the second charge storage unit is larger than the capacitance of the first charge storage unit. The imaging device according to claim 1 .

11. a first microlens facing the photoelectric conversion layer with the counter electrode interposed therebetween and overlapping with the first electrode in a plan view; The imaging device according to claim 1 .

12. a second microlens that faces the photoelectric conversion layer via the counter electrode and overlaps with the second electrode in a plan view; The light collecting area of ​​the first microlens is larger than the light collecting area of ​​the second microlens. The imaging device according to claim 11.

Images