Semiconductor device and manufacturing method thereof

Abstract

To provide a semiconductor device capable of obtaining stable characteristics and a method for manufacturing such a semiconductor device.SOLUTION: According to one embodiment, a semiconductor device includes first, second, third and fourth electrodes, a semiconductor member, first and second conductive members, and an insulating member. The semiconductor member includes first, second and third semiconductor regions. The first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region. An electrical resistivity of the second partial region is higher than an electrical resistivity of the first partial region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] For example, stable characteristics are desired in semiconductor devices such as transistors. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 9-246570 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present invention provide a semiconductor device capable of obtaining stable characteristics and a method for manufacturing the same. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a fourth electrode, a semiconductor member, a first conductive member, a second conductive member, and an insulating member. The direction from the first electrode to the second electrode is along a first direction. The semiconductor member includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The semiconductor member is provided between the first electrode and the second electrode. The first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region. The second partial region is between the first partial region and the first outer edge region in a second direction intersecting the first direction. The third partial region is between the first partial region and the second partial region in the second direction. The fourth partial region is between the third partial region and a part of the second electrode in the first direction. The first partial region, the third partial region, and the fourth partial region are of a first conductivity type. The direction from the first partial region to the third electrode is along the first direction. The direction from the second partial region to the fourth electrode is along the first direction. The second semiconductor region is of the second conductivity type. The second semiconductor region is provided between the fourth partial region and the portion of the second electrode in the first direction. The second semiconductor region is located between the third electrode and the fourth electrode in the second direction. The third semiconductor region is of the first conductivity type. The third semiconductor region is provided between the second semiconductor region and the portion of the second electrode. The third semiconductor region is electrically connected to the second electrode. The first conductive member is provided between the first partial region and the third electrode in the first direction. The first conductive member is electrically connected to the second electrode. The second conductive member includes a first conductive portion. The first conductive portion is located between the second partial region and the fourth electrode in the first direction. The second conductive member is electrically connected to the second electrode. The insulating member includes a first insulating region and a second insulating region, the first insulating region being provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode.The second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode, and the electrical resistivity of the second partial region is higher than the electrical resistivity of the first partial region. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 2] 2A and 2B are schematic plan views illustrating the semiconductor device according to the first embodiment. [Figure 3] 3A and 3B are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 10] 10(a) and 10(b) are graphs illustrating the characteristics of the semiconductor device. [Figure 11] FIG. 11 is a graph illustrating the characteristics of the semiconductor device. [Figure 12] FIG. 12 is a flowchart illustrating a method for manufacturing a semiconductor device according to the second embodiment. [Figure 13] 13A to 13C are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 2A and 2B are schematic plan views illustrating the semiconductor device according to the first embodiment. 3A and 3B are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Fig. 1 is a cross-sectional view taken along line A1-A2 in Fig. 2(a) and Fig. 2(b). Fig. 3(a) is a cross-sectional view taken along line B1-B2 in Fig. 2(a) and Fig. 2(b). Fig. 3(b) is a cross-sectional view taken along line C1-C2 in Fig. 2(a). Some components are omitted in Fig. 2(a) and Fig. 2(b).

[0009] As shown in FIG. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a fourth electrode 54, a semiconductor member 10M, a first conductive member 61, a second conductive member 62, and an insulating member 40.

[0010] The direction from the first electrode 51 to the second electrode 52 is along the first direction D1. The first direction D1 is defined as the Z-axis direction. A direction perpendicular to the Z-axis direction is defined as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction.

[0011] The semiconductor member 10M is provided between the first electrode 51 and the second electrode 52. The semiconductor member 10M includes, for example, silicon. The semiconductor member 10M may include, for example, at least one selected from the group consisting of SiC, GaN, Ga2O3, AlN, and diamond. The semiconductor member 10M includes a first semiconductor region 11, a second semiconductor region 12, and a third semiconductor region 13.

[0012] The first semiconductor region 11 includes a first outer edge region 11x, a first partial region 11a, a second partial region 11b, a third partial region 11c, and a fourth partial region 11d.

[0013] The second partial region 11b is located between the first partial region 11a and the first outer edge region 11x in the second direction D2. The second direction D2 intersects with the first direction D1. The second direction D2 is, for example, the X-axis direction.

[0014] The third partial region 11c is located between the first partial region 11a and the second partial region 11b in the second direction D2. The fourth partial region 11d is located between the third partial region 11c and a part of the second electrode 52 in the first direction D1.

[0015] The first partial region 11a, the third partial region 11c, and the fourth partial region 11d are of a first conductivity type. The first conductivity type is, for example, n-type. The first partial region 11a, the third partial region 11c, and the fourth partial region 11d are of, for example, n-type. - The second partial region 11b may be of the first conductivity type.

[0016] The direction from the first partial region 11a to the third electrode 53 is along the first direction D1. The direction from the second partial region 11b to the fourth electrode 54 is along the first direction D1.

[0017] The second semiconductor region 12 has a second conductivity type. The second conductivity type is, for example, p-type. The second semiconductor region 12 is provided between the fourth partial region 11d and the part of the second electrode 52 in the first direction D1. The second semiconductor region 12 is located between the third electrode 53 and the fourth electrode 54 in the second direction D2.

[0018] The third semiconductor region 13 has a first conductivity type (e.g., n-type). The third semiconductor region 13 is provided between the second semiconductor region 12 and the part of the second electrode 52. The third semiconductor region 13 is electrically connected to the second electrode 52. At least a part of the third semiconductor region 13 may be provided between the third electrode 53 and the fourth electrode 54 in the second direction D2.

[0019] The first conductive member 61 is provided between the first partial region 11a and the third electrode 53 in the first direction D1. The first conductive member 61 is electrically connected to the second electrode 52.

[0020] The second conductive member 62 includes a first conductive portion 62a. The first conductive portion 62a is located between the second partial region 11b and the fourth electrode 54 in the first direction D1. The second conductive member 62 is electrically connected to the second electrode 52.

[0021] For example, the first conductive member 61 and the second conductive member 62 are electrically connected to the second electrode 52 by a connection member 52L.

[0022] The insulating member 40 includes a first insulating region 41 and a second insulating region 42. The first insulating region 41 is provided between the semiconductor member 10M and the third electrode 53, between the semiconductor member 10M and the first conductive member 61, and between the first conductive member 61 and the third electrode 53.

[0023] The second insulating region 42 is provided between the semiconductor member 10M and the fourth electrode 54, between the semiconductor member 10M and the second conductive member 62, and between the second conductive member 62 and the fourth electrode 54. For example, a part of the second insulating region 42 is provided between the first conductive portion 62a and the fourth electrode 54.

[0024] For example, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The current may also be controlled by the potential of the fourth electrode 54. The first electrode 51 is, for example, a drain electrode. The second electrode 52 is, for example, a source electrode. The third electrode 53 and the fourth electrode 54 are, for example, gate electrodes. The semiconductor device 110 is, for example, a transistor.

[0025] The first conductive member 61 and the second conductive member 62 function as, for example, a field plate. By providing these conductive members, localized concentration of the electric field is suppressed, resulting in more stable operation.

[0026] As shown in Figures 1, 2(a) and 2(b), the semiconductor member 10M (or the semiconductor device 110) includes an inner region 10C and an outer region 10P. In the XY plane, the outer region 10P is provided around the inner region 10C. The inner region 10C is, for example, an active region.

[0027] 1, the first outer edge region 11x is included in the outer region 10P. The second partial region 11b is, for example, between the third partial region 11c and the first outer edge region 11x. The second partial region 11b is, for example, the closest to the first outer edge region 11x in the first semiconductor region 11. The second partial region 11b is, for example, the outermost part of the inner region 10C.

[0028] The fourth electrode 54 corresponds to, for example, the outermost gate electrode, and the third electrode 53 corresponds to an inner gate electrode.

[0029] 2(a), a plurality of first conductive members 61 may be provided. A third electrode 53 is provided corresponding to each of the plurality of first conductive members 61. As shown in FIG. 2(a), for example, a second conductive member 62 is provided around the plurality of first conductive members 61.

[0030] In the embodiment, the electrical resistivity of the second partial region 11b is higher than the electrical resistivity of the first partial region 11a.

[0031] For example, during operation of the semiconductor device 110, the temperature may rise excessively at the outermost periphery of the inner region 10C. This excessive temperature rise is thought to be due to a local current flowing at the outermost periphery of the inner region 10C during switching operations. For example, during switching operations, a current (e.g., a hole current) flows along a current path 11cp between the first outer edge region 11x and the second electrode 52. The current path 11cp includes the outermost second partial region 11b. The current causes a local rise in the temperature at the outermost periphery of the inner region 10C. This may result in, for example, thermal breakdown.

[0032] In the embodiment, the electrical resistivity of the second partial region 11b is higher than the electrical resistivity of the first partial region 11a. This suppresses the above-mentioned current. This suppresses local temperature increases. For example, thermal breakdown is suppressed. According to the embodiment, a semiconductor device capable of obtaining stable characteristics can be provided.

[0033] In the embodiment, the electrical resistivity of the first partial region 11a is lower than the electrical resistivity of the second partial region 11b. This results in a low on-resistance. For example, a large current can be obtained when the device is on. According to the embodiment, a temperature rise at the outermost periphery of the cell during switching can be suppressed while obtaining a low on-resistance. For example, a highly reliable power semiconductor can be provided.

[0034] In the embodiment, the electrical resistivity of the second partial region 11b may be higher than the electrical resistivity of the first outer edge region 11x.

[0035] In the embodiment, information about the electrical resistivity can be obtained, for example, by contacting a probe with a target region in a cross section of a semiconductor device and detecting the electrical resistance.

[0036] As shown in FIG. 1, the semiconductor member 10M may include a fourth semiconductor region 14. The fourth semiconductor region 14 is provided between the first electrode 51 and the first semiconductor region 11. The fourth semiconductor region 14 is of a first conductivity type (for example, n-type). The carrier concentration of the first conductivity type in the fourth semiconductor region 14 is higher than the carrier concentration of the first conductivity type in the first partial region 11a. The fourth semiconductor region 14 is, for example, n + By providing the fourth semiconductor region 14, a good electrical connection with the first electrode 51 can be obtained.

[0037] The fourth semiconductor region 14 includes a first semiconductor portion 14a and a second semiconductor portion 14b. The first semiconductor portion 14a is located between the first electrode 51 and the first sub-region 11a in the first direction D1. The second semiconductor portion 14b is located between the first electrode 51 and the first outer edge region 11x in the first direction D1.

[0038] In the embodiment, the electrical resistivity of the second semiconductor portion 14b may be higher than the electrical resistivity of the first semiconductor portion 14a. The first semiconductor portion 14a corresponds to the inner region 10C. The second semiconductor portion 14b corresponds to the outer region 10P. The low electrical resistivity of the first semiconductor portion 14a corresponding to the inner region 10C can result in, for example, a low on-resistance.

[0039] 1, the semiconductor device 110 may further include an electrode layer 52E. The electrode layer 52E is electrically connected to the second electrode 52. At least a portion of the second electrode 52 is located between the semiconductor member 10M and the electrode layer 52E in the first direction D1. The electrode layer 52E is, for example, a source electrode pad.

[0040] 1, for example, the electrode layer 52E overlaps with the first partial region 11a in the first direction D1. For example, the electrode layer 52E does not overlap with the second partial region 11b. As will be described later, a first element may be introduced into the semiconductor member 10M using the electrode layer 52E as a mask. This may form the first partial region 11a and the second partial region 11b having different electrical resistivities.

[0041] The second electrode 52 includes, for example, aluminum. The electrode layer 52E includes, for example, nickel. The thickness of the electrode layer 52E may be greater than the thickness of the second electrode 52. The electrode layer 52E may be formed by, for example, plating.

[0042] 1, in the outer region 10P, an insulating film 45 may be provided on the semiconductor member 10M. The insulating film 45 includes, for example, silicon oxide. An insulating film 46 may be provided on the insulating film 45. The insulating film 46 includes, for example, a resin (such as polyimide). These insulating films function, for example, as protective films.

[0043] As shown in FIG. 2(a), the first conductive member 61 extends along a third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The third direction D3 is, for example, the Y-axis direction. As shown in FIG. 2(a), the second conductive member 62 may include a second conductive portion 62b.

[0044] 3(a) and 3(b), the first semiconductor region 11 includes a second outer edge region 11y. The second outer edge region 11y corresponds to the outer region 10P. The second conductive portion 62b is located between the first conductive member 61 and the second outer edge region 11y in the third direction D3.

[0045] As shown in FIG. 1, the first conductive member 61 and the second conductive member 62 are electrically connected to the second electrode 52 by the connection member 52L.

[0046] 2(a), the multiple first conductive members 61 extend along the third direction D3. The multiple first conductive members 61 may be provided between multiple portions of the second conductive members 62. The second conductive members 62 are provided around the first conductive members 61 in a plane (e.g., the XY plane) intersecting the first direction D1. For example, the second conductive members 62 surround the multiple first conductive members 61 in a plane (e.g., the XY plane) intersecting the first direction D1.

[0047] 2, a third electrode layer 53E may be provided. The third electrode layer 53E is electrically connected to the third electrode 53 and the fourth electrode 54. The third electrode layer 53E is, for example, a gate electrode pad.

[0048] Electrical resistivity Mutual The different first and second partial regions 11a, 11b may be formed in various ways.

[0049] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 4, the semiconductor member 10M may include a first region R1. In the semiconductor device 110, at least a part of the first region R1 is included in the second partial region 11b.

[0050] The first region R1 includes a first element. The first element includes, for example, at least one selected from the group consisting of hydrogen, helium, and argon. The first partial region 11a does not substantially include the first element. By providing the first region R1 including the first element, the electrical resistivity of the second partial region 11b becomes higher than the electrical resistivity of the first partial region 11a.

[0051] In this way, the second partial region 11b contains the first element, the first partial region 11a does not contain the first element, or the concentration of the first element in the first partial region 11a is lower than the concentration of the first element in the second partial region 11b.

[0052] The concentration of the first element in the second partial region 11b may be higher than the concentration of the first element in the first outer edge region 11x.

[0053] As shown in FIG. 4, the semiconductor member 10M may include a second region R2. The second region R2 includes a first element. As already described, the semiconductor member 10M may further include a fourth semiconductor region 14. The fourth semiconductor region 14 includes a first semiconductor portion 14a and a second semiconductor portion 14b. The first semiconductor portion 14a is located between the first electrode 51 and the first sub-region 11a in the first direction D1. The second semiconductor portion 14b is located between the first electrode 51 and the first outer edge region 11x in the first direction D1. At least a portion of the second region R2 including the first element is included in the second semiconductor portion 14b.

[0054] The concentration of the first element in the second semiconductor portion 14b may be higher than the concentration of the first element in the first semiconductor portion 14a. Ku It can be maintained.

[0055] 4, the electrode layer 52E may include a third region R3. The third region R3 includes a first element. The provision of the third region R3, for example, affects the interface of the second electrode 52, for example, promoting termination at the interface. The provision of the third region R3, for example, suppresses variations in the characteristics of the semiconductor device.

[0056] Information about the first element can be obtained by, for example, SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray spectroscopy).

[0057] The first region R1 and the second region R2 may be regions with lower crystallinity than the other regions, and the lower crystallinity makes the electrical resistivity in these regions higher than the other regions.

[0058] For example, the crystallinity in the second partial region 11b is lower than the crystallinity in the first partial region 11a. For example, the crystallinity in the second partial region 11b may be lower than the crystallinity in the first outer edge region 11x.

[0059] For example, in the fourth semiconductor region 14, the crystallinity in the second semiconductor portion 14b may be lower than the crystallinity in the first semiconductor portion 14a.

[0060] Information about the crystallinity may be obtained, for example, by a transmission electron microscope (TEM), etc. Information about the crystallinity may be obtained, for example, by X-ray diffraction, etc.

[0061] figure In the semiconductor device 110 illustrated in FIGS. 1 and 4, the first conductive member 61 corresponding to the first partial region 11a having a low electrical resistivity does not have to be closest to the outermost conductive member (second conductive member 62) among the multiple first conductive members 61.

[0062] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 5, in the semiconductor device 111 according to the embodiment, the first region R1 may be provided in a partial region corresponding to the conductive member closest to the outermost conductive member (second conductive member 62). In this case, the first conductive member 61 corresponding to the first partial region 11a having low electrical resistivity is not closest to the outermost conductive member (second conductive member 62). Other configurations of the semiconductor device 111 may be similar to those of the semiconductor device 110.

[0063] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 6, in the semiconductor device 112 according to the embodiment, the conductive member closest to the outermost conductive member (second conductive member 62) corresponds to the first conductive member 61 corresponding to the first partial region 11a having low electrical resistivity. The first region R1 is not provided in the first partial region 11a. Other configurations of the semiconductor device 112 may be similar to those of the semiconductor device 110.

[0064] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 7, in the semiconductor device 113 according to the embodiment, the first region R1 containing the first element is also provided in the third partial region 11c. Other configurations of the semiconductor device 113 may be similar to those of the semiconductor device 110.

[0065] In the semiconductor device 113, the electrical resistivity of at least a portion of the third partial region 11c may be higher than the electrical resistivity of the first partial region 11a. For example, the concentration of the first element in at least a portion of the third partial region 11c may be higher than the concentration of the first element in the first partial region 11a. For example, the crystallinity of at least a portion of the third partial region 11c may be lower than the crystallinity in the first partial region 11a.

[0066] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 8, in the semiconductor device 114 according to the embodiment, the shape of the first region R1 is different from the shape of the first region R1 in the semiconductor device 113. Other configurations of the semiconductor device 114 may be similar to those of the semiconductor device 113.

[0067] As shown in FIG. 8 , the first insulating region 41 includes a first insulating portion 41a. The first insulating portion 41a is located between the first partial region 11a and the first conductive member 61 in the first direction D1. The second insulating region 42 includes a second insulating portion 42b. The second insulating portion 42b is located between the second partial region 11b and the second conductive member 62 in the first direction D1. A portion of the first region R1 containing the first element may be located between the first insulating portion 41a and the second insulating portion 42b. A portion of the first region R1 may be located between the first conductive member 61 and the second conductive member 62.

[0068] In the semiconductor device 114, at least a portion of the third partial region 11c (a portion having a higher electrical resistivity than the first partial region 11a) may be located between the first insulating portion 41a and the second insulating portion 42b. At least a portion of the third partial region 11c (a portion having a higher electrical resistivity than the first partial region 11a) may be located between the first conductive member 61 and the second conductive member 62.

[0069] At least a portion of the third partial region 11c (a portion having a higher concentration of the first element than the first partial region 11a) may be located between the first insulating portion 41a and the second insulating portion 42b. At least a portion of the third partial region 11c (a portion having a higher concentration of the first element than the first partial region 11a) may be located between the first conductive member 61 and the second conductive member 62.

[0070] At least a portion of the third partial region 11c (a portion having lower crystallinity than the first partial region 11a) may be located between the first insulating portion 41a and the second insulating portion 42b. At least a portion of the third partial region 11c (a portion having lower crystallinity than the first partial region 11a) may be located between the first conductive member 61 and the second conductive member 62.

[0071] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 9, in the semiconductor device 115 according to the embodiment, the shape of the first region R1 is different from the shape of the first region R1 in the semiconductor device 114. Other configurations of the semiconductor device 115 may be similar to those of the semiconductor device 114.

[0072] In the semiconductor device 115, a first region R1 containing the first element is also provided in at least a portion between the second outermost conductive member and the first electrode 51.

[0073] In the semiconductor devices 111 to 115, local temperature rises are suppressed. Thermal destruction is suppressed. A semiconductor device capable of obtaining stable characteristics can be provided. For example, a low on-resistance can be obtained while suppressing temperature rises at the outermost periphery of the cell during switching. For example, a highly reliable power semiconductor can be provided.

[0074] 10(a) and 10(b) are graphs illustrating the characteristics of the semiconductor device. FIG. 10(a) corresponds to the semiconductor device 110 according to the embodiment. As already described, in the semiconductor device 110, the electrical resistivity of the second partial region 11b is higher than that of the first partial region 11a. In this example, the electrical resistivity of the second partial region 11b is ten times that of the first partial region 11a. FIG. 10(b) corresponds to the semiconductor device 119 according to the reference example. In the semiconductor device 119, the electrical resistivity of the second partial region 11b is the same as that of the first partial region 11a. The horizontal axes of these figures represent time tm1. The switching start time tm1 is 0 μs. The left vertical axes of these figures represent the heat generation amount J1 near the lower corner of the second conductive member 62. The right vertical axes of these figures represent the drain current CD1.

[0075] As shown in Figures 10(a) and 10(b), the drain current Cd1 is approximately the same in the semiconductor device 110 and the semiconductor device 119. As shown in Figure 10(b), the amount of heat generated J1 is large in the semiconductor device 119. In contrast, the amount of heat generated J1 is significantly reduced in the semiconductor device 110. According to the embodiment, local temperature increases are suppressed, and thermal destruction is suppressed.

[0076] FIG. 11 is a graph illustrating the characteristics of the semiconductor device. 11 illustrates the on-resistance RonA when hydrogen is introduced into the first semiconductor region 11 in the structure of the semiconductor device 110. The horizontal axis of FIG. 11 represents the hydrogen concentration C1, and the vertical axis represents the on-resistance RonA. In this example, the on-resistance RonA of the sample without hydrogen introduction is 70 mΩ / cm 2 By introducing a proton, hydrogen may be introduced.

[0077] As shown in FIG. 11, the on-resistance RonA changes by changing the hydrogen concentration C1. For example, 17 cm -3 At the above hydrogen concentration C1, a higher on-resistance RonA can be obtained than when hydrogen is not introduced. For example, when controlling the electrical resistivity by introducing hydrogen, the hydrogen concentration C1 is, for example, 2×10 17cm -3 When controlling the electrical resistivity, the hydrogen concentration C1 is, for example, 1×10 18 cm -3 That's all.

[0078] In the embodiment, the second partial region 11b may contain impurities of the second conductivity type. The first partial region 11a does not substantially contain impurities of the second conductivity type. For example, the second partial region 11b contains impurities of the first conductivity type and impurities of the second conductivity type. The first partial region 11a contains impurities of the first conductivity type and does not substantially contain impurities of the second conductivity type. For example, the concentration of impurities of the second conductivity type in the second partial region 11b is 1 Partial area 11 a The concentration of the impurities of the second conductivity type in the second partial region 11b is higher than that in the first partial region 11a. This makes the electrical resistivity of the second partial region 11b higher than that of the first partial region 11a. This suppresses local temperature increases.

[0079] (Second embodiment) The second embodiment relates to a method for manufacturing a semiconductor device. FIG. 12 is a flowchart illustrating a method for manufacturing a semiconductor device according to the second embodiment. 13 is a schematic cross-sectional view illustrating a method for manufacturing a semiconductor device according to the second embodiment. As shown in FIG. 12, the method for manufacturing a semiconductor device according to the embodiment includes preparing a structure (step S110) and introducing a first substance (step S120). The first substance may correspond to the first element described above.

[0080] 13 illustrates the structure SB1. The structure SB1 includes a semiconductor member 10M, a third electrode 53, a fourth electrode 54, a first conductive member 61, a second conductive member 62, an electrode layer 52E, and an insulating member 40.

[0081] The semiconductor member 10M includes an outer region 10P and an inner region 10C. The outer region 10P is provided around the inner region 10C. The inner region 10C includes a first trench T1 and a second trench T2. A first conductive member 61 and a third electrode 53 are provided in the first trench T1 of the inner region 10C. A second conductive member 62 and a fourth electrode 54 are provided in the second trench T2 of the inner region 10C. An electrode layer 52E is provided on the third electrode 53. At least a portion of the insulating member 40 is provided between the third electrode 53 and the electrode layer 52E.

[0082] The second trench T2 is located between the first trench T1 and the outer region 10P. The semiconductor member 10M includes a first semiconductor region 11. The first semiconductor region 11 includes a first partial region 11a and a second partial region 11b. The first conductive member 61 is located between the first partial region 11a and the third electrode 53 in a first direction D1 from the semiconductor member 10M to the electrode layer 52E. The second conductive member 62 is located between the second partial region 11b and the fourth electrode 54 in the first direction D1.

[0083] The electrode layer 52E overlaps in the first direction D1 with the first conductive member 61 and the third electrode 53. The electrode layer 52E does not overlap with the second conductive member 62 and the fourth electrode 54 in the first direction D1.

[0084] 13, the first substance E1 is introduced into the second partial region 11b using the electrode layer 52E as a mask. The first substance E1 is not introduced into the first partial region 11a. Alternatively, the introduction of the first substance E1 makes the concentration of the first substance E1 in the second partial region 11b higher than the concentration of the first substance E1 in the first partial region 11a. The first substance E1 includes, for example, at least one selected from the group consisting of protons, hydrogen, helium, and argon.

[0085] According to the method for manufacturing a semiconductor device according to the embodiment, a semiconductor device capable of obtaining stable characteristics can be manufactured through simple steps.

[0086] When the first substance E1 is a proton, the dose of the first substance E1 is, for example, 1×10 13 cm -2 More than 1×10 14 cm -2 Less than (for example, about 5 × 10 13 cm -2 ) The energy is, for example, 600 eV or more and 800 eV or less.

[0087] After the introduction of the first substance E1, a heat treatment can be performed, in one example, at a temperature of, for example, 350° C., in an N2 atmosphere, and for a duration of 60 minutes.

[0088] As shown in FIG. 13 , in the structure SB1, the semiconductor member 10M may further include a second semiconductor region 12 and a third semiconductor region 13. The first semiconductor region 11 includes a third partial region 11c and a fourth partial region 11d. The third partial region 11c is located between the first partial region 11a and the second partial region 11b. The second semiconductor region 12 is located between the third partial region 11c and the third semiconductor region 13. The fourth partial region 11d is located between the third partial region 11c and the second semiconductor region 12. The second semiconductor region 12 is located between the third electrode 53 and the fourth electrode 54. The fourth partial region 11d is located between the first conductive member 61 and the second conductive member 62. The first semiconductor region 11 and the third semiconductor region 13 are of the first conductivity type. The second semiconductor region 12 is of the second conductivity type.

[0089] In the embodiment, the third electrode 53, the fourth electrode 54, the first conductive member 61, and the second conductive member 62 may include, for example, polysilicon, etc. The first electrode 51 may include, for example, at least one selected from the group consisting of aluminum, nickel, titanium, silver, and gold.

[0090] In an embodiment, information about the length and thickness can be obtained by electron microscopy, etc. Information about the composition of the material can be obtained by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray spectroscopy), etc.

[0091] The embodiment may include the following configurations (e.g., technical solutions). (Configuration 1) A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; A third electrode; A fourth electrode; A semiconductor member, the semiconductor member including a first semiconductor region, a second semiconductor region, and a third semiconductor region, the semiconductor member being provided between the first electrode and the second electrode; the first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region, the second partial region being between the first partial region and the first outer edge region in a second direction intersecting the first direction, the third partial region being between the first partial region and the second partial region in the second direction, the fourth partial region being between the third partial region and a part of the second electrode in the first direction, the first partial region, the third partial region, and the fourth partial region being of a first conductivity type, a direction from the first partial region to the third electrode being along the first direction, and a direction from the second partial region to the fourth electrode being along the first direction, the second semiconductor region is of a second conductivity type, the second semiconductor region is provided between the fourth partial region and the part of the second electrode in the first direction, and the second semiconductor region is between the third electrode and the fourth electrode in the second direction; the third semiconductor region is the first conductivity type, the third semiconductor region is provided between the second semiconductor region and the part of the second electrode, and the third semiconductor region is electrically connected to the second electrode; a first conductive member provided between the first partial region and the third electrode in the first direction, the first conductive member being electrically connected to the second electrode; a second conductive member including a first conductive portion, the first conductive portion being between the second portion region and the fourth electrode in the first direction, and the second conductive member being electrically connected to the second electrode; an insulating member including a first insulating region and a second insulating region, wherein the first insulating region is provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode, and the second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode; Equipped with The semiconductor device, wherein the electrical resistivity of the second partial region is higher than the electrical resistivity of the first partial region.

[0092] (Configuration 2) 2. The semiconductor device of configuration 1, wherein the electrical resistivity of the second partial region is higher than the electrical resistivity of the first outer edge region.

[0093] (Configuration 3) The semiconductor member further includes a fourth semiconductor region provided between the first electrode and the first semiconductor region, the fourth semiconductor region is of the first conductivity type; a carrier concentration of the first conductivity type in the fourth semiconductor region is higher than a carrier concentration of the first conductivity type in the first partial region; the fourth semiconductor region includes a first semiconductor portion and a second semiconductor portion; the first semiconductor portion is located between the first electrode and the first portion region in the first direction; the second semiconductor portion is located between the first electrode and the first outer edge region in the first direction, 3. The semiconductor device according to configuration 1 or 2, wherein the electrical resistivity of the second semiconductor portion is higher than the electrical resistivity of the first semiconductor portion.

[0094] (Configuration 4) 4. The semiconductor device according to any one of configurations 1 to 3, wherein the electrical resistivity of at least a part of the third partial region is higher than the electrical resistivity of the first partial region.

[0095] (Configuration 5) the first insulating region includes a first insulating portion; the first insulating portion is located between the first portion region and the first conductive member in the first direction; the second insulating region includes a second insulating portion; the second insulating portion is located between the second portion region and the second conductive member in the first direction, 5. The semiconductor device of claim 4, wherein the at least part of the third region is between the first insulating portion and the second insulating portion.

[0096] (Configuration 6) A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; A third electrode; A fourth electrode; A semiconductor member, the semiconductor member including a first semiconductor region, a second semiconductor region, and a third semiconductor region, the semiconductor member being provided between the first electrode and the second electrode; the first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region, the second partial region being between the first partial region and the first outer edge region in a second direction intersecting the first direction, the third partial region being between the first partial region and the second partial region in the second direction, the fourth partial region being between the third partial region and a part of the second electrode in the first direction, the first partial region, the third partial region, and the fourth partial region being of a first conductivity type, a direction from the first partial region to the third electrode being along the first direction, and a direction from the second partial region to the fourth electrode being along the first direction, the second semiconductor region is of a second conductivity type, the second semiconductor region is provided between the fourth partial region and the part of the second electrode in the first direction, and the second semiconductor region is between the third electrode and the fourth electrode in the second direction; the third semiconductor region is the first conductivity type, the third semiconductor region is provided between the second semiconductor region and the part of the second electrode, and the third semiconductor region is electrically connected to the second electrode; a first conductive member provided between the first partial region and the third electrode in the first direction, the first conductive member being electrically connected to the second electrode; a second conductive member including a first conductive portion, the first conductive portion being between the second portion region and the fourth electrode in the first direction, and the second conductive member being electrically connected to the second electrode; an insulating member including a first insulating region and a second insulating region, wherein the first insulating region is provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode, and the second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode; Equipped with the second sub-region includes a first element; the first partial region does not contain the first element, or the concentration of the first element in the first partial region is lower than the concentration of the first element in the second partial region; The semiconductor device, wherein the first element includes at least one selected from the group consisting of hydrogen, helium, and argon.

[0097] (Configuration 7) 7. The semiconductor device according to configuration 6, wherein the concentration of the first element in the second partial region is higher than the concentration of the first element in the first outer edge region.

[0098] (Configuration 8) The semiconductor member further includes a fourth semiconductor region provided between the first electrode and the first semiconductor region, the fourth semiconductor region is of the first conductivity type; a carrier concentration of the first conductivity type in the fourth semiconductor region is higher than a carrier concentration of the first conductivity type in the first partial region; the fourth semiconductor region includes a first semiconductor portion and a second semiconductor portion; the first semiconductor portion is located between the first electrode and the first portion region in the first direction; the second semiconductor portion is located between the first electrode and the first outer edge region in the first direction, 8. The semiconductor device according to configuration 6 or 7, wherein the concentration of the first element in the second semiconductor portion is higher than the concentration of the first element in the first semiconductor portion.

[0099] (Configuration 9) 9. The semiconductor device according to any one of configurations 6 to 8, wherein the concentration of the first element in at least a part of the third partial region is higher than the concentration of the first element in the first partial region.

[0100] (Configuration 10) the first insulating region includes a first insulating portion; the first insulating portion is located between the first portion region and the first conductive member in the first direction; the second insulating region includes a second insulating portion; the second insulating portion is located between the second portion region and the second conductive member in the first direction, 10. The semiconductor device of configuration 9, wherein the at least a portion of the third region is between the first insulating portion and the second insulating portion.

[0101] (Configuration 11) A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; A third electrode; A fourth electrode; A semiconductor member, the semiconductor member including a first semiconductor region, a second semiconductor region, and a third semiconductor region, the semiconductor member being provided between the first electrode and the second electrode; the first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region, the second partial region being between the first partial region and the first outer edge region in a second direction intersecting the first direction, the third partial region being between the first partial region and the second partial region in the second direction, the fourth partial region being between the third partial region and a part of the second electrode in the first direction, the first partial region, the third partial region, and the fourth partial region being of a first conductivity type, a direction from the first partial region to the third electrode being along the first direction, and a direction from the second partial region to the fourth electrode being along the first direction, the second semiconductor region is of a second conductivity type, the second semiconductor region is provided between the fourth partial region and the part of the second electrode in the first direction, and the second semiconductor region is between the third electrode and the fourth electrode in the second direction; the third semiconductor region is the first conductivity type, the third semiconductor region is provided between the second semiconductor region and the part of the second electrode, and the third semiconductor region is electrically connected to the second electrode; a first conductive member provided between the first partial region and the third electrode in the first direction, the first conductive member being electrically connected to the second electrode; a second conductive member including a first conductive portion, the first conductive portion being between the second portion region and the fourth electrode in the first direction, and the second conductive member being electrically connected to the second electrode; an insulating member including a first insulating region and a second insulating region, wherein the first insulating region is provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode, and the second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode; Equipped with The semiconductor device, wherein the crystallinity in the second partial region is lower than the crystallinity in the first partial region.

[0102] (Configuration 12) 12. The semiconductor device of claim 11, wherein the crystallinity in the second partial region is lower than the crystallinity in the first outer edge region.

[0103] (Configuration 13) The semiconductor member further includes a fourth semiconductor region provided between the first electrode and the first semiconductor region, the fourth semiconductor region is of the first conductivity type; a carrier concentration of the first conductivity type in the fourth semiconductor region is higher than a carrier concentration of the first conductivity type in the first partial region; the fourth semiconductor region includes a first semiconductor portion and a second semiconductor portion; the first semiconductor portion is located between the first electrode and the first portion region in the first direction; the second semiconductor portion is located between the first electrode and the first outer edge region in the first direction, 13. The semiconductor device according to claim 11, wherein the second semiconductor portion has lower crystallinity than the first semiconductor portion.

[0104] (Configuration 14) 14. The semiconductor device according to any one of configurations 11 to 13, wherein the crystallinity in at least a part of the third partial region is lower than the crystallinity in the first partial region.

[0105] (Configuration 15) the first insulating region includes a first insulating portion; the first insulating portion is located between the first portion region and the first conductive member in the first direction; the second insulating region includes a second insulating portion; the second insulating portion is located between the first portion region and the second conductive member in the first direction, 15. The semiconductor device of claim 14, wherein the at least a portion of the third region is between the first insulating portion and the second insulating portion.

[0106] (Configuration 16) further comprising an electrode layer electrically connected to the second electrode; At least a portion of the second electrode is located between the semiconductor member and the electrode layer in the first direction, 16. The semiconductor device according to any one of configurations 1 to 15, wherein the electrode layer overlaps the first partial region but does not overlap the second partial region.

[0107] (Configuration 17) the first conductive member extends along a third direction intersecting a plane including the first direction and the second direction; the second conductive member includes a second conductive portion; the first semiconductor region includes a second outer edge region; 17. The semiconductor device according to any one of configurations 1 to 16, wherein the second conductive portion is located between the first conductive member and the second outer edge region in the third direction.

[0108] (Configuration 18) 18. The semiconductor device according to any one of configurations 1 to 17, wherein the second conductive member is provided around the first conductive member in a plane intersecting the first direction.

[0109] (Configuration 19) A structure is provided, the structure comprising: a semiconductor member including an outer region and an inner region, the outer region surrounding the inner region; a first conductive member and a third electrode provided in the first trench in the inner region; a second conductive member and a fourth electrode provided in the second trench in the inner region; an electrode layer provided on the third electrode; an insulating member, at least a portion of which is provided between the third electrode and the electrode layer; Including, the second trench is between the first trench and the outer region; the semiconductor member includes a first semiconductor region including a first partial region and a second partial region; the first conductive member is located between the first partial region and the third electrode in a first direction from the semiconductor member to the electrode layer; the second conductive member is located between the second partial region and the fourth electrode in the first direction, the electrode layer overlaps the first conductive member and the third electrode in the first direction; the electrode layer does not overlap with the second conductive member and the fourth electrode in the first direction, a first substance is introduced into the second partial region using the electrode layer as a mask, and the first substance is not introduced into the first partial region, or the concentration of the first substance in the second partial region is made higher than the concentration of the first substance in the first partial region, and the first substance includes at least one selected from the group consisting of protons, hydrogen, helium, and argon.

[0110] (Configuration 20) The semiconductor member further includes a second semiconductor region and a third semiconductor region, the first semiconductor region includes a third partial region and a fourth partial region; the third partial region is located between the first partial region and the second partial region, the second semiconductor region is located between the third partial region and the third semiconductor region; the fourth partial region is between the third partial region and the second semiconductor region; the second semiconductor region is between the third electrode and the fourth electrode; the fourth partial region is located between the first conductive member and the second conductive member, the first semiconductor region and the third semiconductor region are of a first conductivity type; 20. The method of claim 19, wherein the second semiconductor region is of a second conductivity type.

[0111] According to the embodiment, it is possible to provide a semiconductor device that can obtain stable characteristics.

[0112] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of the elements included in the semiconductor device, such as the semiconductor member, semiconductor region, electrode, member, and insulating member, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0113] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0114] In addition, all semiconductor devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0115] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0116] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0117] 10C...inner region, 10M...semiconductor member, 10P...outer region, 11-14...first to fourth semiconductor regions, 11a-11d...first to fourth partial regions, 11cp...current path, 11x...first outer peripheral region, 11y...second outer peripheral region, 14a, 14b...first and second semiconductor portions, 40...insulating member, 41...first insulating region, 41a...first insulating portion, 42...second insulating region, 42b...second insulating portion, 45, 46...insulating film, 51-54...first to fourth electrodes, 52E...electrode layer, 52L...connecting member, 53E...third electrode layer, 61, 62...first and second conductive members, 62a, 62b...first and second conductive portions, 110-115...semiconductor device, C1...concentration, D1 to D3...first to third directions, E1...first material, R1 to R3...first to third regions, RonA...on-resistance, SB1...structure, T1, T2...first and second trenches

Claims

1. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; A third electrode; A fourth electrode; A semiconductor member, the semiconductor member including a first semiconductor region, a second semiconductor region, and a third semiconductor region, the semiconductor member being provided between the first electrode and the second electrode; the first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region, the second partial region being between the first partial region and the first outer edge region in a second direction intersecting the first direction, the third partial region being between the first partial region and the second partial region in the second direction, the fourth partial region being between the third partial region and a part of the second electrode in the first direction, the first partial region, the third partial region, and the fourth partial region being of a first conductivity type, a direction from the first partial region to the third electrode being along the first direction, and a direction from the second partial region to the fourth electrode being along the first direction, the second semiconductor region is of a second conductivity type, the second semiconductor region is provided between the fourth partial region and the part of the second electrode in the first direction, and the second semiconductor region is between the third electrode and the fourth electrode in the second direction; The third semiconductor region is the first conductivity type, and the third semiconductor region is provided between the second semiconductor region and the part of the second electrode, and the third semiconductor region is electrically connected to the second electrode. a first conductive member provided between the first partial region and the third electrode in the first direction, the first conductive member being electrically connected to the second electrode; a second conductive member including a first conductive portion, the first conductive portion being between the second partial region and the fourth electrode in the first direction, and the second conductive member being electrically connected to the second electrode; an insulating member including a first insulating region and a second insulating region, wherein the first insulating region is provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode, and the second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode; Equipped with The electrical resistivity of the second partial region is higher than the electrical resistivity of the first partial region, The semiconductor member further includes a fourth semiconductor region provided between the first electrode and the first semiconductor region, the fourth semiconductor region is of the first conductivity type; a carrier concentration of the first conductivity type in the fourth semiconductor region is higher than a carrier concentration of the first conductivity type in the first partial region; the fourth semiconductor region includes a first semiconductor portion and a second semiconductor portion; the first semiconductor portion is located between the first electrode and the first portion region in the first direction; the second semiconductor portion is located between the first electrode and the first outer edge region in the first direction; The semiconductor device, wherein the electrical resistivity of the second semiconductor portion is higher than the electrical resistivity of the first semiconductor portion.

2. The semiconductor device according to claim 1 , wherein the electrical resistivity of the second partial region is higher than the electrical resistivity of the first outer edge region.

3. The semiconductor device according to claim 1 , wherein an electrical resistivity of at least a part of said third partial region is higher than the electrical resistivity of said first partial region.

4. the first insulating region includes a first insulating portion; the first insulating portion is located between the first portion region and the first conductive member in the first direction; the second insulating region includes a second insulating portion; the second insulating portion is located between the second portion region and the second conductive member in the first direction, The semiconductor device according to claim 3 , wherein the at least part of the third region is located between the first insulating portion and the second insulating portion.

5. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; A third electrode; A fourth electrode; A semiconductor member, the semiconductor member including a first semiconductor region, a second semiconductor region, and a third semiconductor region, the semiconductor member being provided between the first electrode and the second electrode; the first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region, the second partial region being between the first partial region and the first outer edge region in a second direction intersecting the first direction, the third partial region being between the first partial region and the second partial region in the second direction, the fourth partial region being between the third partial region and a part of the second electrode in the first direction, the first partial region, the third partial region, and the fourth partial region being of a first conductivity type, a direction from the first partial region to the third electrode being along the first direction, and a direction from the second partial region to the fourth electrode being along the first direction, the second semiconductor region is of a second conductivity type, the second semiconductor region is provided between the fourth partial region and the part of the second electrode in the first direction, and the second semiconductor region is between the third electrode and the fourth electrode in the second direction; The third semiconductor region is the first conductivity type, and the third semiconductor region is provided between the second semiconductor region and the part of the second electrode, and the third semiconductor region is electrically connected to the second electrode. a first conductive member provided between the first partial region and the third electrode in the first direction, the first conductive member being electrically connected to the second electrode; a second conductive member including a first conductive portion, the first conductive portion being between the second partial region and the fourth electrode in the first direction, and the second conductive member being electrically connected to the second electrode; an insulating member including a first insulating region and a second insulating region, wherein the first insulating region is provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the third electrode, and the second insulating region is provided between the semiconductor member and the fourth electrode, between the semiconductor member and the second conductive member, and between the second conductive member and the fourth electrode; Equipped with the second partial region includes a first element; the first partial region does not contain the first element, or the concentration of the first element in the first partial region is lower than the concentration of the first element in the second partial region; the first element includes at least one selected from the group consisting of hydrogen, helium, and argon; The semiconductor member further includes a fourth semiconductor region provided between the first electrode and the first semiconductor region, the fourth semiconductor region is of the first conductivity type; a carrier concentration of the first conductivity type in the fourth semiconductor region is higher than a carrier concentration of the first conductivity type in the first partial region; the fourth semiconductor region includes a first semiconductor portion and a second semiconductor portion; the first semiconductor portion is located between the first electrode and the first portion region in the first direction; the second semiconductor portion is located between the first electrode and the first outer edge region in the first direction; A semiconductor device, wherein the concentration of the first element in the second semiconductor portion is higher than the concentration of the first element in the first semiconductor portion.

6. The semiconductor device according to claim 5 , wherein the concentration of said first element in said second partial region is higher than the concentration of said first element in said first outer edge region.

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