Manufacturing different color LED elements
The method of epitaxially growing and patterning GaN-based LED arrays on a sacrificial layer addresses miniaturization and efficiency challenges, enabling high-efficiency RGB LED elements for advanced displays and augmented reality applications.
Patent Information
- Application Number
- JP2023564618
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-04-22
- Filing Date
- 2022-04-20
- Publication Date
- 2025-09-08
- Estimated Expiration
- 2042-04-20
AI Technical Summary
Existing GaN-based LED manufacturing methods face challenges in miniaturization, full-color operation, reduced external quantum efficiency, low yield, and nonuniformity issues, particularly for microLEDs smaller than 100 micrometers, which affect luminance and drive current requirements.
A method involving epitaxial growth of first, second, and third LED arrays on a sacrificial GaN layer, with controlled InGaN layer composition and thickness to emit different colors, followed by patterning and masking to form a monolithic matrix of RGB LED elements on a single substrate, allowing for integrated processing and improved wavelength uniformity.
Enables the production of high-efficiency, monochromatic RGB LED elements with balanced brightness, suitable for ultra-high-definition displays and augmented reality applications, by controlling the InGaN layer composition and thickness to achieve desired luminance and color output.
Smart Images

Figure 0007735427000003 
Figure 0007735427000004 
Figure 0007735427000005
Abstract
Description
[Technical Field]
[0001] The present concepts relate generally to gallium nitride (GaN) based light emitting diodes (LEDs), and more particularly to methods for forming a matrix of such LEDs of different colors. [Background technology]
[0002] GaN-based LEDs have attracted attention in recent years, at least as potential replacements for conventional LEDs that form RGB pixels in display devices. GaN-based LEDs can include quantum heterostructures formed from indium gallium nitride (InGaN) with an active layer of GaN that provides a quantum confinement region. The InGaN layer can be formed from a mixture of GaN and indium nitride (InN), and the wavelength of light emitted by the InGaN layer can be tuned by varying the GaN / InN ratio and by controlling the thickness of the InGaN layer.
[0003] Traditionally, GaN-based LEDs can be fabricated by epitaxial growth, followed by chip fabrication, wafer dicing, and pick-and-place robotic operations into individually packaged components that can be interconnected by bulk wire bonding. However, traditional back-end processing becomes more challenging with the overall effort to miniaturize and scale semiconductor devices. Therefore, a different approach has been proposed in which LEDs are formed on a substrate, separated from each other by etching, and transferred to a carrier wafer in a lift-off process. LEDs can be separated from the substrate by laser lift-off or chemical lift-off and transfer-printed onto the target substrate.
[0004] However, this manufacturing method is known to require a series of relatively expensive and complex processing steps, and it is therefore desirable to provide an alternative, more efficient method of fabrication.
[0005] There are also several technical challenges associated with shrinking the size of LEDs. Microscopy LEDs can suffer from issues related to full-color operation, reduced external quantum efficiency (EQE), low efficiency, and low-yield mass transfer. Furthermore, microscopy LED epitaxy may require improved wavelength and thickness uniformity. Uniform wavelength and thickness are desirable for chips smaller than 100 micrometers. Furthermore, nonuniformity caused by cutting damage around the LED chip can result in power leakage, which can affect the overall light-emitting characteristics. Drive currents should preferably be relatively low, and quality assurance inspection and testing are generally more difficult as chip sizes become smaller. In particular, the mass transfer fabrication process, in which the LED chip is transferred to a non-epitaxial substrate, is a major technical challenge. For full-color RGB chips, color conversion can be associated with insufficient luminance yield, especially for chips smaller than 20 micrometers. Another issue is the low external quantum efficiency (EQE) of microLEDs. Summary of the Invention [Problem to be solved by the invention]
[0006] The objective of the inventive concept is to overcome, in whole or in part, one or more of the drawbacks of the prior art and to provide an improved alternative to the above-mentioned techniques. This and further objectives can be seen from the following. [Means for solving the problem]
[0007] In accordance with one aspect of the inventive concept, there is provided a method for forming a first array of first LED elements, a second array of second LED elements, and a third array of third LED elements, the first, second, and third arrays forming a matrix of LED elements capable of emitting light of different colors, the first, second, and third arrays of LED elements being formed by epitaxial growth on a sacrificial layer comprising GaN.
[0008] Thus, the method includes epitaxially growing a first layer on a sacrificial GaN layer, the first layer comprising a first n-doped GaN layer, a first p-doped GaN layer, and a first In layer disposed therebetween. x Ga (1-x) The method includes epitaxially growing a first n-doped GaN layer, where x is in the range of 0.10 to 0.75. The first layer is then patterned to form a first array of first LED elements arranged to emit light of a first color, followed by forming a first etch mask having a plurality of first trenches that protect the first array and expose the sacrificial layer. The first etch mask may be formed by depositing a layer of mask material covering the first array and the sacrificial layer, and patterning the layer to form trenches that expose the sacrificial layer. A second array of second LED elements may then be epitaxially grown within the plurality of first trenches. The second LED elements are arranged to emit light of a second color and include a second n-doped GaN layer, a second p-doped GaN layer, and a second In layer disposed therebetween. y Ga (1-y) The LED device may have a stacked structure of N layers, where y is in the range of 0.20 to 0.28. The method further includes forming a second etching mask having a plurality of second trenches that protect the second array and expose the sacrificial layer. The second etching mask may be formed by covering the second array of second LED elements with a mask material and patterning the first mask layer to form a plurality of second trenches. A third array of third LED elements may then be epitaxially grown in the plurality of second trenches. The third LED elements are arranged to emit light of a third color and include a third n-doped GaN layer, a third p-doped GaN layer, and a third In layer disposed therebetween. z Ga (1-z) It has a laminated structure of N layers, where z is in the range of 0.28 to 0.33.
[0009] The inventive concept enables integrated processing of LED elements of different colors. As outlined in connection with the above embodiments, a technique is provided for forming a matrix comprising first, second, and third LED elements on the same GaN sacrificial layer. This can be achieved by sequential processing involving epitaxial growth, patterning, and masking. More specifically, the first LED element can be protected by a first etch mask during processing of the second and third LED elements, and the second LED element can be protected by an additional mask material during processing of the third LED element. Furthermore, the dimensions and layout of the various LED elements can be determined by patterning the first layer and defining the first and second trenches. The LED elements are sometimes referred to as micro-LEDs, referring to the relatively small size of the individual elements. The resulting matrix can thus be a monolithic LED device in which LED elements of different colors can be produced on the same substrate. The LED elements can be configured to emit, for example, red, green, and blue light as specified in the RGB color model, thereby allowing the matrix to form RGB pixels of a display device. Combining different colors on the same substrate is advantageous over prior art techniques in which different color LED elements are formed on separate substrates in separate processes and then may be combined into pixels in back-end processing.
[0010] The sequential epitaxial growth of the first, second, and third LED elements allows the composition of the active layer—i.e., the In content of the quantum confinement region formed by the InGaN layer—to be varied among the first, second, and third LED elements to control the wavelength of the emitted light. The thickness of the active layer can also be varied to further affect the wavelength of the emitted light. Therefore, the first, second, and third thicknesses mentioned above can be varied depending on the desired wavelength range or color of light emitted from the resulting LED element. The same applies to the first, second, and third ranges for the variables x, y, and z, respectively, which can also be varied depending on the desired light output.
[0011] The epitaxy process can be varied and controlled to affect the wavelength of the emitted light, while the patterning of the first layer and the definition of the first and second trenches can be controlled to vary the lateral dimensions of the first, second, and third LED elements, respectively. Lateral dimensions, such as the maximum width and preferably area, of the LED elements can be varied to control and balance the brightness of the different LED elements. In one example, the first LED element can include micrometer-sized quantum confined regions forming quantum wells (e.g., emitting light in the blue wavelength range), while the second and third LED elements can be formed from quantum dots, i.e., quantum confined regions having widths of a few nanometers, such as less than 10 nanometers (e.g., emitting light in the red and green wavelength ranges, respectively). The lateral dimensions of the quantum confined regions of the second and third LED elements can be determined by the widths of the first and second trenches, which can be formed in the first mask layer, for example, by nanoimprint lithography.
[0012] The array, which may be one-dimensional or two-dimensional, may be provided in various layouts and configurations that allow the first, second, and third LED elements of the matrix to form individually controllable subpixels of a pixel of a display device. Thus, a subpixel, which may be understood as a controllable entity of a single color, such as red, blue, or green, may in turn be formed from one or several LED elements of the first, second, or third color. Examples of array layouts and LED element dimensions are described in more detail in connection with the detailed description of the drawings.
[0013] The term "lateral" as used herein denotes a direction or plane that is parallel to the main plane of extension of the aforementioned layers. The matrix and sacrificial layer may be supported by a substrate during processing, and the term "lateral" direction or "lateral" plane may equivalently be understood as a direction that is parallel to the main plane of extension of the substrate.
[0014] As used herein, the term "vertical" direction or "vertical" plane refers to a direction or plane that is perpendicular to the horizontal direction or plane, i.e., the term "vertical" direction or "vertical plane" refers to a direction or plane that is perpendicular to the main plane of extension of the substrate that supports the matrix and sacrificial layer.
[0015] Thus, the terms "above" and "below" refer to directions along and opposite the vertical, respectively.
[0016] A layer or structure disposed directly adjacent to another structure or layer may be understood as being disposed vertically above the other structure or layer and sharing a physical interface with the underlying structure or layer. Such a physical interface may be configured to provide or prevent conductive contact, i.e., to allow charge carrier transport across the interface. A conductive contact may refer to, for example, an ohmic contact, a Schottky contact, and / or a contact across a p-n junction or a tunnel junction.
[0017] According to one embodiment, the first In x Ga (1-x) The N layer may have a first thickness that is 0.5 to 3 nm on average. y Ga (1-y) The N may have a second thickness that is 2 to 3 nm on average, and the third In z Ga (1-z) The N layer may have a third thickness of 2.8 to 3.5 nm on average. A matrix may be obtained with these dimensions, and the first LED element may be capable of emitting blue light, the second LED element may be capable of emitting green light, and the third LED element may be capable of emitting red light.
[0018] The luminous efficiency, or brightness, may vary between the first, second, and third LED elements. As previously mentioned, the brightness difference may be adjusted or at least partially balanced by varying the lateral extent of the LED elements. Thus, according to one embodiment, the lateral size of the first LED element, characterized, for example, by its area or lateral width, may be relatively large compared to the second and third LED elements. The maximum lateral width of each of the first LED elements may be, for example, within a range of 0.1 to 1 μm, 2 to 5 μm, or 5 to 25 μm, and the maximum lateral width of each of the second and third LED elements may be 10 nm or less. In some examples, the maximum lateral width may be within a range of 2 to 3 nm for the second LED element and 2.8 to 3.5 nm for the third LED element. These lateral dimensions of the LED device have been shown to allow the InGaN layers to form quantum confined regions, such as a well or a dot, which have an improved ability to emit substantially monochromatic light even for varying indium compositions on the substrate.
[0019] According to one embodiment, the sacrificial GaN layer may be n-doped or p-doped. Advantageously, the sacrificial GaN layer may form an n-doped or p-doped layer of the stack that forms the LED device. Thus, the first, second, or third InGaN layer of the LED device, or other layers included in the stack, such as barrier layers, may be epitaxially grown directly on the n-doped or p-doped GaN layer.
[0020] According to one embodiment, the matrix can be configured to form a plurality of pixels for a display device. Each pixel can be formed from at least one of the first LED elements and a plurality of second and third LED elements. In other words, a pixel can include a first subpixel formed from at least one of the first LED elements, a second subpixel formed from a group of second LED elements, and a third subpixel formed from a group of third LED elements. In one example, each of the second and third groups of LED elements can have a footprint substantially the same as the footprint of the first subpixel. It can be advantageous to use multiple LED elements for the second and third subpixels and only one or a few LED elements for the first subpixel to balance the brightness difference between the first color and the second and third colors.
[0021] According to one embodiment, the first color may be blue, the second color may be green, and the third color may be red, allowing pixels to be formed according to the RGB color model commonly used in image generation technology.
[0022] According to one example, the AlGaN barrier layer is a first In x Ga (1-x) N layer, second In y Ga (1-y) N layer and third In z Ga (1-z)The AlGaN barrier layer may be formed on both sides of at least one of the N layers. The AlGaN barrier may be disposed directly adjacent to the InGaN layer, i.e., form a junction or interface with the InGaN layer, thereby serving as a barrier structure for confining positive (hole) charge carriers within the active layer. AlGaN is known to have a wider bandgap than InGaN alloys and therefore may function as a potential barrier for preventing tunneling electrons from tunneling outside the quantum confinement region formed by the InGaN layer. The AlGaN barrier layer may be formed during the epitaxial growth of at least one of the first, second, and third LED elements, for example, by epitaxially growing a first barrier layer immediately before growing the InGaN layer and epitaxially growing a second barrier layer immediately after growing the InGaN layer.
[0023] According to one example, an undoped GaN layer may be formed immediately adjacent to at least one of the AlGaN barrier layers such that the AlGaN barrier layer is disposed between the InGaN layer and the undoped GaN layer, and the undoped GaN layer may be provided to prevent degradation of the modulation doping of the InGaN layer.
[0024] According to one embodiment, at least one of the first and second etching masks may be a hard mask. The hard mask may be formed, for example, from a deposited oxide or nitride material or by a spin-on material. Preferably, the hard mask may be capable of withstanding multiple patterning processes involving the formation of the first and second trenches and the associated epitaxial growth. Thus, the second etching mask may be formed by covering the second array of LED elements with a mask material, such as the oxide or nitride material described above, and etching multiple second trenches in the layer forming the first etching mask. Thus, the first and second etching masks may be formed in the same layer of etching mask material.
[0025] A quantum confinement region formed by an InGaN layer disposed between a p-doped GaN layer and an n-doped GaN layer is not necessarily limited to a planar structure. For example, the InGaN layer may be disposed on a slope, such as the side of a pyramidal structure, which may be formed on or by an underlying p-doped or n-doped GaN layer. Furthermore, the quantum confinement region formed by the InGaN layer may be provided in shapes and structures other than a planar layer. For example, the quantum confinement region may be formed as a quantum well that confines carriers in one dimension, a quantum wire that confines carriers in two dimensions, or a quantum dot that confines carriers in all three dimensions. Structurally, the InGaN layer may be provided as a pillar or pyramid, as further described in the detailed description.
[0026] It will further be appreciated that the stacked structure forming the LED device may comprise more than one InGaN layer, and thus the LED device may comprise multiple quantum wells formed by multiple InGaN layers.
[0027] According to one embodiment, a fourth LED element, such as an ultraviolet (UV) LED element, may be formed under at least one of the first, second, or third LED elements. The fourth LED element may be used for optical pumping of the above LED elements. The fourth LED element may have a fourth In, the indium composition corresponding to d being less than 0.05. d Ga (1-d) The fourth LED element may include an n-doped GaN layer. Furthermore, the layer thickness may be in the range of 1 to 6 nm. In some examples, the fourth LED element may include a multiple quantum well (MQW). The fourth LED element may be combined with any of the embodiments described above and may be formed by the same process as the first, second, and third LED elements. Thus, the fourth LED element may include an n-doped GaN layer and a p-doped GaN layer with an active fourth In layer therebetween. d Ga (1-d)The N-type layer may be formed by epitaxy of a layer stack comprising an N-type layer. As outlined above, additional barrier layers may also be provided in the layer stack, for example comprising AlGaN and / or undoped GaN.
[0028] It will be understood that the term "LED element" as used in this application can refer to a composite structure of a first (or second or third) LED element and an underlying fourth LED element, as outlined above. Thus, the term LED element can, in some embodiments, refer to an optically pumped version of any of the first, second, and third LED elements.
[0029] According to one embodiment, a GaN sacrificial layer can be disposed on a substrate having a layer including a plurality of pillars embedded with the material of the GaN sacrificial layer. The pillars can be disposed below the LED element, as viewed vertically. The pillars can be adapted to mechanically support the LED element after etching of the GaN sacrificial layer, i.e., configured to tether or secure the LED element to the underlying substrate after the GaN sacrificial layer has been at least partially removed. Preferably, the pillars can be formed from a material that is sufficiently etch-selective to GaN to allow the LED element to be released from the GaN sacrificial layer. In one example, the pillars can be formed from AlN, which has been shown to be capable of being etched with sufficiently high selectivity to GaN.
[0030] According to one embodiment, a plurality of third trenches may be formed between at least some of the first, second, and third LED elements. The third trenches may be arranged, for example, to define or separate subpixels comprising one or several LED elements of the same color. The third trenches may be etched down to the layer comprising the plurality of pillars to allow at least a portion of the GaN sacrificial layer to be selectively removed relative to the pillars. After etching the GaN sacrificial layer, the substrate may then comprise a plurality of pillars supporting multiple LED elements that may be grouped into subpixels comprising one or several LED elements of the same color.
[0031] According to one embodiment, the first, second, and third LED elements supported by pillars can be attached or bonded to a carrier substrate from above. In a subsequent step, the first, second, and third LED elements can be released from the substrate by removing or destroying the pillars. The pillars can be removed, for example, by etching.
[0032] Thus, the pillars can be used to tether the matrix formed by the first, second, and third arrays of LED elements to the substrate or original substrate before transfer. The pillars can support the LED elements, which may be lattice-mismatched to the substrate, during attachment to the carrier wafer, reducing the risk of wafer bow caused by lattice and thermal expansion coefficient mismatch between the substrate and the LED elements.
[0033] In an alternative embodiment, pillars may be retained below the LED element to increase light extraction from the LED element, in which case the pillars may be used to facilitate scattering of the light emitted by the LED element.
[0034] Furthermore, this embodiment allows the LED elements to be produced monolithically on silicon, taking advantage of the state-of-the-art CMOS backplane processing provided by silicon CMOS manufacturing. Preferably, the carrier can be a 6-inch silicon wafer or larger. Alternatively, the LED elements can be transferred to a glass substrate. Such glass displays can be used as windshields or door glass for electric vehicles.
[0035] In one example of the present invention, the matrix can be transferred to a glass substrate to form a glass LED display. Such a glass LED display can be provided as the windshield of a vehicle, such as an electric vehicle. The LED elements can enable the windshield to display GPS instructions to the driver as augmented reality information, such as visually indicating that the driver must turn right or left after driving 200 meters down the road. Furthermore, the glass LED display can show various infotainment information to the driver while driving. Preferably, the electroluminescence can be relatively high to provide augmented reality information in sunlight. The glass LED display can also assist in highlighting nearby objects to alert the driver, such as a warning that a pedestrian is walking on the road or that a bicycle is about to be hit by a vehicle, without further action being taken.
[0036] In another example of the present invention, the LED matrix can be an ultra-high-definition (UHD) 8K display processed from a silicon wafer with a GaN buffer layer. The display can have a resolution of 7680 x 4320 with 33,177,600 pixels. Similarly, an LED matrix with UHD 4K resolution can be processed at a resolution of 3840 x 2160 with a pixel count of 8,294,400.
[0037] The above, as well as additional objects, features, and advantages of the inventive concept, will be better understood from the following illustrative and non-limiting detailed description, taken in conjunction with the accompanying drawings, in which like reference numerals are used for like elements unless otherwise noted. [Brief explanation of the drawings]
[0038] [Figure 1] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 2] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 3]1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 4] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 5] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 6] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 7] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 8] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 9] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 10] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 11] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 12] 1A-1C are cross-sectional views illustrating a method for forming a matrix of different colored LED elements. [Figure 13] FIG. 1 is a top view of such a matrix showing the arrangement of the array of LED elements. [Figure 14] 1 is a cross-sectional view of an LED device according to some embodiments. [Figure 15] 1 is a cross-sectional view of an LED device according to some embodiments. [Figure 16] 1 is a cross-sectional view of an LED device according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION
[0039] It should be noted that the illustrated structures and layers may extend laterally beyond the portions shown. Furthermore, it should be noted that due to the schematic nature of the drawings, the relative dimensions of the various structures and layers are not drawn to scale. Rather, the dimensions are adapted for clarity of illustration and to facilitate understanding of the following description.
[0040] A method for forming a matrix 100 of LED elements 11, 21, 31 shown in Figure 13 will now be described with reference to Figures 1 to 12. As can be appreciated, a subset of the following method steps can be performed to form a matrix such as that shown in Figure 13.
[0041] In FIG. 1 , a GaN sacrificial layer 140 is formed on a substrate 170. The substrate 170 may be, for example, a silicon (111) substrate. Additionally, a pillar layer 142 including a plurality of vertical pillars 141 may be provided on the substrate 170 such that the pillars 141 are embedded in the GaN sacrificial layer 140. The pillars 141 may be formed, for example, by epitaxially growing an AlN layer 142 on the substrate 170, followed by lithographic patterning and etching of the AlN layer 142 into a plurality of micropillars 141 protruding from the surface of the AlN layer 142. The pillars may have a thickness of, for example, 100 nm or less and may be arranged in a hexagonal pattern with a pitch or separation distance of 400 nm between adjacent pillars. FIG. 1 shows an example of the resulting structure in which a plurality of pillars 141 are embedded in the GaN sacrificial layer 140. The GaN sacrificial layer 140 may be formed by epitaxial growth.
[0042] In accordance with the inventive concept, a first layer 110, such as that shown in FIG. 1, may be formed above a sacrificial layer 140. The first layer 110 may be epitaxially grown on the sacrificial layer 140 and may comprise a stacked structure from which the first LED element of the matrix will be defined, as shown in the following figures. The stacked structure may form a quantum heterostructure formed from first and second doped GaN layers with an InGaN active layer disposed therebetween. The InGaN may be a mixture of GaN and InN, with a bandgap that can be tuned by varying the GaN / InN ratio and by controlling the thickness of the InGaN layer to enable the InGaN layer to emit light within a specific wavelength range.
[0043] An example of such a stacked structure is shown in Figure 2, which shows a portion of the first layer 110 of Figure 1. The stacked structure includes a first n-doped GaN layer 111 disposed on a sacrificial GaN layer 140, a first p-doped GaN layer 113 disposed above the first n-doped GaN layer 111, and a first In layer 114 disposed between the first n-doped GaN layer 111 and the first p-doped GaN layer 113. x Ga (1-x) and an N layer 112. The GaN can be intrinsically doped or doped with silane. For p-doping, a Mg3N2 supply of preferably 100-250 sccm can be used during the epitaxy process.
[0044] The order of the n-doped and p-doped GaN layers may be such that, in some examples, the first p-doped GaN layer 113 is first In x Ga (1-x) The first n-doped GaN layer 111 is disposed below the N layer 112. x Ga (1-x) The N layer 112 may be switched to be disposed above the N layer 112. Additionally, additional layers may be added to the stack structure, such as an AlGaN barrier 114 and an undoped GaN layer 115, which will be described in more detail below.
[0045] Preferably, the layers of the stacked structure may be formed by epitaxy and therefore may be referred to as epitaxial layers or epilayers. The epitaxy process may begin on the GaN sacrificial layer 140, and therefore the epitaxial layers may have a crystal orientation that is determined relative to the orientation of the GaN sacrificial layer 140. The stacked structure may be grown using a vapor-phase based epitaxy process in which the composition of the reactants may be varied to provide the different layers of the stacked structure.
[0046] In one example, a close coupled showerhead metalorganic chemical vapor deposition (CCS MOCVD) reactor can be used, which can allow the composition and dimensions of the stack to be controlled over a relatively large surface, such as a 6-inch wafer or larger. The CCS MOCVD reactor can further be used to control the in-situ doping levels of p-doped and n-doped GaN layers. This type of reactor has been shown to be capable of providing epitaxial growth rates that are substantially linear with the total flow rate of reactants. The thickness of the boundary layer δ through which gases can diffuse into the substrate can be independent of the radial distance from the central stagnation point. This has been shown to be particularly advantageous for processing relatively large substrates, such as 6-inch or 12-inch wafers. The boundary layer δ through which reactants begin to diffuse into the substrate can be:
number
number
[0047] An additional advantage of using a CCS MOCVD reactor is that the effects of high-temperature vapor circulation near the reactor walls can be reduced as the reactor volume is enlarged, which has been shown to be advantageous for achieving consistent epitaxial growth conditions across the entire wafer surface. Therefore, high reproducibility can be achieved at a given location on a relatively large wafer surface. Concentration gradients in the reaction ternary system of In, Ga, and N can result from limiting one reactant to the reaction. By reducing the thickness of the boundary layer within the reactor, the composition of the InGaN can be controlled to fine-tune the color quality of the resulting LED device. The bandgap of the InGaN layer can be further modified by varying the thickness of the quantum confinement region formed by the InGaN layer. The thickness of the quantum confinement region can be controlled by the supply of a Group V precursor reacted with a Group III precursor.
[0048] Varying the thickness of the InGaN layer can be even more advantageous when producing red LED devices. The indium ratio in the InGaN alloy forming the InGaN layer can vary slightly across the wafer in the reactor chamber during growth. This can be a potential problem for highly indium-rich compositions, which are also prone to phase separation. Therefore, producing red LED devices with bandgaps associated with highly indium-rich compositions can be difficult to control in practice. Limiting the thickness of the InGaN layer can provide an additional means for controlling color quality. By relaxing the constraint on indium composition, the preferred thickness of the InGaN epilayer for red LED devices can be approximately 3 nm, for green LED devices it can be approximately 2.5 nm, and for blue LED devices it can be approximately 2 nm. In these examples, the composition can vary by 1-2%, with negligible effect on the color of the LED device.
[0049] In this example shown in FIG. 2, an n-doped GaN layer 111 is first grown on the surface of the sacrificial layer 140, and then a first In doped GaN layer 111 is grown on the first n-doped GaN layer 111. x Ga (1-x) The N layer 112 is grown, followed by the first Inx Ga (1-x) The first layer 110 may be formed by growing a first p-doped GaN layer 113 on the N layer 112. x Ga (1-x) The thickness of the N layer 112 may be 0.5 to 3 nm, and the In ratio may be determined by x being in the range of 0.10 to 0.75.
[0050] Additional layers may be provided in the stack structure to further improve the performance of the resulting LED device, preferably formed by the same epitaxy process as the rest of the stack structure, such as in the CCS MOCVD reactor described above.
[0051] In one example, an AlGaN layer 114 may be provided on both sides of the InGaN layer. AlGaN is known to have a wider bandgap than InGaN and may therefore function as a potential barrier that prevents tunneling electrons from tunneling outside the quantum confinement region formed by the InGaN active layer. Therefore, the AlGaN layers 114 may be formed directly below and above the InGaN layer 112 such that a junction or interface is formed between the InGaN layer 112 and the AlGaN barrier layer 114. The AlGaN may be provided in two barrier layers 114, the first of which may be formed by epitaxy before the formation of the InGaN layer 112 and thus grown on the AlGaN layer 114, and the second barrier layer may be epitaxially grown directly on the InGaN layer 112.
[0052] In another example, a 2-10 nm thick layer of undoped GaN 115 may be formed adjacent to one or both of the AlGaN layers 114, such that the AlGaN layer 114 is disposed between the InGaN layer 112 and the undoped GaN layer 115. The undoped GaN layer 115 may be disposed abutting the AlGaN layer 114 and may be provided to improve the modulation doping of the InGaN layer 112, where charge carriers migrate to the bottom of the quantum confined region.
[0053] It will further be appreciated that more than one InGaN layer 112 may be provided, thereby forming multiple quantum wells.
[0054] The first layer 110 may then be patterned into a first array of first LED elements 11, for example, by the processing steps shown in Figures 3 and 4. In Figure 3, the first layer 110 has been lithographically patterned with a positive mask 153, which defines areas of the first layer 110 that will be formed into the first LED elements 11. The positive mask 153 may be formed from, for example, aC, a-Si, spin-on carbon (SOC), SiCN, or a layer of photoresist, and the lithographic patterning may include, for example, nanoimprint lithography.
[0055] In FIG. 4 , the pattern of the positive mask 153 has been transferred to the first layer 110 by etching while using the positive mask 153 as an etching mask to protect the areas of the first layer 110 where the first LED elements 11 will be formed. The pattern transfer may be performed by an anisotropic etching process, which may be, for example, a plasma-based etching process. The resulting structure after removal of the positive mask 153 is shown in FIG. 4 , where the first LED elements 11 form a first array on the sacrificial layer 140. A top view of one example of such a first array is also shown in FIG. 13 , where the first LED elements 11 form a 2D array.
[0056] In FIG. 5, a first etching mask 151, such as a hard mask 151, is formed on the sacrificial layer 140 and the first LED element 11. The first etching mask 151 can be a layer of hard mask material deposited by any suitable deposition method, such as physical vapor deposition (PVD) or chemical vapor deposition (CVD). Examples of hard mask materials can include nitrides, such as silicon nitride and titanium nitride, and oxides, such as silicon oxide and titanium oxide. In FIG. 5, the hard mask 151 is patterned to include a plurality of first trenches 161 that expose the sacrificial layer 140. The trenches can be formed by lithographic patterning, for example, using a negative mask and single or multiple patterning, followed by pattern transfer to the hard mask 151. The pattern transfer can be achieved, for example, by an anisotropic etching process. The etching process can be plasma-based etching, including, for example, reactive ion etching (RIE).
[0057] The first trenches 161 may be disposed between at least some of the first LED elements 11 and therefore may be covered and protected by the hard mask 151 during subsequent processing of the second LED elements 21 and the third LED elements 31. The placement and dimensions of the first trenches 161 may define the second array of second LED elements 21 and their positions in the resulting matrix.
[0058] 6, a second array of second LED elements 21 is formed in the plurality of first trenches 161. The second LED elements 21 may be configured similarly to that described above with reference to FIGS. 1 and 2, and thus may comprise a layered structure that may be formed by an epitaxy process similar to that used to form the first LED elements 11. Thus, the second array of second LED elements 21, disposed in the first trenches 161, comprises a second n-doped GaN layer 121, a second p-doped GaN layer 123, and a second In layer 124 disposed therebetween. y Ga (1-y) In one example, the second In y Ga(1-y) The thickness of the N layer 122 may be 2 to 3 nm. y Ga (1-y) The N layer 122 may have an indium ratio determined by y being in the range of 0.20 to 0.28. It will be understood that the second LED element 21 may further comprise one or more of the additional layers disclosed in FIG. 2 , such as the AlGaN barrier layer 114 and / or the undoped GaN layer 115.
[0059] 7, the first trenches 161 comprising the second LED elements 21 are filled with a mask material, which may be, for example, the same material as that forming the first mask 151. The first trenches 161 may be filled, for example, in a PVD or CVD process. The hard mask 151 may be further patterned to define a plurality of second trenches 162, for example, by a lithography mask 154 shown in FIG. 7. The definition of the second trenches 162 may be similar to the definition of the first trenches 161 described above, and the resulting etching mask may be referred to as a second etching mask.
[0060] 8, the pattern in the lithography mask 154 has been transferred to the hard mask 151 by processing similar to that for the first trenches 161. The second trenches 162 may be located between at least some of the first and second LED elements 11, 21 and therefore may be covered and protected by the hard mask 151 during subsequent processing of the third LED elements 31. Like the first trenches 161, the placement and dimensions of the second trenches 162 may define the third array of third LED elements 31 and their positions in the resulting matrix.
[0061] 9, a third array of third LED elements 31 is formed in the plurality of second trenches 162 and the stripped lithography mask 154. The third LED elements 31 may be configured similarly to those described above with reference to FIGS. 1, 2, and 6, and thus may comprise a layered structure that may be formed by an epitaxy process similar to that used to form the first LED element 11 and the second LED element 21. Thus, the third LED elements 31 may comprise a third n-doped GaN layer 131, a third p-doped GaN layer 133, and a third In layer disposed therebetween. z Ga (1-z) In one example, a third In z Ga (1-z) The thickness of the N layer 133 may be 2.8 to 3.5 nm. z Ga (1-z) The N layer 133 may have an indium ratio determined by z being in the range of 0.28 to 0.33. It will be understood that the third LED element 31 may further comprise one or more of the additional layers disclosed in FIG. 2 , such as the AlGaN barrier layer 114 and / or the undoped GaN layer 115.
[0062] 10 , a plurality of third trenches 163 are formed between at least some of the first LED element 11, the second LED element 21, and the third LED element 31. The third trenches 163 may be formed in a process similar to the formation of the first trenches 161 and the second trenches 162 in the first mask 151. Thus, the third trenches 163 may be formed in a process including lithography and pattern transfer to the first mask 151. In some examples, the first mask 151 may be used as an etch mask when transferring the pattern for the third trenches 163 to the GaN sacrificial layer 140 between at least some of the LED elements 11, 21, and 31. In FIG. 10 , the third trenches 163 are etched to expose layers underlying the AlN pillars 141. The GaN of the sacrificial layer 140 may be further etched selectivity to the AlN pillars 141 to allow the pillars 141 to be exposed. Thus, the GaN embedding pillar 141 can be at least partially removed to allow LED elements 11, 21, 31 to be finally released from substrate 170. The GaN can be etched, for example, in a plasma-based etching process using a combination of O2 / Cl2 / Ar, which has been shown to be selective to AlN.
[0063] The array of LED elements 11, 21, 31, now supported by GaN portions or islands cut from the GaN sacrificial layer 140, can be attached or bonded to a carrier substrate 180, as shown in FIG. 11 . The carrier substrate 180 can be, for example, a glass wafer 180 and can also be referred to as a stamp that facilitates transfer of the LED elements 11, 21, 31 to a target substrate (not shown). The pillars 141 can provide mechanical support for the LED elements 11, 21, 31 during attachment to the carrier substrate 180 and can therefore be considered vertical tethers supporting the LED elements 11, 21, 31, which may be lattice-mismatched to the underlying substrate 170. Using the vertical tethers 141 can advantageously reduce the complexity of the sacrificial release process of the LED elements 11, 21, 31 from the substrate 170. Reducing mechanical tension can reduce the risk of wafer bowing of the substrate 170 due to mass transfer. The wafer bow can make it difficult to efficiently attach all of the LED elements to the carrier substrate 180, and therefore it is desirable to reduce the wafer bow to increase the yield of the process of transferring the LED elements 11, 21, 31 to the carrier substrate 180.
[0064] The GaN buffer interlayer 140 (and between the nanopillars) can be relatively easy to remove (as shown in FIG. 10) to release the LED elements 11, 21, and 31 from the substrate 170. The result of such a process is shown in FIG. 12, where the GaN interlayer 140 is etched away in an etching process. The etching process can be, for example, a plasma-based process configured to etch GaN with high selectivity to the AlN pillars. This can be achieved, for example, by adding a small amount of oxygen to a Cl-Ar plasma using an inductively coupled plasma reactor at a pressure of 10 mTorr, a DC bias of -150 V, and a power of 500 W with a selectivity of 48:1, as described in Journal of Vacuum Science & Technology A18, 879 (2000), which is incorporated herein by reference.
[0065] 12, the entire matrix 100 of different colored LED elements 11, 21, 31 has now been transferred to a carrier substrate 180 and may be subjected to subsequent processing steps employed in the manufacture of a display device, wherein the LED elements 11, 21, 31 may form part of pixels that reproduce the image to be displayed on the display device. Alternatively, pillars 141 may be held beneath the LED elements 11, 21, 31. Preferably, the pillars 141 may be dimensioned to increase scattering of light from the LED elements 11, 21, 31.
[0066] Referring to FIG. 13, a schematic top view of a matrix 100 is shown, which may be obtained in a manner similar to that outlined above in connection with FIGS. 1-12. In this example, the matrix 100 may comprise a monolithic structure of multiple LED elements of different colors, such as a red LED element 31, a green LED element 21, and a blue LED element 11, fabricated on the same substrate 170. Each of the colors may be arranged in a respective array, such as the first, second, and third arrays described above, to form several RGB pixels to be used in a display device. Thus, each pixel may comprise one or several red, green, and blue LED elements 11, 21, and 31, and LED elements of the same color may form subpixels 10, 20, and 30. The subpixels 10, 20, and 30 may be understood as controllable entities of a single color, or in other words, may be formed from one or several LED elements of the first, second, or third color. 13, as an illustrative and non-limiting example, 5x5 red LED elements 31 may be grouped into a red subpixel 30, 5x5 green LED elements 21 may be grouped into a green subpixel 20, and a single blue LED element 11 forms a blue subpixel. The combination of subpixels 10, 20, 30 in matrix 100 may be selected or varied depending on the brightness difference between the colors and the desired color of the combined light emitted from the pixel. In this example, half of the subpixels in each row of matrix 100 may be red, and green and blue subpixels may occupy 1 / 4 of the subpixels in each row.
[0067] Typically, the electroluminescence or brightness of the blue LED element 11 may be higher than that of the green LED element 21 and the red LED element 31. Therefore, the green LED element 21 and the red LED element 31 may be constructed as quantum dots by the Stranski-Krastanov growth mode during epitaxy or by selective area growth in individual openings or trenches with a diameter or maximum width of less than 4 nm. Lateral confinement of the InGaN layer may improve the density of states for electroluminescence, and therefore such confinement may be achieved by forming the quantum dots using several combined deposition and lithography techniques, such as nanoimprint lithography or UV lithography combined with plasma-enhanced chemical vapor deposition, as previously outlined in connection with FIGS. 1-12.
[0068] Thus, the green and red subpixels 20 and 30 may be formed by a plurality of relatively small second and third LED elements 21 and 31, each having a maximum lateral width of less than 10 nm, such as less than 4 nm. In one example, the second LED element 21, i.e., the green LED element 21 shown in the figure, may have a maximum lateral width of 2 to 3 nm, an indium composition corresponding to y of approximately 0.24, and a thickness of approximately 2.5 nm. The third LED element 31, i.e., the red LED element 31 shown in the figure, may have a maximum lateral width of 2.8 to 3.5 nm, an indium composition corresponding to z of approximately 0.30, and a thickness of approximately 3.1 nm.
[0069] To balance the brightness difference between the LED elements, the blue subpixel 10 may be formed by only a small number of first LED elements 11, such as a single first LED element 11 as shown in this example. The single first LED element 11 may have a maximum lateral width corresponding to the width of the red or green subpixel, which may be within 5 to 25 μm in some examples. In a specific example, the first LED element 11, i.e., the blue LED element 11, may have a maximum lateral width of 15 μm, an indium composition corresponding to x being about 0.42, and a thickness of about 1.75 nm.
[0070] Each of the first, second, and third arrays may be a 2D array in which the respective first LED elements 11, second LED elements 21, and third LED elements 31 may be arranged at regular or irregular intervals. As will be readily understood by those skilled in the art, and as shown in the example of Figure 13, each array may define a series of LED elements or an arrangement of LED elements that may be ordered but not necessarily equidistant. Preferably, the arrays may be configured to interdigitate or interleave with one another, so as to result in a matrix with non-overlapping subpixels according to the example shown in Figure 13.
[0071] FIGS. 14-16 illustrate some embodiments of a matrix that may be configured similarly to any of the previous embodiments shown in FIGS. 1-13. However, as shown in FIGS. 14-16, at least one of the first LED element 11, the second LED element 21, and the third LED element 31 may be formed on a non-planar structure, such as a polyhedron with multiple slant faces. FIGS. 14-16 illustrate an example of a pyramidal structure with three or four triangular sides extending between its base and apex. The pyramidal structure may be formed by an n-doped GaN layer 121 protruding from a sacrificial GaN layer 140. As outlined in connection with FIG. 2, a stacked structure forming the LED elements may be disposed on the surface of the pyramidal structure. Preferably, the n-doped GaN layer 121 of the stacked structure may form the base of the pyramidal structure.
[0072] In Figure 14, an InGaN layer 122 is provided on the surface of a pyramidal structure of n-doped GaN layer 121 and is covered by a p-doped GaN layer 123. Thus, a quantum well may be disposed on the surface of the pyramidal structure. In Figure 15, an InGaN layer 132 is formed at the apex of the pyramidal structure and is covered by a p-doped GaN layer 133. Thus, the subpixel shown in Figure 13 may be formed from pyramids of n-doped GaN layers 121, 131, InGaN layers 122, 132, and p-doped GaN layers 123, 133, each of which may have a quantum well on either its sidewall or its apex.
[0073] 16 shows three examples of LED elements 11, 21, 31 that may be configured similarly to the LED elements outlined with reference to the previous figures, however, some differences and variations are described below.
[0074] First, the apex of the pyramidal structure can be truncated, for example by in situ etching, to improve uniformity. The result is shown in the first and third LED elements 11 and 31 in Figure 16, where the respective InGaN layers 111, 131 extend along the outside of the pyramidal structure but do not meet at the apex.
[0075] Second, as shown in this figure, electrical contact structures 191, 192 may be provided for contacting the LED elements 11, 21, 31 according to any of the above-described embodiments and examples. The electrical contacts may include a top contact 191 for contacting the LED elements 11, 21, 31 from above and a bottom contact 192 for contacting the LED elements 11, 21, 31 from below, thereby providing an electric potential on the quantum confined region formed by the InGaN layer. The top contact 191 may be formed in or on a transparent conductive oxide (TCO) 126, such as indium tin oxide, disposed above the stacked structure of the LED elements 11, 21, 31, and the bottom contact 192 may be provided as a buried interconnect structure disposed to contact the stacked structure from below. The first contact 191 and the second contact 192 may be formed from a metallic material, for example, including one or more of Ti, Al, Cu, Ni, and Au.
[0076] Third, a fourth LED element 41 may be disposed below at least one of the first LED element 11, the second LED element 21, and the third LED element 31. In the example shown in FIG. 16 , the fourth LED element may be disposed below each of the first LED element 11, the second LED element 21, and the third LED element 31 and configured as an optical pump for the above LED elements. The fourth LED element 41 may be configured and processed similarly to the LED elements 11, 21, and 31 described with reference to any of the preceding embodiments, and the composite structures of the first LED element 11, the second LED element 21, and the third LED element 31 and the underlying fourth LED element 41 for optical pumping may be separated from each other by a set of third trenches 163, as described with reference to FIG. 10 .
[0077] Thus, the fourth LED element 41 may include a stacked structure of an n-doped GaN layer 211 and a p-doped GaN layer 214, with an active fourth InGaN layer 212 therebetween. The n-doped GaN layer 211 may be, for example, approximately 20 nm thick. The stacked structure may further include a barrier layer, such as an undoped GaN layer 215, disposed directly adjacent to the fourth InGaN layer 212. The undoped GaN layer 215 may be, for example, approximately 3 nm thick. In this example, the stacked structure of the fourth LED element 41 may include an AlGaN barrier, such as a p-doped AlGaN layer 214, on which the n-doped GaN layers 111, 121, and 131 of the stacked structures of the first LED element 11, the second LED element 21, and the third LED element 31, respectively, may be formed as outlined above. The AlGaN barrier layer 214 may be, for example, approximately 20 nm thick. It will be understood that the AlGaN barrier layer 214 may replace the GaN sacrificial layer 140 for the epitaxial growth of the n-doped GaN layers 111 , 121 , 131 of the first LED element 11 , the second LED element 21 and the third LED element 31 .
[0078] Similar to the InGaN layers of the first LED element 11, the second LED element 21, and the third LED element 31, the fourth In d Ga (1-d) The indium composition and layer thickness of the N layer 212 can be varied to achieve a particular wavelength of emitted light. Preferably, the fourth LED element 41 can be configured to emit light in the UV range and, in some examples, can have an indium composition corresponding to d less than 0.05. Furthermore, in some examples, the layer thickness can be in the range of 1 to 6 nm.
[0079] The inventive concept has been described above primarily with reference to a limited number of examples. However, as will be readily understood by those skilled in the art, other examples beyond those disclosed above are equally possible within the scope of the inventive concept, as defined by the appended claims.
Claims
1. A method for forming a matrix (100) of different colored light emitting diode (LED) elements (11, 21, 31), comprising the steps of: epitaxially growing a first layer (110) on a GaN sacrificial layer (140), said first layer comprising a first n-doped GaN layer (111), a first p-doped GaN layer (113), and a first In layer (114) disposed therebetween; x Ga (1-x) epitaxially growing a silicon nitride layer (112) having a stacked structure of N layers (112), where x is in the range of 0.10 to 0.75; patterning the first layer to form a first array of first LED elements (11) arranged to emit light of a first color; forming a first etching mask (151) that protects the first array and includes a plurality of first trenches (161) that expose the GaN sacrificial layer; epitaxially growing a second array of second LED elements (21) in the plurality of first trenches, the second LED elements being arranged to emit light of a second color and comprising a second n-doped GaN layer (121), a second p-doped GaN layer (123), and a second In layer (124) disposed therebetween; y Ga (1-y) epitaxially growing a silicon nitride film (122) having a stacked structure of N layers (122), where y is in the range of 0.20 to 0.28; forming a second etch mask that protects the second array and includes a plurality of second trenches (162) that expose the GaN sacrificial layer; epitaxially growing a third array of third LED elements (31) in the plurality of second trenches, the third LED elements being arranged to emit light of a third color and comprising a third n-doped GaN layer (131), a third p-doped GaN layer (133), and a third In layer (134) disposed therebetween; z Ga (1-z) N layers (132) having a stacked structure, z being in the range of 0.28 to 0.33; wherein the first array, the second array, and the third array form the matrix.
2. The first In x Ga (1-x) The N layer has a thickness of 0.5 to 3 nm, and the second In y Ga (1-y) The N layer has a thickness of 2 to 3 nm, and the third In z Ga (1-z) The method of claim 1 , wherein the N layer has a thickness of 2.8 to 3.5 nm.
3. 2. The method of claim 1, wherein each of the first LED elements has a maximum lateral width in the range of 0.1 to 25 μm, such as 2 to 5 μm or 5 to 25 μm, each of the second LED elements has a maximum lateral width in the range of 2 to 3 nm, and / or each of the third LED elements has a maximum lateral width in the range of 2.8 to 3.5 nm.
4. The method of claim 1 , wherein the GaN sacrificial layer is n-doped or p-doped.
5. 2. The method of claim 1, wherein the matrix is configured to form a plurality of pixels of a display device, each pixel formed from at least one of the first LED elements and a plurality of the second and third LED elements.
6. The method of claim 1 , wherein the first color is blue, the second color is green, and the third color is red.
7. The first In x Ga (1-x) N layer, the second In y Ga (1-y) N layer and the third In z Ga (1-z) The method of claim 1 , further comprising forming an AlGaN barrier layer (114, 124, 134) abutting both sides of at least one of the N layers.
8. The method of claim 7, further comprising forming an undoped GaN layer (115, 125, 135) abutting at least one of the AlGaN barrier layers.
9. The method of claim 1 , wherein the first etch mask and the second etch mask are hard masks.
10. 2. The method of claim 1, wherein the second etching mask is formed by covering the second array of second LED elements with a mask material and forming the plurality of second trenches in a layer forming the first etching mask.
11. 2. The method of claim 1, wherein the GaN sacrificial layer is disposed on a substrate (170) comprising a layer comprising a plurality of AlN pillars (141), the plurality of AlN pillars being embedded by material of the GaN sacrificial layer.
12. forming a plurality of third trenches (163) between at least some of the first LED element, the second LED element, and the third LED element, the third trenches extending to the layer comprising the plurality of AlN pillars; selectively removing at least a portion of the material of the GaN sacrificial layer between the plurality of AlN pillars; The method of claim 11 further comprising:
13. bonding the first LED element, the second LED element, and the third LED element to a carrier substrate (180); and removing the plurality of AlN pillars to release the first LED element, the second LED element, and the third LED element from the substrate comprising the layer comprising the plurality of AlN pillars; The method of claim 12 further comprising:
14. forming a fourth LED element (41) below at least one of the first LED element, the second LED element, and the third LED element, wherein the fourth LED element is x Ga (1-x) N layer, the second In y Ga (1-y) N layer or third In z Ga (1-z) A fourth In for optically pumping the N layer. d Ga (1-d) Providing and forming an N layer (212) The method of claim 1 further comprising:
15. The indium composition d is less than 0.05, and the fourth In d Ga (1-d) The method of claim 14, wherein the N layer has a thickness of 1 to 6 nm.
Citation Information
Patent Citations
Micro-LED chip with epitaxial growth in selected area and preparation method of Micro-LED chip
CN111864024A
Image display device and manufacturing method therefor
JP2002261335A
METHOD FOR SELECTIVELY GROWING GaN-BASED GROUP III-V COMPOUND SEMICONDUCTOR LAYER, METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING ELEMENT, AND METHOD FOR MANUFACTURING IMAGE DISPLAY DEVICE
JP2005142415A
Method for manufacturing semiconductor devices and semiconductor devices
JP2010518615A
Method of Forming Laterally Distributed LEDs
US20100197060A1