Image pickup element, image pickup device, and method of manufacturing image pickup element

Abstract

The present invention prevents leakage of input light into a charge holding section of an image capture element. A pixel comprises a photoelectric conversion section disposed on a light receiving surface side of a semiconductor substrate, a charge holding section disposed on a side of the semiconductor substrate different from the side of the light receiving surface, and a charge transfer section for transferring charge to the charge holding section. The pixel is formed in a rectangular shape in a view of the light receiving surface. A charge holding section light-blocking film adjoins three sides, including a first side, of the sides of the rectangle in the view of the light receiving surface, and is formed in a band shape parallel to the first side. The charge holding section light-blocking film adjoins a semiconductor region including the charge transfer section in the view of the light receiving surface, and is disposed in the pixel between the photoelectric conversion section and the charge holding section to block input light. A charge transfer section light-blocking film adjoins three sides, including a second side opposite the first side, in the view of the light receiving surface, and is formed in a band shape parallel to the second side. The charge transfer section light-blocking film is disposed in the pixel between the photoelectric conversion section and the charge transfer section to block input light. An end of the charge transfer section light-blocking film is formed in a shape overlapping an end of the charge holding section light-blocking film in the view of the light receiving surface.

Description

[Technical Field]

[0001] The present disclosure relates to an imaging element, an imaging device, and a method for manufacturing an imaging element. [Background technology]

[0002] An image sensor with multiple pixels employs a global shutter system in which all pixels are exposed simultaneously. In this global shutter system, after all pixels are exposed simultaneously, image signals generated by the pixels are read out row by row. Because a time difference occurs between exposure and image signal readout, a charge storage section is provided for each pixel to store charge generated by photoelectric conversion of incident light during the exposure period. Because charge is stored in this charge storage section for a relatively long period, it is necessary to prevent the intrusion of incident light. This is because charge is generated in the charge storage section due to photoelectric conversion of incident light, causing noise to be mixed into the image signal. By providing a light-shielding section between the photoelectric conversion section, which is irradiated with incident light, and the charge storage section to separate them, it is possible to prevent the intrusion of incident light into the charge storage section.

[0003] Meanwhile, in order to accommodate the trend toward smaller pixel sizes accompanying the increased resolution of image sensors, image sensors have been proposed that include pixels in which a photoelectric conversion unit and a charge storage unit are arranged at positions that overlap in the thickness direction of a semiconductor substrate. In these image sensors, a charge transfer unit that transfers charges in the thickness direction of the semiconductor substrate is arranged, and charges generated by the photoelectric conversion unit are stored in the charge storage unit arranged inside the semiconductor substrate. For such image sensors, an image sensor has been proposed that has two strip-shaped light-shielding units arranged inside the semiconductor substrate (see, for example, Patent Document 1).

[0004] In the above-mentioned conventional technology, a strip-shaped light-shielding portion that shields the charge retention portion and a strip-shaped light-shielding portion that shields the charge transfer portion are arranged at different depths in the semiconductor substrate and are arranged alternately when viewed from the light-receiving surface to block incident light. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2019 / 240207 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the above-described conventional technology, the ends of the strip-shaped light-shielding portions that shield the alternately arranged charge storage portions and the strip-shaped light-shielding portions that shield the charge transfer portions are configured to abut each other when viewed from the light receiving surface, which causes a problem that incident light that bypasses the ends of these two strip-shaped light-shielding portions reaches the charge storage portions, causing noise to be mixed into the image signal.

[0007] Therefore, the present disclosure proposes an imaging element, an imaging device, and a method for manufacturing an imaging element that prevent leakage of incident light into the charge storage section of an imaging element that is arranged at a position where the photoelectric conversion section and the charge storage section overlap in the thickness direction of a semiconductor substrate, thereby reducing noise in the image signal. [Means for solving the problem]

[0008] The imaging element according to the present disclosure includes pixels configured in a rectangular shape when viewed from the light receiving surface, the pixels including a photoelectric conversion unit disposed on the light receiving surface side of a semiconductor substrate and performing photoelectric conversion of incident light, a charge holding unit disposed on a side of the semiconductor substrate different from the light receiving surface and holding charges generated by the photoelectric conversion, and a charge transfer unit that transfers the generated charges to the charge holding unit; and semiconductor pixels configured in a strip shape when viewed from the light receiving surface, the strip shape being adjacent to three sides of the rectangle including a first side that is one of the sides of the rectangle and parallel to the first side, the strip shape being adjacent to the three sides of the rectangle when viewed from the light receiving surface and including the charge transfer unit. The imaging element has: a charge retention portion light-shielding film that is adjacent to the body region in the light-receiving surface view, is disposed in the pixel between the photoelectric conversion portion and the charge retention portion, and blocks incident light; and a charge transfer portion light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side in the light-receiving surface view and is configured in a strip shape parallel to the second side, is disposed in the pixel between the photoelectric conversion portion and the charge transfer portion, and blocks incident light, and has an edge that is configured in a shape that overlaps with an edge of the charge retention portion light-shielding film in the light-receiving surface view. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of an imaging element according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of a pixel according to the first embodiment of the present disclosure. [Figure 3] 1 is a cross-sectional view showing a configuration example of a pixel according to a first embodiment of the present disclosure. [Figure 4] 3A and 3B are diagrams illustrating configuration examples of a charge retention section light-shielding film and a charge transfer section light-shielding film according to the first embodiment of the present disclosure. [Figure 5A] 3 is a plan view showing a configuration example of a groove portion according to the first embodiment of the present disclosure. FIG. [Figure 5B] 3 is a cross-sectional view showing an example of the configuration of a groove according to the first embodiment of the present disclosure. FIG. [Figure 6A] 5A to 5C are diagrams illustrating an example of a method for manufacturing a charge storage portion-adjacent void according to the first embodiment of the present disclosure. [Figure 6B] 5A to 5C are diagrams illustrating an example of a method for manufacturing a charge storage portion-adjacent void according to the first embodiment of the present disclosure. [Figure 6C] 5A to 5C are diagrams illustrating an example of a method for manufacturing a charge storage portion-adjacent void according to the first embodiment of the present disclosure. [Figure 6D] 5A to 5C are diagrams illustrating an example of a method for manufacturing a charge storage portion-adjacent void according to the first embodiment of the present disclosure. [Figure 7A] 5A to 5C are diagrams illustrating an example of a method for etching a charge storage portion adjacent gap according to the first embodiment of the present disclosure. [Figure 7B] 5A to 5C are diagrams illustrating an example of a method for etching a charge storage portion adjacent gap according to the first embodiment of the present disclosure. [Figure 7C] 5A to 5C are diagrams illustrating an example of a method for etching a charge storage portion adjacent gap according to the first embodiment of the present disclosure. [Figure 8A] 6A to 6C are diagrams illustrating another example of a method for etching a charge storage portion adjacent gap according to the first embodiment of the present disclosure. [Figure 8B] 6A to 6C are diagrams illustrating another example of a method for etching a charge storage portion adjacent gap according to the first embodiment of the present disclosure. [Figure 9A] 5A to 5C are diagrams illustrating an example of a method for forming a gap adjacent to a charge storage section and a gap adjacent to a charge transfer section according to the first embodiment of the present disclosure. [Figure 9B] 5A to 5C are diagrams illustrating an example of a method for forming a gap adjacent to a charge storage section and a gap adjacent to a charge transfer section according to the first embodiment of the present disclosure. [Figure 9C] 5A to 5C are diagrams illustrating an example of a method for forming a gap adjacent to a charge storage section and a gap adjacent to a charge transfer section according to the first embodiment of the present disclosure. [Figure 9D] 5A to 5C are diagrams illustrating an example of a method for forming a gap adjacent to a charge storage section and a gap adjacent to a charge transfer section according to the first embodiment of the present disclosure. [Figure 9E] 5A to 5C are diagrams illustrating an example of a method for forming a gap adjacent to a charge storage section and a gap adjacent to a charge transfer section according to the first embodiment of the present disclosure. [Figure 10A] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10B] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10C]3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10D] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10E] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10F] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10G] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10H] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10I] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 10J] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 11] FIG. 10 is a plan view showing an example of the configuration of a groove according to a second embodiment of the present disclosure. [Figure 12] FIG. 10 is a plan view showing an example of the configuration of a groove according to a third embodiment of the present disclosure. [Figure 13] FIG. 11 is a plan view showing a configuration example of a groove according to a modified example of the third embodiment of the present disclosure. [Figure 14] FIG. 10 is a cross-sectional view showing a configuration example of a pixel according to a fourth embodiment of the present disclosure. [Figure 15] FIG. 10 is a cross-sectional view showing a configuration example of a pixel according to a fifth embodiment of the present disclosure. [Figure 16] FIG. 10 is a plan view showing a configuration example of a groove according to a modified example of the embodiment of the present disclosure. [Figure 17] FIG. 10 is a plan view illustrating a configuration example of a first charge holding unit according to a modified example of the embodiment of the present disclosure. [Figure 18] FIG. 1 is a diagram illustrating an example of the configuration of an imaging device to which the technology according to the present disclosure can be applied. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be given in the following order. In the following embodiments, the same components are designated by the same reference numerals, and redundant description will be omitted. 1. First embodiment 2. Second embodiment 3. Third embodiment 4. Fourth Embodiment 5. Fifth Embodiment 6. Variations 7. Example of imaging device configuration

[0011] (1. First embodiment) [Image sensor configuration] 1 is a diagram illustrating an example configuration of an image sensor according to an embodiment of the present disclosure. The figure is a block diagram illustrating an example configuration of an image sensor 1. The image sensor 1 is a semiconductor device that generates image data of a subject. The image sensor 1 includes a pixel array unit 10, a vertical drive unit 20, a column signal processing unit 30, and a control unit 40.

[0012] The pixel array unit 10 is configured by arranging a plurality of pixels 100. The pixel array unit 10 in the figure represents an example in which the plurality of pixels 100 are arranged in a two-dimensional matrix. Here, the pixel 100 includes a photoelectric conversion unit that performs photoelectric conversion of incident light and generates an image signal of a subject based on the incident light. For example, a photodiode can be used as this photoelectric conversion unit. Signal lines 11 and 12 are wired to each pixel 100. The pixel 100 generates an image signal under the control of a control signal transmitted by the signal line 11 and outputs the generated image signal via the signal line 12. The signal line 11 is arranged in each row of the two-dimensional matrix and is wired in common to the plurality of pixels 100 arranged in one row. The signal line 12 is arranged in each column of the two-dimensional matrix and is wired in common to the plurality of pixels 100 arranged in one column.

[0013] The vertical drive unit 20 generates control signals for the above-mentioned pixels 100. The vertical drive unit 20 in the figure generates control signals for each row of the two-dimensional matrix of the pixel array unit 10 and outputs them sequentially via signal lines 11.

[0014] The column signal processing unit 30 processes image signals generated by the pixels 100. The column signal processing unit 30 in the same figure simultaneously processes image signals from multiple pixels 100 arranged in one row of the pixel array unit 10, which are transmitted via signal lines 12. This processing can include, for example, analog-to-digital conversion, which converts analog image signals generated by the pixels 100 into digital image signals, and correlated double sampling (CDS), which removes offset errors in the image signals. The processed image signals are output to a circuit or the like external to the image sensor 1.

[0015] The control unit 40 controls the vertical drive unit 20 and the column signal processing unit 30. The control unit 40 in the figure outputs control signals via signal lines 41 and 42 to control the vertical drive unit 20 and the column signal processing unit 30. The image sensor 1 in the figure is an example of an image sensor as defined in the claims. The pixel array unit 10 in the figure can also be considered as an example of an image sensor as defined in the claims. In this case, the column signal processing unit 30 in the figure corresponds to an example of a processing circuit as defined in the claims, and the image sensor 1 in the figure corresponds to an example of an imaging device as defined in the claims.

[0016] [Pixel configuration] 2 is a diagram showing an example of the configuration of a pixel according to the first embodiment of the present disclosure. The diagram is a circuit diagram showing an example of the configuration of a pixel 100. The pixel 100 in the diagram includes a photoelectric conversion unit 101, a first charge transfer unit 102, an overflow gate 103, a second charge transfer unit 104, a third charge transfer unit 105, a first charge holding unit 107, and a second charge holding unit 108. The image sensor 1 further includes a reset unit 106 and MOS transistors 111 and 112. The MOS transistors 111 and 112 form an image signal generation unit 110.

[0017] N-channel MOS transistors can be used for the first charge transfer unit 102, overflow gate 103, second charge transfer unit 104, third charge transfer unit 105, reset unit 106, and MOS transistors 111 and 112. The signal lines 11 connected to the pixel 100 include signal lines TRZ, OFG, TRX, TRY, RST, and SEL. A power supply line Vdd for supplying power is also wired to the pixel 100.

[0018] The anode of the photoelectric conversion unit 101 is grounded, and the cathode is connected to the source of the first charge transfer unit 102. The drain of the first charge transfer unit 102 is connected to the source of the second charge transfer unit 104 and the source of the overflow gate 103. The drain of the second charge transfer unit 104 is connected to one end of the first charge retention unit 107 and the source of the third charge transfer unit 105. The other end of the first charge retention unit 107 is grounded. The drain of the third charge transfer unit 105 is connected to the source of the reset unit 106, the gate of the MOS transistor 111, and one end of the second charge retention unit 108. The other end of the second charge retention unit 108 is grounded. The source of the MOS transistor 111 is connected to the drain of the MOS transistor 112, and the source of the MOS transistor 112 is connected to the signal line 12.

[0019] The gates of the first charge transfer unit 102, overflow gate 103, second charge transfer unit 104, and third charge transfer unit 105 are wired to signal lines TRZ, OFG, TRX, and TRY, respectively. The gates of the reset unit 106 and MOS transistor 112 are connected to signal lines RST and SEL, respectively. The drains of the overflow gate 103, reset unit 106, and MOS transistor 111 are connected to the power supply line Vdd.

[0020] The photoelectric conversion unit 101 is an element that performs photoelectric conversion of incident light, and generates and holds electric charges through photoelectric conversion.

[0021] The first charge transfer unit 102 is an element that transfers charges held in the photoelectric conversion unit 101 to the second charge transfer unit 104. The first charge transfer unit 102 is controlled by a control signal transmitted by a signal line TRZ. An overflow path for passing charges overflowing from the photoelectric conversion unit 101 is formed directly below the gate of the first charge transfer unit 102. As will be described later, the first charge transfer unit 102 is composed of a vertical transistor that transfers charges in the thickness direction of a semiconductor substrate.

[0022] The overflow gate 103 is an element that drains charge that has overflowed from the photoelectric conversion unit 101. An overflow path that passes charge that has overflowed from the photoelectric conversion unit 101 is formed directly below the gate of this overflow gate 103, and in combination with the overflow path of the first charge transfer unit 102, the overflow gate 103 drains the charge that has overflowed from the photoelectric conversion unit 101 to the power supply line Vdd. The overflow gate 103 also resets the photoelectric conversion unit 101. The overflow gate 103 is controlled by a control signal transmitted by a signal line OFG.

[0023] The second charge transfer unit 104 is an element that transfers charges. The second charge transfer unit 104 transfers the charges transferred by the first charge transfer unit 102 to the first charge holding unit 107. The second charge transfer unit 104 is controlled by a control signal transmitted through a signal line TRX.

[0024] The first charge holding unit 107 is an element that holds electric charges. The first charge holding unit 107 is configured by a semiconductor region formed on a semiconductor substrate, and holds the electric charges transferred by the second charge transfer unit 104. The potential of the first charge holding unit 107 is controlled by the gate of the second charge transfer unit 104 and the gate of the third charge transfer unit 105.

[0025] The third charge transfer unit 105 is an element that transfers the charges held in the first charge holding unit 107 to the second charge holding unit 108. The third charge transfer unit 105 is controlled by a control signal transmitted through a signal line TRY.

[0026] The second charge holding portion 108 is an element that holds electric charges and can be configured by a semiconductor region formed on a semiconductor substrate.

[0027] The reset unit 106 resets the second charge holding unit 108. The reset unit 106 is controlled by a control signal transmitted through a signal line RST.

[0028] The MOS transistor 111 is an element that generates an image signal according to the charge held in the second charge holding unit 108. The generated image signal is output to a source terminal.

[0029] The MOS transistor 112 is an element that outputs the image signal generated by the MOS transistor 111 to the signal line 12. The MOS transistor 112 is controlled by a control signal transmitted through a signal line SEL.

[0030] The procedure for generating an image signal in the pixel 100 in the figure will be described below. First, the overflow gate 103 and the first charge transfer unit 102 are made conductive to discharge the charge held in the photoelectric conversion unit 101 to the power supply line Vdd, resetting the photoelectric conversion unit 101. Resetting the photoelectric conversion unit 101 in this way starts an exposure period.

[0031] After a predetermined exposure period has elapsed, the reset unit 106 and the third charge transfer unit 105 are made conductive to discharge the charges in the first charge holding unit 107 and the second charge holding unit 108 to the power supply line Vdd, and reset the first charge holding unit 107 and the second charge holding unit 108. After this reset, the first charge transfer unit 102 and the second charge transfer unit 104 are made conductive to transfer the charges held in the photoelectric conversion unit 101 during the exposure period to the first charge holding unit 107.

[0032] Next, the third charge transfer unit 105 is made conductive to transfer the charge held in the first charge holding unit 107 to the second charge holding unit 108, where it is held. This causes the MOS transistor 111 to generate an image signal corresponding to the charge held in the second charge holding unit 108. The MOS transistor 112 is made conductive, whereby the image signal is output to the signal line 12. Through the above procedure, an image signal can be generated.

[0033] Of the above-mentioned procedures, the procedures from resetting the photoelectric conversion unit 101 to transferring the charges held in the photoelectric conversion unit 101 to the first charge holding unit 107 are performed simultaneously in the pixels 100 arranged in the pixel array unit 10. The subsequent procedures up to outputting an image signal are performed sequentially for each row of the pixels 100 arranged in the pixel array unit 10. This makes it possible to realize a global shutter. In this way, the first charge holding unit 107 holds the charges generated by photoelectric conversion during the exposure period from the end of the exposure period to the generation of an image signal.

[0034] [Pixel configuration] 3 is a cross-sectional view showing an example of the configuration of a pixel according to the first embodiment of the present disclosure. The figure is a cross-sectional view showing an example of the configuration of a pixel 100 arranged in the pixel array section 10. The pixel 100 in the figure includes a semiconductor substrate 120, a wiring region 130, a charge retention section light-shielding film 140, a charge transfer section light-shielding film 150, a planarization film 171, a color filter 172, and an on-chip lens 173.

[0035] The semiconductor substrate 120 is a semiconductor substrate on which the diffusion regions of the elements of the pixel 100 are formed. This semiconductor substrate 120 can be made of, for example, silicon (Si). The diffusion regions of the elements of the pixel 100 are formed in well regions formed in the semiconductor substrate 120. For convenience, the semiconductor substrate 120 in the figure is assumed to constitute a p-type well region. The diffusion regions of the elements can be formed by disposing an n-type or p-type semiconductor region in this p-type well region. The open rectangles on the semiconductor substrate 120 in the figure represent semiconductor regions. The figure illustrates a photoelectric conversion unit 101, a first charge transfer unit 102, a second charge transfer unit 104, and a first charge retention unit 107. An insulating film 128 is disposed on the front side of the semiconductor substrate 120. On the other hand, an insulating film 129 is disposed on the back side of the semiconductor substrate 120. The semiconductor substrate 120 has a surface with a (111) plane orientation perpendicular to the thickness direction. For example, the front surface of the semiconductor substrate 120 corresponds to the plane of plane orientation (111).

[0036] The photoelectric conversion unit 101 is composed of an n-type semiconductor region 121. Specifically, the photoelectric conversion unit 101 corresponds to a photodiode composed of a pn junction at the interface between the n-type semiconductor region 121 and a surrounding p-type well region. Electrons of the charges generated by photoelectric conversion in the photoelectric conversion unit 101 are held in the n-type semiconductor region 121. As shown in the figure, the photoelectric conversion unit 101 is disposed near the rear surface of the semiconductor substrate 120.

[0037] The first charge transfer unit 102 is a MOS transistor composed of an n-type semiconductor region 121, an n-type semiconductor region 122, and a gate electrode 123. The gate electrode 123 is composed of an electrode portion disposed on the front surface of the semiconductor substrate 120 and a columnar portion disposed below the electrode. The n-type semiconductor region 121 and the n-type semiconductor region 122 correspond to a source region and a drain region, respectively. The gate electrode 123 having the columnar portion can transfer charges from the semiconductor region 121 of the photoelectric conversion unit 101 disposed on the back side of the semiconductor substrate 120 to the semiconductor region 122 on the front side of the semiconductor substrate 120. Specifically, by applying a positive gate voltage to the gate electrode 123, a channel is formed in the semiconductor substrate 120 adjacent to the gate electrode 123, and charges move along this channel. In this way, the first charge transfer unit 102 constitutes a vertical transistor. The insulating film 128 between the gate electrode 123 and the semiconductor substrate 120 corresponds to a gate insulating film. Although not shown for convenience, a gate insulating film is also disposed around the pillar-shaped portion of the gate electrode 123 .

[0038] The second charge transfer unit 104 is composed of an n-type semiconductor region 122, an n-type semiconductor region 124, and a gate electrode 125. By applying a positive gate voltage to the gate electrode 125, a channel is formed between the n-type semiconductor region 122 and the n-type semiconductor region 124, and charges are transferred. Note that the insulating film 128 between the gate electrode 125 and the semiconductor substrate 120 corresponds to the gate insulating film.

[0039] The first charge holding unit 107 is composed of an n-type semiconductor region 124. This n-type semiconductor region 124 is a semiconductor region that also serves as the drain region of the second charge transfer unit 104 described above. The gate electrode 125 is configured in a shape that covers the front surface side of the n-type semiconductor region 124. When a positive gate voltage is applied to this gate electrode 125, the potential of the n-type semiconductor region 124 that constitutes the first charge holding unit 107 can be deepened. This allows all of the charges held in the n-type semiconductor region 121 of the photoelectric conversion unit 101 to be transferred to the first charge holding unit 107.

[0040] The wiring region 130 is a region where wiring that transmits signals and the like to elements of the pixel 100 is arranged. This wiring region 130 is arranged on the front surface side of the semiconductor substrate 120. The wiring region 130 includes wiring 132 and an insulating layer 131. The wiring 132 transmits signals and the like to the elements. The wiring 132 can be made of a metal such as copper (Cu). The insulating layer 131 insulates the wiring 132. This insulating layer 131 can be made of an insulating material such as silicon oxide (SiO2).

[0041] The planarization film 171 is a film that planarizes the back surface side of the semiconductor substrate 120. This planarization film 171 can be made of, for example, SiO2.

[0042] The color filter 172 is an optical filter that irradiates incident light of a predetermined wavelength from among the incident light. As this color filter 172, color filters 172 that transmit red light, green light, and blue light can be used.

[0043] The on-chip lens 173 is a lens that condenses incident light onto the photoelectric conversion unit 101.

[0044] In this way, in the pixel 100, incident light is irradiated onto the photoelectric conversion unit 101 from the back surface side of the semiconductor substrate 120, and an image signal is generated. This type of imaging element is called a back-illuminated imaging element. The back surface of the semiconductor substrate 120 corresponds to the light-receiving surface that receives the incident light. As will be described later, the pixel 100 is configured to have a rectangular shape when viewed from the light-receiving surface.

[0045] The charge retention portion light-shielding film 140 is disposed between the photoelectric conversion portion 101 and the first charge retention portion 107 to block incident light. This charge retention portion light-shielding film 140 blocks light that passes through the photoelectric conversion portion 101 and enters the first charge retention portion 107. The charge retention portion light-shielding film 140 is formed in a strip shape that covers the first charge retention portion 107 when viewed from the light-receiving surface. The direction of this strip is perpendicular to the plane of the paper in the figure. By disposing the strip-shaped charge retention portion light-shielding film 140, strip-shaped regions 127 of the semiconductor substrate 120 are formed adjacent to each other when viewed from the light-receiving surface. The first charge transfer portion 102 is disposed in this region 127.

[0046] The charge storage portion light-shielding film 140 can be formed by disposing a light-shielding member in a charge storage portion-adjacent gap 141, which is a strip-shaped gap formed in the semiconductor substrate 120. The light-shielding member can be made of a material that reflects incident light, such as aluminum (Al). The light-shielding member can also be made of a material that absorbs incident light, such as tungsten (W). As shown in the figure, the charge storage portion light-shielding film 140 can be disposed in the charge storage portion-adjacent gap 141 that is formed across two adjacent pixels 100.

[0047] The charge transfer section light-shielding film 150 is disposed between the photoelectric conversion section 101 and the first charge transfer section 102 to block incident light. This charge transfer section light-shielding film 150 blocks light that is incident on the first charge holding section 107 through the above-mentioned region 127. The charge transfer section light-shielding film 150 is formed in a band shape that covers the region 127 when viewed from the light-receiving surface. The direction of this band is the same as the direction of the charge holding section light-shielding film 140. The charge transfer section light-shielding film 150 is configured so that its edges overlap with the charge holding section light-shielding film 140. In the figure, this overlapping portion is depicted as an overlapping portion 301.

[0048] The charge transfer section light-shielding film 150 can be formed by disposing a light-shielding member in a charge transfer section adjacent gap 151, which is a strip-shaped gap formed in the semiconductor substrate 120. The same light-shielding member as the charge retention section light-shielding film 140 can be used for this light-shielding member. Similar to the charge retention section adjacent gap 141, the charge transfer section light-shielding film 150 can be disposed in the charge transfer section adjacent gap 151 formed across two adjacent pixels 100.

[0049] The charge retention section light-shielding film 140 and the charge transfer section light-shielding film 150 can be made of a material that reflects incident light. In this case, the incident light is reflected by the charge retention section light-shielding film 140 and the charge transfer section light-shielding film 150 toward the photoelectric conversion section 101, thereby improving the sensitivity of the pixel 100. The charge retention section light-shielding film 140 and the charge transfer section light-shielding film 150 can also be made of a material that absorbs incident light. In this case, incident light that has passed through the photoelectric conversion section 101 is absorbed by the charge retention section light-shielding film 140 and the charge transfer section light-shielding film 150, thereby reducing light that enters the first charge retention section 107. This makes it possible to reduce noise in the image signal. Alternatively, the charge retention section light-shielding film 140 can be made of a material that absorbs incident light, and the charge transfer section light-shielding film 150 can be made of a material that reflects incident light. In this case, incident light can be reflected by charge transfer section light-shielding film 150 arranged closer to the light-receiving surface, and can be absorbed by charge storage section light-shielding film 140 arranged near first charge storage section 107. This improves the sensitivity of pixel 100 and reduces noise in the image signal.

[0050] Light-shielding walls that block incident light can be disposed on the semiconductor substrate 120 at the boundary of the pixel 100. Light-shielding walls 146 and 156 are shown in the figure. The light-shielding wall 146 is a light-shielding wall that is configured to a depth that abuts the charge storage portion light-shielding film 140. This light-shielding wall 146 is disposed in a groove 143 formed at the boundary of the pixel 100. This groove 143 is a groove that is configured to a depth that reaches from the back surface side of the semiconductor substrate 120 to the charge storage portion-adjacent void 141. The light-shielding wall 146 can be formed by disposing a light-shielding member in this groove 143.

[0051] The light-shielding wall 156 is a light-shielding wall that is configured to a depth that makes contact with the charge transfer unit light-shielding film 150. This light-shielding wall 156 is disposed in a groove 153 formed at the boundary of the pixel 100. This groove 153 is a groove that is configured to a depth that reaches from the back surface side of the semiconductor substrate 120 to the charge transfer unit adjacent gap 151. By disposing a light-shielding member in this groove 153, the light-shielding wall 156 can be formed.

[0052] As will be described later, light-shielding walls 145 to 147 having a depth that makes contact with the charge retention portion light-shielding film 140 and light-shielding walls 155 to 157 having a depth that makes contact with the charge transfer portion light-shielding film 150 are arranged on the semiconductor substrate 120 at the boundary of the pixels 100. These light-shielding walls 145 to 147 and light-shielding walls 155 to 157 can block incident light that is obliquely incident from adjacent pixels 100. Furthermore, the charge retention portion light-shielding film 140 and the charge transfer portion light-shielding film 150, which are arranged at different depths and have shapes that overlap when viewed from the light-receiving surface, can block light from the first charge retention portion 107.

[0053] [Configuration of the charge retention section light-shielding film and the charge transfer section light-shielding film] FIG. 4 is a diagram showing an example of the configuration of the charge retention section light-shielding film and the charge transfer section light-shielding film according to the first embodiment of the present disclosure. This figure is a plan view of a pixel 100 as viewed from the rear surface side of a semiconductor substrate 120. In this figure, the outer solid-line rectangle represents the pixel 100. The inner solid-line rectangle represents the gate electrode 123 of the first charge transfer section 102. The dashed-line rectangle represents the semiconductor region 121. The dotted-line rectangle represents the semiconductor region 124. The solid-line hatched region represents the charge retention section light-shielding film 140. The dashed-line hatched region represents the charge transfer section light-shielding film 150. Note that FIG. 3 corresponds to a cross-sectional view taken along line a-a' in FIG.

[0054] The charge retention portion light-shielding film 140 and the charge transfer portion light-shielding film 150 are configured in shapes adjacent to three sides of the rectangular pixel 100. In the figure, the charge retention portion light-shielding film 140 is adjacent to three sides of the pixel 100 including the upper side, and the charge transfer portion light-shielding film 150 is adjacent to three sides of the pixel 100 including the lower side. If the upper side and lower side are referred to as a first side 331 and a second side 332, respectively, the first side 331 and the second side 332 correspond to sides facing each other in the rectangular pixel 100. The charge retention portion light-shielding film 140 is configured in a strip shape parallel to the first side 331, and the charge transfer portion light-shielding film 150 is configured in a strip shape parallel to the second side 332.

[0055] Light-shielding walls 145 to 147 and light-shielding walls 155 to 157 are arranged on the boundary of the pixel 100. The light-shielding walls 145 to 147 are arranged on the side of the pixel 100 where the charge retention portion light-shielding film 140 is arranged, and are configured to a depth that reaches the charge retention portion light-shielding film 140 from the back surface side of the semiconductor substrate 120. The light-shielding wall 146 is arranged on a first side 331 of the boundary of the pixel 100, and the light-shielding walls 145 and 147 are each arranged on a side adjacent to the first side 331. The light-shielding walls 155 to 157 are arranged on the side of the pixel 100 where the charge transfer portion light-shielding film 150 is arranged, and are configured to a depth that reaches the charge transfer portion light-shielding film 150 from the back surface side of the semiconductor substrate 120. The light-shielding wall 156 is arranged on a second side 332 of the boundary of the pixel 100, and the light-shielding walls 155 and 157 are each arranged on a side adjacent to the second side 332. The gate electrode 125 of the first charge transfer section 102 in the figure can be disposed close to the second side 332 .

[0056] The light-shielding walls 145 to 147 and the light-shielding walls 155 to 157 are arranged in grooves formed at the boundaries of the pixels 100. The two-dot chain lines in the figure represent the grooves. The light-shielding walls 145 to 147 are arranged in the grooves 142 to 144, respectively. The light-shielding walls 155 to 157 are arranged in the grooves 152 to 154, respectively. The light-shielding walls 145 to 147 are configured as continuous grooves, and the light-shielding walls 155 to 157 are also configured as continuous grooves. As a result, the light-shielding walls 145 to 147 are configured as continuous wall shapes, and the light-shielding walls 155 to 157 are also configured as continuous wall shapes. Furthermore, on the back surface side of the semiconductor substrate 120, the grooves 142 and 154 are configured as continuous grooves, and the grooves 144 and 152 are also configured as continuous grooves. On the other hand, the grooves 142 to 144 and the grooves 152 to 154 have different depths from the rear surface side of the semiconductor substrate 120. In this way, the pixel 100 has a shape surrounded by grooves having steps.

[0057] As shown in the figure, the semiconductor region 124 of the first charge retention unit 107 can be arranged in a region excluding the gate electrode 123 of the first charge transfer unit 102. As shown in the figure, the charge retention unit light-shielding film 140 and the charge transfer unit light-shielding film 150 are configured in a strip shape and are arranged alternately so that the vicinity of their respective ends overlap. This makes it possible to shield the entire surface of the pixel 100 from light when viewed from the light receiving surface. Therefore, as described above, the first charge retention unit 107 can be arranged in a wide range excluding the gate electrode 123.

[0058] The groove 142 is an example of a first charge retention portion adjacent groove as set forth in the claims. The light-shielding wall 145 is an example of a first charge retention portion adjacent light-shielding wall as set forth in the claims. The groove 144 is an example of a second charge retention portion adjacent groove as set forth in the claims. The light-shielding wall 147 is an example of a second charge retention portion adjacent light-shielding wall as set forth in the claims. The groove 143 is an example of a third charge retention portion adjacent groove as set forth in the claims. The light-shielding wall 146 is an example of a third charge retention portion adjacent light-shielding wall as set forth in the claims. The groove 152 is an example of a first charge transfer portion adjacent groove as set forth in the claims. The light-shielding wall 155 is an example of a first charge transfer portion adjacent light-shielding wall as set forth in the claims. The groove 154 is an example of a second charge transfer portion adjacent groove as set forth in the claims. The light-shielding wall 157 is an example of a second charge transfer portion adjacent light-shielding wall as set forth in the claims. The groove 153 is an example of a third charge transfer unit adjacent groove as set forth in the claims. The light-shielding wall 156 is an example of a third charge transfer unit adjacent light-shielding wall as set forth in the claims.

[0059] [Groove configuration] FIG. 5A is a plan view showing an example of the configuration of grooves according to the first embodiment of the present disclosure. This figure illustrates an example of the configuration of grooves 142 to 144 and grooves 152 to 154. Similar to FIG. 4, this figure is a plan view of a pixel 100 viewed from the back surface side of the semiconductor substrate 120, and is a simplified illustration of the pixel 100. The grooves 142 to 144 and grooves 152 to 154 can be configured to have a common shape in adjacent pixels 100. This figure illustrates an example in which the grooves 142 to 144 and grooves 152 to 154 are configured to have a common shape in two vertically adjacent pixels 100. The groove 143 is common to the upper and lower pixels 100. The grooves 142 and 144 are configured to have a connected shape in the upper and lower pixels 100. The grooves 152 to 154 can also be configured to have a similar shape to the grooves 142 to 144.

[0060] FIG. 5B is a cross-sectional view showing an example of the configuration of a trench according to the first embodiment of the present disclosure. This figure is a cross-sectional view taken along line b-b' in FIG. 5A and illustrates an example of the configuration of trenches 142 and 152, the charge retention unit-adjacent void 141, and the charge transfer unit-adjacent void 151. The bottom of trench 142 is connected to charge retention unit-adjacent void 141. The bottom of trench 152 is connected to charge transfer unit-adjacent void 151. The charge retention unit-adjacent void 141 can be formed by etching the interior of semiconductor substrate 120 in the direction of the strip of charge retention unit light-shielding film 140, starting from the bottom of trench 142. Similarly, the charge transfer unit-adjacent void 151 can be formed by etching the interior of semiconductor substrate 120 in the direction of the strip of charge transfer unit light-shielding film 150, starting from the bottom of trench 152.

[0061] [Method of manufacturing the gap adjacent to the charge storage portion] 6A to 6D are diagrams illustrating an example of a method for manufacturing the charge retention portion adjacent gap according to the first embodiment of the present disclosure. 6A to 6D are diagrams illustrating an example of a manufacturing process of the charge retention portion light-shielding film 140.

[0062] First, the back surface of the semiconductor substrate 120 is etched to form the grooves 142 (FIG. 6A). This can be done, for example, by placing a hard mask having openings in the areas where the grooves 142 are to be formed on the back surface of the semiconductor substrate 120 and then performing dry etching. At this time, the grooves 142 are formed in the crystal orientation of the semiconductor substrate 120. <112> In FIG. 6A, the direction perpendicular to the paper surface is the crystal orientation. <112> The direction is along the line.

[0063] Next, an insulating film 401 is disposed on the back surface side of the semiconductor substrate 120 including the groove portion 142 (FIG. 6B). For this insulating film 401, a silicon nitride (SiN) or SiO2 film can be used.

[0064] Next, the insulating film 401 at the bottom of the groove 142 is removed, and the semiconductor substrate 120 at the bottom of the groove 142 is etched to deepen the groove 142 (FIG. 6C). This can be done by etch-back using dry etching. This process allows the surface of the semiconductor substrate 120 to be exposed near the bottom of the groove 142.

[0065] Next, the insulating film 401 is used as a mask to etch the bottom of the groove 142 (FIG. 6D). This etching can be performed by wet etching using a chemical solution. The chemical solution used for this wet etching has an etching rate that varies depending on the crystal orientation of the semiconductor substrate 120. Specifically, <110> The etching rate in the direction of the crystal orientation <111> A chemical solution that is higher than the direction of the crystal orientation is used. For example, potassium hydroxide (KOH), sodium hydroxide (NaOH), cesium hydroxide (CsOH), hydrazine (NH), and ammonium hydroxide (NHOH) can be used as this chemical solution. Also, organic solutions such as ethylenediaminepyrocatechol solution (EDP) and tetramethylammonium hydroxide (TMAH) can be used. As shown in Figure 6D, <110> The etching proceeds in the direction of the crystal orientation, and the charge storage portion adjacent gap 141 can be formed. <112> By configuring the wall surface of the groove portion 142 in the direction along the crystal orientation, <110> The upper surface of the charge storage portion adjacent gap 141 can be etched in the direction of the arrow. 311 and bottom 312 The surface has a (111) orientation and is hardly etched.

[0066] The above steps can form the charge storage section adjacent gap 141. The charge transfer section adjacent gap 151 can also be formed by the same steps.

[0067] [Etching of the gap adjacent to the charge storage area] 7A to 7C are diagrams illustrating an example of a method for etching a charge retention member-adjacent void 141 according to the first embodiment of the present disclosure. Figures 7A to 7C are diagrams illustrating a method for etching a charge retention member-adjacent void 141, and illustrate a trench 142 and the like as viewed from the back surface side of a semiconductor substrate 120.

[0068] 7A, a groove 142 is formed on the rear surface side of the semiconductor substrate 120. As shown in the figure, the horizontal direction of the paper surface corresponds to the crystal orientation. <110> The vertical direction of the paper is the crystal orientation. <112> As described above, the groove 142 is in the direction of the crystal orientation <112> In the same figure, a groove 143 is shown as a comparative example. The groove 143 is formed in a direction perpendicular to the groove 142, and the crystal orientation <110> It is formed in a direction along the line.

[0069] In FIG. 7B, wet etching is started. The formation of the charge storage member adjacent void 141 begins at the bottom of the groove 142. As described above, the etching is performed in accordance with the crystal orientation. <110> In the initial stage of etching, the semiconductor substrate 120 is etched into a triangular shape with a protruding center as shown in the figure. The white arrow in the figure indicates the direction in which etching progresses. On the etched surface corresponding to the side extending from the center of this triangle to the end of the groove 142, a surface of plane orientation (111) appears due to etching. On the other hand, <112> Since etching is hardly performed in this direction, etching of the bottom of the groove 143 does not progress.

[0070] In FIG. 7C, etching of the bottom of the groove 142 progresses further, and the next plane of the crystal orientation (111) appears on the etched surface. <112> By configuring the grooves 142 in a direction along the grooves 142, the semiconductor substrate 120 can be etched in a direction perpendicular to the grooves 142.

[0071] 8A and 8B are diagrams illustrating another example of a method for etching a charge storage portion-adjacent void according to the first embodiment of the present disclosure. Figures 8A and 8B are diagrams illustrating etching of a charge storage portion-adjacent void 141 when using grooves 142 and 144. For convenience, grooves 142 and 144 are depicted as having the same length.

[0072] As shown in FIG. 8A, when the grooves 142 and 144 arranged side by side are etched, etching proceeds simultaneously in the grooves 142 and 144, forming triangular shaped charge storage unit adjacent voids 141. When the etching proceeds and the central portions of the triangles join together, the etching proceeds in a direction parallel to the crystal orientation. <112> The black arrow in the figure indicates the direction in which etching progresses. <112> Etching in the direction of arrow A progresses to the position indicated by the dashed line in the figure, thereby forming a strip-shaped void 141 adjacent to the charge storage portion.

[0073] 8B, arranging the groove 143 between the adjacently arranged grooves 142 and 144 can accelerate etching of the triangular shaped charge storage member-adjacent void 141. By arranging the groove 143, even when the grooves 142 and 144 are spaced apart, the time required to form the strip-shaped charge storage member-adjacent void 141 can be reduced.

[0074] 9A to 9E are diagrams illustrating an example of a method for forming a charge retention unit adjacent gap and a charge transfer unit adjacent gap according to the first embodiment of the present disclosure. 9A to 9E are diagrams illustrating a method for forming a charge retention unit adjacent gap 141 and a charge transfer unit adjacent gap 151.

[0075] 9A, grooves 142 to 144 and grooves 152 to 154 are formed. The grooves 142, 144, 152, and 154 are formed in the crystal orientation <112> The grooves 143 and 153 are formed in the direction of the crystal orientation. <110> It is formed in the direction of.

[0076] 9B, wet etching is started. Triangular shaped voids 141 adjacent to the charge storage unit are formed on the longitudinal faces of the grooves 142 and 144. Triangular shaped voids 151 adjacent to the charge transfer unit are also formed on the longitudinal faces of the grooves 152 and 154.

[0077] In FIG. 9C, etching progresses, and two triangular shaped air gaps 141 adjacent to the charge storage unit are joined together, and two triangular shaped air gaps 151 adjacent to the charge transfer unit are joined together.

[0078] 9D, etching progresses further to form a charge storage unit adjacent void 141 that connects the ends of grooves 142 and 144. Similarly, a charge transfer unit adjacent void 151 that connects the ends of grooves 152 and 154 is formed.

[0079] In FIG. 9E, etching progresses further, forming a charge transfer unit adjacent gap 151 that connects the ends of two grooves 152 at the boundary between adjacent pixels 100. Also, a charge storage unit adjacent gap 141 that connects the ends of two grooves 142 is formed. The dashed lines in the figure indicate the ends of the charge storage unit adjacent gap 141. It is possible to form the charge storage unit adjacent gap 141 and the charge transfer unit adjacent gap 151 such that their ends overlap.

[0080] In this way, by arranging the groove 142 having a length that reaches the end of the charge storage unit-adjacent void 141 and the groove 152 having a length that reaches the end of the charge transfer unit-adjacent void 151 on opposing sides of the pixel 100, it is possible to configure the charge storage unit-adjacent void 141 and the charge transfer unit-adjacent void 151 with widths that allow their ends to overlap. Even when the groove 142 and the groove 152 are arranged on the same surface of the semiconductor substrate 120, it is possible to arrange the charge storage unit-adjacent void 141 and the charge transfer unit-adjacent void 151 with widths that allow their ends to overlap.

[0081] The grooves 142 to 144 and the grooves 152 to 154 are preferably formed on the back surface side of the semiconductor substrate 120. This is because it makes it easier to arrange the first charge transfer section 102 and the like on the front surface side of the semiconductor substrate 120.

[0082] [Method of manufacturing an image sensor] 10A to 10J are diagrams illustrating an example of a manufacturing method of an image sensor according to the first embodiment of the present disclosure. 10A to 10J are diagrams illustrating an example of a manufacturing process of the image sensor 1. For convenience, the configuration of the pixel 100 is illustrated in a simplified form.

[0083] First, a well region is formed in the semiconductor substrate 120, and the semiconductor region 121 of the photoelectric conversion section 101 and the like are formed. Next, gate electrodes 123 and 125 are formed. This forms the pixel 100. At this time, the photoelectric conversion section 101 is configured in a substantially rectangular shape on the surface of the semiconductor substrate 120, and the pixel 100 is configured in a rectangular shape (FIG. 10A). This process is an example of a process for forming a pixel as recited in the claims.

[0084] Next, the wiring region 130 is formed on the front surface side of the semiconductor substrate 120. Next, the semiconductor substrate 120 is turned upside down, and the back surface side of the semiconductor substrate 120 is ground to thin it (FIG. 10B).

[0085] Next, a hard mask 410 is placed on the back surface side of the semiconductor substrate 120. Openings 411 are placed in this hard mask 410 in regions where the grooves 142 to 144 are to be placed (FIG. 10C).

[0086] Next, the semiconductor substrate 120 is etched using the hard mask 410 as a mask. Dry etching can be used for this etching. As a result, grooves 142 to 144 are formed (FIG. 10D). Note that a groove 143 is also shown in the same figure. Next, the hard mask 410 is removed.

[0087] Next, a hard mask 412 is placed on the back surface of the semiconductor substrate 120 including the trenches 142 to 144. Openings 413 are placed in the hard mask 412 in regions where the trenches 152 to 154 are to be formed (FIG. 10E).

[0088] Next, the back surface of the semiconductor substrate 120 is etched using the hard mask 412 as a mask to form the grooves 152 to 154 (FIG. 10F). Note that the drawing also shows the groove 153. Next, the hard mask 412 is removed.

[0089] Next, an insulating film 401 is disposed on the back surface side of the semiconductor substrate 120 including the grooves 142 to 144 and the grooves 152 to 154. This can be done by, for example, CVD (Chemical Vapor Deposition) (FIG. 10G).

[0090] Next, the insulating film 401 is removed from the bottom surfaces of the grooves 142 to 144 and the grooves 152 to 154. This can be done by etch-back using dry etching (FIG. 10H).

[0091] Next, the steps described with reference to FIGS. 6C and 6D are carried out to form the charge storage section adjacent gap 141 and the charge transfer section adjacent gap 151 (FIG. 10I).

[0092] Next, an insulating film 129 is disposed on the back surface of the semiconductor substrate 120, including the grooves 142 to 144 and grooves 152 to 154, the charge retention portion-adjacent void 141, and the charge transfer portion-adjacent void 151. Next, a light-shielding member is disposed in the grooves 142 to 144 and grooves 152 to 154, the charge retention portion-adjacent void 141, and the charge transfer portion-adjacent void 151 ( FIG. 10J ). This can be done, for example, by using CVD to dispose a light-shielding member such as tungsten (W) in the charge retention portion-adjacent void 141, etc. This allows the charge retention portion light-shielding film 140, the charge transfer portion light-shielding film 150, the light-shielding walls 145 to 147, and the light-shielding walls 155 to 157 to be formed simultaneously. This process is an example of the process of forming a charge retention portion light-shielding film and the process of forming a charge transfer portion light-shielding film described in the claims.

[0093] Thereafter, a planarization film 171, a color filter 172, and an on-chip lens 173 are disposed. The imaging element 1 can be manufactured through the above steps.

[0094] As described above, the image sensor 1 according to the first embodiment of the present disclosure blocks incident light by disposing the band-shaped charge retention unit light-shielding film 140 and charge transfer unit light-shielding film 150, which overlap each other near their ends, on the semiconductor substrate 120. This reduces leakage of incident light into the first charge retention unit 107 in pixels 100 in which the photoelectric conversion unit 101 and the first charge retention unit 107 are configured to overlap when viewed from the light receiving surface. This makes it possible to reduce noise in the image signal.

[0095] (2. Second Embodiment) In the image sensor 1 of the first embodiment described above, the light-shielding walls 145 and 147 are connected to the light-shielding wall 146, and the light-shielding walls 155 and 157 are connected to the light-shielding wall 156. In contrast, the image sensor 1 of the second embodiment of the present disclosure differs from the first embodiment described above in that the light-shielding walls 145 and 147 are spaced apart from the light-shielding wall 146, and the light-shielding walls 155 and 157 are spaced apart from the light-shielding wall 156.

[0096] [Groove configuration] 11 is a plan view showing an example of the configuration of grooves according to the second embodiment of the present disclosure. Similar to FIG. 5A, this figure shows an example of the configuration of grooves 142 to 144 and grooves 152 to 154 in pixel 100. The pixel 100 in this figure differs from the pixel 100 in FIG. 5A in that a semiconductor region 321 is disposed between grooves 142 and 144 and groove 143, and a semiconductor region 321 is disposed between grooves 152 and 154 and groove 153.

[0097] In the pixel 100 shown in the figure, the grooves 142 and 144 are not connected to the groove 143. Similarly, the grooves 152 and 154 are not connected to the groove 153. By disposing light-shielding members in the grooves 142 to 144 and the grooves 152 to 154, the light-shielding walls 145 and 147 can be separated from the light-shielding wall 146, and the light-shielding walls 155 and 157 can be separated from the light-shielding wall 156. Since the semiconductor region 321 is disposed between the grooves 142 and 144 and the groove 143, the occurrence of the microloading phenomenon in this region can be prevented. Similarly, since the semiconductor region 321 is disposed between the grooves 152 and 154 and the groove 153, the occurrence of the microloading phenomenon in this region can also be prevented.

[0098] Here, the microloading phenomenon refers to a phenomenon in which the etching rate changes depending on the density of the etching pattern, and the etching depth changes accordingly. When grooves 142 and 144 and groove 143 are joined, the etching rate at this joint increases, and the groove at the joint becomes deeper. This changes the depth of charge storage unit adjacent void 141 in that region, causing deformation of charge storage unit light-shielding film 140. A similar problem occurs with charge transfer unit adjacent void 151.

[0099] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0100] As described above, in the image sensor 1 according to the second embodiment of the present disclosure, the semiconductor region 321 is disposed between the grooves 142 and 144 and the groove 143, and the semiconductor region 321 is disposed between the grooves 152 and 154 and the groove 153. This makes it possible to prevent the occurrence of the microloading phenomenon, and to prevent deformation of the charge retention portion light-shielding film 140 and the charge transfer portion light-shielding film 150.

[0101] (3. Third Embodiment) The image sensor 1 of the first embodiment described above is provided with the light-shielding walls 145 to 147 and the light-shielding walls 155 to 157. In contrast, the image sensor 1 of the third embodiment of the present disclosure differs from the first embodiment described above in that the light-shielding walls 145 and 155 are omitted.

[0102] [Groove configuration] 12 is a plan view showing an example of the configuration of a groove according to a third embodiment of the present disclosure. Similar to FIG. 5A, this figure shows an example of the configuration of the groove 142 and the like in the pixel 100. The pixel 100 in this figure differs from the pixel 100 in FIG. 5A in that the grooves 144 and 154 and the light-shielding walls 145 and 155 disposed in these grooves are omitted.

[0103] Even when the grooves 144 and 154 are omitted, the charge storage unit adjacent gap 141 can be formed by two grooves 142 in adjacent pixels 100. Also, the charge transfer unit adjacent gap 151 can be formed by two grooves 152 in adjacent pixels 100.

[0104] [Variations] 13 is a plan view showing an example of the configuration of a groove portion according to a modified example of the third embodiment of the present disclosure. Similar to FIG. 12, this figure shows an example of the configuration of the groove portion 142 and the like in the pixel 100. The pixel 100 in this figure differs from the pixel 100 in FIG. 12 in that short groove portions 144 and 154 are arranged.

[0105] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0106] (4. Fourth Embodiment) In the image sensor 1 of the first embodiment described above, the first charge retention portion 107 is shielded from light by the charge retention portion light-shielding film 140. In contrast, the image sensor 1 of the fourth embodiment of the present disclosure differs from the first embodiment described above in that it further uses a light-shielding film having a depth different from that of the charge retention portion light-shielding film 140.

[0107] [Pixel configuration] 14 is a cross-sectional view showing an example of the configuration of a pixel according to the fourth embodiment of the present disclosure. Similar to FIG. 3, this figure is a cross-sectional view showing an example of the configuration of a pixel 100. The pixel 100 in this figure differs from the pixel 100 in FIG. 3 in that it further includes a charge retention portion light-shielding film 160.

[0108] The charge retention portion light-shielding film 160 in the figure shields incident light, similar to the charge retention portion light-shielding film 140. This charge retention portion light-shielding film 160 is configured in a shape that covers the first charge retention portion 107 when viewed from the light-receiving surface, and is located at a shallower position than the charge retention portion light-shielding film 140. The image sensor 1 in the figure shows an example in which the charge retention portion light-shielding films 140 and the charge retention portion light-shielding films 160 are alternately arranged in adjacent pixels 100.

[0109] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0110] (5. Fifth Embodiment) In the image sensor 1 of the first embodiment described above, the charge retention portion adjacent void 141 and the charge transfer portion adjacent void 151 are formed by grooves formed on the back surface side of the semiconductor substrate 120, and the charge retention portion light-shielding film 140 and the charge transfer portion light-shielding film 150 are disposed in these voids. In contrast, the image sensor 1 of the fifth embodiment of the present disclosure differs from the first embodiment described above in that the charge retention portion adjacent void and the charge transfer portion adjacent void are formed from the front surface side of the semiconductor substrate 120.

[0111] [Pixel configuration] 15 is a cross-sectional view showing a configuration example of a pixel according to a fifth embodiment of the present disclosure. Similar to FIG. 3, this figure is a cross-sectional view showing a configuration example of a pixel 100. The pixel 100 in this figure differs from the pixel 100 in FIG. 3 in that it includes a charge retention portion light-shielding film 140 and a charge transfer portion light-shielding film 150 formed on the front surface side of the semiconductor substrate 120.

[0112] The charge retention section light-shielding film 140 in the figure is disposed in a charge retention section adjacent gap formed starting from a groove 148 disposed on the surface side of the semiconductor substrate 120. The charge transfer section light-shielding film 150 in the figure is disposed in a charge transfer section adjacent gap formed starting from a groove 158 disposed on the surface side of the semiconductor substrate 120. Light-shielding walls 146 and 156 are disposed in the grooves 148 and 158, respectively. Light-shielding walls 180 are disposed on the semiconductor substrate 120 at the boundary of the pixels 100 to block incident light obliquely incident from adjacent pixels 100.

[0113] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0114] (6. Modifications) A modification of the imaging device 1 will now be described.

[0115] [Groove configuration] 16 is a plan view showing an example of the configuration of grooves according to a modified example of the embodiment of the present disclosure. Similar to FIG. 5A, this figure shows an example of the configuration of grooves 142 to 144 and grooves 152 to 154. The pixel 100 in this figure differs from the pixel 100 in FIG. 5A in that the arrangement of the grooves for each pixel 100 is changed.

[0116] In the central pixel 100 in the figure, two grooves 142 and two grooves 154 are arranged. That is, in the central pixel 100 in the figure, a groove 152 long enough to reach the end of the charge transfer section light-shielding film 150 for forming the charge transfer section adjacent gap 151 is not arranged. Even in this case, the charge transfer section adjacent gap 151 can be formed by the grooves 152 of the pixels 100 adjacent to the left and right.

[0117] [Configuration of the first charge transfer section] 17 is a plan view showing an example of the configuration of a first charge retention unit according to a modified embodiment of the present disclosure. This figure illustrates an example of the arrangement of the gate electrode 123 of the first charge retention unit 107. The gate electrode 123 in this figure is arranged in a corner of the pixel 100 when viewed from the light-receiving surface. In this manner, the first charge retention unit 107 can be arranged in any position that is shielded from light by the charge transfer unit light-shielding film 150.

[0118] (7. Configuration of imaging device) The technology according to the present disclosure can be applied to various products, for example, an imaging device such as a camera.

[0119] 18 is a diagram showing an example configuration of an imaging device to which the technology according to the present disclosure can be applied. The imaging device 1000 in the figure includes an imaging element 1001, a control unit 1002, an image processing unit 1003, a display unit 1004, a recording unit 1005, and a photographing lens 1006.

[0120] The photographing lens 1006 is a lens that collects light from a subject, and forms an image of the subject on the light receiving surface of the image sensor 1001.

[0121] The image sensor 1001 is a device that captures an image of a subject. A plurality of pixels, each having a photoelectric conversion unit that performs photoelectric conversion of light from the subject, are arranged on the light receiving surface of the image sensor 1001. These pixels each generate an image signal based on the electric charge generated by the photoelectric conversion. The image sensor 1001 converts the image signals generated by the pixels into digital image signals and outputs them to the image processing unit 1003. Note that one screen's worth of image signals is called a frame. The image sensor 1001 can also output image signals in frame units.

[0122] The control unit 1002 controls the image sensor 1001 and the image processing unit 1003. The control unit 1002 can be configured by an electronic circuit using, for example, a microcomputer.

[0123] The image processing unit 1003 processes the image signal from the image sensor 1001. Examples of image signal processing in the image processing unit 1003 include demosaic processing for generating image signals of colors that are missing when generating a color image, and noise reduction processing for removing noise from the image signal. The image processing unit 1003 can be configured, for example, by an electronic circuit using a microcomputer or the like.

[0124] The display unit 1004 displays an image based on the image signal processed by the image processing unit 1003. The display unit 1004 can be configured, for example, by a liquid crystal monitor.

[0125] The recording unit 1005 records images (frames) based on the image signals processed by the image processing unit 1003. The recording unit 1005 can be configured, for example, by a hard disk or a semiconductor memory.

[0126] The imaging device to which the present disclosure can be applied has been described above. The present technology can be applied to the imaging element 1001 among the above-mentioned components. Specifically, the imaging element 1 described in FIG. 1 can be applied to the imaging element 1001. Note that the image processing unit 1003 is an example of a processing circuit recited in the claims. The imaging device 1000 is an example of an imaging device recited in the claims.

[0127] The configuration of the second embodiment of the present disclosure can be applied to other embodiments. Specifically, the groove 143 and the groove 153 in Fig. 11 can be applied to the third to fifth embodiments of the present disclosure.

[0128] (effect) The imaging element 1 of the present disclosure includes a pixel 100, a charge retention section light-shielding film 140, and a charge transfer section light-shielding film 150. The pixel 100 includes a photoelectric conversion section 101 that is disposed on the light-receiving surface side of a semiconductor substrate 120 and performs photoelectric conversion of incident light, a first charge retention section 107 that is disposed on a side of the semiconductor substrate 120 different from the light-receiving surface and that retains charges generated by the photoelectric conversion, and a first charge transfer section 102 that transfers the generated charges to the first charge retention section 107, and is configured in a rectangular shape when viewed from the light-receiving surface. The charge retention unit light-shielding film 140 is configured in a strip shape adjacent to three sides including a first side that is one of the sides of the rectangle and parallel to the first side in the light-receiving surface view, adjacent to the semiconductor region (region 127) including the first charge transfer unit 102 in the light-receiving surface view, and is disposed in the pixel 100 between the photoelectric conversion unit and the first charge retention unit 107 to block incident light. The charge transfer unit light-shielding film 150 is configured in a strip shape adjacent to three sides including a second side that is opposite to the first side in the light-receiving surface view and parallel to the second side, and is disposed in the pixel 100 between the photoelectric conversion unit and the first charge transfer unit 102 to block incident light and is configured so that its ends overlap with ends of the charge retention unit light-shielding film 140 in the light-receiving surface view. This enables the first charge retention unit 107 to be shielded from light.

[0129] The semiconductor substrate 120 has a surface with a (111) crystal orientation perpendicular to the thickness direction, and the surface opposite to the surface constitutes the light receiving surface. The charge retention portion light-shielding film 140 is formed by arranging the semiconductor substrate 120 in a crystal orientation (111). <110> The charge transfer section light-shielding film 150 is made of a light-shielding member disposed in the charge storage section adjacent gap 141, which is a gap formed by etching the semiconductor substrate 120 in the crystal orientation. <110> Alternatively, the charge transfer section light-shielding film 140 may be formed of a light-shielding member disposed in the charge transfer section adjacent gap 151, which is a gap formed by etching in the direction of the arrow A. This allows the charge retention section light-shielding film 140 and the charge transfer section light-shielding film 150 to be embedded inside the semiconductor substrate 120.

[0130] Also, a crystal orientation is arranged on one of the sides adjacent to the first side at the boundary of the pixel 100. <112> a groove 142 that is a groove that is formed parallel to the first side and has a length that reaches the vicinity of an end of the charge storage portion light-shielding film 140 from the first side; and a crystal orientation 143 that is formed on a side opposite to the side on which the groove 142 is formed at the boundary of the pixel 100. <112> and a groove portion 152 which is a groove formed in parallel to the second side and having a length reaching the vicinity of an end portion of the charge transfer portion light-shielding film 150 from the second side. The charge retention portion adjacent gap 141 is formed by dividing the semiconductor substrate 120 in the vicinity of the bottom of the groove portion 142 in a crystal orientation. <110> The charge transfer section adjacent gap 151 is formed by etching the semiconductor substrate 120 in the crystal orientation <110> In this way, a void can be formed inside the semiconductor substrate 120.

[0131] Furthermore, a light-shielding wall 145 for blocking incident light may be further provided, which is disposed in the groove 142. This makes it possible to block light incident obliquely from the adjacent pixel 100.

[0132] Furthermore, a light-shielding wall 155 for blocking incident light may be further provided, which is disposed in the groove 152. This makes it possible to block light that is incident obliquely from the adjacent pixel 100.

[0133] Furthermore, the groove 142 and the groove 152 may be formed on the same surface of the semiconductor substrate 120. This simplifies the manufacturing process of the charge retention portion light-shielding film 140 and the charge transfer portion light-shielding film 150.

[0134] The grooves 152 may be formed on the light-receiving surface side of the semiconductor substrate 120. This makes it possible to easily arrange elements other than the photoelectric conversion section 101 of the pixel 100.

[0135] The pixel 100 further includes a groove 144, which is a groove that is arranged on a side of the boundary of the pixel 100 opposite to the groove 142, and is arranged on the same side of the semiconductor substrate 120 as the groove 142, and is configured to have a length that extends from the first side to the groove 152; and a groove 154, which is a groove that is arranged on a side of the boundary of the pixel 100 opposite to the groove 152, and is arranged on the same side of the semiconductor substrate 120 as the groove 152, and is configured to have a length that extends from the second side to the groove 142. The charge storage portion adjacent void 141 is configured by arranging the semiconductor substrate 120 near the bottoms of the groove 142 and the groove 144 in a crystal orientation. <110> The charge transfer section adjacent gap 151 is formed by etching the semiconductor substrate 120 in the vicinity of the bottoms of the grooves 152 and 154 in the crystal orientation <110> In this way, the charge storage section adjacent gap 141 and the charge transfer section adjacent gap 151 can be formed at a high speed.

[0136] Furthermore, a light-shielding wall 147 that is disposed in the groove 144 and blocks incident light may be further provided, thereby making it possible to block light that is obliquely incident from the adjacent pixel 100.

[0137] Furthermore, a light-shielding wall 157 that is disposed in the groove 154 and blocks incident light may be further provided, thereby making it possible to block light that is obliquely incident from the adjacent pixel 100.

[0138] The pixel 100 may further include a groove 143 that is arranged on the first side of the boundary of the pixel 100, on the same side of the semiconductor substrate 120 as the groove 142, and configured to the same depth as the groove 142, and a groove 153 that is arranged on the second side of the boundary of the pixel 100, on the same side of the semiconductor substrate 120 as the groove 152, and configured to the same depth as the groove 152. The formation of the charge retention portion adjacent gap 141 and the charge transfer portion adjacent gap 151 can be accelerated.

[0139] Furthermore, a light-shielding wall 146 that is disposed in the groove 143 and blocks incident light may be further provided, thereby making it possible to block light that is obliquely incident from the adjacent pixel 100.

[0140] Furthermore, a light-shielding wall 156 that is disposed in the groove 153 and blocks incident light may be further provided, thereby making it possible to block light that is obliquely incident from the adjacent pixel 100.

[0141] Further, the groove 143 may be configured to have a length such that it does not come into contact with the groove 142, and the groove 153 may be configured to have a length such that it does not come into contact with the groove 152. This can prevent the occurrence of a microloading phenomenon.

[0142] The charge retention portion light-shielding film 140 may be made of a metal material, thereby improving the light-shielding ability.

[0143] The charge transfer section light-shielding film 150 may be made of a metal material, thereby improving the light-shielding ability.

[0144] The imaging device 1000 also includes a pixel 100, a charge holding portion light-shielding film 140, a charge transfer portion light-shielding film 150, an image signal generation unit 110, and a processing circuit (column signal processing unit 30). The pixel 100 includes a photoelectric conversion unit 101 that is disposed on the light-receiving surface side of a semiconductor substrate 120 and performs photoelectric conversion of incident light, a first charge holding unit 107 that is disposed on a side of the semiconductor substrate 120 different from the light-receiving surface and that holds charges generated by the photoelectric conversion, and a first charge transfer unit 102 that transfers the generated charges to the first charge holding unit 107, and is configured in a rectangular shape when viewed from the light-receiving surface. The charge retention unit light-shielding film 140 is adjacent to three sides including a first side that is one of the sides of the rectangle in the light-receiving surface view, and is configured in a strip shape parallel to the first side, adjacent to the semiconductor region (region 127) including the first charge transfer unit 102 in the light-receiving surface view, and is disposed in the pixel 100 between the photoelectric conversion unit and the first charge retention unit 107 to block incident light. The charge transfer unit light-shielding film 150 is adjacent to three sides including a second side that is opposite to the first side in the light-receiving surface view, and is configured in a strip shape parallel to the second side, and is disposed in the pixel 100 between the photoelectric conversion unit and the first charge transfer unit 102 to block incident light, and is configured so that its ends overlap with ends of the charge retention unit light-shielding film 140 in the light-receiving surface view. The image signal generation unit 110 generates an image signal based on the stored charges. The processing circuit (column signal processing unit 30) processes the generated image signal, thereby blocking light from the first charge holding unit 107.

[0145] The method for manufacturing an image sensor also includes the steps of forming pixels 100, forming charge retention portion light-shielding film 140, and forming charge transfer portion light-shielding film 150. The step of forming pixels 100 is a step of forming pixels configured in a rectangular shape when viewed from the light receiving surface, including a photoelectric conversion portion that is arranged on the light receiving surface side of semiconductor substrate 120 and performs photoelectric conversion of incident light, a first charge retention portion 107 that is arranged on a side of semiconductor substrate 120 different from the light receiving surface and that retains charges generated by the photoelectric conversion, and a first charge transfer portion 102 that transfers the generated charges to first charge retention portion 107. The step of forming the charge retention portion light-shielding film 140 is a step of forming a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in the light-receiving surface view and is configured in a strip shape parallel to the first side, adjacent to the semiconductor region including the first charge transfer portion 102 in the light-receiving surface view, and is disposed in the pixel 100 between the photoelectric conversion portion and the first charge transfer portion 107 to shield incident light. The step of forming the charge transfer portion light-shielding film 150 is a step of forming a charge transfer portion light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side in the light-receiving surface view and is configured in a strip shape parallel to the second side, and is disposed in the pixel 100 between the photoelectric conversion portion and the first charge transfer portion 102 to shield incident light and is configured in a shape whose ends overlap with ends of the charge retention portion light-shielding film 140 in the light-receiving surface view. This allows the first charge holding unit 107 to be shielded from light.

[0146] The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0147] The present technology can also be configured as follows. (1) a pixel configured in a rectangular shape when viewed from the light receiving surface, the pixel including: a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light; a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion; and a charge transfer unit that transfers the generated charges to the charge retention unit; a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view, is configured in a strip shape parallel to the first side, is adjacent to a semiconductor region including the first charge transfer portion 102 in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, that is disposed in the pixel between the photoelectric conversion unit and the first charge transfer unit 102 to block incident light, and that is configured such that an end portion thereof overlaps an end portion of the charge retention unit light-shielding film as viewed on the light receiving surface; An imaging element having (2) the semiconductor substrate has a surface with a (111) orientation perpendicular to the thickness direction, and the surface opposite to the surface forms the light-receiving surface; The charge retention portion light-shielding film is a film that shields the semiconductor substrate from a crystal orientation <110> a light-shielding member disposed in a gap adjacent to the charge storage portion, the gap being a gap formed by etching in the direction The charge transfer portion light-shielding film is a film that shields the semiconductor substrate in a crystal orientation. <110> The light-shielding member is disposed in the gap adjacent to the charge transfer section, which is a gap formed by etching in the direction of the arrow. The imaging element according to (1) above. (3) The pixel boundary has a crystal orientation arranged on one of the sides adjacent to the first side. <112> a first charge retention portion adjacent groove that is parallel to the first side and has a length that extends from the first side to a vicinity of an end of the charge retention portion light-shielding film; The first charge storage unit adjacent groove is disposed on the side opposite to the side on the boundary of the pixel. <112> a first charge transfer unit adjacent groove which is a groove formed in parallel to the second side and having a length reaching a vicinity of an end of the charge transfer unit light-shielding film; and The charge retention portion adjacent gap is formed by forming a crystal orientation of the semiconductor substrate in the vicinity of the bottom of the first charge retention portion adjacent groove. <110> is formed by etching in the direction of The charge transfer unit adjacent gap is formed by dividing the semiconductor substrate in the vicinity of the bottom of the first charge transfer unit adjacent groove in a crystal orientation. <110> It is formed by etching in the direction The imaging element according to (2) above. (4) The imaging element according to (3) above, further comprising a first charge retention unit adjacent light-shielding wall disposed in the first charge retention unit adjacent groove to block incident light. (5) The imaging device according to (3) above, further comprising a first charge transfer unit adjacent light-shielding wall disposed in the first charge transfer unit adjacent groove for blocking incident light. (6) The image sensor according to (3), wherein the first charge retention unit adjacent groove is formed on the same surface of the semiconductor substrate as the first charge transfer unit adjacent groove. (7) The image sensor according to (6), wherein the first charge transfer unit adjacent groove is formed on the light receiving surface side of the semiconductor substrate. (8) a second charge retention unit-adjacent groove, which is a groove that is arranged on a side of the pixel boundary that faces the first charge retention unit-adjacent groove and is arranged on the same side of the semiconductor substrate as the first charge retention unit-adjacent groove, and has a length that extends from the first side to the first charge transfer unit-adjacent groove; a second charge transfer unit adjacent groove, which is a groove that is arranged on a side of the pixel boundary facing the first charge transfer unit adjacent groove and is arranged on the same side of the semiconductor substrate as the first charge transfer unit adjacent groove, and is configured with a length that extends from the second side to the first charge transfer unit adjacent groove; and The charge retention portion adjacent gap is formed by dividing the semiconductor substrate in the vicinity of the bottom of the first charge retention portion adjacent groove and the second charge retention portion adjacent groove in a crystal orientation. <110> is formed by etching in the direction of The charge transfer unit adjacent gap is formed by dividing the semiconductor substrate in the vicinity of the bottom of the first charge transfer unit adjacent groove and the second charge transfer unit adjacent groove in a crystal orientation. <110> It is formed by etching in the direction The imaging element according to any one of (3) to (7) above. (9) The imaging element according to (8) above, further comprising a second charge retention unit adjacent light-shielding wall disposed in the second charge retention unit adjacent groove to block incident light. (10) The imaging device according to (8) above, further comprising a second charge transfer unit adjacent light-shielding wall disposed in the second charge transfer unit adjacent groove for blocking incident light. (11) a third charge retention portion-adjacent groove that is arranged on the first side of the boundary of the pixel, that is arranged on the same side of the semiconductor substrate as the first charge retention portion-adjacent groove, and that has the same depth as the first charge retention portion-adjacent groove; a third charge transfer unit adjacent groove that is arranged on the second side of the boundary of the pixel, that is arranged on the same side of the semiconductor substrate as the first charge transfer unit adjacent groove, and that has the same depth as the first charge transfer unit adjacent groove; The imaging element according to (8) above, further comprising: (12) The imaging element according to (11) above, further comprising a third charge retention unit adjacent light-shielding wall disposed in the third charge retention unit adjacent groove to block incident light. (13) The imaging device according to (11) above, further comprising a third charge transfer unit adjacent light-shielding wall disposed in the third charge transfer unit adjacent groove for blocking incident light. (14) the third charge retention unit-adjacent groove is configured to have a length such that it does not come into contact with the first charge retention unit-adjacent groove, The third charge transfer unit adjacent groove is configured to have a length such that it does not come into contact with the first charge transfer unit adjacent groove. The imaging element according to (11) above. (15) The imaging element according to any one of (1) to (14), wherein the charge retention portion light-shielding film is made of a metal material. (16) The imaging element according to any one of (1) to (15), wherein the charge transfer section light-shielding film is made of a metal material. (17) a pixel configured in a rectangular shape when viewed from the light receiving surface, the pixel including: a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light; a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion; and a charge transfer unit that transfers the generated charges to the charge retention unit; a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view and is configured in a strip shape parallel to the first side, adjacent to the semiconductor region including the charge transfer portion in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, is disposed in the pixel between the photoelectric conversion unit and the charge transfer unit, shields incident light, and is configured such that an end portion thereof overlaps an end portion of the charge retention unit light-shielding film as viewed on the light receiving surface; an image signal generating unit that generates an image signal based on the stored charges; a processing circuit for processing the generated image signal; An imaging device having the above configuration. (18) forming a pixel having a rectangular shape when viewed from the light receiving surface, the pixel including a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light, a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion, and a charge transfer unit that transfers the generated charges to the charge retention unit; forming a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view, is configured in a strip shape parallel to the first side, is adjacent to a semiconductor region including the charge transfer portion in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; forming a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, that is disposed in the pixel between the photoelectric conversion unit and the charge transfer unit to shield incident light, and that is configured in a shape whose ends overlap with ends of the charge retention unit light-shielding film as viewed on the light receiving surface; A method for manufacturing an imaging element comprising: [Explanation of symbols]

[0148] 1, 1001 image sensor 10 Pixel array section 30 Column signal processing section 100 pixels 101 Photoelectric conversion unit 102 first charge transfer unit 103 Overflow Gate 104 Second charge transfer section 105 Third charge transfer section 106 Reset section 107 First charge holding unit 108 Second charge storage unit 110 Image signal generation unit 120 Semiconductor substrate 123, 125 Gate electrode 127 areas 128, 129 insulating film 130 Wiring area 140, 160 Charge retention area light shielding film 141 Charge storage area adjacent gap 142~144, 148 Groove 145~147 Blackout wall 150 Charge transfer section light-shielding film 151 Charge transfer section adjacent gap 152~154, 158 Groove 155~157 Blackout wall 180 Blackout Wall 301 Duplicate section 331 First Side 332 Second Side 1000 Imaging Device

Claims

1. a pixel configured in a rectangular shape when viewed from the light receiving surface, the pixel including: a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light; a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion; and a charge transfer unit that transfers the generated charges to the charge retention unit; a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view and is configured in a strip shape parallel to the first side, adjacent to the semiconductor region including the charge transfer portion in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, that is disposed in the pixel between the photoelectric conversion unit and the charge transfer unit to block incident light, and that is configured such that an end portion thereof overlaps an end portion of the charge retention unit light-shielding film as viewed on the light receiving surface; An imaging element having

2. 2. The image sensor according to claim 1, wherein the semiconductor substrate has a surface with a (111) plane perpendicular to the thickness direction, and the surface opposite to the (111) plane forms the light receiving surface.

3. a first charge retention portion adjacent groove, which is a groove arranged on one of the sides adjacent to the first side at the boundary of the pixel, configured parallel to a crystal orientation <112>, and configured with a length extending from the first side to a vicinity of an end of the charge retention portion light-shielding film; a first charge transfer unit adjacent groove, which is a groove arranged on a side of the boundary of the pixel opposite to the side on which the first charge retention unit adjacent groove is arranged, configured parallel to a crystal orientation <112>, and configured with a length that extends from the second side to a vicinity of an end of the charge transfer unit light-shielding film; The imaging device according to claim 2 , further comprising:

4. 4. The image sensor according to claim 3, further comprising a first charge storage portion adjacent light-shielding wall disposed in the first charge storage portion adjacent groove for blocking incident light.

5. 4. The image sensor according to claim 3, further comprising a first charge transfer unit adjacent light shielding wall disposed in the first charge transfer unit adjacent groove for shielding incident light.

6. 4. The image sensor according to claim 3, wherein the first charge retention portion adjacent groove is formed on the same surface of the semiconductor substrate as the first charge transfer portion adjacent groove.

7. The image sensor according to claim 6 , wherein the first charge transfer portion adjacent groove is formed on the light receiving surface side of the semiconductor substrate.

8. a second charge retention unit-adjacent groove, which is a groove that is arranged on a side of the pixel boundary that faces the first charge retention unit-adjacent groove and is arranged on the same side of the semiconductor substrate as the first charge retention unit-adjacent groove, and is configured to have a length that extends from the first side to the first charge transfer unit-adjacent groove; a second charge transfer unit adjacent groove, which is a groove that is arranged on a side of the pixel boundary facing the first charge transfer unit adjacent groove and is arranged on the same side of the semiconductor substrate as the first charge transfer unit adjacent groove, and is configured with a length that extends from the second side to the first charge transfer unit adjacent groove; The imaging device according to claim 3 , further comprising:

9. 9. The image sensor according to claim 8, further comprising a second charge storage portion adjacent light-shielding wall disposed in the second charge storage portion adjacent groove to block incident light.

10. 9. The image sensor according to claim 8, further comprising a second charge transfer unit adjacent light-shielding wall disposed in the second charge transfer unit adjacent groove for blocking incident light.

11. a third charge retention portion-adjacent groove that is arranged on the first side of the boundary of the pixel, that is arranged on the same side of the semiconductor substrate as the first charge retention portion-adjacent groove, and that has the same depth as the first charge retention portion-adjacent groove; a third charge transfer unit adjacent groove that is arranged on the second side of the boundary of the pixel, that is arranged on the same side of the semiconductor substrate as the first charge transfer unit adjacent groove, and that has the same depth as the first charge transfer unit adjacent groove; The imaging device according to claim 8 , further comprising:

12. 12. The image sensor according to claim 11, further comprising a third charge storage unit adjacent light-shielding wall disposed in the third charge storage unit adjacent groove to block incident light.

13. 12. The image sensor according to claim 11, further comprising a third charge transfer unit adjacent light-shielding wall disposed in the third charge transfer unit adjacent groove for blocking incident light.

14. the third charge retention unit-adjacent groove is configured to have a length such that it does not come into contact with the first charge retention unit-adjacent groove, The third charge transfer unit adjacent groove is configured to have a length such that it does not come into contact with the first charge transfer unit adjacent groove. The imaging device according to claim 11.

15. The image sensor according to claim 1 , wherein the charge storage portion light-shielding film is made of a metal material.

16. 2. The image sensor according to claim 1, wherein the charge transfer section light-shielding film is made of a metal material.

17. a pixel configured in a rectangular shape when viewed from the light receiving surface, the pixel including: a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light; a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion; and a charge transfer unit that transfers the generated charges to the charge retention unit; a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view and is configured in a strip shape parallel to the first side, adjacent to the semiconductor region including the charge transfer portion in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, is disposed in the pixel between the photoelectric conversion unit and the charge transfer unit, shields incident light, and is configured such that an end portion thereof overlaps an end portion of the charge retention unit light-shielding film as viewed on the light receiving surface; an image signal generating unit that generates an image signal based on the stored charges; a processing circuit for processing the generated image signal; An imaging device having the above configuration.

18. forming a pixel having a rectangular shape when viewed from the light receiving surface, the pixel including a photoelectric conversion unit disposed on a side of a light receiving surface of a semiconductor substrate and performing photoelectric conversion of incident light, a charge retention unit disposed on a side of the semiconductor substrate different from the light receiving surface and retaining charges generated by the photoelectric conversion, and a charge transfer unit that transfers the generated charges to the charge retention unit; forming a charge retention portion light-shielding film that is adjacent to three sides including a first side that is one of the sides of the rectangle in a light-receiving surface view, is configured in a strip shape parallel to the first side, is adjacent to a semiconductor region including the charge transfer portion in a light-receiving surface view, and is disposed in the pixel between the photoelectric conversion portion and the charge retention portion to shield incident light; forming a charge transfer unit light-shielding film that is adjacent to three sides including a second side that is the side opposite to the first side as viewed on the light receiving surface and is configured in a strip shape parallel to the second side, that is disposed in the pixel between the photoelectric conversion unit and the charge transfer unit to shield incident light, and that has an edge that is configured in a shape that overlaps an edge of the charge retention unit light-shielding film as viewed on the light receiving surface; A method for manufacturing an imaging element comprising:

Images