Wafer for evaluating micro LED characteristics and method for evaluating micro LED characteristics

Abstract

To provide a micro LED characteristic evaluation wafer capable of forming a micro LED size element in an epitaxial wafer state and evaluating current-carrying characteristics and capable of evaluating transient characteristics without wire breakage under environmental testing.SOLUTION: The micro LED characteristic evaluation wafer has a GaAs substrate, a micro LED of less than 100 μm per side on the GaAs substrate, a pad base part adjacent to the micro LED, an upper electrode pad on the micro LED and on the pad base part, and a lower electrode pad on the GaAs substrate in the vicinity of the micro LED. The micro LED and the pad base part are connected via an insulating part.SELECTED DRAWING: Figure 7B

Description

[Technical Field]

[0001] The present invention relates to a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics. [Background technology]

[0002] To realize a micro LED display, a technology has been disclosed in which LEDs are peeled off from a starting substrate using laser lift-off (LLO), transferred to a mounting substrate, and then transferred to a drive substrate (Patent Document 1). However, this technology is only applicable to GaN-based LEDs, and there is no disclosure of technology related to micro LEDs using AlGaInP-based LEDs.

[0003] When realizing micro LED elements using AlGaInP-based LEDs, it is important to determine whether the quality of the epitaxial wafer is suitable for micro LEDs. Understanding the transient (lifetime) characteristics is particularly important for LEDs. For conventional discrete LEDs measuring 150 μm square or larger, electrodes are provided on the top and bottom of the epitaxial wafer, which is then cut into dices measuring 150 μm square or larger. The dices are then mounted on a current-carrying fixture such as a TO-18 can with conductive paste, and a metal wire is wire-bonded to the top of the dices to create a current-carrying element. The transient (lifetime) characteristics are then evaluated by applying current.

[0004] However, the element size of a micro LED is 100 μm square or less. The bonding electrodes (pads) required for wire bonding must be 90 μm or more in diameter for wedge bonding and 70 μm or more in diameter for ball bonding. The general size of a micro LED is 50 μm square or less, with many measuring 5 to 20 μm square, so it is clear that they cannot be evaluated using the same design as conventional discrete devices.

[0005] Although it is possible to mount micro LED elements on a drive substrate and perform testing, this requires micro LED transfer, which carries information on quality changes that accompany the transfer. Therefore, it is not suitable for evaluating the quality of the epitaxial layer itself. Furthermore, since it requires the device formation process and mounting process, it takes too much time to evaluate, and the drive substrate for the product must be used for evaluation, which increases the evaluation cost.

[0006] Furthermore, when a micro LED is mounted on a drive board and a current evaluation is performed, the thermal design is significantly different from when it is mounted in a TO-18 can. When mounted, the thermal resistance is small, resulting in good heat dissipation, and the epitaxial layer appears to be behaving better than the original quality. While this is a good thermal design for the product, it is not appropriate for managing the quality of the epitaxial layer. Unless testing is performed with a thermal design equivalent to that of TO-18 can mounting, it is inappropriate for evaluating the quality of the epitaxial layer.

[0007] Therefore, there is a need for technical disclosure of devices and device structures that can be mounted on TO-18 cans and tested. However, there is no technical disclosure of devices and device structures for micro LEDs that can be mounted on TO-18 cans and tested for transients. When the element size is small, a method of using a technique for placing wiring on the side of the element can be considered (Patent Document 2). This technique is effective when the thickness of the upper layer is not so thick.

[0008] However, in the AlGaInP-based LED structure that assumes the application of laser lift-off (LLO), a double hetero (DH) region including the active layer is formed on a starting substrate, and then a GaP layer is formed as a base. In this structure, the DH region is located at the bottom and the GaP layer is located at the top.

[0009] If the technology disclosed in Patent Document 2 is applied to this structure, a fairly deep etching is required to penetrate the GaP layer and electrically isolate the DH layer. The GaP layer is generally 4 μm or more in thickness, and the AlGaInP DH layer is generally 2 μm or more in thickness, so the etching depth is 6 μm or more. When wiring is provided on the side of such a deeply dug element, electrical disconnection is likely to occur at the side because the deeply dug side has large irregularities, making it difficult to reliably cover it with metal.

[0010] Patent Document 3 discloses a technique for providing wiring in deeply excavated areas. In this technique, an insulating film is formed on the side of the deep trench, and a contact electrode is extended to the lower cladding layer to make contact. This method requires complex processes such as excavating a trench, coating the side with an insulating film, etching the bottom, and filling with electrode metal. In addition, because it involves forming an electrode in the trench, it cannot be simply applied to micro LEDs.

[0011] Patent Document 4 discloses a technology in which the epitaxial layer portion is transferred to a separate substrate and the pad portion is brought into contact with the element to conduct electricity. In this technology, the element is embedded in resin. In this case, the resistance of the resin is higher (thermal conductivity is low) than that of the starting epitaxial substrate, resulting in a thermally floating (separated) state. As a result, the junction temperature rises significantly compared to the ambient temperature. Transient tests such as life characteristics are typically performed by mounting the light-emitting element on a material with a thermal resistance relatively lower than that of the base material of the light-emitting element. Mounting the light-emitting element on a material with poor heat dissipation and a thermal resistance higher than that of the base material is not usually performed. Tests performed using prior art techniques result in significantly different test conditions than conventional methods.

[0012] As described above, there is no prior art that can evaluate the characteristics of an epitaxial wafer as it is, and there is no disclosure of a design or technology that can evaluate whether the epitaxial wafer itself is suitable for use in a micro-LED size. [Prior art documents] [Patent documents]

[0013] [Patent Document 1] Patent No. 6838247 [Patent Document 2] Japanese Patent Application Laid-Open No. 2012-195437 [Patent Document 3] Japanese Patent Application Laid-Open No. 2013-135234 [Patent Document 4] Japanese Patent Application Laid-Open No. 2003-282478 Summary of the Invention [Problem to be solved by the invention]

[0014] The present invention has been made to solve the above problems, and aims to provide a wafer for evaluating micro-LED characteristics and a method for evaluating micro-LED characteristics, which can form micro-LED-sized elements in the epitaxial wafer state without processing an epitaxial wafer having AlGaInP-based micro-LEDs that are optimal for the LLO process into a wafer structure for LLO, and can evaluate the electrical characteristics, and which has an element structure that does not break during environmental testing, allowing for reliable transient characteristic evaluation. [Means for solving the problem]

[0015] The present invention has been made to achieve the above-mentioned object, and provides a wafer for evaluating micro LED characteristics, comprising a GaAs substrate, a micro LED having a side length of 100 μm or less on the GaAs substrate, a pad base adjacent to the micro LED, upper electrode pads on the micro LED and the pad base, and a lower electrode pad on the GaAs substrate near the micro LED, wherein the micro LED and the pad base are connected via an insulating part.

[0016] With this type of wafer for evaluating micro-LED characteristics, it is possible to evaluate the electrical characteristics of micro-LED-sized elements while they are still in the epitaxial wafer state, and there is no risk of breakage during environmental testing, making it possible to reliably evaluate transient characteristics.

[0017] In this case, the area of ​​the upper electrode pad can be larger than the area of ​​a circle with a diameter of 60 μm.

[0018] This allows reliable wire bonding.

[0019] In this case, the upper electrode pad may contain a metal, and the metal may be any one of Al, Cu, Ag, and Au.

[0020] This makes it possible to more reliably evaluate the electrical characteristics of micro-LED-sized elements while they are still in the epitaxial wafer state, and also prevents breakage during environmental testing, allowing for more reliable evaluation of transient characteristics.

[0021] At this time, the upper electrode pad includes a transparent conductive film, and the transparent conductive film is made of ITO, InO x , NiO, or CuO.

[0022] This makes it possible to evaluate the electrical characteristics of micro-LED-sized elements while they are still in the epitaxial wafer state, and also enables reliable transient characteristic evaluation without wire breakage during environmental testing.

[0023] In this case, one side of the micro LED may be 50 μm or less.

[0024] This makes it possible to evaluate the electrical characteristics of extremely small micro-LED-sized elements while they are still in the epitaxial wafer state, and also enables reliable transient characteristic evaluation without wire breakage during environmental testing.

[0025] In this case, the micro LED has a light emitting layer and a GaP layer on the light emitting layer, the light emitting layer has a cladding layer, an active layer on the cladding layer, and another cladding layer on the active layer, and the active layer is (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0≦y≦0.5).

[0026] This makes it possible to more reliably evaluate the electrical characteristics of extremely small AlGaInP quaternary micro-LED-sized elements in the epitaxial wafer state, and also enables reliable evaluation of transient characteristics without wire breakage during environmental testing.

[0027] In this case, the pad base may have a light emitting layer and a GaP layer on the light emitting layer, and the GaP layer may have a thickness of 5 μm or more.

[0028] This makes it possible to reliably evaluate the electrical characteristics of extremely small micro-LED-sized elements in the epitaxial wafer state, even if the GaP layer is thick, and also makes it possible to reliably evaluate transient characteristics without wire breakage during environmental testing.

[0029] At this time, the insulating portion is made of SiO2, SiN x , SOG, CYTOP®, or polyimide.

[0030] This maintains the insulating properties of the insulating parts, making it possible to more reliably evaluate the electrical characteristics of extremely small micro-LED-sized elements while they are still in the epitaxial wafer state, and also enables reliable transient characteristic evaluation without wire breakage during environmental testing.

[0031] The present invention has been made to achieve the above-mentioned object, and provides a micro LED characteristic evaluation method characterized by evaluating the characteristics of micro LEDs using the above-described micro LED characteristic evaluation wafer.

[0032] This method for evaluating micro LED characteristics makes it possible to evaluate the electrical characteristics of micro LED-sized elements while they are still in the epitaxial wafer state, and also enables reliable transient characteristic evaluation without wire breakage during environmental testing. [Effects of the Invention]

[0033] As described above, the micro-LED characteristic evaluation wafer of the present invention makes it possible to evaluate the electrical characteristics of micro-LED-sized elements while they are still in the epitaxial wafer state, and also makes it possible to reliably evaluate transient characteristics without causing disconnections during environmental testing. According to the micro LED characteristic evaluation method of the present invention, it is possible to evaluate the electrical characteristics of micro LED-sized elements while they are still in the epitaxial wafer state, and it is possible to reliably evaluate transient characteristics without breaking during environmental testing. [Brief explanation of the drawings]

[0034] [Figure 1] FIG. 1 is a cross-sectional view showing an example of a resist pattern substrate. [Figure 2] FIG. 1 is a cross-sectional view showing an example of a SiO2 patterned substrate. [Figure 3A] FIG. 3C is a cross-sectional view taken along line AA' in FIG. 3B, showing an example of a dry-etched substrate. [Figure 3B] FIG. 1 is a plan view showing an example of a dry-etched substrate. [Figure 4] FIG. 1 is a cross-sectional view showing an example of a wet-etched substrate. [Figure 5] FIG. 1 is a cross-sectional view showing an example of a coated substrate. [Figure 6A] FIG. 6C is a diagram showing an example of an aperture substrate, and is a cross-sectional view taken along line AA' in FIG. 6B. [Figure 6B] FIG. 2 is a plan view showing an example of an opening substrate. [Figure 7A] FIG. 7C is a cross-sectional view of the AA′ line in FIG. 7B showing an example of a wafer for evaluating micro LED characteristics according to the present invention. [Figure 7B] FIG. 1 is a plan view showing an example of a wafer for evaluating micro LED characteristics according to the present invention. [Figure 8] FIG. 10 is a cross-sectional view showing a comparative example. [Figure 9] 10 shows experimental results showing the rate of occurrence of broken elements (defective rate) when dice are placed in an environment of 85° C. in the example and the comparative example. [Figure 10] 10 shows experimental results showing the rate of occurrence of broken elements (defective rate) when dice are placed in an environment of −40° C. in the example and the comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0035] The present invention will be described in detail below, but the present invention is not limited thereto.

[0036] As described above, there has been a demand for a wafer and method for evaluating micro-LED characteristics that can form micro-LED-sized elements in the epitaxial wafer state without processing epitaxial wafers containing AlGaInP-based micro-LEDs that are optimal for the LLO process into a wafer structure for LLO, and that can evaluate the electrical characteristics, and that can reliably evaluate transient characteristics with an element structure that will not break during environmental testing.

[0037] As a result of extensive research into the above-mentioned problems, the inventors have discovered that a wafer for evaluating micro LED characteristics, comprising a GaAs substrate, a micro LED having a side length of 100 μm or less on the GaAs substrate, a pad base adjacent to the micro LED, upper electrode pads on the micro LED and the pad base, and a lower electrode pad on the GaAs substrate near the micro LED, wherein the micro LED and the pad base are connected via an insulating part, can evaluate the electrical characteristics of micro LED-sized elements while still in the epitaxial wafer state, and can reliably evaluate transient characteristics without breaking during environmental tests, thereby completing the present invention.

[0038] Hereinafter, a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics according to an embodiment of the present invention will be described.

[0039] (Wafer for evaluating micro LED characteristics)

[0040] As shown in Figures 7A and 7B, the micro LED characteristic evaluation wafer 1 of the present invention has a GaAs substrate 10, a micro LED 14 on the GaAs substrate 10 with a side length of 100 μm or less, a pad base 13 adjacent to the micro LED 14, an upper electrode pad 12 on the micro LED 14 and the pad base 13, and a lower electrode pad 11 on the GaAs substrate 10 near the micro LED 14, and the micro LED 14 and the pad base 13 are connected via an insulating part 15.

[0041] On a first conductivity type GaAs substrate (starting substrate) 10, a first conductivity type GaAs buffer layer is laminated, and then a first conductivity type Ga x In 1-x P (0.4≦x≦0.6) first etch stop layer, e.g., 0.1 μm thick GaAs of the first conductivity type; second etch stop layer, e.g., 1.0 μm thick (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0.6≦y≦1.0) first cladding layer, undoped (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0≦y≦0.5) active layer, for example, 1.0 μm thick second conductivity type (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0.6≦y≦1.0) second cladding layer, for example, 0.1 μm thick Ga of second conductivity type x In 1-x An epitaxial wafer (EPW) having a light emitting device structure is provided, in which a P(0.5≦x≦1.0) intermediate layer, for example a 6.0 μm thick GaP layer (window layer) 22 of the second conductivity type, is grown as an epitaxial functional layer. Here, the first cladding and the second cladding are referred to as a double hetero (DH) structure. The double hetero (DH) structure portion is the light emitting layer 21 .

[0042] The thicknesses mentioned above are merely examples, and the thickness is merely a parameter that should be changed depending on the operating specifications of the device, and is not limited to the thicknesses described here. Although the first and second cladding layers are both 1.0 μm thick, the rated current density of micro LEDs is smaller than that of discrete LEDs with larger sizes, and the function as a cladding layer is not impaired even if the thickness is thinner than this.

[0043] As described below, since an electrode is formed in contact with the first cladding layer, it is preferable that the first cladding layer has a thickness of 0.6 μm or more, taking into consideration metal diffusion during ohmic contact formation. Any thickness greater than this can be selected. However, if the thickness is too thick, it will increase costs, reduce light emission efficiency during constant current operation, or increase wafer warpage, which can lead to reduced yields. Therefore, a thickness of 10 μm or less is preferable.

[0044] When the second conductivity type is p-type, the effective mass of the holes is large, so even if the second cladding is, for example, about 0.2 μm thick, it functions as if it were 1.0 μm thick. Therefore, any thickness above 0.2 μm can be selected. However, if the thickness is too thick, it will increase costs, reduce the light emission efficiency when driven at a constant current, or increase the warpage of the wafer, which can lead to reduced yields. Therefore, it is preferable to keep the thickness below 10 μm.

[0045] Furthermore, each layer may not be a single composition layer, but may have multiple composition layers within the composition ranges exemplified, and the carrier concentration level may not be uniform in each layer, but may have multiple levels within each layer.

[0046] The active layer may be composed of a single composition, or may have a superlattice structure in which multiple barrier layers and active layers are alternately stacked, and both have similar functions, so either structure can be selected. Regardless of which structure is selected, the effects of this technology will be the same.

[0047] The thickness of the GaP layer 22 is preferably 5 μm or more, for example, 6 μm. However, it is not limited to 6 μm, and any thickness can be selected as long as it is thinner than the short side length of the isolation described below. The size of the micro LED 14 is 100 μm or less, and the thickness of the GaP layer 22 does not exceed 100 μm.

[0048] It is preferable that the area of ​​the upper electrode pad 12 is larger than the area of ​​a circle with a diameter of 60 μm, which allows for reliable wire bonding. The upper electrode pad 12 preferably contains a metal, and the metal is preferably one of Al, Cu, Ag, and Au, which allows reliable evaluation of electrical conductivity characteristics. The upper electrode pad 12 includes a transparent conductive film, and the transparent conductive film is made of ITO, InO x It is preferable that the material be any one of NiO and CuO, which allows the electrical conductivity to be evaluated reliably.

[0049] It is preferable that the micro LED 14 has a side length of 50 μm or less, so that the electrical characteristics of extremely small elements can be evaluated. The micro LED 14 includes a light-emitting layer 21 and a GaP layer 22 on the light-emitting layer 21, the light-emitting layer 21 including a cladding layer, an active layer on the cladding layer, and another cladding layer on the active layer, the active layer including (Al y Ga 1-y ) x In 1-x It is preferable that the material is P (0.4≦x≦0.6, 0≦y≦0.5), which allows reliable evaluation of the electrical properties of AlGaInP-based materials.

[0050] The pad base 13 has a light emitting layer 21 and a GaP layer 22 on the light emitting layer 21, and the GaP layer 22 preferably has a thickness of 5 μm or more. This allows the electrical conductivity characteristics to be reliably evaluated even if the GaP layer is thick. The insulating portion 15 is made of SiO2, SiN x It is preferable that the insulating material is one of SOG, CYTOP (registered trademark), and polyimide. This maintains the insulating properties of the insulating part and allows the electrical conductivity to be evaluated reliably.

[0051] Next, we will explain the manufacturing process of a wafer for evaluating micro LED characteristics. FIG. 1 is a cross-sectional view showing an example of a resist pattern substrate. First, as shown in FIG. 1, an SiO2 film 31 is formed on an epitaxial wafer to a thickness of 100 nm or more, for example, 400 nm, and a resist pattern 41 is formed in a pattern that is divided into an area where the micro LED 14 element is to be formed and an area where the upper electrode pad of the pad base portion 13 is to be formed. The size and pattern of the area where elements are to be formed can be freely set, but can be, for example, 25 μm square. The area where the upper electrode pad is to be formed can be 95 μm square, for example. The area where an element is to be formed and the area where an upper electrode pad is to be formed can be disposed with a space of, for example, 1 μm between them.

[0052] FIG. 2 is a cross-sectional view showing an example of a SiO2 patterned substrate. Next, as shown in FIG. 2, the SiO2 film 31 is patterned by wet etching with a hydrofluoric acid solution, and the resist is stripped off to obtain a hard mask pattern of the SiO2 film 31. The conditions for the wet etching process are not fixed and should be changed as desired depending on the thickness of the hard mask of the SiO2 film 31. For example, a pattern can be formed by immersing the substrate in a BHF solution of about 50% for one minute. The resist stripper can be any solution that can achieve stripping, for example, acetone.

[0053] 3A is a diagram showing an example of a dry-etching substrate, and is a cross-sectional view taken along line AA' in FIG. 3B. FIG. 3B is a plan view showing an example of a dry-etching substrate. Next, as shown in FIGS. 3A and 3B, an ICP dry etching process is performed using a chlorine-containing gas to obtain patterns of a portion where the micro LED 14 is to be formed and a portion where the upper electrode pad of the pad base portion 13 is to be formed. The ICP dry etching conditions can be, for example, an antenna power of 200 W and a bias power of 100 W, but are not limited to these conditions. In ICP dry etching, for example, Cl2 and Ar can be used as the chlorine-containing gas, but this is not limited to this mixed gas. BCl3, SiCl4, HCl, etc. can also be used as the chlorine source gas, and N2 or He can also be used instead of Ar.

[0054] FIG. 4 is a cross-sectional view showing an example of a wet-etched substrate. Next, as shown in FIG. 4, the hard mask of the SiO2 film 31 is removed by wet etching using a hydrofluoric acid solution. The conditions for the wet etching process are not fixed and should be changed as needed depending on the thickness of the hard mask of the SiO2 film 31. For example, the hard mask can be removed by immersing the substrate in a BHF solution of about 50% for one minute.

[0055] FIG. 5 is a cross-sectional view showing an example of a coated substrate. Next, as shown in FIG. 5, the surface and end faces including the gap between the area where the micro LED 14 is to be formed and the area where the upper electrode pad of the pad base 13 is to be formed are covered with, for example, TEOS-based SiO 2 . The coating film 23 is not limited to SiO2, and any material can be selected as long as it can protect the end face, has insulating properties, and has a thermal conductivity greater than that of the starting substrate GaAs. TEOS-based materials have a high surface coverage, and Si-containing insulating films, such as SiN x Also available are options such as: In addition to TEOS-based CVD films, they can also be formed by spin or dip. In this case, SiN x , SOG, CYTOP (registered trademark), polyimide, etc. are also selectable.

[0056] Fig. 6A is a diagram showing an example of an aperture substrate, and is a cross-sectional view taken along line AA' in Fig. 6B. Fig. 6B is a plan view showing an example of an aperture substrate. Next, as shown in FIG. 6, an opening 23a is formed in the coating film 23 as a portion for forming a contact with the upper electrode by photolithography and wet etching.

[0057] Fig. 7A is a diagram showing an example of a wafer for evaluating micro LED characteristics according to the present invention, and is a cross-sectional view taken along line A-A' in Fig. 7B. Fig. 7B is a plan view showing an example of a wafer for evaluating micro LED characteristics according to the present invention. Next, as shown in FIGS. 7A and 7B, a lower electrode pad 11 and an upper electrode pad 12 are formed, and ohmic contacts are formed by performing a heat treatment. Although the upper electrode pad 12 is exemplified as connecting the area where the micro LED 14 element is to be formed and the area where the upper electrode pad is to be formed on the pad base 13 with metal, the connection is not limited to metal only. The pad electrode and the contact electrode of the micro LED 14 may be made of metal, and a transparent conductive film may be used to electrically connect them. Examples of transparent conductive films include ITO and InO x , NiO, CuO x etc. can be applied.

[0058] Alternatively, the first conductivity type may be designed as n-type and the second conductivity type as p-type, and a metal containing Au and Si may be used for the electrode in contact with the n-type layer, and a metal containing Au and Be may be used for the electrode in contact with the p-type layer. The n-type electrode is not limited to Au and Si, but may also be a metal containing Au and Ge, and the p-type electrode is not limited to Au and Be, but may also be a metal containing Au and Zn. After forming the electrodes, RTA treatment is performed at 400°C for 5 minutes to achieve ohmic contact. After achieving ohmic contact, wire bonding is performed, and the device is ready for environmental testing and transient characteristic testing. The above structure makes it possible to test the environmental dependency and transient characteristic of the epitaxial wafer.

[0059] (Micro LED Characterization Method) The micro LED characteristic evaluation method according to the present invention is a method for evaluating the characteristics of the micro LEDs 14 using the above-described micro LED characteristic evaluation wafer 1. This makes it possible to evaluate the electrical characteristics of the micro LEDs 14 in the epitaxial wafer state, and also makes it possible to steadily evaluate transient characteristics without disconnection during environmental testing. [Example]

[0060] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0061] (Example) After stacking an n-type GaAs buffer layer on an n-type GaAs starting substrate, a 0.1 μm thick n-type Ga x In 1-x P(0.4≦x≦0.6) first etch stop layer, 0.1 μm thick n-type GaAs second etch stop layer, 1.0 μm thick n-type (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0.6≦y≦1.0) first cladding layer, undoped (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0≦y≦0.5) active layer, 1.0 μm thick p-type (Al y Ga 1-y ) x In 1-x P(0.4≦x≦0.6, 0.6≦y≦1.0) second cladding layer, 0.1 μm thick p-type Ga x In 1-xAn epitaxial wafer having a light emitting device structure was prepared by successively growing a P (0.5≦x≦1.0) intermediate layer and a 6 μm thick p-type GaP window layer as epitaxial functional layers.

[0062] A 400 nm thick SiO2 film was formed on the epitaxial wafer, and a resist pattern was formed, dividing it into the areas where the micro LED elements were to be formed and the areas where the upper electrode pads were to be formed (Fig. 1). The areas where the elements were to be formed were 25 μm square in size. The areas where the upper electrode pads were to be formed were 95 μm square in size. Child form The area where the upper electrode pad was to be formed and the area where the upper electrode pad was to be formed were spaced apart by 1 μm.

[0063] The SiO2 film was patterned by immersing it in approximately 50% BHF solution for 1 minute (Figure 2), and the resist was then stripped off with acetone to obtain an SiO2 hard mask pattern.

[0064] Next, ICP dry etching was performed using Cl2 and Ar to obtain the patterns of the element isolation section and pad section (Figure 3A, B). The ICP dry etching conditions were an antenna power of 200 W and a bias power of 100 W.

[0065] Next, the SiO2 hard mask was removed by immersing it in approximately 50% BHF solution for 1 minute (Figure 4).

[0066] Next, the surface and edge faces, including the gap between the element part and the pad part, were covered with TEOS-based SiO2 (Fig. 5).

[0067] Next, the area where the upper electrode contact was to be made was opened using photolithography and wet etching (Fig. 6A, B), and the lower and upper electrodes were formed, followed by heat treatment to form ohmic contacts (Fig. 7A, B). Here, a metal containing Au and Si was used for the electrode in contact with the n-type layer, and a metal containing Au and Be was used for the electrode in contact with the p-type layer.

[0068] After forming the electrodes, RTA treatment was performed at 400°C for 5 minutes to achieve ohmic contact. After achieving ohmic contact, wire bonding was performed.

[0069] (Comparative Example) FIG. 8 is a cross-sectional view showing a comparative example. The formation and processing steps of the epitaxial wafer were the same as in the example, but as shown in Figure 8, the areas where pads were to be formed were all etched away, leaving only the element area, with an insulating film on the side of the element area and wiring on top of it.

[0070] (Comparison between Examples and Comparative Examples) FIG. 9 shows the experimental results showing the rate of occurrence of broken elements (defective rate) when dice were placed in an environment of 85° C. for the example and the comparative example. In the comparative example, when the die was placed in an 85°C environment, the standard environment for life tests, and a check was made to see if it could be energized, a short circuit (disconnection) occurred in 20% to more than half of the die. This disconnection was temporary, and the short circuit was resolved when the die was returned to room temperature, and the die returned to a state of being electrically energized. In the comparative example, as shown in Figure 8, the upper electrode pad is located on a GaAs substrate, so disconnections and reconnections occur due to the thermal expansion coefficients of the metal that forms the wiring, the insulating material, and the material that forms the light-emitting section, as well as the unevenness of the metal wiring and the insulating material that results from the cross-sectional shape of the device. To resolve this, it becomes necessary to form a fairly thick (10 μm or more) metal layer, but it is not easy to form a thick metal layer using a photo process. Furthermore, this option is not desirable because it increases the process time and requires the use of excessive materials. On the other hand, when the embodiment was applied, the upper electrode pad was located on a pad base made of a DH layer, and the metal wiring portion was short and almost straight, so no breaks occurred even in an 85°C environment, and the defect rate was significantly reduced compared to the comparative example.

[0071] FIG. 10 shows the experimental results showing the rate of occurrence of broken elements (defective rate) when the dice were placed in an environment of −40° C. for the example and the comparative example. In the comparative example, when the dies were placed in a -40°C environment, which is the standard environment for life tests, and a check was made to see if they could be energized, approximately 10 to 20 percent of the dies developed short circuits (disconnections). These disconnections were temporary, and the short circuits were resolved when the dies were returned to room temperature, and the dies returned to a state where they could be energized. Disconnections and reconnections occur due to the thermal expansion coefficients of the metal wiring, insulating material, and material forming the light-emitting section, as well as unevenness in the metal wiring and insulating material due to the cross-sectional shape of the device. To resolve this issue, it becomes necessary to form a fairly thick (10 μm or more) metal layer, but it is not easy to form a thick metal layer using a photo process. Furthermore, this method requires increased process time and excessive material usage, making it an undesirable option. On the other hand, when the embodiment was applied, no disconnection occurred even in an environment of -40°C, and the defective rate was significantly reduced compared to the comparative example.

[0072] As described above, according to the embodiment of the present invention, it is possible to evaluate the electrical characteristics of micro LED-sized elements in the epitaxial wafer state, and transient characteristics can be evaluated without breaking during environmental testing.

[0073] The present specification includes the following aspects. [1]: A wafer for evaluating micro LED characteristics, A GaAs substrate, a micro LED having a side length of 100 μm or less on the GaAs substrate, a pad base adjacent to the micro LED, an upper electrode pad on the micro LED and the pad base, and a lower electrode pad on the GaAs substrate near the micro LED; A wafer for evaluating micro LED characteristics, characterized in that the micro LED and the pad base are connected via an insulating portion. [2]: The wafer for evaluating micro LED characteristics according to [1] above, characterized in that the area of ​​the upper electrode pad is larger than the area of ​​a circle with a diameter of 60 μm. [3]: The wafer for evaluating micro LED characteristics according to [1] or [2] above, wherein the upper electrode pad contains a metal, and the metal is any one of Al, Cu, Ag, and Au. [4]: The upper electrode pad includes a transparent conductive film, and the transparent conductive film is made of ITO, InO x , NiO, or CuO. [5]: A wafer for evaluating micro LED characteristics according to any one of [1] to [4] above, characterized in that one side of the micro LED is 50 μm or less. [6]: The micro LED has a light-emitting layer and a GaP layer on the light-emitting layer; the light emitting layer has a cladding layer, an active layer on the cladding layer, and another cladding layer on the active layer; The active layer is (Al y Ga 1-y ) x In 1-x A wafer for evaluating micro LED characteristics according to any one of [1] to [5] above, characterized in that it comprises P(0.4≦x≦0.6, 0≦y≦0.5). [7]: the pad base has a light emitting layer and a GaP layer on the light emitting layer; The wafer for evaluating micro LED characteristics according to any one of [1] to [6] above, wherein the GaP layer has a thickness of 5 μm or more. [8]: The insulating part is made of SiO2, SiN x , SOG, CYTOP (registered trademark), or polyimide. [9]: A method for evaluating micro LED characteristics, characterized by evaluating the characteristics of a micro LED using a wafer for evaluating micro LED characteristics described in any one of [1] to [8] above.

[0074] The present invention is not limited to the above-described embodiments, which are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that provides similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0075] 1...wafer for evaluating micro LED characteristics, 10...GaAs substrate (starting substrate), 11...lower electrode pad, 12...upper electrode pad, 13...pad base, 14...micro LED, 15...insulating portion, 21...light-emitting layer, 22...GaP layer (window layer), 23...coating film, 23a...opening, 31...SiO2 film, 41...resist pattern.

Claims

1. A wafer for micro LED characterization, comprising: A GaAs substrate, a micro LED having a side length of 100 μm or less on the GaAs substrate, a pad stand adjacent to the micro LED, an upper electrode pad on the micro LED and the pad stand, and a lower electrode pad on the GaAs substrate, The micro LED and the pad base are connected via an insulating portion.

2. 2. The wafer for evaluating micro-LED characteristics according to claim 1, wherein the area of ​​the upper electrode pad is larger than the area of ​​a circle having a diameter of 60 μm.

3. 3. The wafer for evaluating micro-LED characteristics according to claim 1, wherein the upper electrode pad contains a metal, and the metal is any one of Al, Cu, Ag, and Au.

4. The upper electrode pad includes a transparent conductive film, and the transparent conductive film is made of ITO, InO ｘ 3. The wafer for evaluating micro-LED characteristics according to claim 1, wherein the material is any one of NiO and CuO.

5. 3. The wafer for evaluating micro-LED characteristics according to claim 1, wherein one side of the micro-LED is 50 μm or less.

6. The micro LED comprises a light emitting layer and a GaP layer on the light emitting layer; the light emitting layer has a cladding layer, an active layer on the cladding layer, and another cladding layer on the active layer; The active layer is made of (Al ｙ Ga １－ｙ ) ｘ In １－ｘ 3. The wafer for evaluating micro LED characteristics according to claim 1, wherein P (0.4≦x≦0.6, 0≦y≦0.5) is used.

7. the pad base has a light emitting layer and a GaP layer on the light emitting layer; 3. The wafer for evaluating micro-LED characteristics according to claim 1, wherein the GaP layer has a thickness of 5 μm or more.

8. The insulating portion is made of SiO ２ , SiN ｘ 3. The wafer for evaluating micro-LED characteristics according to claim 1, characterized in that it comprises any one of SOG, CYTOP (registered trademark), and polyimide.

9. A method for evaluating micro LED characteristics, comprising evaluating the characteristics of a micro LED using the wafer for evaluating micro LED characteristics according to claim 1 or 2.

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