Semiconductor Devices

Abstract

To provide a semiconductor device that can shorten a reverse recovery time and hardly causes trouble.SOLUTION: A semiconductor device 100 includes: a semiconductor base 110 in which a first-conductive-type semiconductor layer 112 and a second-conductive-type semiconductor region 113 form a body diode; a first electrode 130; a second electrode 140; a carrier inducing trench 161; a first insulation region 162; a first intra-trench electrode 163 disposed in the carrier inducing trench 161 at a position facing the first-conductive-type semiconductor layer 112 with the first insulation region 162 interposed therebetween; and a second intra-trench electrode 164 as voltage applying means for applying a voltage having potential opposite in polarity to potential of the second electrode 140 in a reverse recovery operation of the body diode to the first intra-trench electrode 163, at least in the reverse recovery operation of the body diode.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] Conventionally, in semiconductor devices with a body diode, when the body diode is reverse biased, the presence of carriers (e.g., holes in the case of an N-channel MOS transistor) in the drift layer causes a reverse recovery current to flow from the drift layer to the base region. This reverse recovery current is an unintended current and can cause problems such as increased switching loss and recovery loss, and the risk of element breakdown due to electric field concentration caused by uneven carrier distribution. Therefore, it is desirable to shorten the period of the reverse recovery operation (reverse recovery time).

[0003] FIG. 15 is a diagram shown for explaining a semiconductor device 900 described in Patent Document 1. In FIG. For example, in a semiconductor device 900 described in Patent Document 1, a hole trap level is formed by forming crystal defects by irradiating an electron beam on a semiconductor substrate 910. As a result, carriers can be trapped in the crystal defects during the reverse recovery operation of the body diode, thereby shortening the reverse recovery time. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Public Relations of Patent Publication No. 62-298120 Summary of the Invention [Problem to be solved by the invention]

[0005] However, when irradiating a semiconductor substrate with an electron beam to form crystal defects, as in the case of the semiconductor device 900 described in Patent Document 1, there is a problem that defects such as an increase in the leakage current between the drain and source and variations in the threshold voltage may occur.

[0006] The present invention has been made to solve the above-mentioned problems, and aims to provide a semiconductor device that can shorten the reverse recovery time and is less likely to suffer from problems such as an increase in drain-source leakage current and variations in threshold voltage. [Means for solving the problem]

[0007] a first insulating region disposed on the surface of the trench; a first trench electrode disposed in the trench opposite to the first insulating region; a first insulating region disposed in the trench so as to face the first insulating region and to face the first conductive type semiconductor layer; a first insulating region disposed in the trench so as to face the first conductive type semiconductor layer; a first insulating region disposed in the trench so as to face the first conductive type semiconductor layer; a first insulating region disposed in the trench so as to face the first conductive type semiconductor layer; a first insulating region disposed in the trench so as to face the first conductive type semiconductor layer; a first insulating region disposed in the trench so as to face the first conductive type semiconductor layer; [Effects of the Invention]

[0008] According to the semiconductor device of the present invention, at least during the reverse recovery operation of the body diode, the voltage application means applies to the first trench electrode a voltage whose polarity is opposite to that of the second electrode during the reverse recovery operation of the body diode. Therefore, during the reverse recovery operation, carriers are attracted to the first trench electrode and do not reach the base region, and the attracted carriers do not contribute to the reverse recovery current, thereby shortening the reverse recovery time.

[0009] Furthermore, according to the semiconductor device of the present invention, at least during the reverse recovery operation of the body diode, voltage application means is provided for applying to the first trench electrode a voltage that results in a potential of opposite polarity to the polarity of the potential of the second electrode during the reverse recovery operation of the body diode. This eliminates the need to form crystal defects in order to shorten the reverse recovery time, and reduces the likelihood of problems such as an increase in leakage current between the drain and source or variations in threshold voltage. [Brief explanation of the drawings]

[0010] [Figure 1] 1A and 1B are diagrams illustrating a semiconductor device 100 according to a first embodiment. Fig. 1A is a plan view of the semiconductor device 100, and Fig. 1B is a cross-sectional view taken along line AA in Fig. 1A. Note that the white circles in Fig. 1A indicate contacts between gate fingers GF and gate lead-out wiring GL or contacts between drain fingers DF and second trench electrode lead-out wiring DL. [Figure 2] 2A and 2B are cross-sectional views showing the semiconductor device 100 according to embodiment 1. Fig. 2A is a cross-sectional view taken along line BB in Fig. 1A, and Fig. 2B is a cross-sectional view taken along line CC in Fig. 1B. [Figure 3] 3 is an enlarged cross-sectional view of a main part of the semiconductor device 100 according to Embodiment 1. The left diagram of FIG. 3 is an enlarged cross-sectional view of a main part of the carrier induction trench structure 160, and the right diagram of FIG. [Figure 4]4A and 4B are diagrams illustrating a semiconductor device 100 according to embodiment 1. Fig. 4A is a diagram showing the parasitic capacitance of the semiconductor device 100, Fig. 4B is a diagram showing the relationship between the semiconductor device 100 and capacitance, and Fig. 4C is a diagram showing an equivalent circuit of the semiconductor device and a snubber circuit. [Figure 5] 5A and 5B are diagrams illustrating carrier behavior in the semiconductor device 100 according to embodiment 1. Fig. 5A illustrates carrier behavior when a forward current flows through the body diode, Fig. 5B illustrates carrier behavior during reverse recovery operation, and Fig. 5C illustrates carrier behavior after reverse recovery operation. [Figure 6] 6A and 6B are cross-sectional views showing semiconductor devices 102 and 102a according to embodiment 2. Fig. 6A shows a cross-sectional view of the semiconductor device 102, and Fig. 6B shows a cross-sectional view of the semiconductor device 102a. [Figure 7] 7A and 7B are diagrams illustrating a semiconductor device 200 according to embodiment 3. Fig. 7A is a plan view of the semiconductor device 200, Fig. 7B is a cross-sectional view taken along line DD of Fig. 7A, and Fig. 7C is a diagram illustrating an equivalent circuit of the semiconductor device 200. [Figure 8] 10 is a graph showing the drain voltage VDS, the body diode current iF, and the gate voltage VGS in the semiconductor device 200 according to the third embodiment. [Figure 9] 9A and 9B are diagrams illustrating carrier behavior in the semiconductor device 200 according to embodiment 3. Fig. 9A illustrates carrier behavior when a forward current flows through the body diode, Fig. 9B illustrates carrier behavior immediately before reverse recovery operation, and Fig. 9C illustrates carrier behavior during reverse recovery operation. [Figure 10] FIG. 1 is a schematic circuit diagram showing a semiconductor device 300 according to a first modification. [Figure 11] FIG. 10 is a schematic diagram showing a semiconductor device 202 according to a fourth embodiment. [Figure 12] FIG. 10 is a schematic diagram showing a semiconductor device 204 according to a second modification. [Figure 13]1 is a cross-sectional view showing a semiconductor device 104 according to Modification 3. Reference numeral 120a denotes an interlayer insulating film, reference numeral 153a denotes a gate electrode, and reference numeral 152a denotes a gate insulating film. [Figure 14] 14A and 14B are cross-sectional views showing a semiconductor device 206 according to Modification 4. Fig. 14A shows a cross-sectional view of the semiconductor device 206, and Fig. 14B shows an equivalent circuit of the semiconductor device 206. [Figure 15] FIG. 1 is a diagram illustrating a conventional semiconductor device 900. DETAILED DESCRIPTION OF THE INVENTION

[0011] The semiconductor device of the present invention will be described below based on the embodiments shown in the drawings. Note that each drawing is a schematic diagram and does not necessarily reflect the actual dimensions precisely. The embodiments described below do not limit the invention according to the claims. Furthermore, not all of the elements and combinations thereof described in the embodiments are necessarily essential to the solution of the present invention.

[0012] [Embodiment 1] 1. Configuration of the semiconductor device 100 according to the first embodiment FIG. 1 is a diagram illustrating a semiconductor device 100 according to a first embodiment. FIG. 2 is a cross-sectional view illustrating the semiconductor device 100 according to the first embodiment. The semiconductor device 100 according to the first embodiment is a trench-gate semiconductor device (MOSFET) having a plurality of gate trenches 151 (gate electrodes) formed in a stripe pattern on one surface of a semiconductor substrate 110. The semiconductor device 100 has a configuration in which carrier attracting trenches 161, inside which first intra-trench electrodes 163 are disposed, are formed at predetermined intervals among the plurality of gate electrodes (gate trenches) arranged in a stripe pattern for attracting holes during reverse recovery. The semiconductor device 100 according to the first embodiment is suitable for use in cases where MOS operation and diode operation are alternately used, for example, in cases where a semiconductor device is used in a half-bridge circuit in which two semiconductor devices are connected in series.

[0013] As shown in FIG. 1, the semiconductor device 100 of the first embodiment has a semiconductor body 110 having a generally rectangular shape in a plan view, which is composed of two long sides X1 and X2 and two short sides X3 and X4. A source electrode 130, a gate finger GF, a gate pad GP, a drain finger DF, and a drain pad DP are arranged on one surface of the semiconductor body 110, and a drain electrode 140 is arranged on the surface opposite to the one surface of the semiconductor body 110.

[0014] The source electrode 130 (first electrode) is disposed on one surface of the semiconductor substrate 110 in the center in plan view via an interlayer insulating film 120. As shown in FIG. 1(b), the source electrode 130 is electrically connected to the semiconductor substrate 110 (the base region 113 and the source region 114) via a metal plug Pg1 in a contact hole formed in the interlayer insulating film 120. The source electrode 130 is made of, for example, an Al film or an Al alloy film (for example, an AlSi film), and has a thickness of 1 μm to 10 μm (for example, 3 μm).

[0015] 1(a), the two gate fingers GF are arranged on the long sides X1 and X2 of the source electrode 130, respectively, and extend from the short side X3 toward the short side X4. The gate pad GP is arranged on the short side X3 of the source electrode 130, and is connected to the ends of the two gate fingers GF on the short side X3 side. The two gate fingers GF and one gate pad GP are arranged to surround the source electrode 130 from three directions, the long sides X1, X2, and the short side X3.

[0016] The two drain fingers DF are arranged outside the two gate fingers GF (on the long side X1, X2 side), respectively, and extend from the short side X4 toward the short side X3 along the long side X1 or X2. The drain pad DP is arranged on the short side X4 side of the source electrode 130, and is connected to the ends of the two drain fingers DF on the short side X4 side. The two drain fingers DF and one drain pad DP are arranged to surround the source electrode 130, gate pad GP, and gate finger GF from three directions, the long sides X1, X2, and short side X4.

[0017] The drain electrode 140 (second electrode) is disposed over the entire surface (on the surface of the low-resistance semiconductor layer 111) opposite to the one surface of the semiconductor substrate 110, and is electrically connected to the drift layer 112 via the low-resistance semiconductor layer 111 of the semiconductor substrate 110. The drain electrode 140 is made of a laminated film in which Ti, Ni, and Au (or Ag) are laminated in this order, and the thickness of the drain electrode 140 is 0.2 μm to 1.5 μm (for example, 1 μm).

[0018] As shown in FIG. 1(b) and FIG. 2, the semiconductor substrate 110 is + a low-resistance semiconductor layer 111 and an n-type semiconductor layer formed on the low-resistance semiconductor layer 111 and having an impurity concentration lower than that of the low-resistance semiconductor layer 111; - The semiconductor device has a p-type drift layer 112 (first semiconductor layer), a p-type base region 113 (second conductivity type semiconductor region) provided on the surface of the drift layer 112, and an n-type source region 114 (first conductivity type semiconductor region) formed on the surface of the base region 113 and having a higher impurity concentration than the drift layer 112. - The body diode is formed together with the drift layer 112 of the semiconductor layer (type).

[0019] The thickness of the low-resistance semiconductor layer 111 is 50 μm to 500 μm (for example, 350 μm), and the impurity concentration of the low-resistance semiconductor layer 111 is 1×10 18 cm -3 ~1×10 21 cm -3 (e.g. 1×10 19 cm -3 The thickness of the drift layer 112 in the region where the gate trench 151 and the carrier attracting trench 161 are not formed is 3 μm to 50 μm (for example, 15 μm), and the impurity concentration of the drift layer 112 is 1×10 14 cm -3 ~1×10 19 cm -3 (e.g. 1×10 15 cm -3 The thickness of the base region 113 is 0.5 μm to 10 μm (for example, 5 μm), and the impurity concentration of the base region 113 is 1×10 16cm -3 ~1×10 19 cm -3 (e.g. 1×10 17 cm -3 )

[0020] In embodiment 1, a plurality of gate trenches 151 are formed in a stripe shape in a planar view on the surface of the semiconductor substrate 110 so as to cross the cell region from the long side X1 side toward the long side X2 side, and carrier attracting trenches 161 are formed in a stripe shape in a planar view parallel to the gate trenches 151 at intervals of a predetermined number of the plurality of gate trenches arranged in a stripe shape. A gate insulating film 152 and a gate electrode 153 are formed in each gate trench 151 , and the gate trench 151 , gate insulating film 152 and gate electrode 153 form a gate trench structure 150 . Furthermore, a first trench electrode 163, a second trench electrode 164, a first insulating region 162, a second insulating region 165, and a third insulating region 166 are formed within the carrier inducing trench 161, and the carrier inducing trench 161, the first trench electrode 163, the second trench electrode 164, the first insulating region 162, the second insulating region 165, and the third insulating region 166 constitute a carrier inducing trench structure 160.

[0021] The gate trench 151 extends from a region overlapping with the gate finger GF on the long side X1 side in a plan view, across a region overlapping with the source electrode 130, to a region overlapping with the gate finger GF on the long side X2 side. As shown in FIG. 1(b), the gate trench 151 is formed in one surface of the semiconductor substrate 110, and has a bottom adjacent to the drift layer 112 and sidewalls adjacent to the drift layer 112, the base region 113, and the source region 114. The bottom surface of the trench 151 is flat, but may be rounded or have any other appropriate shape.

[0022] The gate insulating film 152 is formed on the sidewall of each of the plurality of gate trenches 151 . The gate electrode 153 is disposed in each gate trench 151, and its side faces the base region 113 via a gate insulating film 152. An insulating film 154 is also formed between the bottom of the gate trench 151 and the gate electrode 153. The upper surface of the gate electrode 153 is located at a depth shallower than the deepest part of the source region 114, and the lower surface of the gate electrode 153 is located at a depth equal to or deeper than the depth position of the pn junction surface between the base region 113 and the drift layer 112. Gate lead-out wiring GL is formed at each end of the gate electrode 153 on the long side X1 side and the end of the gate electrode 153 on the long side X2 side in a plan view, and is connected to the gate finger GF via a metal plug Pg2 (see FIG. 2(a)).

[0023] 1(a), the carrier induction trench 161 extends from a region overlapping with the drain finger DF on the long side X1 side in a plan view, across a region (cell region) overlapping with the source electrode 130, to a region overlapping with the drain finger DF on the long side X2 side. As shown in FIG. 1(b), the carrier induction trench 161 is formed in one surface of the semiconductor substrate 110, and has a bottom adjacent to the drift layer 112 and sidewalls adjacent to the drift layer 112, the base region 113, and the source region 114.

[0024] The depth of the carrier induction trench 161 can be any depth that reaches the drift layer. For example, the trench can be formed deeper than the bottom of the gate trench 151. During reverse recovery, holes deep in the drift layer 112 take time to be collected in the base region 113, which lengthens the reverse recovery time. Therefore, it is preferable to dispose the first trench electrode 163 deep in the drift layer 112 to attract holes to the first trench electrode 163 and prevent them from contributing to the reverse recovery current. In consideration of this, the depth of the carrier induction trench 161 is preferably deep (for example, at a depth position deeper than half the depth from one surface of the semiconductor substrate to the depth position of the top surface of the low-resistance semiconductor layer 111). The distance between adjacent carrier induction trenches 161 is narrower than the diffusion length of carriers (holes) injected from the base region 113 when a forward current is flowing. For example, the trenches are formed every several tens of micrometers (for example, every 60 to 80 micrometers).

[0025] The first trench electrode 163 is disposed apart from the inner surface of the carrier induction trench 161 and faces the drift layer 112 via the first insulating region 162. The first trench electrode 163 is in a floating potential state. When the second trench electrode 164 has a positive potential, electrons in the first trench electrode 163 are attracted to the surface via the second insulating region 165, and a negative potential is induced in the first trench electrode 163. The first trench electrode 163 is formed relatively thin so that a negative potential is induced in the portions (side surfaces and bottom surface) facing the drift layer 112. The first trench electrode 163 is made of polysilicon containing impurities at a predetermined concentration, and the resistance value of the first trench electrode 163 can be adjusted by adjusting the impurity concentration.

[0026] The second trench electrode 164 is disposed in the carrier inducing trench 161 above the first trench electrode 163, spaced apart via a second insulating region 165. The second trench electrode 164 is disposed in a spaced apart state from the carrier inducing trench 161 via a third insulating region 166 formed on the sidewall surface of the carrier inducing trench 161. Second trench electrode lead wiring DL is formed at the end of the second trench electrode 164 on the long side X1 side and the end on the long side X2 side in a plan view, and is connected to the drain finger DF via a metal plug Pg3 (see FIG. 2(b)). As will be described later, the second trench electrode 164 is a voltage application means that applies a voltage to the first trench electrode 163 during reverse recovery operation of the body diode, the voltage being a potential (negative potential) of a polarity opposite to the polarity (positive potential) of the drain electrode during reverse recovery operation of the body diode.

[0027] The first insulating region 162 is formed on the lower sidewall and bottom surface of the carrier-inducing trench 161 . The second insulating region 165 is disposed between the first trench electrode 163 and the second trench electrode 164 and separates the second trench electrode 164 from the first trench electrode 163 . The third insulating region 166 is formed between the second trench electrode 164 and the sidewall of the carrier inducing trench 161, and separates the second trench electrode 164 from the sidewall of the carrier inducing trench 161. The first insulating region 162 and the second insulating region 165 are thermal oxide films, but may be CVD oxide films. The third insulating region 166 is a CVD oxide film, but may be a thermal oxide film.

[0028] 3, the thickness D1 of the first insulating region 162 is thinner than the thickness D3 of the third insulating region 166. Furthermore, the thickness D2 of the second insulating region 165 is approximately the same as the thickness D1 of the first insulating region 162, thinner than the thickness D3 of the third insulating region 166, and equal to or thinner than the thickness D4 of the gate insulating film 152. Furthermore, the thickness D3 of the third insulating region 166 is thick enough to maintain the breakdown voltage between the source and drain.

[0029] Next, the parasitic capacitance and internal resistance of the semiconductor device 100 according to the first embodiment will be described. FIG. 4 is a diagram for explaining the semiconductor device 100 according to the first embodiment. As described above, the second trench electrode 164 is connected to the drain electrode 140 via the drain finger DF, and the third insulating region 166 exists between the second trench electrode 164 and the source electrode 130 (the metal plug Pg1 connected to the source electrode 130). Therefore, as shown in FIG. 4(a), a capacitance C DS2 As shown in FIG. 1(a), a plurality of second intra-trench electrodes 164 are formed, and therefore, each carrier attracting trench 161 has a capacitance C DS2 In addition, there is a capacitance C between the base region 113 and the drift layer 112 due to the depletion layer of the pn junction. DS1 Therefore, as shown in FIG. 4(b), there is a capacitance C between the source electrode 130 and the drain electrode 140. DS2 (The capacitance C between each second trench electrode 164 and the source region 114 or the base region 113 DS2 (composite capacitance of the above) and capacitance C DS1 These capacitances (parasitic capacitances) form a capacitor C between the source electrode 130 and the drain electrode 140 (see FIG. 4(c)).

[0030] Furthermore, the second trench electrodes 164 are made of polysilicon containing impurities at a predetermined concentration, and are formed in a stripe shape in a plan view, so that there is an internal resistance in the second trench electrodes 164. The combined resistance of the internal resistances of the second trench electrodes 164 constitutes the resistance between the capacitor C and the drain electrode 140 (see FIG. 4(c)).

[0031] As a result, the semiconductor device 100 has a configuration in which a capacitor C and a resistor R are connected in series between the source and drain, and the semiconductor device 100 becomes a semiconductor device (MOSFET) with a built-in RC snubber circuit.

[0032] The internal resistance of each stripe of the second trench electrode 164 is proportional to the electrical resistivity ρ and the length l of the second trench electrode 164, and is inversely proportional to the cross-sectional area S1 of the second trench electrode 164. The cross-sectional area S1 of the second trench electrode 164 can be adjusted by adjusting the film thickness of the third insulating region 166. The length l of the strip-shaped second trench electrode 164 can also be adjusted. Therefore, the resistance value of each stripe of the second trench electrode 164 can be adjusted relatively easily, and therefore the resistance R of the snubber circuit can also be adjusted relatively easily. Note that the electrical resistivity ρ also depends on the concentration of impurities introduced into the polysilicon, so the resistance value of the second trench electrode 164 can be adjusted from this perspective as well.

[0033] In addition, the capacitance C per stripe of the capacitor in the snubber circuit is DS2 is inversely proportional to the film thickness d of the third insulating region 166, and is proportional to the area S2 of the region where the second trench electrode 164 and the source region 114 face each other. Here, the film thickness of the third insulating region 166 can be adjusted relatively easily. Furthermore, since the area S2 of the region where the second trench electrode 164 and the source region 114 face each other is proportional to the height of the second trench electrode 164, the area of ​​the region where the second trench electrode 164 and the source region 114 face each other can also be adjusted by adjusting the film thickness of the third insulating region 166. Therefore, the capacitance C between the second trench electrode 164 and the source region 114 per stripe can be adjusted by adjusting the film thickness of the third insulating region 166. DS1 Therefore, the capacitance of the snubber circuit can be adjusted relatively easily.

[0034] Therefore, the resistance value and capacitance of the snubber circuit in the semiconductor device 100 according to the first embodiment can be adjusted relatively easily, resulting in a highly flexible semiconductor device.

[0035] 2. Carrier behavior during reverse recovery operation Next, carriers in the drift layer 112 during reverse recovery operation will be described. Fig. 5 is a diagram showing the state of carriers in the semiconductor device 100 according to the first embodiment.

[0036] (1) Forward bias When a voltage is applied that puts the source electrode 130 at a positive potential and the drain electrode 140 at a negative potential, a forward current flows through the body diode formed by the base region 113 and the drift layer 112, and carriers (holes) are injected from the base region 113 to the drift layer 112 (see FIG. 5(a)). At this time, since the drain electrode 140 is at a negative potential, the second trench electrode 164 electrically connected to the drain electrode 140 is also at a negative potential.

[0037] (2) Reverse bias (reverse recovery operation) When a voltage is applied that causes the source electrode 130 to have a negative potential and the drain electrode 140 to have a positive potential, holes are no longer injected from the base region 113 into the drift layer 112, and the holes injected into the drift layer 112 begin to move toward the base region 113. This causes a reverse recovery operation in which a reverse recovery current flows. At this time, the second trench electrode 164 electrically connected to the drain electrode 140 has a positive potential. The second trench electrode 164 at a positive potential then attracts electrons in the first trench electrode 163, which is at a floating potential, to the surface, inducing a negative potential in the first trench electrode 163. The first trench electrode 163 at a negative potential changes the electric field of the surrounding drift layer 112, attracting carriers (holes), and forming a hole pool (see the area surrounded by the dashed lines in FIGS. 5(b) and 5(c)) near the bottom of the carrier-inducing trench 161. This prevents holes from reaching the base region 113 during the reverse recovery operation, and the holes do not contribute to the reverse recovery current, thereby shortening the reverse recovery time.

[0038] 3. Effects of the semiconductor device 100 according to the first embodiment According to the semiconductor device 100 of the first embodiment, in the reverse recovery operation of the body diode formed by the base region 113 and the drift layer 112, the second trench electrode 164 is provided as a voltage application means for applying to the first trench electrode 163 a voltage having a potential (negative potential) of the opposite polarity to the polarity (positive potential) of the potential of the drain electrode 140 in the reverse recovery operation of the body diode. Therefore, in the reverse recovery operation, holes are attracted to the first trench electrode 163 and do not reach the base region 113, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0039] Furthermore, according to the semiconductor device 100 of the first embodiment, the second trench electrode 164 is provided as a voltage application means for applying to the first trench electrode 163 a voltage that is a potential (negative potential) of the opposite polarity to the polarity (positive potential) of the drain electrode 140 during the reverse recovery operation of the body diode formed by the base region 113 and the drift layer 112. This eliminates the need to form crystal defects in order to shorten the reverse recovery time. This reduces the likelihood of problems such as an increase in the leakage current between the drain and source and variations in the threshold voltage.

[0040] The semiconductor device 100 according to the first embodiment also includes a second trench electrode 164 disposed in the carrier induction trench 161 and spaced apart from the first trench electrode 163. The second trench electrode 164 is connected to the drain electrode 140, and the first trench electrode 163 is in a floating potential. With this configuration, since the second trench electrode 164 is connected to the drain electrode 140, the second trench electrode 164 assumes a positive potential during reverse recovery of the body diode when the drain electrode 140 assumes a positive potential. Since the first trench electrode 163 assumes a floating potential, a negative potential can be induced in the first trench electrode 163 when the second trench electrode 164 assumes a positive potential. Therefore, the first trench electrode 163 can assume a negative potential during reverse recovery without complex control.

[0041] Furthermore, according to the semiconductor device 100 of the first embodiment, the second trench electrode 164 is connected to the drain electrode 140, and therefore a snubber circuit can be formed in the semiconductor device, in which the third insulating region 166 between the second trench electrode 164 and the source electrode 130 serves as a capacitor (part of a capacitor) and the internal resistance of the second trench electrode 164 itself serves as a resistance. Therefore, the semiconductor device can be miniaturized despite having a built-in snubber circuit.

[0042] Furthermore, according to the semiconductor device 100 of the first embodiment, the capacitance C DS1 and internal resistance R (see FIG. 4), it is possible to adjust the snubber capacitance and snubber resistance according to the electrical equipment, making it possible to provide a semiconductor device with a built-in snubber circuit that can be applied flexibly to a variety of electrical equipment.

[0043] Furthermore, in the semiconductor device 100 according to the first embodiment, the distance between adjacent carrier attracting trenches 161 is narrower than the diffusion length of carriers injected from the base region 113. Therefore, an electric field that attracts holes can be formed in the depth region where the first trench electrode 163 is formed over almost the entire cell region. In reverse recovery operation, most of the holes remaining in the depth region of the drift layer 112 can be attracted to the first trench electrode 163.

[0044] Furthermore, in the semiconductor device 100 according to the first embodiment, the thickness D1 of the first insulating region is thinner than the thickness D3 of the third insulating region, so that the electric field of the drift layer 112 is more likely to be affected by the potential of the first trench electrode 163, and as a result, holes are more likely to be attracted toward the first trench electrode 163. Furthermore, the thickness D2 of the second insulating region is thinner than the thickness D3 of the third insulating region, so that when the second trench electrode 164 is at a positive potential, a negative potential can be induced in the first trench electrode 163 via the relatively thin thickness D2 of the second insulating region. Furthermore, the thickness D3 of the third insulating region is formed of a relatively thick insulating film, so that the breakdown voltage between the source electrode 130 and the drain electrode 140 can be ensured.

[0045] Furthermore, in the semiconductor device 100 according to the first embodiment, the carrier attracting trenches 161 are disposed at intervals of a predetermined number of the gate trenches 151. This allows an electric field to be formed in the drift layer 112 during reverse recovery operation that attracts holes to regions where holes are likely to remain, such as regions below the gate trenches 151 and between the gate trenches 151, thereby efficiently attracting holes to the first trench electrode 163. This further reduces the reverse recovery time. Furthermore, because the carrier attracting trenches 161 are disposed at intervals of a predetermined number of the gate trenches 151, it is possible to reduce regions that do not function as gates, resulting in a semiconductor device capable of passing a larger current.

[0046] Furthermore, according to the semiconductor device 100 of embodiment 1, the thickness D2 of the second insulating region is equal to or thinner than the thickness D4 of the gate insulating film, so that in the reverse recovery operation, when the second trench electrode 164 becomes a positive potential, a negative potential is easily induced in the first trench electrode 163.

[0047] [Embodiment 2] FIG. 6 is a diagram showing a semiconductor device 102 according to the second embodiment. The semiconductor device 102 according to the second embodiment has a configuration basically similar to that of the semiconductor device 100 according to the first embodiment, but differs from the semiconductor device 100 according to the first embodiment in that a gate electrode is formed at a position spaced apart from the second trench electrode. That is, the semiconductor device 102 according to the second embodiment includes a fourth insulating region 167 formed above the second trench electrode 164, a second gate insulating film 168 disposed on the surface of the sidewall of the carrier inducing trench 161, and a second gate electrode 169 disposed in the carrier inducing trench 161, spaced apart from the second trench electrode 164 via the fourth insulating region 167, and disposed opposite the base region 113 with the second gate insulating film 168 interposed therebetween.

[0048] The second gate electrode 169 and the second gate insulating film 168 have the same configuration as the gate electrode 153 and the gate insulating film 152 in the gate trench structure 150, and the semiconductor device 102 can be turned on and off by applying a gate voltage to the second gate electrode 169. The fourth insulating region 167 is configured to be thicker than the gate insulating film 152 and the second gate insulating film 168. Note that, while the source region 114 is not formed around the carrier inducing trench 161 in the first embodiment, a source region is also formed around the carrier inducing trench 161 in the second embodiment.

[0049] As shown in FIG. 6(a), carrier inducing trenches 161 may be formed at intervals of a predetermined number of gate trench structures, or as shown in FIG. 6(b), all gate trenches may be carrier inducing trenches 161.

[0050] As described above, the semiconductor device 102 according to the second embodiment differs from the semiconductor device 100 according to the first embodiment in that the gate electrode is formed at a position separated from the second trench electrode, but like the semiconductor device 100 according to the first embodiment, the semiconductor device 102 includes the second trench electrode 164 as a voltage application means for applying to the first trench electrode 163 a voltage having a polarity (negative potential) opposite to the polarity (positive potential) of the drain electrode 140 during the reverse recovery operation of the body diode formed by the base region 113 and the drift layer 112. Therefore, holes (carriers) are attracted to the first trench electrode 163 during the reverse recovery operation, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0051] Furthermore, according to the semiconductor device 102 of the second embodiment, the carrier-inducing trench 161 includes a second gate electrode 169 that is separated from the second trench electrode 164, which is at the drain potential, via a fourth insulating region 167 and that faces the base region via a second gate insulating film 168. Therefore, the second trench electrode 164 connected to the drain electrode 140 and the second gate electrode 169 can form a shielded gate structure. This reduces the gate-drain capacitance and the gate charge and discharge currents, thereby increasing the switching speed. Furthermore, the distance from the trench corners, where electric field concentration is likely to occur, to the second gate electrode 169 can be increased, and the insulating region can alleviate the electric field, thereby increasing the breakdown voltage.

[0052] Furthermore, according to the semiconductor device 102 of the second embodiment, the second gate electrode 169 is located in the carrier inducing trench 161, separated from the second trench electrode 164, which is at the drain potential, via the fourth insulating region 167, and is positioned opposite the base region via the second gate insulating film 168. Therefore, the semiconductor device 102 can also function as a gate in the carrier inducing trench 161, resulting in a semiconductor device capable of passing a larger current.

[0053] The semiconductor device 102 according to the second embodiment has the same configuration as the semiconductor device 100 according to the first embodiment except that the gate electrode is formed at a position separated from the second trench electrode, and therefore has the corresponding effects of the semiconductor device 100 according to the first embodiment.

[0054] [Embodiment 3] FIG. 7 is a diagram illustrating a semiconductor device 200 according to a third embodiment. The semiconductor device 200 according to the third embodiment is basically similar in configuration to the semiconductor device 100 according to the first embodiment, but differs from the semiconductor device 100 according to the first embodiment in that it does not have a carrier-inducing trench structure and uses a gate electrode as a first intra-trench electrode. That is, the semiconductor device 200 according to the third embodiment has a gate trench structure (a gate trench 251, a gate insulating film 252, and a gate electrode 253) formed at predetermined intervals (see FIGS. 7(a) and 7(b)). In reverse recovery operation, the gate electrode 253 has a negative potential and attracts carriers. Note that in the third embodiment, in addition to the carrier-inducing trench structure, drain fingers DF and drain pads DP are not formed.

[0055] The gate electrode 253 is disposed at a position facing the base region 213 via a gate insulating film 252 formed on the sidewall of the gate trench 251, and is also disposed at a position facing the drift layer 212 via an insulating film 254 serving as a first insulating region formed on the bottom and lower part of the sidewall (portion in contact with the drift layer 212) of the gate trench 251. Therefore, in the reverse recovery operation, when the gate electrode 253 has a negative potential, carriers are attracted to the bottom of the trench 251, etc., and a carrier pool is formed.

[0056] In the third embodiment, a feedback circuit 270 serving as a voltage application means is provided, connected between the drain electrode 240 and the gate electrode 253 (see FIG. 7(c)). The feedback circuit 270 is electrically connected to the gate electrode 253, the drain electrode 240, and the driving power supply Vcc, and feeds back the potential of the drain electrode 240 to the gate electrode 253 for a predetermined period (times t1 to t3 in FIG. 8) before the body diode transitions to reverse recovery operation while a forward current flows through the body diode. The feedback circuit 270 may be built into the semiconductor device or may be externally attached.

[0057] Next, the operation of the feedback circuit 270 in the reverse recovery operation will be specifically described. DS , body diode current i F and gate voltage V GS 1 is a schematic graph showing

[0058] The drain voltage V in Figure 8 DS As shown in the graph, when the semiconductor device 200 is operating as a diode, the potential of the source electrode 230 is positive and the potential of the drain electrode 240 is negative, which is a forward bias, from time t0 to time t3. Then, the drain potential starts to increase from time t2, and after time t3, the potential of the source electrode is negative and the potential of the drain electrode is positive, which is a reverse bias.

[0059] Accordingly, the body diode current i F As shown in the graph, from time t0 to time t2, the body diode current i F is positive, that is, a certain amount flows from the base region to the drift layer, but it starts to decrease after time t2, and after time t3, the body diode current i Fbecomes negative, that is, a reverse recovery current begins to flow from the drift layer 212 toward the base region. The reverse recovery current increases until a certain time (time ta) has elapsed, and then the reverse recovery current begins to decrease. Then, after time t4, the reverse recovery current becomes significantly smaller.

[0060] And the gate voltage V in Figure 8 GS As shown in the graph, when the semiconductor device 200 is operating as a diode, the gate is turned off, so that the gate voltage V GS is 0. Then, for a predetermined time (time t1 to time t2) before the reverse recovery operation starts, the gate electrode 253 and the drain electrode 240 are connected by the feedback circuit 270. From time t1 to time t2, the drain potential is negative, so the gate electrode 253 also has a negative potential, and the gate voltage V GS Also becomes negative. Then, between time t2 and time t3, the feedback circuit 270 disconnects the gate electrode 253 from the drain electrode 240. At this time, the gate electrode 253 is not connected to anything, so the negative potential is maintained. The gate electrode 253 is not turned on until MOS operation is achieved, so the negative potential is maintained.

[0061] Next, the behavior of carriers from time t0 to time t4 when the semiconductor device 200 according to the third embodiment is operating as a diode will be described. Fig. 9 is a diagram showing the state of carriers in the semiconductor device 200 according to the third embodiment. (1) Time t0~t1 Between time t0 and time t1, a voltage is applied to the drain electrode 240 such that it is at a negative potential and a voltage is applied to the source electrode 230 such that it is at a positive potential, and a body diode formed by the base region 213 and the drift layer 212 is forward biased. At this time, a forward current flows from the base region 213 to the drift layer 212. Therefore, carriers (holes) are injected from the base region 213 to the drift layer 212 (see FIG. 9(a)).

[0062] (2) Time t1~t2 As shown in FIG. 8, at time t3, the drain voltage V DS becomes positive, and the body diode current i F becomes negative, and a reverse recovery operation begins. In the semiconductor device 200 according to the third embodiment, for a predetermined time (time t1 to t3) before transitioning to the reverse recovery operation, the feedback circuit 270 connects the gate electrode 253 and the drain electrode 240 and feeds back the potential of the drain electrode 240 to the gate electrode 253. Because the drain electrode 240 is at a negative potential from time t1 to time t2 (see FIG. 8), the potential of the gate electrode 253 becomes a negative potential (see FIG. 9(b)). Therefore, the negative potential of the gate electrode 253 forms an electric field in the drift layer 112, and holes are attracted to the gate electrode 253. Note that since the forward bias is maintained during this period, injection of holes from the base region 213 to the drift layer 212 continues.

[0063] (3) Time t2~time t3 At time t2, a positive potential is applied to the drain electrode 240, and a voltage that serves as a reverse bias begins to be applied to the body diode. At time t3, when the reverse recovery operation begins, the drain electrode 240 becomes at a positive potential, so the feedback circuit 270 disconnects the gate electrode 253 from the drain electrode 240 before time t3 (before time t2 or between times t2 and t3), and keeps the potential of the gate electrode 253 at a negative potential (see FIGS. 8 and 9(c)). This makes it possible to maintain the state in which holes are attracted to the gate electrode 253.

[0064] (4) Time t3~t4 At time t3, the forward current disappears and reverse recovery begins (see FIG. 8). Since the potential of the gate electrode 253 remains negative, the holes attracted to the gate electrode 253 remain attracted to the gate electrode 253 and do not contribute to the reverse recovery current. Therefore, the holes in the drift layer 212 do not reach the base region 213, and the reverse recovery time can be shortened. In addition, the drain voltage VDS has turned positive, but since the connection between the drain electrode 240 and the gate electrode 253 is cut off, the potential of the gate electrode 253 remains negative.

[0065] As described above, the semiconductor device 200 according to the third embodiment differs from the semiconductor device 100 according to the first embodiment in that it does not have a carrier-inducing trench structure and uses a gate electrode as a first intra-trench electrode, but like the semiconductor device 100 according to the first embodiment, the semiconductor device 200 includes a feedback circuit 270 as a voltage application means for applying to the gate electrode 253 a voltage that is a potential (negative potential) of the opposite polarity to the polarity (positive potential) of the potential of the drain electrode 240 during the reverse recovery operation of the body diode formed by the base region 213 and the drift layer 212. Therefore, during the reverse recovery operation of the body diode, holes (carriers) are attracted to the gate electrode 253 and do not reach the base region 213, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0066] Furthermore, according to the semiconductor device 200 of the third embodiment, the voltage application means is a feedback circuit that is connected to the gate electrode 253 and the drain electrode 240, respectively, connects the drain electrode 240 and the gate electrode 253 for a predetermined period (from time t1 to time t2 in FIG. 9 ) before the body diode transitions to reverse recovery operation while a forward current is flowing through the body diode, and cuts the connection between the drain electrode 240 and the gate electrode 253 during the reverse recovery operation of the body diode. Therefore, the reverse recovery time can be easily shortened by simply adding the configuration of the feedback circuit 270, without changing the configuration inside the semiconductor substrate.

[0067] Furthermore, the semiconductor device 200 according to the third embodiment does not require the formation of a drain pad DP and a drain finger DF, resulting in a miniaturized semiconductor device. Furthermore, since it is not necessary to form a hole-inducing trench structure that does not perform gate operation within the semiconductor device, the effective area can be increased.

[0068] The semiconductor device 200 of embodiment 3 does not have a carrier-inducing trench structure and has a configuration similar to that of the semiconductor device 100 of embodiment 1 except that it uses a gate electrode as the first trench electrode, and therefore has the corresponding effects of the semiconductor device 100 of embodiment 1.

[0069] [Variation 1] The semiconductor device 300 according to the first modification has a configuration similar to that of the semiconductor device 200 according to the third embodiment, but differs from the semiconductor device 200 according to the third embodiment in that an external power supply 370 is used instead of the feedback circuit 270 (see FIG. 10 ). The external power supply 370 is electrically connected to the gate electrode G, and applies a voltage that results in a negative potential to the gate electrode G for a predetermined period of time before the body diode transitions to reverse recovery operation while a forward current is flowing through the body diode. During the reverse recovery operation, the gate electrode may be in a floating state, as in the third embodiment, or a voltage that results in a negative potential may be continuously applied.

[0070] As described above, the semiconductor device 300 according to the first modification differs from the semiconductor device 200 according to the third embodiment in that it uses the external power supply 370 instead of the feedback circuit 270. However, like the semiconductor device 200 according to the third embodiment, the semiconductor device 300 includes the external power supply 370 as a voltage application means for applying to the gate electrode a voltage whose polarity is opposite (negative) to the polarity (positive) of the potential of the drain electrode during the reverse recovery operation of the body diode formed by the base region and the drift layer. Therefore, during the reverse recovery operation of the body diode, holes (carriers) are attracted to the gate electrode and do not reach the base region, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0071] [Embodiment 4] 11 is a diagram showing a semiconductor device 202 according to a fourth embodiment. The semiconductor device 202 according to the fourth embodiment basically has the same configuration as the semiconductor device 200 according to the third embodiment, but differs from the semiconductor device 200 according to the third embodiment in that a shielded gate structure is used as the gate structure and a shield electrode is used as the first intra-trench electrode. That is, the semiconductor device 200 according to the third embodiment has a shielded gate structure (a trench 261, a first insulating region 262, a shield electrode 263 as the first intra-trench electrode, a gate electrode 264, a second insulating region 265, and a gate insulating film 266) formed at predetermined intervals, and in the reverse recovery operation, the shield electrode 263 has a negative potential to attract carriers (see FIG. 11).

[0072] The first insulating region 262 is formed on the surface of the bottom and lower sidewall of the trench 261 . A shield electrode 263 serving as a first intra-trench electrode is disposed in the trench 261 at a position facing the drift layer 212 with a first insulating region 262 interposed therebetween. The gate electrode 264 is disposed in the trench 261 above the shield electrode 263 with a second insulating region 265 interposed therebetween, while being spaced apart from the shield electrode 263 . The second insulating region 265 is disposed between the shield electrode 263 and the gate electrode 264 and separates the gate electrode 264 from the shield electrode 263 . The gate insulating film 266 is disposed on the surface of the sidewall of the trench 261 and separates the gate electrode 264 from the sidewall of the trench 261 .

[0073] In the fourth embodiment, the voltage application means 272 is connected to the power supply Vcc, the source electrode 230, and the shield electrode 263, and during a period in which a forward current flows during MOS operation and diode operation, the shield electrode 263 and the source electrode 230 are connected, thereby setting the potential of the shield electrode 263 to the source potential (for example, 0 V). On the other hand, during reverse recovery operation during diode operation, the shield electrode 263 is connected to the power supply Vcc, and a voltage that becomes a negative potential is applied to the shield electrode 263. The voltage application means 272 is, for example, a switching circuit that includes the power supply Vcc.

[0074] Therefore, in the semiconductor device 202 according to the fourth embodiment, when the semiconductor device 202 is operating as a MOS, the shield electrode 263 is connected to the source electrode 230 and acts as a shield electrode. On the other hand, when the semiconductor device 202 is operating as a diode, a voltage that is a negative potential is applied from the voltage application means during reverse recovery operation. Then, in cases other than reverse recovery operation of the body diode, the voltage application means applies to the shield electrode 263 a voltage that is a potential that extends the depletion layer in the semiconductor device (the same potential as the source electrode). Note that "the same potential as the source electrode" does not only mean the exact same potential as the source electrode, but also includes a potential that is approximately the same as the source potential with some margin.

[0075] As described above, the semiconductor device 202 according to the fourth embodiment differs from the semiconductor device 200 according to the third embodiment in that it uses a shielded gate structure as the gate structure and a shield electrode as the first trench electrode, but like the semiconductor device 200 according to the third embodiment, it includes a voltage application unit 272 that applies to the gate electrode a voltage that is a potential (negative potential) of opposite polarity to the polarity (positive potential) of the potential of the drain electrode 240 during the reverse recovery operation of the body diode formed by the base region 213 and the drift layer 212. Therefore, during the reverse recovery operation of the body diode, holes (carriers) are attracted to the gate electrode and do not reach the base region 213, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0076] Furthermore, according to the semiconductor device 202 of the fourth embodiment, the voltage application means applies to the shield electrode 263 a voltage that is a potential that extends the depletion layer in the semiconductor device (the same potential as that of the source electrode) in cases other than the reverse recovery operation of the body diode. Therefore, in MOS operation, the shield electrode 263 acts as a shield electrode, the distance between the gate electrode 264 and the corner of the trench 261 becomes longer, and the thickness of the insulating region also becomes thicker, thereby increasing the breakdown voltage.

[0077] Furthermore, the semiconductor device 202 according to the fourth embodiment includes the gate electrode 264 arranged in the trench 261 at a distance from the shield electrode 263, the second insulating region 265 arranged between the shield electrode 263 and the gate electrode 264 and separating the gate electrode 264 from the shield electrode 263, and the gate insulating film 266 arranged on the surface of the side wall of the trench 261 and separating the gate electrode 264 from the side wall of the trench 261, so that the semiconductor device 202 can have a shielded gate structure when performing MOS operation.

[0078] The semiconductor device 202 according to the fourth embodiment has the same configuration as the semiconductor device 200 according to the third embodiment except that it uses a shield gate structure as the gate structure and a shield electrode as the first trench electrode, and therefore has the corresponding effects of the semiconductor device 200 according to the third embodiment.

[0079] [Variation 2] The semiconductor device 204 according to the second modification has a configuration similar to that of the semiconductor device 202 according to the fourth embodiment, but differs in the configuration of the shield gate structure from that of the semiconductor device 202 according to the fourth embodiment (see FIG. 12 ). That is, the shield gate structure in the semiconductor device 204 according to the second modification includes: a gate electrode 264 formed on the sidewall of the upper portion of the trench 261 via a gate insulating film 266; a shield electrode 263 formed in the center of the trench 261 while being spaced apart from the gate electrode 264; and an insulating region 262 extending between the gate electrode 264 and the shield electrode 263 within the trench 261 to separate the shield electrode 263 from the gate electrode 264 and extending along the sidewalls and bottom of the trench 261 to separate the shield electrode 263 from the sidewalls and bottom of the trench 261.

[0080] As described above, the semiconductor device 204 according to the second modification has a different shield gate structure from that of the semiconductor device 202 according to the fourth embodiment. However, as in the semiconductor device 200 according to the third embodiment, the semiconductor device 204 includes a voltage application means for applying to the gate electrode 264 a voltage that is a potential (negative potential) of the opposite polarity to the polarity (positive potential) of the potential of the drain electrode 240 during the reverse recovery operation of the body diode formed by the base region 213 and the drift layer 212. Therefore, during the reverse recovery operation of the body diode, holes (carriers) are attracted to the gate electrode 264 and do not reach the base region 213, and the attracted holes do not contribute to the reverse recovery current. Therefore, the reverse recovery time can be shortened.

[0081] Although the present invention has been described above based on the above embodiment, the present invention is not limited to the above embodiment. The present invention can be embodied in various forms without departing from the spirit of the present invention, and for example, the following modifications are also possible. Furthermore, it is also possible to combine the features described in the embodiment and modifications.

[0082] (1) The shapes, positions, sizes, etc. described in the above embodiments (including each modified example; the same applies below) are merely examples and can be changed within the scope that does not impair the effects of the present invention. Furthermore, although the first conductivity type is n-type and the second conductivity type is p-type, the first conductivity type may be p-type and the second conductivity type may be n-type.

[0083] (2) In the above embodiments, the present invention is applied to a trench gate semiconductor device, but the present invention is not limited to this. The present invention may also be applied to a planar gate semiconductor device (semiconductor device 104 according to Modification 3, see FIG. 13).

[0084] (3) In the third embodiment, all of the gate electrodes are set to a negative potential for a predetermined period (time t1 to time t2 in FIG. 8) before the body diode transitions to reverse recovery operation while a forward current flows through the body diode. However, the present invention is not limited to this. Only some of the gate electrodes (gate electrode 283 as the first trench electrode in FIG. 14) may be connected to the feedback circuit 270 (see the semiconductor device 206 according to the fourth modification, FIG. 14). The electrode connected to the feedback circuit 270 may or may not function as a gate.

[0085] (4) In the above-described first and second embodiments, the second trench electrode is connected to the drain finger DF in the peripheral region, but the present invention is not limited to this. The second trench electrode may be connected to the drain electrode 140 via a side surface of the semiconductor substrate or a channel stopper electrode (not shown).

[0086] (5) In the above-described first and second embodiments, a drain pad and drain fingers are used to set the second trench electrode at the drain potential, but the present invention is not limited to this. Any suitable configuration can be used as long as it sets the second trench electrode at the drain potential (for example, connecting the drain electrode and the second trench electrode via external wiring, connecting the drain electrode to the side or bottom surface of the semiconductor substrate, etc.), and the drain pad and drain fingers do not have to be used.

[0087] (6) In the first embodiment, the first trench electrode is disposed below the second trench electrode, but the present invention is not limited to this. For example, the first trench electrode may be disposed on the lower side of the second trench electrode disposed in the center of the trench, with the second insulating region interposed therebetween.

[0088] (7) In the second embodiment, the gate electrode, the second trench electrode, and the first trench electrode are arranged in this order from top to bottom, but the present invention is not limited to this. For example, the gate electrode may be arranged on the upper side of the second trench electrode with a fourth insulating region interposed therebetween, or the first trench electrode may be arranged on the lower side of the second trench electrode arranged in the center of the trench with a second insulating region interposed therebetween.

[0089] (8) In the above-described first and third embodiments, a shield gate structure may be used instead of the normal gate trench structure.

[0090] (9) In the above embodiments, a MOSFET is used as the semiconductor device, but the present invention is not limited to this. The semiconductor device may be an IGBT, a thyristor, a triac, a diode, or any other suitable semiconductor device. [Explanation of symbols]

[0091] 100, 102, 104, 106, 108, 200, 202, 300, 900... semiconductor device, 110, 910... semiconductor substrate, 111, 211... low resistance semiconductor layer, 112, 212... drift layer, 113, 213... base region, 114, 214... source region, 120, 220... interlayer insulating film, 130, 230... source electrode, 140, 240... drain electrode, 150, 250... gate trench structure, 151, 251... gate trench, 152, 252... gate 160...carrier induction trench structure, 161, 261...carrier induction trench, 162, 262...first insulating region, 163, 263...first trench electrode, 164...second trench electrode, 165...second insulating region, 166...third insulating region, 167...fourth insulating region, 168...second gate insulating film, 169...second gate electrode, 254...insulating film, 270...feedback circuit, 370...external power supply, 272...voltage application means

Claims

1. a semiconductor substrate having a first conductivity type semiconductor layer and a second conductivity type semiconductor region provided on a surface of the first conductivity type semiconductor layer, the first conductivity type semiconductor layer and the second conductivity type semiconductor region forming a body diode; a first electrode disposed on one surface of the semiconductor substrate and electrically connected to the second conductivity type semiconductor region; a second electrode disposed on the other surface of the semiconductor substrate opposite to the one surface and electrically connected to the first conductivity type semiconductor layer; a trench formed in the one surface of the semiconductor substrate, the trench having a bottom adjacent to the first conductive type semiconductor layer and sidewalls adjacent to the second conductive type semiconductor region and the first conductive type semiconductor layer; a first insulating region disposed on a surface of the trench; a first trench electrode disposed in the trench at a position facing the first conductivity type semiconductor layer with the first insulating region interposed therebetween; voltage application means for applying to the first trench electrode a voltage having a potential of a polarity opposite to a polarity of a potential of the second electrode in a reverse recovery operation of the body diode, the voltage application means is a second trench electrode disposed in the trench and spaced apart from the first trench electrode, The semiconductor device includes a second insulating region disposed between the first trench electrode and the second trench electrode, the second insulating region separating the second trench electrode from the first trench electrode; a third insulating region disposed on a surface of the sidewall of the trench, separating the second trench electrode from the sidewall of the trench; the first trench electrode is in a floating state; The semiconductor device is characterized in that the second trench electrode is connected to the second electrode.

2. 2. The semiconductor device according to claim 1, wherein when the thickness of the first insulating region is D1, the thickness of the second insulating region is D2, and the thickness of the third insulating region is D3, D1<D3 and D2<D3 are satisfied.

3. The semiconductor device includes: a gate electrode disposed in the trench, the gate electrode being spaced apart from the second trench electrode and facing the second conductivity type semiconductor region via a gate insulating film formed on a sidewall of the trench; 3. The semiconductor device according to claim 1, further comprising a fourth insulating region formed between the second trench electrode and the gate electrode.

4. the semiconductor substrate further includes a first conductivity type semiconductor region on at least a portion of a surface of the second conductivity type semiconductor region, a plurality of gate trenches formed on one surface of the semiconductor substrate, the gate trenches having bottoms adjacent to the first conductive type semiconductor layer and sidewalls adjacent to at least the second conductive type semiconductor region; a plurality of gate electrodes arranged inside each of the plurality of gate trenches so as to face the second conductivity type semiconductor region via a gate insulating film formed on a side wall of the gate trench; 4. The semiconductor device according to claim 1, wherein the trenches are arranged at intervals of a predetermined number of the plurality of gate trenches.

5. 5. The semiconductor device according to claim 4, wherein when the thickness of the second insulating region is D2 and the thickness of the gate insulating film is D4, D2≦D4 is satisfied.

6. The trench includes a plurality of trenches, 6. The semiconductor device according to claim 1, wherein the distance between adjacent trenches is narrower than the diffusion length of carriers injected from the second conductivity type semiconductor region.

7. 4. The semiconductor device according to claim 3, wherein the trench comprises a plurality of trenches arranged at predetermined intervals.

8. a semiconductor substrate having a first conductivity type semiconductor layer and a second conductivity type semiconductor region provided on a surface of the first conductivity type semiconductor layer, the first conductivity type semiconductor layer and the second conductivity type semiconductor region forming a body diode; a first electrode disposed on one surface of the semiconductor substrate and electrically connected to the second conductivity type semiconductor region; a second electrode disposed on the other surface of the semiconductor substrate opposite to the one surface and electrically connected to the first conductivity type semiconductor layer; a trench formed in the one surface of the semiconductor substrate, the trench having a bottom adjacent to the first conductive type semiconductor layer and sidewalls adjacent to the second conductive type semiconductor region and the first conductive type semiconductor layer; a first insulating region disposed on a surface of the trench; a first trench electrode disposed in the trench at a position facing the first conductivity type semiconductor layer with the first insulating region interposed therebetween; voltage application means for applying to the first trench electrode a voltage having a potential of a polarity opposite to a polarity of a potential of the second electrode in a reverse recovery operation of the body diode in a reverse recovery operation of the body diode; the semiconductor substrate further includes a first conductivity type semiconductor region formed in at least a portion of a surface of the second conductivity type semiconductor region at a position adjacent to a sidewall of the trench; a gate insulating film is formed on a sidewall of the trench; the first trench electrode is a gate electrode arranged at a position facing the second conductivity type semiconductor region with the gate insulating film interposed therebetween, the voltage application means is a feedback circuit that is connected to the first trench electrode, the gate electrode, and the second electrode, respectively, connects the second electrode and the gate electrode for a predetermined period before the body diode transitions to reverse recovery operation while a forward current is flowing through the body diode, and disconnects the connection between the second electrode and the gate electrode during the reverse recovery operation of the body diode.

9. a semiconductor substrate having a first conductivity type semiconductor layer and a second conductivity type semiconductor region provided on a surface of the first conductivity type semiconductor layer, the first conductivity type semiconductor layer and the second conductivity type semiconductor region forming a body diode; a first electrode disposed on one surface of the semiconductor substrate and electrically connected to the second conductivity type semiconductor region; a second electrode disposed on the other surface of the semiconductor substrate opposite to the one surface and electrically connected to the first conductivity type semiconductor layer; a trench formed in the one surface of the semiconductor substrate, the trench having a bottom adjacent to the first conductive type semiconductor layer and sidewalls adjacent to the second conductive type semiconductor region and the first conductive type semiconductor layer; a first insulating region disposed on a surface of the trench; a first trench electrode disposed in the trench at a position facing the first conductivity type semiconductor layer with the first insulating region interposed therebetween; voltage application means for applying to the first trench electrode a voltage having a potential of a polarity opposite to a polarity of a potential of the second electrode in a reverse recovery operation of the body diode in a reverse recovery operation of the body diode; the semiconductor substrate further includes a first conductivity type semiconductor region on at least a portion of a surface of the second conductivity type semiconductor region, a plurality of gate trenches formed in one surface of the semiconductor substrate, the gate trenches having bottoms adjacent to the first conductivity type semiconductor layer and sidewalls adjacent to the second conductivity type semiconductor region; a plurality of gate electrodes each disposed within the trench via a gate insulating film formed on a sidewall of each of the plurality of gate trenches, the side surfaces of the gate insulating film facing the second conductive type semiconductor region; the trenches are arranged at intervals of a predetermined number of the plurality of gate trenches, the voltage application means is a feedback circuit that is connected to the first trench electrode and the second electrode, connects the second electrode and the first trench electrode for a predetermined period before the body diode transitions to reverse recovery operation while a forward current is flowing through the body diode, and disconnects the connection between the second electrode and the first trench electrode during the reverse recovery operation of the body diode.

Images