Semiconductor Devices

Abstract

To provide a semiconductor device with a reduced recovery loss.SOLUTION: A semiconductor device comprises a semiconductor part, first to fourth electrodes, and first and second insulating films. The semiconductor part includes a first semiconductor layer of a first conductivity type, second and third semiconductor layers of a second conductivity type, and a fourth semiconductor layer of the first conductivity type. The first electrode is provided on a rear face of the semiconductor part. The second electrode is provided on a front face opposite to the rear face. The third and fourth electrodes are each arranged inside a trench provided on the front face side of the semiconductor part. The first and second insulating films are located between the semiconductor part and the third and fourth electrodes, respectively. The second semiconductor layer is provided between the first semiconductor layer and the second electrode so as to extend between the third electrode and the fourth electrode. The third semiconductor layer is provided partially between the second semiconductor layer and the second electrode. The fourth semiconductor layer is located in the second semiconductor layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] Semiconductor devices for power conversion are required to reduce recovery loss (switching loss). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-73714 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments provide a semiconductor device with reduced recovery loss. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a semiconductor portion, first to fourth electrodes, a first insulating film, and a second insulating film. The semiconductor portion includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, and a fourth semiconductor layer of the first conductivity type. The first electrode is provided on a back surface of the semiconductor portion, and the second electrode is provided on a front surface of the semiconductor portion opposite the back surface. The third electrode is disposed inside a first trench provided on the front surface side of the semiconductor portion. The first insulating film covers the inner surface of the first trench and is located between the semiconductor portion and the third electrode. The fourth electrode is disposed inside a second trench provided on the front surface side of the semiconductor portion, adjacent to the first trench. The second insulating film covers the inner surface of the second trench and is located between the semiconductor portion and the fourth electrode. The first semiconductor layer extends between the first electrode and the second electrode, and the second semiconductor layer is provided between the first semiconductor layer and the second electrode and extends between the third electrode and the fourth electrode. The third semiconductor layer is partially provided on the second semiconductor layer between the second semiconductor layer and the second electrode and contains a second conductivity type impurity at a concentration higher than the second conductivity type impurity concentration of the second semiconductor layer. The fourth semiconductor layer is located in the second semiconductor layer between the third electrode and the fourth electrode, and the second semiconductor layer is located between the third semiconductor layer and the fourth semiconductor layer and includes a portion that separates the third semiconductor layer from the fourth semiconductor layer. The second electrode is connected to the second semiconductor layer and the third semiconductor layer at the surface of the semiconductor portion. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment. [Figure 2] 1 is a schematic perspective view showing a semiconductor device according to a first embodiment. [Figure 3] 4 is a graph showing characteristics of the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view showing a semiconductor device according to a first modified example of the first embodiment. [Figure 5] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to a second modification of the first embodiment. [Figure 6] FIG. 10 is a schematic perspective view showing a semiconductor device according to a third modified example of the first embodiment. [Figure 7] FIG. 10 is a schematic perspective view showing a semiconductor device according to a fourth modified example of the first embodiment. [Figure 8] FIG. 10 is a schematic perspective view showing a semiconductor device according to a fifth modified example of the first embodiment. [Figure 9] FIG. 10 is a schematic perspective view showing a semiconductor device according to a sixth modified example of the first embodiment. [Figure 10] FIG. 12 is a schematic diagram showing a semiconductor device according to a seventh modification of the first embodiment. [Figure 11] FIG. 13 is a schematic diagram showing a semiconductor device according to an eighth modification of the first embodiment. [Figure 12] FIG. 4 is a schematic diagram showing a semiconductor device according to a second embodiment. [Figure 13] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to a first modified example of the second embodiment. [Figure 14] FIG. 10 is a schematic diagram showing a semiconductor device according to a second modification of the second embodiment. [Figure 15] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to a third modified example of the second embodiment. [Figure 16] FIG. 10 is a schematic perspective view showing a semiconductor device according to a third embodiment. [Figure 17] FIG. 11 is a schematic perspective view showing a semiconductor device according to a first modified example of the third embodiment. [Figure 18] FIG. 13 is a schematic perspective view showing a semiconductor device according to a second modification of the third embodiment. [Figure 19] FIG. 11 is a schematic perspective view showing a semiconductor device according to a third modified example of the third embodiment. [Figure 20] 10 is a graph showing characteristics of the semiconductor device according to the third embodiment. [Figure 21] FIG. 11 is a schematic perspective view showing a semiconductor device according to a fourth modified example of the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments will be described with reference to the drawings. Identical parts in the drawings are assigned the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing.

[0008] Furthermore, the arrangement and configuration of each part will be explained using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually perpendicular and represent the X-direction, Y-direction, and Z-direction, respectively. In addition, the Z-direction may be explained as upward and the opposite direction as downward.

[0009] (First embodiment) 1 is a schematic cross-sectional view showing a semiconductor device 1 according to a first embodiment. The semiconductor device 1 is a diode. For example, the semiconductor device 1 is used as a free wheel diode (FWD) that constitutes an inverter. Furthermore, the semiconductor device 1 may be integrated with an IGBT (Insulated Gate Bipolar Transistor) to constitute an RC-IGBT (Reverse Conducting IGBT).

[0010] The semiconductor device 1 includes a semiconductor portion 10, a first electrode 20, a second electrode 30, a third electrode 40, and a fourth electrode 50. The semiconductor portion 10 is made of, for example, silicon.

[0011] The first electrode 20 is provided on the back surface 10B of the semiconductor portion 10. The first electrode 20 is, for example, a cathode electrode. The first electrode 20 is, for example, a metal layer containing at least one selected from the group consisting of aluminum (Al), titanium (Ti), nickel (Ni), tungsten (W), gold (Au), platinum (Pt), and the like.

[0012] The second electrode 30 is provided on the front surface 10F opposite to the back surface 10B of the semiconductor portion 10. The second electrode 30 is, for example, an anode electrode. The second electrode 30 is, for example, a metal layer containing at least one selected from the group consisting of aluminum (Al), titanium (Ti), nickel (Ni), tungsten (W), gold (Au), platinum (Pt), etc.

[0013] The third electrode 40 is disposed inside a first trench TR1 provided on the front surface 10F side of the semiconductor portion 10. The third electrode 40 faces the semiconductor portion 10 via a first insulating film 45 that covers the inner surface of the first trench TR1. That is, the first insulating film 45 is provided between the semiconductor portion 10 and the third electrode 40. The first insulating film 45 is, for example, a silicon oxide film.

[0014] The fourth electrode 50 is disposed inside a second trench TR2 provided on the front surface 10F side of the semiconductor portion 10. The second trench TR2 is provided adjacent to the first trench TR1. The fourth electrode 50 faces the semiconductor portion 10 via a second insulating film 55 that covers the inner surface of the second trench TR2. That is, the second insulating film 55 is provided between the semiconductor portion 10 and the fourth electrode 50. The second insulating film 55 is, for example, a silicon oxide film.

[0015] The semiconductor portion 10 includes a first semiconductor layer 11 of a first conductivity type, a second semiconductor layer 13 of a second conductivity type, a third semiconductor layer 15 of the second conductivity type, a fourth semiconductor layer 17 of the first conductivity type, and a fifth semiconductor layer 19 of the first conductivity type. In the following description, the first conductivity type is referred to as n-type and the second conductivity type is referred to as p-type.

[0016] The first semiconductor layer 11 is, for example, an n-type low concentration layer. The first semiconductor layer 11 extends between the first electrode 20 and the second electrode 30.

[0017] The second semiconductor layer 13 is, for example, a p-type anode layer. The second semiconductor layer 13 is provided between the first semiconductor layer 11 and the second electrode 30. The second semiconductor layer 13 also extends between the third electrode 40 and the fourth electrode 50.

[0018] The third semiconductor layer 15 is, for example, a p+ type contact layer. The third semiconductor layer 15 is provided partially on the second semiconductor layer 13 between the second semiconductor layer 13 and the second electrode 30. The third semiconductor layer 15 contains a second conductivity type impurity at a concentration higher than the concentration of the second conductivity type impurity in the second semiconductor layer 13.

[0019] The second electrode 30 is connected to the second semiconductor layer 13 and the third semiconductor layer 15 on the surface 10F of the semiconductor portion 10. The second electrode 30 is connected to the second semiconductor layer 13, for example, by a Schottky connection. The second electrode 30 is also connected to the third semiconductor layer 15, for example, by an ohmic connection. The embodiment is not limited to this, and it is sufficient that the impurity concentration in the surface layer of the second semiconductor layer 13 at the interface between the second electrode 30 and the second semiconductor layer 13 is low. In other words, the second electrode 30 is not limited to being connected to the second semiconductor layer 13 by a Schottky connection.

[0020] The fourth semiconductor layer 17 has, for example, n-type conductivity and is provided in the second semiconductor layer 13. The second semiconductor layer 13 extends between the third semiconductor layer 15 and the fourth semiconductor layer 17 and includes a portion that separates the fourth semiconductor layer 17 from the third semiconductor layer 15. The second semiconductor layer 13 also includes another portion that extends between the first semiconductor layer 11 and the fourth semiconductor layer 17 and separates the fourth semiconductor layer 17 from the first semiconductor layer 11.

[0021] The third semiconductor layer 15 and the fourth semiconductor layer 17 are each provided so as to be in contact with the first insulating film 45. The third semiconductor layer 15 and the fourth semiconductor layer 17 face the third electrode 40 via the first insulating film 45. The third semiconductor layer 15 is located between the fourth semiconductor layer 17 and the second electrode 30.

[0022] The semiconductor portion 10 further includes another third semiconductor layer 15 and another fourth semiconductor layer 17. The another third semiconductor layer 15 and the another fourth semiconductor layer 17 are each in contact with the second insulating film 55. The another third semiconductor layer 15 and the another fourth semiconductor layer 17 face the fourth electrode 50 with the second insulating film 55 interposed therebetween.

[0023] The second semiconductor layer 13 extends between the fourth semiconductor layer 17 and another fourth semiconductor layer 17, and between the third semiconductor layer 15 and another third semiconductor layer 15. The second semiconductor layer 13 contacts the second electrode 30 on the surface 10F of the semiconductor portion 10.

[0024] The fifth semiconductor layer 19 is, for example, an n-type cathode layer. The fifth semiconductor layer 19 is provided between the first semiconductor layer 11 and the first electrode 20. The fifth semiconductor layer 19 contains a first conductivity type impurity at a concentration higher than the concentration of the first conductivity type impurity in the first semiconductor layer 11. The first electrode 20 is, for example, ohmically connected to the fifth semiconductor layer 19 on the back surface 10B of the semiconductor portion 10.

[0025] 1, the third electrode 40 and the fourth electrode 50 are connected to the second electrode 30 and are provided so as to have the same potential as the second electrode 30. The embodiment is not limited to this example, and for example, the third electrode 40 and the fourth electrode 50 may be configured to be electrically insulated from the second electrode 30 and supplied with a suitable potential.

[0026] In the semiconductor device 1, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, it is possible to control the flow paths of the electron current Ie flowing from the first semiconductor layer 11 to the second electrode 30 and the hole current Ih flowing from the second electrode 30 to the first semiconductor layer 11. For example, when a forward voltage is applied between the first electrode 20 and the second electrode 30, the electron current Ie flows from the first semiconductor layer 11 to the second electrode 30 via the fourth semiconductor layer 17. The hole current Ih flows to the first semiconductor layer 11 via the third semiconductor layer 15 and the second semiconductor layer 13. That is, the hole current Ih flows from the third semiconductor layer 15 to the second electrode 30 via the extension portion 13ex of the second semiconductor layer 13 between the fourth semiconductor layer 17 and another fourth semiconductor layer 17 to the first semiconductor layer 11.

[0027] In this way, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, the path of the hole current Ih is narrowed, and hole injection from the second semiconductor layer 13 to the first semiconductor layer 11 is suppressed. Therefore, in the turn-off process of transitioning from the on state to the off state, hole injection is suppressed, so that it is possible to shorten the time required for holes to be discharged, and recovery loss (switching loss) can be reduced.

[0028] 2 is a schematic perspective view showing the semiconductor device 1 according to the first embodiment. In FIG. 2, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0029] 2, the third electrode 40 and the fourth electrode 50 each extend in a direction along the surface 10F of the semiconductor portion 10, for example, in the Y direction. The third semiconductor layer 15 and the fourth semiconductor layer 17 each extend in the Y direction along the first insulating film 45. Furthermore, another third semiconductor layer 15 and another fourth semiconductor layer 17 each extend in the Y direction along the second insulating film 55.

[0030] 3 is a graph showing the characteristics of the semiconductor device 1 according to the first embodiment, where the horizontal axis represents the forward voltage VF and the vertical axis represents the recovery loss Err.

[0031] 3, as the distance Lnn in the Z direction from the first semiconductor layer 11 to the fourth semiconductor layer 17 decreases, the recovery loss decreases. That is, as Lnn decreases, hole injection from the second semiconductor layer 13 and the third semiconductor layer 15 to the first semiconductor layer 11 is suppressed, and the recovery loss decreases. In this way, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, the recovery loss can be reduced.

[0032] 4(a) and 4(b) are schematic cross-sectional views showing semiconductor devices 1b and 1c according to a first modification of the first embodiment, in which the first electrode 20, the second electrode 30, and the fifth semiconductor layer 19 are omitted.

[0033] In the semiconductor device 1b shown in FIG. 4(a), the distance Wpp between the third semiconductor layer 15 and another third semiconductor layer 15 in the direction from the third electrode 40 toward the fourth electrode 50, for example, in the X direction, is narrower than the distance Wnn between the fourth semiconductor layer 17 and another fourth semiconductor layer 17 in the X direction.

[0034] For example, even if the gap Wpp becomes narrow due to constraints in the manufacturing process, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, the path of the hole current Ih is narrowed, and hole injection from the third semiconductor layer 15 and the second semiconductor layer 13 to the first semiconductor layer 11 is suppressed.

[0035] 4(b), the distance Wnn in the X direction between the fourth semiconductor layer 17 and another fourth semiconductor layer 17 is narrower than the distance Wpp between the third semiconductor layer 15 and another third semiconductor layer 15. By providing the fourth semiconductor layer 17 in the second semiconductor layer 13, the path of the hole current Ih is narrowed, and hole injection from the third semiconductor layer 15 and the second semiconductor layer 13 to the first semiconductor layer 11 is suppressed. This effect is further enhanced by narrowing the distance Wnn.

[0036] In this way, by suitably setting the spacing Wpp between the third semiconductor layer 15 and another third semiconductor layer 15 and the spacing Wnn between the fourth semiconductor layer 17 and another fourth semiconductor layer 17, it is possible to control the forward characteristics and the recovery characteristics from the on state to the off state.

[0037] 5(a) and 5(b) are schematic cross-sectional views showing semiconductor devices 1d and 1e according to a second modification of the first embodiment, in which the first electrode 20, the second electrode 30, and the fifth semiconductor layer 19 (see FIG. 1) are omitted.

[0038] 5(a), the fourth semiconductor layer 17 is in contact with the first semiconductor layer 11. The fourth semiconductor layer 17 is in contact with the first insulating film 45, and the other fourth semiconductor layer 17 is in contact with the second insulating film 55. The second semiconductor layer 13 includes an extending portion 13ex extending between the fourth semiconductor layer 17 and the other fourth semiconductor layer 17. The extending portion 13ex of the second semiconductor layer 13 is in contact with the first semiconductor layer 11 between the fourth semiconductor layer 17 and the other fourth semiconductor layer 17.

[0039] 5(b), the third electrode 40 and the fourth electrode 50 are provided in the second semiconductor layer 13. A first insulating film 45 is provided between the second semiconductor layer 13 and the third electrode 40. A second insulating film 55 is provided between the second semiconductor layer 13 and the fourth electrode 50. The second semiconductor layer 13 extends between the first semiconductor layer 11 and the third electrode 40 and between the first semiconductor layer 11 and the fourth electrode 50.

[0040] Fig. 6 is a schematic perspective view showing a semiconductor device 1f according to a third modification of the first embodiment. In Fig. 6, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0041] The semiconductor device 1f has a contact trench CT. The contact trench CT is provided between a third semiconductor layer 15 and another third semiconductor layer 15. A second electrode 30 (see FIG. 1) is provided to fill the inside of the contact trench CT.

[0042] The contact trench CT is provided in the second semiconductor layer 13 between the third semiconductor layer 15 and another third semiconductor layer 15. The contact trench CT extends along the extension direction of the third semiconductor layer 15, for example, in the Y direction.

[0043] The second electrode 30 contacts the second semiconductor layer 13 and the third semiconductor layer 15 on the surface 10F of the semiconductor portion 10, and also contacts the second semiconductor layer 13 on the inner surface of the contact trench CT. This makes it possible to increase the contact area between the second electrode 30 and the second semiconductor layer 13. Furthermore, having a contact portion between the second electrode 30 and the second semiconductor layer 13 at a position deeper than the surface 10F of the semiconductor portion 10 also makes it possible to suppress the amount of holes injected from the second electrode 30 into the second semiconductor layer 13 via the second semiconductor layer 13.

[0044] 7 is a schematic perspective view showing a semiconductor device 2 according to a fourth modification of the first embodiment. In FIG. 7, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0045] In this example, the third semiconductor layer 15 is provided at a position spaced apart from the first insulating film 45 and the second insulating film 55. The second semiconductor layer 13 extends between the third semiconductor layer 15 and the first insulating film 45 and between the third semiconductor layer 15 and the second insulating film 55.

[0046] The fourth semiconductor layer 17 is in contact with the first insulating film 45, and the other fourth semiconductor layer 17 is in contact with the second insulating film 55. The second semiconductor layer 13 includes an extending portion 13ex extending between the fourth semiconductor layer 17 and the other fourth semiconductor layer 17.

[0047] 7, the third semiconductor layer 15 is not provided between the fourth semiconductor layer 17 and the second electrode 30 (see FIG. 1). In addition, the fourth semiconductor layer 17 is not provided between the first semiconductor layer 11 and the third semiconductor layer 15.

[0048] An electron current Ie flows from the first semiconductor layer 11 through the fourth semiconductor layer 17 to a portion of the second electrode 30 that is in contact with the second semiconductor layer 13. A hole current Ih flows from the third semiconductor layer 15 to the first semiconductor layer 11 through an extension 13ex of the second semiconductor layer 13 between the fourth semiconductor layer 17 and another fourth semiconductor layer 17.

[0049] Fig. 8 is a schematic perspective view showing a semiconductor device 2b according to a fifth modification of the first embodiment. In Fig. 8, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0050] In this example, the fourth semiconductor layer 17 is provided so as to be spaced apart from the first insulating film 45 and the second insulating film 55. The second semiconductor layer 13 extends between the fourth semiconductor layer 17 and the first insulating film 45 and between the fourth semiconductor layer 17 and the second insulating film 55.

[0051] The third semiconductor layer 15 is in contact with the first insulating film 45, and another third semiconductor layer 15 is in contact with the second insulating film 55. The third semiconductor layer 15 is not provided between the fourth semiconductor layer 17 and the second electrode 30 (see FIG. 1). In addition, the fourth semiconductor layer 17 is not provided between the first semiconductor layer 11 and the third semiconductor layer 15.

[0052] The electron current Ie flows from the first semiconductor layer 11 to the second electrode 30 via the fourth semiconductor layer 17. The electron current Ie flows to the second electrode 30 via a contact region of the second electrode 30 that is in contact with the second semiconductor layer 13 between the third semiconductor layer 15 and another third semiconductor layer 15. The hole current Ih flows from the third semiconductor layer 15 to the first semiconductor layer 11 via the extension portion 13ex of the second semiconductor layer 13 that is located between the fourth semiconductor layer 17 and the first insulating film 45 and between the fourth semiconductor layer 17 and the second insulating film 55.

[0053] 9 is a schematic perspective view showing a semiconductor device 3 according to a sixth modified example of the first embodiment. In FIG. 9, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0054] In this example, the third semiconductor layer 15 is provided to include a plurality of portions spaced apart from one another in the extension direction of the third electrode 40, for example, in the Y direction (see FIG. 10(a)). The plurality of portions of the third semiconductor layer 15 are each in contact with the first insulating film 45. Another third semiconductor layer 15 also has a plurality of portions in contact with the second insulating film 55 and spaced apart from one another. The fourth semiconductor layer 17 is provided between the first semiconductor layer 11 and the third semiconductor layer 15. The fourth semiconductor layer 17 is in contact with the first insulating film 45 or the second insulating film 55 and extends in the Y direction. The second semiconductor layer 13 extends between the third semiconductor layer 15 and another third semiconductor layer 15, and between the fourth semiconductor layer 17 and another fourth semiconductor layer 17.

[0055] 10(a) and 10(b) are schematic diagrams showing a semiconductor device 3b according to a seventh modification of the first embodiment. In Fig. 10(a), the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown. Fig. 10(b) is a cross-sectional view taken along line AA shown in Fig. 10(a).

[0056] In this example, the third semiconductor layer 15 also includes a plurality of portions spaced apart from one another in the Y direction. Each of the plurality of portions of the third semiconductor layer 15 contacts the first insulating film 45. Another third semiconductor layer 15 also includes a plurality of portions spaced apart from one another in the Y direction. Each of the plurality of portions of the other third semiconductor layer 15 contacts the second insulating film 55.

[0057] The fourth semiconductor layer 17 includes a plurality of portions spaced apart from one another in the Y direction. Each of the plurality of portions of the fourth semiconductor layer 17 is provided so as to be in contact with the first insulating film 45. The other fourth semiconductor layer 17 also includes a plurality of portions spaced apart from one another in the Y direction. Each of the plurality of portions of the other fourth semiconductor layer 17 is in contact with the second insulating film 55.

[0058] The second semiconductor layer 13 extends between the third semiconductor layer 15 and another third semiconductor layer 15 and between the fourth semiconductor layer 17 and another fourth semiconductor layer 17.

[0059] 10(b), the fourth semiconductor layer 17 is provided in the second semiconductor layer 13 so as to be located between the first semiconductor layer 11 and the third semiconductor layer 15. An electron current Ie flows from the first semiconductor layer 11 through the fourth semiconductor layer 17 to a portion of the second electrode 30 (see FIG. 1) that contacts the second semiconductor layer 13. A hole current Ih flows from the third semiconductor layer 15 through the second semiconductor layer 13 to the first semiconductor layer 11.

[0060] 11(a) and 11(b) are schematic diagrams showing a semiconductor device 3c according to an eighth modification of the first embodiment. In Fig. 11(a), the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown. Fig. 11(b) is a cross-sectional view taken along line BB shown in Fig. 11(a).

[0061] The third semiconductor layer 15 shown in FIG. 11(a) includes a plurality of portions spaced apart from one another in the Y direction (see FIG. 10(a)). Each of the plurality of portions of the third semiconductor layer 15 is provided so as to be in contact with the first insulating film 45. Another third semiconductor layer 15 also includes a plurality of portions spaced apart from one another in the Y direction. Each of the plurality of portions of the other third semiconductor layer 15 is provided so as to be in contact with the second insulating film 55.

[0062] The fourth semiconductor layer 17 includes a plurality of portions spaced apart from one another in the Y direction. The plurality of portions of the fourth semiconductor layer 17 are provided so as to be in contact with the first insulating film 45. The other fourth semiconductor layer 17 also includes a plurality of portions spaced apart from one another in the Y direction. The plurality of portions of the other fourth semiconductor layer 17 are provided so as to be in contact with the second insulating film 55.

[0063] The second semiconductor layer 13 extends between the third semiconductor layer 15 and another third semiconductor layer 15 and between the fourth semiconductor layer 17 and another fourth semiconductor layer 17.

[0064] 11(b), the fourth semiconductor layer 17 includes portions adjacent to each other in the Y direction. The second semiconductor layer 13 has an extending portion 13ex extending between the adjacent portions of the fourth semiconductor layer 17. The third semiconductor layer 15 is provided to face the first semiconductor layer 11 with the extending portion 13ex of the second semiconductor layer 13 interposed therebetween.

[0065] An electron current Ie flows from the first semiconductor layer 11 through the fourth semiconductor layer 17 to a contact region where the second electrode 30 and the second semiconductor layer 13 are in contact. A hole current Ih flows from the third semiconductor layer 15 to the first semiconductor layer 11 through the extension portion 13ex of the second semiconductor layer 13.

[0066] (Second embodiment) 12(a) and 12(b) are schematic diagrams showing a semiconductor device 4 according to the second embodiment. In Fig. 12(a), the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown. Fig. 12(b) is a cross-sectional view taken along line CC shown in Fig. 12(a).

[0067] 12(a), the third semiconductor layer 15 of the semiconductor device 4 extends in a direction from the third electrode 40 toward the fourth electrode 50, for example, in the X direction, and is provided so as to be in contact with the first insulating film 45 and the second insulating film 55. The fourth semiconductor layer 17 also extends in the X direction and is provided so as to be in contact with the first insulating film 45 and the second insulating film 55.

[0068] In this example, a plurality of fourth semiconductor layers 17 are provided. The fourth semiconductor layers 17 are arranged in the extension direction of the third electrode 40 and the fourth electrode 50, for example, the Y direction. The fourth semiconductor layers 17 are spaced apart from each other and arranged in the Y direction.

[0069] 12(b), the second semiconductor layer 13 has an extending portion 13ex that extends between adjacent fourth semiconductor layers 17 in the Y direction. The third semiconductor layer 15 is provided to face the first semiconductor layer 11 with the extending portion 13ex of the second semiconductor layer 13 interposed therebetween.

[0070] An electron current Ie flows from the first semiconductor layer 11 through the fourth semiconductor layer 17 to a contact region where the second electrode 30 and the second semiconductor layer 13 are in contact. A hole current Ih flows from the third semiconductor layer 15 to the first semiconductor layer 11 through the extension portion 13ex of the second semiconductor layer 13.

[0071] 13(a) and 13(b) are schematic cross-sectional views showing semiconductor devices 4b and 4c according to a first modification of the second embodiment, in which the first electrode 20, the second electrode 30, and the fifth semiconductor layer 19 are omitted.

[0072] As shown in FIG. 13(a), the distance Wnn between the adjacent fourth semiconductor layers 17 in the Y direction is set to be wider than, for example, the width Wp of the third semiconductor layer 15 in the Y direction.

[0073] Furthermore, as shown in FIG. 13(b), the interval Wnn between the adjacent fourth semiconductor layers 17 in the Y direction may be narrower than the width Wp of the third semiconductor layer 15 in the Y direction.

[0074] In these examples, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, hole injection from the second semiconductor layer 13 to the first semiconductor layer 11 can be suppressed, and recovery loss can be reduced.

[0075] 14(a) and (b) are schematic diagrams showing a semiconductor device 5 according to a second modified example of the second embodiment. In Fig. 14(a), the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown. Fig. 14(b) is a cross-sectional view taken along line DD shown in Fig. 14(a).

[0076] 14(a), the third semiconductor layer 15 extends in a direction from the third electrode 40 toward the fourth electrode 50, for example, in the X direction, and is provided so as to be in contact with the first insulating film 45 and the second insulating film 55. The fourth semiconductor layer 17 also extends in the X direction and is provided so as to be in contact with the first insulating film 45 and the second insulating film 55.

[0077] In this example, a plurality of third semiconductor layers 15 and a plurality of fourth semiconductor layers 17 are provided. The third semiconductor layers 15 and the fourth semiconductor layers 17 are aligned in the extension direction of the third electrode 40 and the fourth electrode 50, for example, in the Y direction. The fourth semiconductor layer 17 is located between the first semiconductor layer 11 and the third semiconductor layer 13.

[0078] 14(b), the second semiconductor layer 13 extends between adjacent third semiconductor layers 15 in the Y direction and between adjacent fourth semiconductor layers 17 in the Y direction. An electron current Ie flows from the first semiconductor layer 11 through the fourth semiconductor layer 17 to a contact region where the second electrode 30 (see FIG. 1) and the second semiconductor layer 13 are in contact. On the other hand, a hole current Ih flows from the third semiconductor layer 15 to the first semiconductor layer 11 through an extension portion 13ex of the second semiconductor layer 13 extending between adjacent fourth semiconductor layers 17.

[0079] 15(a) and 15(b) are schematic cross-sectional views showing semiconductor devices 5b and 5c according to a third modification of the second embodiment, in which the first electrode 20, the second electrode 30, and the fifth semiconductor layer 19 are omitted.

[0080] 15(a), the interval Wnn between adjacent fourth semiconductor layers 17 in the Y direction is set to be narrower than the interval Wpp between adjacent third semiconductor layers 15 in the Y direction. By providing the fourth semiconductor layer 17 in the second semiconductor layer 13, the path of the hole current Ih is narrowed, and hole injection from the third semiconductor layer 15 and the second semiconductor layer 13 to the first semiconductor layer 11 is suppressed. This effect is further enhanced by narrowing the interval Wnn.

[0081] 15(b), the interval Wpp between adjacent third semiconductor layers 15 in the Y direction may be narrower than the interval Wnn between adjacent fourth semiconductor layers 17 in the Y direction. For example, even if the interval Wpp is narrowed due to constraints in the manufacturing process or the like, providing the fourth semiconductor layer 17 in the second semiconductor layer 13 narrows the path of the hole current Ih, and hole injection from the third semiconductor layer 15 and the second semiconductor layer 13 to the first semiconductor layer 11 is suppressed.

[0082] In these examples, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, hole injection from the second semiconductor layer 13 to the first semiconductor layer 11 can be suppressed, and recovery loss can be reduced.

[0083] (Third embodiment) Fig. 16 is a schematic perspective view showing a semiconductor device 6 according to the third embodiment. In Fig. 16, the first electrode 20 and the second electrode 30 are omitted, and only the semiconductor portion 10, the third electrode 40, and the fourth electrode 50 are shown.

[0084] The third electrode 40 and the fourth electrode 50 each extend in a direction along the surface 10F of the semiconductor portion 10, for example, in the Y direction. A first insulating film 45 is provided between the semiconductor portion 10 and the third electrode 40. The third electrode 40 is insulated from the semiconductor portion 10 by the first insulating film 45. In addition, a second insulating film 55 is provided between the semiconductor portion 10 and the fourth electrode 50. The fourth electrode 50 is insulated from the semiconductor portion 10 by the second insulating film 55.

[0085] 16, the semiconductor section 10 further includes a sixth semiconductor layer 16 of the first conductivity type. The sixth semiconductor layer 16 is, for example, an n-type contact layer. The sixth semiconductor layer 16 is provided on the second semiconductor layer 13 between the second semiconductor layer 13 and the second electrode 30 (see FIG. 1). The third semiconductor layer 15 and the sixth semiconductor layer 16 are arranged side by side on the second semiconductor layer 13 and each extend in the Y direction. The second electrode 30 (see FIG. 1) is in contact with the third semiconductor layer 15 and the sixth semiconductor layer 16.

[0086] The sixth semiconductor layer 16 is provided between the third semiconductor layer 15 and the first insulating film 45. The sixth semiconductor layer 16 is in contact with the first insulating film 45 and extends in the Y direction along the first insulating film 45. The third semiconductor layer 15 is in contact with the sixth semiconductor layer 16. The length in the Z direction of the sixth semiconductor layer 16 is, for example, approximately the same as the length in the Z direction of the third semiconductor layer 15.

[0087] The fourth semiconductor layer 17 is provided in the second semiconductor layer 13 between the first semiconductor layer 11 and the sixth semiconductor layer 16. The sixth semiconductor layer 16 is provided above the fourth semiconductor layer 17. The fourth semiconductor layer 17 is in contact with the first insulating film 45 and extends in the Y direction along the first insulating film 45. The second semiconductor layer 13 extends between the first semiconductor layer 11 and the fourth semiconductor layer 17 and between the fourth semiconductor layer 17 and the sixth semiconductor layer 16 and is in contact with the first insulating film 45.

[0088] The semiconductor portion 10 further includes another third semiconductor layer 15, another fourth semiconductor layer 17, and another sixth semiconductor layer 16. The second semiconductor layer 13 extends between the third semiconductor layer 15 and the another third semiconductor layer 15, and between the fourth semiconductor layer 17 and the another fourth semiconductor layer 17. The another fourth semiconductor layer 17 is in contact with the second insulating film 55 and extends in the Y direction along the second insulating film 55.

[0089] The other sixth semiconductor layer 16 is provided above the other fourth semiconductor layer 17. The other sixth semiconductor layer 16 is provided between the other third semiconductor layer 15 and the second insulating film 55. The other sixth semiconductor layer 16 is in contact with the second insulating film 55 and extends in the Y direction along the second insulating film 55. The second semiconductor layer 13 extends between the first semiconductor layer 11 and the other fourth semiconductor layer 17 and between the other fourth semiconductor layer 17 and the other sixth semiconductor layer 16, and is in contact with the second insulating film 55.

[0090] In this way, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, hole injection from the second semiconductor layer 13 to the first semiconductor layer 11 can be suppressed, and recovery loss can be reduced.

[0091] 17 is a schematic perspective view showing a semiconductor device 6b according to a first modification of the third embodiment. In this example, the third semiconductor layer 15 is provided between the sixth semiconductor layer 16 and the first insulating film 45. In addition, another third semiconductor layer 15 is also provided between the other sixth semiconductor layer 16 and the second insulating film 55.

[0092] The second semiconductor layer 13 is provided so as to extend between the fourth semiconductor layer 17 and another fourth semiconductor layer 17, and between the sixth semiconductor layer 16 and another sixth semiconductor layer 16. Furthermore, the second semiconductor layer 13 extends between the first semiconductor layer 11 and the fourth semiconductor layer 17, and between the third semiconductor layer 15 and the fourth semiconductor layer 17, and is in contact with the first insulating film 45. Furthermore, the second semiconductor layer 13 extends between the first semiconductor layer 11 and another fourth semiconductor layer 17, and between the another third semiconductor layer 15 and another fourth semiconductor layer 17, and is in contact with the second insulating film 55.

[0093] 18 is a schematic perspective view showing a semiconductor device 6c according to a second modification of the third embodiment. In this example, the sixth semiconductor layer 16 is provided between the third semiconductor layer 15 and the first insulating film 45. Another sixth semiconductor layer 16 is provided between the other third semiconductor layer 15 and the first insulating film 45. Furthermore, the fourth semiconductor layer 17 is not provided, and the sixth semiconductor layer 16 extends downward (in the -Z direction) along the first insulating film 45 and the second insulating film 55. That is, the length of the sixth semiconductor layer 16 in the Z direction is longer than the length of the third semiconductor layer 15 in the Z direction.

[0094] 19 is a schematic perspective view showing a semiconductor device 6d according to a third modification of the third embodiment. In this example, the sixth semiconductor layer 16 is also provided between the third semiconductor layer 15 and the first insulating film 45. Another sixth semiconductor layer 16 is also provided between another third semiconductor layer 15 and the first insulating film 45. Furthermore, the fourth semiconductor layer 17 is not provided in the second semiconductor layer 13.

[0095] 20 is a graph showing the characteristics of the semiconductor devices 6 to 6d according to the third embodiment. The horizontal axis represents the forward voltage VF, and the vertical axis represents the recovery loss Err. In the figure, the characteristics of the semiconductor devices 1 and 6 to 6d are plotted.

[0096] Comparing the characteristics of the semiconductor device 6 with those of the semiconductor device 1, VF is reduced and Err is also reduced. That is, by providing the fourth semiconductor layer 17 in the second semiconductor layer 13, holes injected into the first semiconductor layer 11 are reduced, and further, by providing the sixth semiconductor layer 16, VF is reduced. This shows that the recovery loss Err is further reduced.

[0097] In the semiconductor device 6b, the recovery loss Err is reduced compared to the semiconductor device 1. On the other hand, in the semiconductor device 6c, characteristics almost equivalent to those of the semiconductor device 1 are obtained.

[0098] In the semiconductor device 6d, the recovery loss Err is reduced compared to the semiconductor device of the comparative example (Ref in Figure 20) that does not have the fourth semiconductor layer 17 and the sixth semiconductor layer 16, but the effect of reducing the recovery loss Err is less than when the fourth semiconductor layer 17 is provided.

[0099] 21 is a schematic perspective view showing a semiconductor device 7 according to a fourth modification of the third embodiment. In this example, the third semiconductor layer 15 and the sixth semiconductor layer 16 are both provided in contact with the first insulating film 45 and extending in the Y direction. That is, the p-type contact layer (third semiconductor layer 15) and the n-type contact layer (sixth semiconductor layer 16) are provided above the fourth semiconductor layer 17 and are aligned in the Y direction.

[0100] Additionally, the another third semiconductor layer 15 and the another sixth semiconductor layer 16 are both provided in contact with the second insulating film 55 and extending in the Y direction. The another third semiconductor layer 15 and the another sixth semiconductor layer 16 are provided above the another fourth semiconductor layer 17 and are aligned in the Y direction.

[0101] The second semiconductor layer 13 is provided between the third semiconductor layer 15 and another third semiconductor layer 15, between the fourth semiconductor layer 17 and another fourth semiconductor layer 17, and between the sixth semiconductor layer 16 and another sixth semiconductor layer 16. The second semiconductor layer 13 extends between the third semiconductor layer 15 and the fourth semiconductor layer 17 and between the sixth semiconductor layer 16 and the fourth semiconductor layer 17, and is in contact with the first insulating film 45. The second semiconductor layer 13 also extends between the another third semiconductor layer 15 and the another fourth semiconductor layer 17, and between the another sixth semiconductor layer 16 and the another fourth semiconductor layer 17, and is in contact with the first insulating film 45. The second semiconductor layer 13 also extends between the first semiconductor layer 11 and the fourth semiconductor layer 17, is in contact with the first insulating film 45, and is provided to extend between the first semiconductor layer 11 and the another fourth semiconductor layer 17, and is in contact with the second insulating film 55.

[0102] Even with this configuration, it is possible to reduce the forward voltage VF and the recovery loss Err. Note that the sixth semiconductor layer 16 according to this embodiment is not limited to the above example. For example, it is applicable to both the semiconductor device according to the first embodiment and the semiconductor device according to the second embodiment.

[0103] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0104] (Appendix 1) a semiconductor portion including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, and a fourth semiconductor layer of the first conductivity type; a first electrode provided on a rear surface of the semiconductor portion; a second electrode provided on a surface of the semiconductor portion opposite to the back surface; a third electrode disposed inside a first trench provided on the front surface side of the semiconductor portion; a first insulating film covering an inner surface of the first trench and positioned between the semiconductor portion and the third electrode; a fourth electrode disposed inside a second trench provided at a position adjacent to the first trench on the front surface side of the semiconductor portion; a second insulating film covering an inner surface of the second trench and positioned between the semiconductor portion and the fourth pole; Equipped with the first semiconductor layer extends between the first electrode and the second electrode; the second semiconductor layer is provided between the first semiconductor layer and the second electrode and extends between the third electrode and the fourth electrode; the third semiconductor layer is provided partially on the second semiconductor layer between the second semiconductor layer and the second electrode, and contains a second conductivity type impurity at a concentration higher than a concentration of the second conductivity type impurity of the second semiconductor layer; Between the third electrode and the fourth electrode, the fourth semiconductor layer is located in the second semiconductor layer, and the second semiconductor layer is located between the third semiconductor layer and the fourth semiconductor layer and includes a portion that separates the third semiconductor layer from the fourth semiconductor layer, The second electrode is connected to the second semiconductor layer and the third semiconductor layer on the surface of the semiconductor portion. (Appendix 2) 2. The semiconductor device according to claim 1, wherein the fourth semiconductor layer is provided so as to be in contact with at least one of the first insulating film and the second insulating film. (Appendix 3) The semiconductor device described in Appendix 1 or 2, wherein the second semiconductor layer is located between the first semiconductor layer and the fourth semiconductor layer and includes another portion that separates the fourth semiconductor layer from the first semiconductor layer. (Appendix 4) 4. The semiconductor device according to claim 1, wherein the third semiconductor layer is provided so as to be in contact with at least one of the first insulating film and the second insulating film. (Appendix 5) 5. The semiconductor device according to claim 1, wherein the third electrode and the fourth electrode are each provided to extend from the surface of the semiconductor portion into the first semiconductor layer. (Appendix 6) the semiconductor portion further includes a third semiconductor layer separate from the third semiconductor layer, 6. The semiconductor device according to claim 1, wherein the third semiconductor layer is in contact with the first insulating film, and the another third semiconductor layer is in contact with the second insulating film. (Appendix 7) the semiconductor portion further includes a fourth semiconductor layer different from the fourth semiconductor layer, 7. The semiconductor device according to claim 6, wherein the fourth semiconductor layer is in contact with the first insulating film, and the another fourth semiconductor layer is in contact with the second insulating film. (Appendix 8) the semiconductor portion further includes a third semiconductor layer separate from the third semiconductor layer, A semiconductor device described in any one of Appendixes 1 to 5, wherein the third semiconductor layer and the another third semiconductor layer are arranged at a distance from each other in a second direction perpendicular to a first direction from the third electrode to the fourth electrode. (Appendix 9) the semiconductor portion further includes a fourth semiconductor layer different from the fourth semiconductor layer, 9. The semiconductor device according to claim 8, wherein the fourth semiconductor layer and the another fourth semiconductor layer are aligned in the second direction. (Appendix 10) 10. The semiconductor device according to claim 1, wherein the fourth semiconductor layer is located between the first semiconductor layer and the third semiconductor layer. (Appendix 11) the semiconductor portion further includes a fifth semiconductor layer of the first conductivity type and a sixth semiconductor layer of the first conductivity type, the fifth semiconductor layer is provided between the first semiconductor layer and the first electrode, and contains a first conductivity type impurity at a concentration higher than a concentration of the first conductivity type impurity in the first semiconductor layer; the sixth semiconductor layer is provided between the second semiconductor layer and the second electrode, 10. The semiconductor device according to claim 1, wherein the third semiconductor layer and the sixth semiconductor layer are arranged on the second semiconductor layer and connected to the second electrode. (Appendix 12) the sixth semiconductor layer is provided between the third semiconductor layer and the first insulating film or the second insulating film, 12. The semiconductor device according to claim 11, wherein the fourth semiconductor layer is located between the first semiconductor layer and the sixth semiconductor layer. (Appendix 13) the semiconductor portion further includes another third semiconductor layer and another sixth semiconductor layer; the third semiconductor layer is provided between the sixth semiconductor layer and the first insulating film, the another third semiconductor layer is provided between the another sixth semiconductor layer and the second insulating film, 12. The semiconductor device according to claim 11, wherein the second semiconductor layer extends between the sixth semiconductor layer and the another sixth semiconductor layer and is connected to the second electrode. (Appendix 14) 12. The semiconductor device according to claim 11, wherein the third semiconductor layer and the sixth semiconductor layer are in contact with the first insulating film or the second insulating film. [Explanation of symbols]

[0105] 1, 1b, 1c, 1d, 1e, 1f, 2, 2b, 3, 3b, 3c, 4, 4b, 5, 5b...semiconductor device, 10...semiconductor portion, 10B...rear surface, 10F...front surface, 11...first semiconductor layer, 13...second semiconductor layer, 13ex...extension portion, 15...third semiconductor layer, 17...fourth semiconductor layer, 19...fifth semiconductor layer, 16...sixth semiconductor layer, 20...first electrode, 30...second electrode, 40...third electrode, 45...first insulating film, 50...fourth electrode, 55...second insulating film, CT...contact trench, Ie...electron current, Ih...hole current, TR1...first trench, TR2...second trench

Claims

1. a semiconductor portion including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, a fourth semiconductor layer of the first conductivity type, and a fourth semiconductor layer different from the fourth semiconductor layer; a first electrode provided on a rear surface of the semiconductor portion; a second electrode provided on a surface of the semiconductor portion opposite to the back surface; a third electrode disposed inside a first trench provided on the front surface side of the semiconductor portion; a first insulating film covering an inner surface of the first trench and positioned between the semiconductor portion and the third electrode; a fourth electrode disposed inside a second trench provided at a position adjacent to the first trench on the front surface side of the semiconductor portion; a second insulating film covering an inner surface of the second trench and positioned between the semiconductor portion and the fourth electrode; Equipped with the first semiconductor layer extends between the first electrode and the second electrode; the second semiconductor layer is provided between the first semiconductor layer and the second electrode and extends between the third electrode and the fourth electrode; the third semiconductor layer is provided partially on the second semiconductor layer between the second semiconductor layer and the second electrode, and contains a second conductivity type impurity at a concentration higher than a concentration of the second conductivity type impurity of the second semiconductor layer; the fourth semiconductor layer is located in the second semiconductor layer between the third electrode and the fourth electrode, and the second semiconductor layer is located between the third semiconductor layer and the fourth semiconductor layer and includes a portion that separates the third semiconductor layer from the fourth semiconductor layer; the second electrode is connected to the second semiconductor layer and the third semiconductor layer on the surface of the semiconductor portion; the fourth semiconductor layer is in contact with the first insulating film, and the other fourth semiconductor layer is in contact with the second insulating film; The second semiconductor layer is a portion located between the fourth semiconductor layer and the another fourth semiconductor layer, and separating the fourth semiconductor layer from the another fourth semiconductor layer; a portion located between the first semiconductor layer and the fourth semiconductor layer, separating the fourth semiconductor layer from the first semiconductor layer; a portion located between the first semiconductor layer and the another fourth semiconductor layer, separating the another fourth semiconductor layer from the first semiconductor layer.

2. 2. The semiconductor device according to claim 1, wherein the third semiconductor layer is provided so as to be in contact with at least one of the first insulating film and the second insulating film.

3. 2. The semiconductor device according to claim 1, wherein the third electrode and the fourth electrode are provided so as to extend from the surface of the semiconductor portion into the first semiconductor layer.

4. the semiconductor portion further includes a third semiconductor layer separate from the third semiconductor layer, 2. The semiconductor device according to claim 1, wherein the third semiconductor layer is provided so as to be in contact with the first insulating film, and the other third semiconductor layer is provided so as to be in contact with the second insulating film.

5. the semiconductor portion further includes a third semiconductor layer separate from the third semiconductor layer, The semiconductor device according to claim 1 , wherein the third semiconductor layer and the another third semiconductor layer are spaced apart from each other in a second direction perpendicular to a first direction from the third electrode toward the fourth electrode.

6. A semiconductor device as described in claim 5, wherein the fourth semiconductor layer and the another fourth semiconductor layer are aligned in the second direction.

7. The semiconductor device according to claim 1 , wherein the fourth semiconductor layer is located between the first semiconductor layer and the third semiconductor layer.

8. the semiconductor portion further includes a fifth semiconductor layer of the first conductivity type and a sixth semiconductor layer of the first conductivity type, the fifth semiconductor layer is provided between the first semiconductor layer and the first electrode, and contains a first conductivity type impurity at a concentration higher than a concentration of the first conductivity type impurity in the first semiconductor layer; the sixth semiconductor layer is provided between the second semiconductor layer and the second electrode, The semiconductor device according to claim 1 , wherein the third semiconductor layer and the sixth semiconductor layer are arranged side by side on the second semiconductor layer and connected to the second electrode.

9. the sixth semiconductor layer is provided between the third semiconductor layer and the first insulating film or the second insulating film, The semiconductor device according to claim 8 , wherein the fourth semiconductor layer is located between the first semiconductor layer and the sixth semiconductor layer.

10. the semiconductor portion further includes another third semiconductor layer and another sixth semiconductor layer, the third semiconductor layer is provided between the sixth semiconductor layer and the first insulating film, the another third semiconductor layer is provided between the another sixth semiconductor layer and the second insulating film, The semiconductor device according to claim 8 , wherein the second semiconductor layer extends between the sixth semiconductor layer and the another sixth semiconductor layer and is connected to the second electrode.

11. The semiconductor device according to claim 8 , wherein the third semiconductor layer and the sixth semiconductor layer are in contact with the first insulating film or the second insulating film.

12. A semiconductor device as described in claim 4 or 5, wherein the third semiconductor layer and the another third semiconductor layer are located between the third electrode and the fourth electrode and are spaced apart in a first direction from the third electrode toward the fourth electrode.

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