diode

Abstract

To provide a technology capable of reducing on-resistance without increase in size of a diode.SOLUTION: A diode comprises: a semiconductor layer; a surface electrode arranged on a front face of the semiconductor layer; a plurality of trenches extending from the front face of the semiconductor layer toward a rear face; an insulating film that covers an inner wall surface of the plurality of trenches; a conductive part that fills the trenches, being in contact with the surface electrode; and a back electrode arranged on the rear face of the semiconductor layer. A mesa part of the semiconductor layer is arranged between adjacent two trenches among the plurality of trenches. At least a part of the mesa part has a high-concentration region that is arranged so as to be separated from the insulating film arranged in the trenches located on both sides of the mesa part and that has impurity concentration higher than that of the semiconductor layer located at the periphery.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present specification relates to a diode, and in particular to a diode having a trench in the surface of a semiconductor layer. [Background technology]

[0002] Patent Document 1 discloses a trench MOS Schottky barrier diode. The Schottky barrier diode includes a semiconductor substrate, an epitaxial layer, a Schottky metal, and an electrode metal. The epitaxial layer is disposed on the surface of the semiconductor substrate. A plurality of inner trenches are formed on the surface of the epitaxial layer. The Schottky metal is formed so as to face the epitaxial layer including the inner wall surfaces of the inner trenches. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-153769 Summary of the Invention [Problem to be solved by the invention]

[0004] In a Schottky barrier diode, the on-resistance increases as the contact area between the Schottky metal and the epitaxial layer decreases. Therefore, in the above-mentioned technology, in order to reduce the on-resistance, that is, to increase the contact area between the Schottky metal and the epitaxial layer, it is conceivable to enlarge the dimensions of the diode.

[0005] This specification provides a technique that can reduce the on-resistance without increasing the size of the diode. [Means for solving the problem]

[0006] The technology disclosed in this specification relates to a diode, which includes a semiconductor layer, a front electrode disposed on the front surface of the semiconductor layer, a plurality of trenches extending from the front surface to the back surface of the semiconductor layer, an insulating film covering the inner wall surfaces of the plurality of trenches, a conductive portion filling the trenches and contacting the front electrode, and a back electrode disposed on the back surface of the semiconductor layer, wherein a mesa portion of the semiconductor layer is disposed between two adjacent trenches of the plurality of trenches, and at least a part of the mesa portion is disposed in a high-concentration region having a higher impurity concentration than the surrounding semiconductor layer, the high-concentration region being separated from the insulating film disposed in the trenches on both sides of the mesa portion.

[0007] In this configuration, by arranging a high-concentration region in the mesa portion, the current flowing from the front electrode to the back electrode passes through the high-concentration region, thereby reducing the on-resistance. This configuration allows the on-resistance to be reduced without increasing the size of the diode.

[0008] The high concentration region may have a width that is 0.9 or less with respect to the width of the mesa portion.

[0009] If the heavily doped region comes into contact with the insulating film, the depletion layer will not expand easily when a reverse voltage is applied, and leakage current will easily flow between the conductive portion and the mesa portion, resulting in a decrease in breakdown voltage. By setting the width of the heavily doped region to 0.9 or less of the mesa width, it is possible to prevent the heavily doped region from coming into contact with the insulating film even if there is an error in the mesa width due to manufacturing errors or impurity distribution.

[0010] The high concentration region may have a length equal to or less than 0.5 of the depth of the mesa portion.

[0011] By setting the length of the high concentration region in the depth direction of the trench to 0.5 or less, it is possible to prevent the high concentration region from being located near the rear edge of the trench, where electric field concentration occurs. As a result, it is possible to prevent the impurity concentration near the rear edge of the trench from becoming high, which makes it difficult for the depletion layer to expand. This makes it possible to prevent a decrease in breakdown voltage when a reverse voltage is applied.

[0012] A first low-concentration region having a lower impurity concentration than the high-concentration region and other parts of the mesa portion may be arranged at least either between the high-concentration region and the insulating film arranged in the trench located on both sides of the mesa portion in which the high-concentration region is arranged, or between the high-concentration region and the surface of the semiconductor layer.

[0013] According to this configuration, by reducing the impurity concentration in the semiconductor layer near the insulating film, it is possible to suppress a decrease in breakdown voltage when a reverse voltage is applied.

[0014] The semiconductor layer located on the back surface side of the semiconductor layer at the back surface side end of at least some of the plurality of trenches may have a second low concentration region having a lower impurity concentration than other parts of the semiconductor layer.

[0015] According to this configuration, the impurity concentration near the rear edge of the trench where the electric field concentration occurs is reduced, which facilitates the expansion of the depletion layer, thereby improving the breakdown voltage when a reverse voltage is applied.

[0016] Details and further improvements of the technology disclosed in this specification are described in the following "Description of Embodiments of the Invention." [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 2 is a cross-sectional view of a main part of a diode according to an embodiment. [Figure 2] FIG. 2 is an enlarged cross-sectional view of the vicinity of a mesa portion in the embodiment. [Figure 3]10 shows the results of a simulation showing the relationship between (width of high concentration region / width of mesa portion) and breakdown voltage. [Figure 4] 10 shows the results of a simulation showing the relationship between the on-resistance and the ratio (width of the high concentration region / width of the mesa portion). [Figure 5] 10 shows the results of a simulation showing the relationship between (width of high concentration region / width of mesa portion) and (breakdown voltage / on-resistance). [Figure 6] 10 shows the results of a simulation showing the relationship between the breakdown voltage and (length of the high concentration region / length of the mesa portion). [Figure 7] 10 shows the results of a simulation showing the relationship between the (length of the high concentration region / length of the mesa portion) and the on-resistance. [Figure 8] 10 shows the results of a simulation showing the relationship between (length of high concentration region / length of mesa portion) and (breakdown voltage / on-resistance). [Figure 9] 10 is a simulation result showing the relationship between breakdown voltage and on-resistance in diodes of an example and a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0018] A diode 100 according to the embodiment will be described with reference to Fig. 1. The diode 100 is a vertical Schottky diode having a trench MOS region, a so-called trench MOS type Schottky barrier diode.

[0019] The diode 100 includes a semiconductor layer 12, an anode electrode 30, a cathode electrode 10, insulating films 21 and 31, an insulating layer 22, and a conductive portion 32. The semiconductor layer 12 includes a substrate 14 and an epitaxial layer 16 deposited on the surface of the substrate 14 by epitaxial growth.

[0020] The substrate 14 and the epitaxial layer 16 are made of gallium oxide (Ga2O3) containing n-type impurities. An example of the n-type impurity is silicon (Si). The impurity concentration of the substrate 14 is higher than the impurity concentration of the epitaxial layer 16. The impurity concentration of the substrate 14 is, for example, 6×10 18 cm -3The impurity concentration of the epitaxial layer 16 is, for example, 2×10 16 cm -3 is.

[0021] A cathode electrode 10 is disposed on the back surface side (the lower surface side in FIG. 1) of the substrate 14, i.e., on the back surface 12c of the semiconductor layer 12. The cathode electrode 10 is formed of a metal (e.g., nickel (Ni) silicide, cobalt (Co) silicide) that is in ohmic contact with the substrate 14.

[0022] A plurality of trenches 18 are arranged on the surface of the epitaxial layer 16, i.e., the surface 12b of the semiconductor layer 12. The number of trenches 18 is not limited to that shown in FIG. 1. The plurality of trenches 18 are formed by digging down the epitaxial layer 16 from the surface 12b. The plurality of trenches 18 are formed by dry etching. The plurality of trenches 18 have the same shape. Each trench 18 has inner wall surfaces (18a, 18d) including a pair of side surfaces 18a and a bottom surface 18d. The trench 18 is dug down vertically from the surface to the back surface of the semiconductor layer 12 (from the top to the bottom in FIG. 1). The pair of side surfaces 18a extend vertically downward from the surface 12b. In a plan view, the side surfaces 18a of the plurality of trenches 18 are aligned parallel to each other. The distance between the pair of side surfaces 18a is constant.

[0023] A bottom surface 18d connecting the pair of side surfaces 18a is disposed at the ends of the pair of side surfaces 18a on the back surface side of the semiconductor layer 12. The bottom surface 18d has a flat surface that extends perpendicular to the pair of side surfaces 18a. The boundaries between the bottom surface 18d and each of the pair of side surfaces 18a are connected by curved surfaces. In a modified example, the bottom surface 18d may have a curved surface. Note that in FIG. 1, only one trench 18 is denoted by reference numerals 18a and 18d, and the reference numerals of the other trenches 18 are omitted, but the multiple trenches 18 have the same configuration.

[0024] A termination trench 20 is disposed on the surface of the epitaxial layer 16, closer to the termination side of the diode 100 than the multiple trenches 18. The termination trench 20 surrounds the outside of the multiple trenches 18 along the periphery of the semiconductor layer 12. The termination trench 20 is formed by digging down the epitaxial layer 16 from the surface thereof. Like the trench 18, the termination trench 20 is formed by dry etching. Like the trench 18, the boundary between the side surface and bottom surface of the termination trench 20 is connected by a curved surface.

[0025] A low concentration region 40 having an n-type impurity concentration lower than the surrounding area is disposed in the epitaxial layer 16 in contact with the bottom surface (i.e., the bottom surface in FIG. 1) of each of the plurality of trenches 18 and the termination trench 20. The impurity concentration of the low concentration region 40 is, for example, 5×10 15 cm -3 The low-concentration region 40 located below the trench 18 has a width equal to or greater than the width of the trench 18, and the low-concentration region 40 located below the termination trench 20 has a width equal to or greater than the width of the termination trench 20. The height of the low-concentration region 40 (i.e., its length in the vertical direction in FIG. 1) is, for example, 0.1 to 0.5 times the distance between two adjacent trenches 18 (i.e., the width of the mesa portion 12a). The low-concentration region 40 is formed by forming the trenches 18 and 20 in the epitaxial layer 16, implanting ions into the epitaxial layer 16 at the bottoms of the trenches 18 and 20, and then performing an annealing treatment. In the ion implantation, counter ion implantation is performed by implanting ions of magnesium (Mg), a p-type impurity, into the semiconductor layer 12 of gallium oxide (Ga2O3) containing an n-type impurity. The impurity concentration of the low concentration region 40 may be uniform, or may vary so as to become higher with increasing distance from the vicinity of the trench 18, for example.

[0026] An insulating film 31 is disposed on the side surface 18a and bottom surface 18d of each of the plurality of trenches 18. The insulating film 31 covers the entire side surface 18a and bottom surface 18d.

[0027] Similarly, an insulating film 21 is disposed on the bottom and side surfaces of the termination trench 20. The insulating film 21 covers the entire bottom and side surfaces of the termination trench 20. The insulating films 21 and 31 are made of an insulating material such as hafnium oxide (HfO2). Note that the insulating films 21 and 31 may be a laminated film of silicon dioxide (SiO2) and hafnium oxide (HfO2), or a laminated film of alumina (Al2O3), formed by chemical vapor deposition (CVD (short for Chemical Vapor Deposition)).

[0028] The termination trench 20 is filled with an insulating layer 22 via an insulating film 21. The insulating layer 22 is formed by depositing hafnium oxide (HfO2) or silicon dioxide (SiO2) only in the termination trench 20 after the insulating films 21 and 31 are deposited. The surface of the insulating layer 22 is flush with the surface of the epitaxial layer 16, i.e., the semiconductor layer 12.

[0029] The trenches 18 are filled with a conductive portion 32 made of polysilicon. Note that in Fig. 1, only one trench 18 is denoted with the reference numerals 31 and 32, and the reference numerals 31 and 32 are omitted from the other trenches 18, but each of the trenches 18 similarly has an insulating film 31 disposed therein and is filled with a conductive portion 32. Note that the filling material of the trench 18 may be a composite material made of the material of the conductive portion 32 (i.e., polysilicon) and the material of the anode electrode 30 described below.

[0030] An anode electrode 30 is disposed on the upper ends of the conductive portions 32, i.e., on the upper ends of the plurality of trenches 18. The anode electrode 30 is formed as a flat plate on the surface of the semiconductor layer 12. The anode electrode 30 is in contact with the conductive portions 32 at the upper ends of the plurality of trenches 18. The anode electrode 30 is a metal electrode, and is in Schottky contact with the semiconductor layer 12 on the surface of the semiconductor layer 12 sandwiched between the plurality of trenches 18 and the termination trench 20, i.e., on the surface of the mesa portion 12a of the semiconductor layer 12.

[0031] The anode electrode 30 is in contact with the surface of the insulating layer 22, thereby forming a field plate structure.

[0032] A mesa portion 12a is formed between two adjacent trenches among the plurality of trenches 18. Similarly, a mesa portion 12a is formed between a termination trench 20 and a trench 18 adjacent to the termination trench 20. A high-concentration region 42 and a low-concentration region 44 are arranged in the mesa portion 12a. The high-concentration region 42 is formed by injecting impurities into the epitaxial layer 16 by ion implantation. An example of an n-type impurity is silicon (Si). The impurity concentration of the high-concentration region 42 is higher than that of the surrounding epitaxial layer 16, for example, 2×10 17 cm -3 The impurity concentration of the high-concentration region 42 may be uniform. Alternatively, for example, a region with the highest impurity concentration may be present in the center, with regions having a lower impurity concentration toward the termination portion. The high-concentration region 42 is located at the center of the mesa portion 12a in the width direction. The high-concentration region 42 is located away from each of the insulating films 31 located on both sides of the mesa portion 12a. The high-concentration region 42 located in the mesa portion 12a between the trench 18 and the termination trench 20 is located away from each of the insulating films 21, 31 located on both sides of the mesa portion 12a. The low-concentration region 44 may have the same impurity concentration as the epitaxial layer 16. In other words, the low-concentration region 44 does not have to be located.

[0033] The high concentration region 42 is located below the surface 12b of the semiconductor layer 12. The high concentration region 42 is not exposed at the surface 12b. A low concentration region 44 is arranged between the high concentration region 42 and the insulating films 21, 31. The low concentration region 44 is also arranged on the surface 12b side of the high concentration region 42. The low concentration region 44 is exposed to the anode electrode 30 from the surface 12b. The low concentration region 44 is in Schottky contact with the anode electrode 30. The impurity concentration of the low concentration region 44 is lower than the impurity concentration of the epitaxial layer 16. The low concentration region 44 is formed in the same manner as the low concentration region 40.

[0034] (Effect of 100 diodes) The effect of the diode 100 will be described with reference to FIGS. 2 to 9. As shown in FIG. 2, a simulation was performed on the diode 100 in which the ratio of the width W2 and depth L2 of the high-concentration region 42 to the width W1 and length L1 of the mesa portion 12a was changed. FIGS. 3 to 9 are graphs showing the results of the simulation using the diode 100. In this simulation, the length L1 of the mesa portion 12a from the surface of the semiconductor layer 12 is 6 μm, and the width W1 of the mesa portion 12a is 4 μm. The distance from the surface 12b of the high-concentration region 42 is 0.2 μm. Note that the low-concentration region 44 was not arranged in the simulation.

[0035] 3 to 5 show simulation results using multiple diodes 100 with different ratios of the width W2 of the high-concentration region 42 to the width W1 of the mesa portion 12a. Specifically, the simulation used eight types of diodes 100 with W2 / W1 = 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, and 0.9. The simulation also used a diode without a high-concentration region 42, i.e., a diode with W2 / W1 = 0, and a diode in which the high-concentration region 42 is in contact with the insulating film 31, i.e., a diode with W2 / W1 = 1.0. Note that for the diodes other than the diode without a high-concentration region 42, the ratio L2 / L1, where L2 is the depth L1 of the mesa portion 12a, is 0.33.

[0036] FIG. 3 is a graph showing the relationship between W2 / W1 of the diode 100 and the breakdown voltage when a reverse voltage is applied. In FIG. 3, the horizontal axis represents W2 / W1, and the vertical axis represents the breakdown voltage. In the diode 100, when W2 / W1 is in the range of 0.1 to 0.9, the breakdown voltage is reduced by at most about 4% compared to a comparative example diode that does not have a high-concentration region 42, and almost no reduction in breakdown voltage performance is observed. In a diode where W2 / W1=1.0, i.e., a diode in which the high-concentration region 42 is in contact with the insulating film 31, the breakdown voltage is reduced. When the high-concentration region 42 is located close to the insulating film 31, the depletion layer does not expand when a reverse voltage is applied, which makes it easier for leakage current to flow between the conductive portion 32 and the high-concentration region 42, thereby reducing the breakdown voltage.

[0037] 4 is a graph showing the relationship between W2 / W1 of the diode 100 and the on-resistance while a forward current is flowing. In FIG. 4, the horizontal axis represents W2 / W1, and the vertical axis represents the on-resistance. In the diode 100, when W2 / W1 is in the range of 0.1 to 1.0, the on-resistance is reduced by at least about 5% compared to a comparative example diode that does not have a high-concentration region 42. Furthermore, the on-resistance decreases as W2 / W1 increases.

[0038] 5 is a graph showing the relationship between W2 / W1 and breakdown voltage / on-resistance of diode 100. It can be seen that in diode 100, when W2 / W1 is 0.9 or less, the on-resistance is reduced without a decrease in breakdown voltage. It can also be seen that when W2 / W1 is in the range of 0.1 to 0.9, the on-resistance is reduced without a decrease in breakdown voltage. In particular, when W2 / W1 is in the range of 0.1 to 0.9, W2 / W1 is in the range of 0.3 to 0.9, W1 / W2 is in the range of 0.4 to 0.9, or W2 / W1 is in the range of 0.5 to 0.9, the reduction in on-resistance is greater, and the effect is greater.

[0039] 6 to 8 show simulation results using a plurality of diodes 100 with different ratios of the length L2 of the high-concentration region 42 to the length L1 of the mesa portion 12a. Specifically, the simulation used six types of diodes 100 with L2 / L1 = 0.18, 0.25, 0.33, 0.5, 0.67, and 0.83. Note that for the diodes 100, W2 / W1, where W2 is the width W1 of the mesa portion 12a and W2 is the width of the high-concentration region 42, = 0.5.

[0040] 6 is a graph showing the relationship between L2 / L1 and the breakdown voltage of diode 100. In FIG. 6, the horizontal axis represents L2 / L1, and the vertical axis represents the breakdown voltage. In diode 100, the breakdown voltage decreases as L2 / L1 increases. However, when L2 / L1 is in the range of 0.5 or less, the breakdown voltage decreases by at most about 5% compared to a comparative example diode not having high-concentration region 42, and almost no decrease in breakdown voltage performance is observed.

[0041] 7 is a graph showing the relationship between L2 / L1 and on-resistance of the diode 100. In FIG. 7, the horizontal axis represents L2 / L1, and the vertical axis represents on-resistance. In the diode 100, when L2 / L1 is in the range of 0.1 to 0.9, the on-resistance is reduced by at least about 7.5% compared to a comparative example diode that does not have a high-concentration region 42. Furthermore, the on-resistance decreases as L2 / L1 increases.

[0042] 8 is a graph showing the relationship between L2 / L1 and the breakdown voltage / on-resistance of the diode 100. It can be seen that in the diode 100, the on-resistance is reduced without a decrease in the breakdown voltage when L2 / L1 is in the range of 0.18 to 0.5.

[0043] 9 is a graph showing the relationship between the breakdown voltage and on-resistance of a comparative diode in which the high-concentration region 42 is not disposed and the diode 100 of this embodiment. In FIG. 9, the horizontal axis represents the breakdown voltage, and the vertical axis represents the on-resistance. The relationship between the breakdown voltage and on-resistance of the diode 100 is represented by result 200. The relationship between the breakdown voltage and on-resistance of the diode of the comparative example is represented by result 202. Compared to the diode of the comparative example, the diode 100 has a lower on-resistance at the same breakdown voltage, and a higher breakdown voltage at the same on-resistance. As a result, the diode 100 achieves a higher breakdown voltage and a lower on-resistance than the diode of the comparative example.

[0044] Furthermore, in the diode 100, the low-concentration region 44 can reduce the flow of leakage current while a reverse voltage is applied, thereby improving the breakdown voltage. The thickness of the low-concentration region 44, i.e., the distance between the high-concentration region 42 and the anode electrode 30 and the distance between the high-concentration region 42 and the insulating films 21 and 31, can be determined according to the breakdown voltage and on-resistance required while a reverse voltage is applied. Note that by arranging the high-concentration region 42 so that the high-concentration region 42 does not come into direct contact with the anode electrode 30 and the insulating films 21 and 31, a decrease in the breakdown voltage can be suppressed.

[0045] Even if W2 / W1 is smaller than 0.1, a high breakdown voltage and a low on-resistance are achieved as long as the high-concentration region 42 is present in the mesa portion 12a. The same is true when L2 / L1 is smaller than 0.18.

[0046] Although specific examples of the present invention have been described above in detail, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and alterations of the specific examples exemplified above.

[0047] For example, the above technique can be applied to materials other than gallium oxide, such as gallium nitride (GaN), silicon carbide (SiC), diamond, etc. Furthermore, the diode 100 can be applied to a PN diode in addition to a Schottky diode.

[0048] The technical elements described in this specification or drawings may exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technologies illustrated in this specification or drawings may achieve multiple objectives simultaneously, and achieving one of those objectives alone is technically useful. [Explanation of symbols]

[0049] 10: cathode electrode, 12: semiconductor layer, 12a: mesa portion, 12b: front surface, 12c: back surface, 14: substrate, 16: epitaxial layer, 18: trench, 20: termination trench, 21: insulating film, 22: insulating layer, 30: anode electrode, 31: insulating film, 32: conductive portion, 40: low concentration region, 42: high concentration region, 44: low concentration region, 100: diode

Claims

1. a semiconductor layer; a surface electrode disposed on the surface of the semiconductor layer; a plurality of trenches extending from the front surface to the back surface of the semiconductor layer; an insulating film covering inner wall surfaces of the plurality of trenches; a conductive portion filling the trench and contacting the surface electrode; a back surface electrode disposed on the back surface of the semiconductor layer, a mesa portion of the semiconductor layer is disposed between two adjacent trenches among the plurality of trenches; a high-concentration region having an impurity concentration higher than that of the semiconductor layer located around the mesa portion is disposed in at least a portion of the mesa portion, the high-concentration region being spaced apart from the insulating film disposed in the trench located on both sides of the mesa portion; the mesa portion and the high concentration region are p-type, or the mesa portion and the high concentration region are n-type; diode.

2. 2. The diode according to claim 1, wherein the high concentration region has a width equal to or less than 0.9 of the width of the mesa portion.

3. 3. The diode according to claim 1, wherein the high concentration region has a length equal to or less than 0.5 of the depth of the mesa portion.

4. 4. The diode according to claim 1, wherein a first low concentration region having an impurity concentration lower than that of the high concentration region and other portions of the mesa portion is disposed at least one of between the high concentration region and the insulating film disposed in the trench located on both sides of the mesa portion in which the high concentration region is disposed and between the high concentration region and the surface of the semiconductor layer.

5. At least some of the trenches each have an end located opposite the surface of the semiconductor layer; the semiconductor layer has a second low concentration region located on the back surface side of the semiconductor layer, the second low concentration region being located at the end of each of the at least some of the trenches; The diode according to claim 1 , wherein the second low concentration region has a lower impurity concentration than other portions of the semiconductor layer.

Images