Semiconductor device and method for manufacturing the same

Abstract

To provide a semiconductor device capable of suppressing occurrence of peeling.SOLUTION: A semiconductor device 1A includes a conductive part 20 and a semiconductor element 40 mounted on the conductive part 20. The conductive part 20 is composed of a plating layer. The conductive part 20 includes: mounting parts 24 and 26 having mounting surfaces 241 and 261 on which the semiconductor element 40 is mounted; and terminal parts 23 and 25 that extend to an opposite side of the semiconductor element 40 with respect to the mounting parts 24 and 26. The mounting parts 24 and 26 extend in the X direction along the mounting surfaces 241 and 261 more than the terminal parts 23 and 25. The mounting parts 24 and 26 and the terminals 23 and 25 are integrally formed.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] 2. Description of the Related Art Conventionally, semiconductor devices have been becoming smaller in size as electronic devices become smaller in size. Patent Document 1 shows an example of a semiconductor device. This semiconductor device includes a rectangular die pad, multiple leads arranged around the die pad, a semiconductor chip mounted on the die pad, and a sealing resin that seals the semiconductor chip. The multiple leads serve as wiring that electrically connects the semiconductor chip to the outside of the semiconductor device. In a method for manufacturing this semiconductor device, a semiconductor chip is mounted on the die pad of a lead frame, and all of the semiconductor chips on the lead frame are collectively sealed with resin. The resin and the lead frame are then cut along predetermined dicing lines with a dicing saw. This results in individual semiconductor devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-239740 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when a lead is formed from a plurality of plating layers, there is a risk of peeling occurring at the interfaces between the plating layers. [Means for solving the problem]

[0005] A semiconductor device according to one aspect of the present disclosure comprises a conductive portion and a semiconductor element mounted on the conductive portion, the conductive portion being formed of a plating layer, the conductive portion including a mounting portion having a mounting surface on which the semiconductor element is mounted, and a terminal portion extending from the mounting portion on the opposite side of the semiconductor element, the mounting portion extending in a first direction along the mounting surface further than the terminal portion, and the mounting portion and the terminal portion being integrally formed.

[0006] A manufacturing method of a semiconductor device that is one aspect of the present disclosure is a manufacturing method of a semiconductor device comprising: a conductive portion; and a semiconductor element mounted on the conductive portion, wherein the conductive portion includes a mounting portion having a mounting surface on which the semiconductor element is mounted; and a terminal portion extending from the mounting portion on the opposite side of the semiconductor element, and the manufacturing method includes a step of integrally forming the mounting portion and the terminal portion with a plating layer. [Effects of the Invention]

[0007] According to one aspect of the present disclosure, it is possible to provide a semiconductor device and a method for manufacturing a semiconductor device that can suppress the occurrence of peeling. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a perspective view of a semiconductor device according to an embodiment, viewed from above. [Figure 2] FIG. 2 is a perspective view of the semiconductor device of FIG. 1 as viewed from the bottom side. [Figure 3] FIG. 3 is a schematic top view of the semiconductor device of FIG. [Figure 4] FIG. 4 is a schematic bottom view of the semiconductor device of FIG. [Figure 5] FIG. 5 is a schematic side view of the semiconductor device of FIG. [Figure 6] FIG. 6 is a cross-sectional view taken along line 6-6 in FIG. [Figure 7] FIG. 7 is a cross-sectional view taken along line 7-7 in FIG. [Figure 8] 8A to 8C are schematic cross-sectional views illustrating exemplary manufacturing steps for the semiconductor device shown in FIG. [Figure 9] FIG. 9 is a schematic cross-sectional view showing a manufacturing process subsequent to FIG. [Figure 10] FIG. 10 is a schematic cross-sectional view showing a manufacturing process subsequent to FIG. [Figure 11] FIG. 11 is a schematic cross-sectional view showing a manufacturing process subsequent to FIG. [Figure 12] FIG. 12 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 13] FIG. 13 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 14] FIG. 14 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 15] FIG. 15 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 16] FIG. 16 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 17] FIG. 17 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 18] FIG. 18 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 19] FIG. 19 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 20] FIG. 20 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 21] FIG. 21 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 22] FIG. 22 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 23] FIG. 23 is a cross-sectional view showing a semiconductor device of a comparative example. [Figure 24] 24A to 24C are schematic cross-sectional views showing the manufacturing process of a semiconductor device of the comparative example. [Figure 25] 25A to 25C are schematic cross-sectional views showing the manufacturing process of a semiconductor device of the comparative example. [Figure 26] FIG. 26 is a schematic cross-sectional view showing a manufacturing process of a semiconductor device of a comparative example. [Figure 27]FIG. 27 is a schematic cross-sectional view showing a manufacturing process of a semiconductor device of a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments and modified examples will be described with reference to the drawings. The embodiments and modified examples shown below are examples of configurations and methods for embodying the technical ideas, and are not intended to limit the materials, shapes, structures, arrangements, dimensions, etc. of each component to those described below. Various modifications can be made to each of the following embodiments and modified examples. Furthermore, the following embodiments and modified examples can be implemented in combination with each other within the scope of technical compatibility.

[0010] Hereinafter, embodiments of a semiconductor device according to the present disclosure will be described with reference to the accompanying drawings. For simplicity and clarity of description, the components shown in the drawings are not necessarily drawn to scale. Furthermore, cross-sectional views may omit hatching lines to facilitate understanding. The accompanying drawings merely illustrate embodiments of the present disclosure and should not be considered to limit the present disclosure.

[0011] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.

[0012] (One embodiment) A semiconductor device 1A according to one embodiment will be described below. 1 and 2 are perspective views showing the appearance of semiconductor device 1A, with FIG. 1 being a perspective view of semiconductor device 1A viewed from the top side and FIG. 2 being a perspective view of semiconductor device 1A viewed from the bottom side. FIG. 3 is a schematic top view of semiconductor device 1A. FIG. 4 is a schematic bottom view of semiconductor device 1A. FIG. 5 is a schematic side view of semiconductor device 1A. FIG. 6 is a cross-sectional view taken along line 6-6 in FIG. 3. FIG. 7 is a cross-sectional view taken along line 7-7 in FIG. 3. FIGS. 8 to 22 are cross-sectional views showing an example of a manufacturing process for semiconductor device 1A.

[0013] The semiconductor device 1A shown in these figures is a device that is surface-mounted on the circuit board of various electronic devices. As shown in FIGS. 1 and 2, the semiconductor device 1A has a rectangular plate shape. For convenience of explanation, the thickness direction of the semiconductor device 1A is defined as the Z direction. Furthermore, among the directions perpendicular to the Z direction, a first direction and a second direction perpendicular to each other are defined as the X direction and the Y direction, respectively.

[0014] [Schematic configuration of semiconductor device] As shown in FIGS. 1 and 2, the semiconductor device 1A has a sealing resin 10 and a plurality of external conductive films 50. As shown in FIGS. 3 to 7, the semiconductor device 1A has a semiconductor element 40, a conductive portion 20, and a bonding portion 30. The sealing resin 10 seals the semiconductor element 40, the conductive portion 20, and the bonding portion 30. The semiconductor element 40 is mounted on the conductive portion 20. More specifically, the conductive portion 20 is electrically connected to the semiconductor element 40 by the bonding portion 30.

[0015] [Sealing resin] The sealing resin 10 seals the conductive portion 20, the bonding portion 30, and the semiconductor element 40. The sealing resin 10 has a resin upper surface 10s and a resin lower surface 10r. The resin upper surface 10s and the resin lower surface 10r face opposite each other in the Z direction. The resin upper surface 10s is flat. The resin lower surface 10r is flat. The sealing resin 10 also has multiple resin side surfaces 101, 102, 103, and 104. The first resin side surface 101 and the second resin side surface 102 face opposite each other in the X direction. The third resin side surface 103 and the fourth resin side surface 104 face opposite each other in the Y direction.

[0016] Each of the resin side surfaces 101 to 104 of the sealing resin 10 has a first side surface 111 and a second side surface 112. The first side surface 111 is disposed closer to the resin upper surface 10s in the Z direction than the resin lower surface 10r. The second side surface 112 is disposed closer to the resin lower surface 10r in the Z direction than the resin upper surface 10s. The second side surface 112 of each of the resin side surfaces 101 to 104 is located inside the sealing resin 10 with respect to the first side surface 111 of each of the resin side surfaces 101 to 104 when viewed from the Z direction. In other words, the sealing resin 10 is configured so that the side of the resin upper surface 10s is larger than the side of the resin lower surface 10r in the Z direction.

[0017] In this embodiment, the first side surface 111 of each of the resin side surfaces 101 to 104 is perpendicular to the resin upper surface 10s. Also, in this embodiment, the second side surface 112 of each of the resin side surfaces 101 to 104 is perpendicular to the resin lower surface 10r. The sealing resin 10 of this embodiment has steps 12 recessed toward the inside of the sealing resin 10 when viewed from the Z direction, depending on the positions of the first side surface 111 and the second side surface 112. As shown in FIGS. 1 and 2, the steps 12 are provided over the entire circumferential direction of the sealing resin 10.

[0018] The sealing resin 10 is made of, for example, a resin having electrical insulating properties. As this resin, for example, a synthetic resin containing an epoxy resin as a main component can be used. The sealing resin 10 can be, for example, a synthetic resin containing a filler. The filler is made of, for example, SiO2. The sealing resin 10 is colored, for example, black. The material and shape of the sealing resin 10 are not limited.

[0019] [Conductive part] The conductive portion 20 includes a first conductive portion 21 and a second conductive portion 22. The first conductive portion 21 is provided on the first resin side surface 101 side of the sealing resin 10, and the second conductive portion 22 is provided on the second resin side surface 102 side of the sealing resin 10. The semiconductor device 1A of this embodiment has two first conductive portions 21 and two second conductive portions 22. In this embodiment, the third resin side surface 103 and the fourth resin side surface 104 are surfaces on which no conductive portion is provided.

[0020] The first conductive part 21 has a first terminal part 23 and a first mounting part 24. A semiconductor element 40 is mounted on the first mounting part 24. The first terminal part 23 extends on the opposite side of the first mounting part 24 from the semiconductor element 40. In other words, the first conductive part 21 has the first mounting part 24 on which the semiconductor element 40 is mounted, and the first terminal part 23 extending on the opposite side of the first mounting part 24 from the semiconductor element 40.

[0021] As shown in FIGS. 3 to 7 , the first mounting portion 24 extends in the Z direction from a position overlapping the semiconductor element 40 to the first resin side surface 101 of the sealing resin 10. The first mounting portion 24 is exposed from the first resin side surface 101. The first terminal portion 23 is disposed on the first mounting portion 24 on the side of the first resin side surface 101 of the sealing resin 10. The first terminal portion 23 is exposed from the resin lower surface 10r of the sealing resin 10 and also from the first resin side surface 101 of the sealing resin 10. Therefore, the first mounting portion 24 extends toward the inside of the semiconductor device 1A with respect to the first terminal portion 23. In other words, the first mounting portion 24 has a protruding portion 24A that protrudes from the first terminal portion 23 toward the inside of the semiconductor device 1A.

[0022] The first mounting portion 24 and the first terminal portion 23 are integrally formed without forming an interface therebetween. The first mounting portion 24 and the first terminal portion 23 are made of the same material. The first mounting portion 24 and the first terminal portion 23 are made of a plating layer. The constituent material of the first mounting portion 24 and the first terminal portion 23 includes, for example, Cu (copper) and Cu alloy.

[0023] The first mounting portion 24 has an upper surface 241, a lower surface 242, and side surfaces 243 and 244. The upper surface 241 and the lower surface 242 face opposite each other in the Z direction. The upper surface 241 faces the same side as the resin upper surface 10s. The upper surface 241 is a mounting surface on which the semiconductor element 40 is mounted. The lower surface 242 is a surface of the protruding portion 24A of the first mounting portion 24 that faces the opposite side to the semiconductor element 40. The side surfaces 243 and 244 are oriented in a direction intersecting the upper surface 241 and the lower surface 242. has been extended toThe side surface 243 is covered with the sealing resin 10. The side surface 244 is an exposed surface that is exposed from the first resin side surface 101 (second side surface 112) of the sealing resin 10.

[0024] The first terminal portion 23 has a lower surface 232 and side surfaces 233 and 234. The lower surface 232 is exposed from a resin lower surface 10r of the sealing resin 10. The side surface 233 is covered by the sealing resin 10. The side surface 234 is exposed from a first resin side surface 101 of the sealing resin 10.

[0025] The thickness T24 of the first mounting portion 24 in the Z direction is 20 μm or more and 100 μm or less. In this embodiment, the thickness T24 of the first mounting portion 24 is 50 μm. The thickness T23 of the first terminal portion 23 in the Z direction is 50 μm or more and 200 μm or less. In this embodiment, the thickness T23 of the first terminal portion 23 is 100 μm. The thickness of the first terminal portion 23 is preferably at least twice the thickness of the first mounting portion 24. In this embodiment, the thickness T23 of the first terminal portion 23 is twice the thickness of the first mounting portion 24. In the X direction, the length L23 of the first terminal portion 23 is 100 μm or more and 200 μm or less. In this embodiment, the length L23 of the first terminal portion 23 is 200 μm. The length of the first mounting portion 24 is defined as the length L24 of the protruding portion 24A protruding from the first terminal portion 23. The length L24 of the first mounting portion 24 is 100 μm or more and 150 μm or less. In this embodiment, the length L24 of the first mounting portion 24 is 100 μm.

[0026] The second conductive part 22 has a second terminal part 25 and a second mounting part 26. A semiconductor element 40 is mounted on the second mounting part 26. The second terminal part 25 extends on the opposite side of the semiconductor element 40 from the second mounting part 26. In other words, the second conductive part 22 has the second mounting part 26 on which the semiconductor element 40 is mounted, and the second terminal part 25 extending on the opposite side of the second mounting part 26 from the semiconductor element 40.

[0027] As shown in FIGS. 3 to 7 , the second mounting portion 26 extends in the Z direction from a position overlapping the semiconductor element 40 to the second resin side surface 102 of the sealing resin 10. The second mounting portion 26 is exposed from the second resin side surface 102. The second terminal portion 25 is disposed on the second mounting portion 26 on the side of the second resin side surface 102 of the sealing resin 10. The second terminal portion 25 is exposed from the resin lower surface 10r of the sealing resin 10 and also from the second resin side surface 102 of the sealing resin 10. Therefore, the second mounting portion 26 extends toward the inside of the semiconductor device 1A with respect to the second terminal portion 25. In other words, the second mounting portion 26 has a protruding portion 26A that protrudes from the second terminal portion 25 toward the inside of the semiconductor device 1A.

[0028] The second mounting portion 26 and the second terminal portion 25 are integrally formed without forming an interface therebetween. The second mounting portion 26 and the second terminal portion 25 are made of the same material. The second mounting portion 26 and the second terminal portion 25 are made of a plating layer. The constituent material of the second mounting portion 26 and the second terminal portion 25 includes, for example, Cu and Cu alloy.

[0029] The second mounting portion 26 has an upper surface 261, a lower surface 262, and side surfaces 263 and 264. The upper surface 261 and the lower surface 262 face opposite each other in the Z direction. The upper surface 261 faces the same side as the resin upper surface 10s. The upper surface 261 is a mounting surface on which the semiconductor element 40 is mounted. The lower surface 262 is a surface of the protruding portion 26A of the second mounting portion 26 that faces the opposite side to the semiconductor element 40. The side surfaces 263 and 264 are oriented in a direction intersecting the upper surface 261 and the lower surface 262. has been extended to The side surface 263 is covered with the sealing resin 10. The side surface 264 is an exposed surface exposed from the second resin side surface 102 (second side surface 112) of the sealing resin 10.

[0030] The second terminal portion 25 has a lower surface 252 and side surfaces 253 and 254. The lower surface 252 is exposed from the resin lower surface 10r of the sealing resin 10. The side surface 253 is covered by the sealing resin 10. The side surface 254 is exposed from the second resin side surface 102 of the sealing resin 10.

[0031] The thickness T26 of the second mounting portion 26 in the Z direction is 20 μm or more and 100 μm or less. In this embodiment, the thickness T26 of the second mounting portion 26 is 50 μm. The thickness T25 of the second terminal portion 25 in the Z direction is 50 μm or more and 200 μm or less. In this embodiment, the thickness T25 of the second terminal portion 25 is 100 μm. It is preferable that the thickness of the second terminal portion 25 is at least twice the thickness of the second mounting portion 26. In this embodiment, the thickness T25 of the second terminal portion 25 is twice the thickness of the second mounting portion 26. In the X direction, the length L25 of the second terminal portion 25 is 100 μm or more and 200 μm or less. In this embodiment, the length L25 of the second terminal portion 25 is 200 μm. In the X direction, the length L25 of the second terminal portion 25 is 100 μm or more and 200 μm or less. In this embodiment, the length L25 of the second terminal portion 25 is 200 μm. The length of the second mounting portion 26 is defined as the length L26 of the protruding portion 26A protruding from the second terminal portion 25. The length L26 of the second mounting portion 26 is 100 μm or more and 150 μm or less. In this embodiment, the length L26 of the second mounting portion 26 is 100 μm.

[0032] [Joint part] As shown in FIG. 6, the joint portion 30 is provided on the conductive portion 20. The bonding portion 30 includes a first bonding portion 31 provided on the first conductive portion 21 and a second bonding portion 32 provided on the second conductive portion 22. The first bonding portion 31 and the second bonding portion 32 bond the semiconductor element 40 to the first conductive portion 21 and the second conductive portion 22.

[0033] The first bonding portion 31 and the second bonding portion 32 include a plating layer 33 and a solder layer 34. The plating layer 33 is provided on the upper surfaces 241, 261 of the mounting portions 24, 26. The plating layer 33 is made of a conductive metal material. The plating layer 33 is made of, for example, Ni (nickel). The solder layer 34 is provided between the plating layer 33 and the element electrodes 45 of the semiconductor element 40. The solder layer 34 connects the plating layer 33 and the element electrodes 45. The solder layer 34 is made of Sn (tin) or an alloy containing Sn. This alloy is, for example, a Sn-Ag (silver)-based alloy, a Sn-Sb (antimony)-based alloy, or the like.

[0034] [Semiconductor elements] As shown in FIGS. 3 to 7, the semiconductor element 40 has a rectangular shape when viewed from the Z direction. As shown in FIG. 6, the semiconductor element 40 includes an element substrate 41, electrode pads 42, an insulating film 43, a rewiring layer 44, and element electrodes 45.

[0035] As shown in FIGS. 3 to 7, the element substrate 41 has a substrate main surface 41s, a substrate back surface 41r, and multiple substrate side surfaces 411, 412, 413, and 414. The substrate main surface 41s and the substrate back surface 41r face opposite each other in the Z direction. As shown in FIGS. 3 and 4, the first substrate side surface 411 and the second substrate side surface 412 face opposite each other in the X direction. The third substrate side surface 413 and the fourth substrate side surface 414 face opposite each other in the Y direction. The substrate main surface 41s faces the upper surfaces 241 and 261 of the mounting portions 24 and 26. The substrate back surface 41r faces the same direction as the resin upper surface 10s.

[0036] The semiconductor element 40 is an integrated circuit (IC) such as an LSI (Large Scale Integration). The semiconductor element 40 may also be a voltage control element such as an LDO (Low Drop Out), an amplifying element such as an operational amplifier, or a discrete semiconductor element such as a diode or various sensors. For example, in the case of an LSI, the substrate main surface 41s is the surface on which components required for the function of the semiconductor element 40 are formed. The semiconductor element 40 is not limited to an element having multiple components formed thereon, but may also be an element having a single component formed thereon, such as a chip capacitor or a chip inductor, or an element having components formed on a substrate other than a semiconductor. In this embodiment, the semiconductor element 40 is an LSI.

[0037] The electrode pads 42 include a first electrode pad 421 and a second electrode pad 422. The first electrode pad 421 and the second electrode pad 422 are provided on the substrate main surface 41s of the element substrate 41. The first electrode pad 421 is arranged near the first substrate side surface 411. The second electrode pad 422 is arranged near the second substrate side surface 412.

[0038] The insulating film 43 is formed to cover the substrate main surface 41s. The insulating film 43 is formed to cover the peripheral edges of the first electrode pads 421 and the second electrode pads 422. Parts of the first electrode pads 421 and part of the second electrode pads 422 are exposed from the insulating film 43. The insulating film 43 is made of, for example, SiN. A surface 43s of the insulating film 43 forms the element main surface of the semiconductor element 40. A substrate back surface 41r of the element substrate 41 forms the element back surface of the semiconductor element 40. Substrate side surfaces 411 to 414 of the element substrate 41 form the element side surfaces of the semiconductor element 40.

[0039] The redistribution layer 44 includes a first redistribution layer 441 and a second redistribution layer 442. The first redistribution layer 441 is connected to the first electrode pad 421. The first redistribution layer 441 extends from the first electrode pad 421 to the insulating film 43 and is in contact with a surface 43s of the insulating film 43. The second redistribution layer 442 is connected to the second electrode pad 422. The second redistribution layer 442 extends from the second electrode pad 422 to the insulating film 43 and is in contact with a surface 43s of the insulating film 43. The first redistribution layer 441 and the second redistribution layer 442 are made of, for example, Cu, a Cu alloy, or the like.

[0040] The element electrodes 45 include a first element electrode 451 and a second element electrode 452. The first element electrode 451 is disposed at a position not overlapping with the first electrode pad 421 when viewed from the Z direction. In other words, the first electrode pad 421 and the first element electrode 451 are shifted in a direction intersecting with the Z direction. The first element electrode 451 is connected to the first redistribution layer 441. The second element electrode 452 is disposed at a position not overlapping with the second electrode pad 422 when viewed from the Z direction. In other words, the second electrode pad 422 and the second element electrode 452 are shifted in a direction intersecting with the Z direction. The second element electrode 452 is connected to the second redistribution layer 442.

[0041] The first element electrode 451 and the second element electrode 452 each include a conductive layer 461 and a barrier layer 462. The conductive layer 461 is made of, for example, Cu or a Cu alloy. The conductive layer 461 may include a seed layer. The seed layer is made of, for example, Ti (titanium) / Cu. The barrier layer 462 is made of Ni, an alloy containing Ni, or a plurality of metal layers containing Ni. The barrier layer 462 can be made of, for example, Ni, Pd (palladium), Au (gold), an alloy containing two or more of these metals, or the like.

[0042] [External conductive film] The external conductive film 50 includes a first external conductive film 51 and a second external conductive film 52 . The first external conductive film 51 is formed so as to cover the surface of the first conductive portion 21 exposed from the sealing resin 10.

[0043] The first external conductive film 51 includes a first conductive film 511 and a second conductive film 512. The first conductive film 511 covers the lower surface 232 of the first terminal portion 23 exposed from the resin lower surface 10r of the sealing resin 10. The second conductive film 512 covers the side surface 234 of the first terminal portion 23 and the side surface 244 of the first mounting portion 24 exposed from the first resin side surface 101 of the sealing resin 10. The first external conductive film 51 including the first conductive film 511 and the second conductive film 512 serves as an external connection terminal of the semiconductor device 1A. The first external conductive film 51 is formed, for example, from a plurality of metal layers stacked on top of each other. Examples of the metal layers include Ni layers, Pd layers, and Au layers. The material of the first external conductive film 51 is not limited, but may be, for example, a stack of Ni layers and Au layers, or may be Sn.

[0044] The second external conductive film 52 is formed so as to cover the surface of the second conductive portion 22 exposed from the sealing resin 10. The second external conductive film 52 includes a first conductive film 521 and a second conductive film 522. The first conductive film 521 covers the lower surface 252 of the second terminal portion 25 exposed from the resin lower surface 10r of the sealing resin 10. The second conductive film 522 covers the side surface 254 of the second terminal portion 25 and the side surface 264 of the second mounting portion 26 exposed from the second resin side surface 102 of the sealing resin 10. The second external conductive film 52 including the first conductive film 521 and the second conductive film 522 serves as an external connection terminal of the semiconductor device 1A. The second external conductive film 52 is made of, for example, the same material as the first external conductive film 51. The second external conductive film 52 is made of, for example, multiple metal layers stacked on top of each other. Examples of the metal layers include Ni layers, Pd layers, and Au layers. The material of the second external conductive film 52 is not limited, but may be, for example, a stack of Ni layers and Au layers, or may be Sn. Furthermore, the second external conductive film 52 may be made of a material different from that of the first external conductive film 51.

[0045] 6 and 7, the sealing resin 10 seals the conductive portion 20, the bonding portion 30, and the semiconductor element 40. The conductive portion 20 includes a first conductive portion 21 and a second conductive portion 22. As shown in FIG. 6 , the sealing resin 10 is filled between the first conductive portion 21 and the second conductive portion 22 in a cross section taken along the Z direction. The sealing resin 10 includes a first resin portion 131 and a second resin portion 132. The first resin portion 131 is a resin filled between the first terminal portion 23 of the first conductive portion 21 and the second terminal portion 25 of the second conductive portion 22. The second resin portion 132 is a resin filled between the first mounting portion 24 of the first conductive portion 21 and the second mounting portion 26 of the second conductive portion 22. The first resin portion 131 and the second resin portion 132 are integrally formed. The first resin portion 131 and the second resin portion 132 are made of the same material. No interface is formed between the first resin portion 131 and the second resin portion 132. In other words, the first resin portion 131 and the second resin portion 132 are integrally formed without any interface being formed between them.

[0046] [Method of manufacturing semiconductor device] An example of a manufacturing method for a semiconductor device 1A according to an embodiment of the present disclosure will be described with reference to FIGS. 8 to 22. Each of the referenced figures shows the area in which one semiconductor device 1A is formed. FIGS. 8 to 22 show cross sections corresponding to FIG. 6 in the manufacturing process. For ease of understanding, in FIGS. 8 to 22, components similar to those in FIGS. 1 to 7 are denoted by the same reference numerals. The definitions of the directions shown in each figure are the same as those shown in FIGS. 1 to 7.

[0047] 8, the manufacturing method of the semiconductor device 1A includes a step of preparing a support substrate 900. The support substrate 900 is made of, for example, a single crystal Si material. The support substrate 900 has a main surface 900s and a back surface 900r that face opposite each other in the Z direction. Note that the support substrate 900 may also be made of a synthetic resin material such as epoxy resin.

[0048] 9, the manufacturing method of the semiconductor device 1A includes a step of forming a seed layer 901. The seed layer 901 is formed on a main surface 900s of a support substrate 900, for example, by sputtering. The seed layer 901 includes, for example, a first layer containing Ti as a main component and a second layer containing Cu as a main component. The first layer is formed over the entire main surface 900s of the support substrate 900, and the second layer is formed in contact with the first layer.

[0049] As shown in FIG. 10 , the manufacturing method of the semiconductor device 1A includes a step of forming a first mask 902. The first mask 902 forms the terminal portions 23 and 25 shown in FIG. 6 and other figures. The first mask 902 has first openings 9021 corresponding to the terminal portions 23 and 25. The first mask 902 is formed, for example, by photolithography. The film thickness of the first mask 902 is greater than the thicknesses T23 and T25 (see FIG. 6 ) of the terminal portions 23 and 25 formed by the first mask 902. First, for example, a photosensitive resist layer is formed on the upper surface 901s of the seed layer 901. The resist layer may be, for example, a dry film resist. The resist layer may be composed of a plurality of dry film resists. Next, the resist layer is exposed and developed to form the first mask 902 having first openings 9021 corresponding to the terminal portions 23 and 25 shown in FIG. 6 .

[0050] As shown in FIG. 11 , the manufacturing method of the semiconductor device 1A includes a step of forming a second mask 903. The second mask 903 forms the mounting portions 24 and 26 shown in FIG. 6 . The second mask 903 has second openings 9031 corresponding to the mounting portions 24 and 26. The second mask 903 is formed, for example, by photolithography. The film thickness of the second mask 903 is greater than the thicknesses T24 and T26 (see FIG. 6 ) of the mounting portions 24 and 26 formed by the second mask 903. First, for example, a photosensitive resist layer is formed on the upper surface of the first mask 902. The resist layer may be, for example, a dry film resist. The resist layer may be composed of a plurality of dry film resists. Next, the resist layer is exposed and developed to form the second mask 903 having second openings 9031 corresponding to the mounting portions 24 and 26 shown in FIG. 6 .

[0051] 12, the method for manufacturing semiconductor device 1A includes a step of forming plating layer 920. Plating layer 920 corresponds to conductive section 20 shown in FIG.

[0052] The plating layer 920 is formed by, for example, electrolytic plating. The plating layer 920 is formed by growing a plating metal from the upper surface 901s of the seed layer 901 exposed from the first mask 902 and the second mask 903. In this process, the plating metal is grown all at once from the first opening 9021 of the first mask 902 to the second opening 9031 of the second mask 903. The plating metal constituting the plating layer 920 includes Cu and a Cu alloy. As a result, the plating layer 920 has terminal portions 23 and 25 formed in the first opening 9021 of the first mask 902 and mounting portions 24 and 26 formed in the second opening 9031 of the second mask 903. The conductive portion 20 constituted by the plating layer 920 does not have an interface formed therein.

[0053] As shown in FIG. 13 , the manufacturing method of the semiconductor device 1A includes a step of forming a third mask 904. The third mask 904 forms the bonding portion 30 shown in FIG. 6 . The third mask 904 has a third opening 9041 corresponding to the bonding portion 30. The third mask 904 is formed, for example, by photolithography. The film thickness of the third mask 904 is greater than the thickness of the bonding portion 30 formed by the third mask 904. First, for example, a photosensitive resist layer is formed on the upper surface 903s of the second mask 903 and the upper surface 920s of the plating layer 920. The resist layer may be, for example, a dry film resist. The resist layer may be composed of multiple dry film resists. Next, the resist layer is exposed and developed to form the third mask 904 having the third opening 9041 corresponding to the bonding portion 30 shown in FIG. 6 .

[0054] As shown in FIG. 14, the manufacturing method of the semiconductor device 1A includes a step of forming a bonding portion 30. The bonding portion 30 includes a plating layer 33 and a solder layer 34. The bonding portion 30 is formed by, for example, electrolytic plating. First, the plating layer 33 is formed by depositing a plating metal on the upper surface 920s of the plating layer 920 exposed from the third mask 904. The plating metal constituting the plating layer 33 includes Ni and a Ni alloy. Next, the solder layer 34 is formed by depositing a plating metal on the upper surface of the plating layer 33 exposed from the third mask 904. The plating metal constituting the solder layer 34 includes an alloy containing Sn and Ag.

[0055] 15, the method for manufacturing the semiconductor device 1A includes a step of removing the masks 902 to 904. The masks 902 to 904 can be removed using, for example, a remover.

[0056] The manufacturing method of semiconductor device 1A also includes a step of removing seed layer 901. After removing masks 902 to 904 shown in FIG. 14, exposed seed layer 901 is removed. Seed layer 901 can be removed by, for example, etching. For example, seed layer 901 exposed from plating layer 920 is removed by wet etching using plating layer 920 as a mask.

[0057] The method for manufacturing the semiconductor device 1A also includes a step of performing a flow treatment. The flow treatment smoothes the surface of the solder layer 34. This smoothing prevents voids from occurring when the semiconductor element 40 is mounted.

[0058] 16, the manufacturing method of the semiconductor device 1A includes a step of mounting a semiconductor element 40. This step includes a step of flip-chip mounting the semiconductor element 40 and a step of performing a reflow process. The semiconductor element 40 is flip-chip mounted, for example, using a flip-chip bonder, by applying flux to the element electrodes 45. Next, the element electrodes 45 are bonded to the bonding portions 30 by a reflow process.

[0059] As shown in FIG. 17, the manufacturing method of semiconductor device 1A includes a step of forming a resin layer 910. Resin layer 910 is the portion that will become sealing resin 10 shown in FIGS. 1 to 7. Resin layer 910 is a synthetic resin whose main material is, for example, epoxy resin. Resin layer 910 is formed, for example, by compression molding. Resin layer 910 is formed so as to cover semiconductor element 40, bonding portion 30, and conductive portion 20. In other words, resin layer 910 is filled between first conductive portion 21 and second conductive portion 22 of conductive portion 20.

[0060] As shown in FIGS. 18 and 19, the manufacturing method of the semiconductor device 1A includes a step of removing the support substrate 900. A dicing tape (not shown) is attached to a lower surface 910s of the resin layer 910. Note that FIG. 18 is shown upside down compared to FIG. 17. Then, the support substrate 900, the seed layer 901, part of the resin layer 910, and part of the plating layer 920 are removed by grinding. At this time, grinding is performed from the support substrate 900 side toward the resin layer 910 up to the dashed line DL1 shown in FIG. 18. As a result, the lower surfaces 232 and 252 of the terminal portions 23 and 25 are formed, as shown in FIG. Note that after the support substrate 900 is peeled off from the resin layer 910, part of the resin layer 910, the seed layer 901, and part of the plating layer 920 may be ground.

[0061] As shown in FIG. 20 , the manufacturing method of the semiconductor device 1A includes a step of cutting (half-cutting) a portion of the resin layer 910 in the Z direction. When half-cutting the resin layer 910, a dicing blade is used, for example, to cut from the upper surface 910r of the resin layer 910 toward the lower surface 910s of the resin layer 910 along a cutting line (dashed line) DL2 shown in FIG. 20 . By half-cutting the resin layer 910 in this manner, a separation groove 912 is formed in the resin layer 910. Then, by half-cutting the resin layer 910 with the dicing blade, the conductive portion 20 is formed. More specifically, side surfaces 234 and 254 of the terminal portions 23 and 25 and side surfaces 244 and 264 of the mounting portions 24 and 26 are formed. The side surfaces 234 and 254 of the terminal portions 23 and 25 and the side surfaces 244 and 264 of the mounting portions 24 and 26 are exposed in the separation groove 912.

[0062] As shown in FIG. 21 , the manufacturing method of the semiconductor device 1A includes a step of forming an external conductive film 50. The external conductive film 50 includes first conductive films 511, 521 covering the lower surfaces 232, 252 of the terminal portions 23, 25, and second conductive films 512, 522 covering the side surfaces 234, 254 of the terminal portions 23, 25 and the side surfaces 244, 264 of the mounting portions 24, 26. The second conductive films 512, 522 are formed in the separation groove 912. The external conductive film 50 is made of a plated metal. For example, the external conductive film 50 is formed by depositing plated metals, such as Ni, Pd, and Au, in this order by electroless plating. Note that the configuration and formation method of the external conductive film 50 are not limited to the above method.

[0063] As shown in FIG. 22, the manufacturing method of the semiconductor device 1A includes a step of dividing the semiconductor device 1A into individual pieces. The resin layer 910 is cut to divide the semiconductor device 1A into individual pieces, each of which has a semiconductor element 40 as a unit. To divide the semiconductor device 1A, a dicing blade narrower than the dicing blade that half-cut the resin layer 910 is used to cut the resin layer 910 along cutting lines (dashed lines) DL2, from the separation grooves 912 in the resin layer 910 to the underside 910s of the resin layer 910. The individual pieces are the semiconductor devices 1A including the sealing resin 10. This results in the formation of the sealing resin 10. More specifically, the sealing resin 10 includes a first side surface 111 and a second side surface 112. In other words, the step 12 in the sealing resin 10 is formed by cutting the resin layer 910 down to the underside 910s of the resin layer 910 with a dicing blade narrower than the dicing blade that half-cut the resin layer 910. The semiconductor device 1A is manufactured through the above steps.

[0064] (action) Next, the operation of the semiconductor device 1A of this embodiment will be described. The semiconductor device 1A of this embodiment includes a conductive portion 20 and a semiconductor element 40 mounted on the conductive portion 20. The conductive portion 20 is formed of a plating layer. The conductive portion 20 includes mounting portions 24 and 26 having mounting surfaces 241 and 261 on which the semiconductor element 40 is mounted, and terminal portions 23 and 25 extending on the opposite side of the mounting portions 24 and 26 from the semiconductor element 40. The mounting portions 24 and 26 extend further in the X direction along the mounting surfaces 241 and 261 than the terminal portions 23 and 25. The mounting portions 24 and 26 and the terminal portions 23 and 25 are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface.

[0065] Here, a semiconductor device 1R that is a comparative example of the semiconductor device 1A of this embodiment will be described. Note that, in the description of the semiconductor device 1R of the comparative example, components that are the same as those of the semiconductor device 1A of this embodiment will be denoted by the same reference numerals.

[0066] FIG. 23 shows a cross section of a semiconductor device 1R of the comparative example. The sealing resin 60 of this semiconductor device 1R has a first resin layer 61 and a second resin layer 62 that covers an upper surface 61s of the first resin layer 61 and seals the conductive portion 70 and the semiconductor element 40. The conductive portion 70 has a terminal portion 71 that penetrates the first resin layer 61 from the upper surface 61s to the lower surface 61r, and a mounting portion 72 that is connected to the upper surface 71s of the terminal portion 71 and is provided on the upper surface 61s of the first resin layer 61. The mounting portion 72 has a first metal layer 73 that is formed on the upper surface 71s of the terminal portion 71 and the upper surface 61s of the first resin layer 61, and a second metal layer 74 that is formed on the upper surface of the first metal layer 73.

[0067] The terminal portion 71 and the second metal layer 74 contain Cu or a Cu alloy. The first metal layer 73 is formed as a seed layer for forming the second metal layer 74. The first metal layer 73 contains a Ti layer. The bonding portion 30 is formed on the upper surface of the mounting portion 72. The semiconductor element 40 is mounted on the mounting portion 72 by the bonding portion 30. The semiconductor device 1R has an external conductive film 50 that covers the surface of the conductive portion 70 exposed from the first resin layer 61.

[0068] The process for manufacturing this semiconductor device 1R will now be outlined. As shown in FIG. 24, a terminal portion 971 and a first resin layer 961 are formed. First, as in the above embodiment, a seed layer 901 is formed on the main surface 900s of the support substrate 900, a mask having an opening is formed on the seed layer 901, and a metal pillar that will become the terminal portion 971 is formed in the opening of the mask. After removing the mask and removing the exposed seed layer, a resin layer that covers the metal pillar is formed, and the metal pillar and the resin layer are cut to form an upper surface 961s of the first resin layer 961 and an upper surface 971s of the terminal portion 971.

[0069] As shown in FIG. 25, the mounting portion 972 is formed. First, a seed layer is formed on the upper surface 961s of the first resin layer 961 and the upper surface 971s of the terminal portion 971. This seed layer includes a Ti layer that will become the first metal layer 73 and a Cu layer. The seed layer is formed, for example, by sputtering. A mask having openings is formed to cover the seed layer, and a second metal layer 974 is formed in the openings of the mask. After removing the mask, the seed layer exposed from the second metal layer 974 is removed, thereby forming the mounting portion 972 including the first metal layer 973 and the second metal layer 974.

[0070] 26 , the bonding portion 30 is formed on the mounting portion 972, and the semiconductor element 40 is mounted on the mounting portion 972 using the bonding portion 30. Then, the second resin layer 962 is formed to cover the upper surface 961s of the first resin layer 961 and seal the mounting portion 972, the bonding portion 30, and the semiconductor element 40.

[0071] 26 is removed, and the first resin layer 961 is ground to form a lower surface 961r of the first resin layer 961 and a lower surface 712 of the terminal portion 71. Then, a separation groove is formed from the lower surface 961r of the first resin layer 961 toward an upper surface 962s of the second resin layer 962 to expose the side surfaces 714, 724 of the terminal portion 71 and the mounting portion 72.

[0072] Next, similarly to the above embodiment, an external conductive film 50 is formed to cover the exposed surfaces (lower surface 712 and side surface 714) of the terminal portion 71 and the side surface 724 of the mounting portion 72. Then, the second resin layer 962 is cut within the separation groove 912 to form individual pieces including the semiconductor element 40, that is, the semiconductor device 1R of the comparative example shown in FIG.

[0073] 23, the first resin layer 61 and the second resin layer 62 each contain a filler. In the semiconductor device 1R including the first resin layer 61 and the second resin layer 62 in this manner, an interface is formed between the first resin layer 61 and the second resin layer 62. This interface contains filler processed in the step of forming the first resin layer 61 (grinding step), such as polished filler. Such filler allows the interface to be confirmed.

[0074] 23, the conductive portion 70 includes an interface. As described above, the conductive portion 70 includes a terminal portion 71 and a mounting portion 72, and the mounting portion 72 includes a first metal layer 73 and a second metal layer 74. The terminal portion 71 and the second metal layer 74 are made of Cu or a Cu alloy, and the first metal layer 73 is made of a Ti layer. Therefore, the conductive portion 70 of the comparative example includes an interface between the terminal portion 71 and the first metal layer 73 and between the first metal layer 73 and the second metal layer 74.

[0075] In the semiconductor device 1R thus formed, the conductive portion 70 is formed through multiple processes. As a result, the adhesion between the terminal portion 71, the first metal layer 73, and the second metal layer 74 that make up the conductive portion 70 may decrease, which may result in a decrease in the mechanical strength of the conductive portion 70. The decrease in adhesion is likely to occur, for example, due to oxidation of the interface surface. When adhesion decreases in this way, the conductive portion 70, including the interface, may peel off at the interface.

[0076] In addition, peeling may occur at the interface due to loads applied during the manufacturing process. For example, when removing support substrate 900 and seed layer 901 shown in Fig. 25, a load applied to terminal portion 971 may cause peeling at the interface between terminal portion 971 and first metal layer 973. In addition, in the step of forming separation groove 912 shown in Fig. 26, a load applied by a dicing blade may cause peeling at the interface between terminal portion 971 and first metal layer 973.

[0077] In contrast, in the semiconductor device 1A of this embodiment, the terminal portions 23, 25 and the mounting portions 24, 26 of the conductive portion 20 (first conductive portion 21 and second conductive portion 22) are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface. This improves the mechanical strength of the conductive portion 20 (first conductive portion 21 and second conductive portion 22) compared to the semiconductor device 1R of the comparative example. This prevents peeling between the terminal portions 23, 25 and the mounting portions 24, 26.

[0078] Furthermore, in the semiconductor device 1A of this embodiment, the sealing resin 10 contains a filler. In the sealing resin 10 of this embodiment, no filler processed by a process is contained between the first resin portion 131 and the second resin portion 132. This confirms that no interface is formed between the first resin portion 131 and the second resin portion 132, that is, the first resin portion 131 and the second resin portion 132 are integrally formed. This improves the mechanical strength of the sealing resin 10 compared to the semiconductor device 1R of the comparative example.

[0079] When this semiconductor device 1A is mounted on a circuit board, the solder connecting the external conductive film 50 to the connection pads of the circuit board is interposed between the first conductive films 511, 521 and the connection pads, and also adheres to the second conductive films 512, 522. In other words, the solder that has become liquid through the reflow process creeps up the second conductive films 512, 522 and forms solder fillets between the second conductive films 512, 522 and the connection pads. In this way, solder fillets are more easily formed in the semiconductor device 1A. These solder fillets increase the solder joint area, further improving connection strength. Furthermore, the solder fillets allow the soldering condition of the semiconductor device 1A to be checked from the outside.

[0080] (effect) As described above, this embodiment provides the following advantages. (1) The semiconductor device 1A includes a conductive portion 20 and a semiconductor element 40 mounted on the conductive portion 20. The conductive portion 20 is formed of a plating layer. The conductive portion 20 includes mounting portions 24 and 26 having mounting surfaces 241 and 261 on which the semiconductor element 40 is mounted, and terminal portions 23 and 25 extending on the opposite side of the mounting portions 24 and 26 from the semiconductor element 40. The mounting portions 24 and 26 extend further in the X direction along the mounting surfaces 241 and 261 than the terminal portions 23 and 25. The mounting portions 24 and 26 and the terminal portions 23 and 25 are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface. This improves the mechanical strength of the conductive portion 20 (first conductive portion 21 and second conductive portion 22). This prevents peeling between the terminal portions 23 and 25 and the mounting portions 24 and 26.

[0081] (2) In the semiconductor device 1A of this embodiment, the sealing resin 10 contains a filler. In the sealing resin 10 of this embodiment, no filler processed by a process is contained between the first resin portion 131 and the second resin portion 132. This confirms that no interface is formed between the first resin portion 131 and the second resin portion 132, that is, the first resin portion 131 and the second resin portion 132 are integrally formed. This improves the mechanical strength of the semiconductor device 1A of this embodiment.

[0082] (3) When this semiconductor device 1A is mounted on a circuit board, the solder connecting the external conductive film 50 to the connection pads of the circuit board is interposed between the first conductive films 511, 521 and the connection pads, and also adheres to the second conductive films 512, 522. In other words, the solder that has become liquid through the reflow process creeps up the second conductive films 512, 522 and forms solder fillets between the second conductive films 512, 522 and the connection pads. In this way, solder fillets are more easily formed in the semiconductor device 1A. These solder fillets increase the solder joint area, further improving connection strength. Furthermore, the solder fillets allow the state of soldering of the semiconductor device 1A to be checked from the outside.

[0083] (4) In the conductive portion 20, the terminal portions 23, 25 and the mounting portions 24, 26 are integrally formed. The plating layer 920 including the portions constituting the terminal portions 23, 25 and the portions constituting the mounting portions 24, 26 is grown all at once. This reduces the number of steps compared to when the terminal portions 23, 25 and the mounting portions 24, 26 are formed by plating separately. This shortens the manufacturing time and improves productivity.

[0084] (5) When the terminal portion 71 and the mounting portion 72 are plated separately, a seed layer is formed for the mounting portion 72. In contrast, in this embodiment, the plating layer 920 including the portions that make up the mounting portions 24 and 26 is grown all at once. This eliminates the time and effort required for the process of forming the seed layer. This reduces the time required for manufacturing and improves productivity.

[0085] (Example of change) The above embodiment can be modified, for example, as follows: The above embodiment and each of the following modified examples can be combined with each other as long as no technical contradiction occurs. In the following modified examples, parts common to the above embodiment will be assigned the same reference numerals as in the above embodiment, and their description will be omitted.

[0086] In the above embodiment, three or more first conductive portions 21 and second conductive portions 22 may be provided. In the above embodiment, the number of first conductive parts 21 and the number of second conductive parts 22 may be different.

[0087] In the above embodiment, at least one of the third resin side surface 103 and the fourth resin side surface 104 may have an exposed conductive portion. In contrast to the above embodiment, the step 12 may not be provided on the third resin side surface 103 and the fourth resin side surface 104 where the conductive portion 20 is not exposed. In other words, the first resin side surface 101 and the fourth resin side surface 104 may be configured so that the position of the first side surface 111 and the position of the second side surface 112 are the same when viewed from the Z direction.

[0088] (Addendum) The technical ideas that can be understood from the present disclosure are described below. Note that, for the purpose of aiding understanding and not intending to be limiting, the components described in the appendices are given the reference numerals of the corresponding components in the embodiments. The reference numerals are shown as examples to aid understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

[0089] (Appendix 1) Conductive portions (20, 21, 22); a semiconductor element (40) mounted on the conductive portion (20, 21, 22); Equipped with the conductive portions (20, 21, 22) are formed of plating layers, the conductive portion (20, 21, 22) includes a mounting portion (24, 26) having a mounting surface (241, 261) on which the semiconductor element (40) is mounted, and a terminal portion (23, 25) extending from the mounting portion (24, 26) on a side opposite to the semiconductor element (40), the mounting portions (24, 26) extend further in a first direction (X) along the mounting surfaces (241, 261) than the terminal portions (23, 25); The mounting portions (24, 26) and the terminal portions (23, 25) are integrally formed. Semiconductor device.

[0090] (Appendix 2) The mounting surface (241, 261) has a joint (30, 31, 32) provided thereon, The conductive portion (20) is electrically connected to the semiconductor element (40) by the joint portions (30, 31, 32). 2. The semiconductor device according to claim 1.

[0091] (Appendix 3) 3. The semiconductor device according to claim 1, wherein the conductive portion (20) includes a first conductive portion (21) and a second conductive portion (22) that are spaced apart in the first direction.

[0092] (Appendix 4) 4. The semiconductor device according to claim 3, further comprising a sealing resin (10) that seals the first conductive portion (21), the second conductive portion (22), and the semiconductor element (40).

[0093] (Appendix 5) the sealing resin (10) includes a first resin portion (131) between a terminal portion (23, 25) of the first conductive portion (21) and a terminal portion (23, 25) of the second conductive portion (22), and a second resin portion (132) between a mounting portion (24, 26) of the first conductive portion (21) and a mounting portion (24, 26) of the second conductive portion (22), The first resin portion (131) and the second resin portion (132) are integrally formed. 5. The semiconductor device according to claim 4.

[0094] (Appendix 6) The sealing resin (10) has a resin upper surface (10s) facing the same direction as the mounting surface and a resin lower surface (10r) facing the opposite side to the resin upper surface (10s), The conductive portion (20) has a lower surface (232, 252) exposed from the resin lower surface (10r). 6. The semiconductor device according to claim 4 or 5.

[0095] (Appendix 7) The sealing resin (10) has resin side surfaces (101, 102) that intersect with the resin lower surface (10r), The conductive portion (20) has a side surface (234, 244, 254, 264) exposed from the resin side surface (101, 102). 7. The semiconductor device according to claim 6.

[0096] (Appendix 8) 8. The semiconductor device according to claim 7, further comprising an external conductive film (50, 51, 52) covering the lower surface (232, 252) and the side surface (234, 244, 254, 264) of the conductive portion (20) exposed from the sealing resin (10).

[0097] (Appendix 9) 9. The semiconductor device according to claim 1, wherein the mounting portion (24, 26) and the terminal portion (23, 25) are made of the same material.

[0098] (Appendix 10) 10. The semiconductor device according to claim 1, wherein the mounting portion (24, 26) and the terminal portion (23, 25) are made of a material containing Cu or a Cu alloy.

[0099] (Appendix 11) 11. The semiconductor device according to claim 1, wherein the thickness of the terminal portion (23, 25) is at least twice the thickness of the mounting portion (24, 26).

[0100] (Appendix 12) 12. The semiconductor device according to claim 1, wherein the mounting portions have thicknesses (T24, T26) of 20 μm or more and 50 μm or less.

[0101] (Appendix 13) 13. The semiconductor device according to any one of claims 1 to 12, wherein the terminal portions (23, 25) have thicknesses (T23, T25) of 100 μm or more and 300 μm or less.

[0102] (Appendix 14) A semiconductor device described in any one of Appendix 1 to Appendix 13, wherein the length (L24, L26) of the mounting portion (24, 26) extending from the terminal portion (23, 25) in the first direction is less than or equal to the length (L23, L25) of the terminal portion (23, 25) in the first direction.

[0103] (Appendix 15) 15. The semiconductor device according to claim 14, wherein the length (L24, L26) of the mounting portion (24, 26) in the first direction is not less than 100 μm and not more than 150 μm.

[0104] (Appendix 16) 16. The semiconductor device according to claim 14, wherein the lengths (L23, L25) of the terminal portions (23, 25) in the first direction are not less than 100 μm and not more than 200 μm.

[0105] (Appendix 17) A method for manufacturing a semiconductor device comprising conductive parts (20, 21, 22) and a semiconductor element (40) mounted on the conductive parts (20, 21, 22), the conductive parts (20, 21, 22) including mounting parts (24, 26) having mounting surfaces (242, 262) on which the semiconductor element (40) is mounted, and terminal parts (23, 25) extending from the mounting parts (24, 26) on a side opposite to the semiconductor element (40), comprises: a step of integrally forming the mounting portions (24, 26) and the terminal portions (23, 25) with a plating layer (920), A method for manufacturing a semiconductor device.

[0106] (Appendix 18) forming a first mask (902) having first openings (9021) for forming the terminal portions (23, 25); forming a second mask (903) on the first mask, the second mask having a second opening (9031) for forming the mounting portions (24, 26); Including, In the step of integrally forming the conductive portion (20) and the terminal portion (23, 25), the plating layer (920) is formed by growing a plating metal from the first opening (9021) of the first mask (902) to the second opening (9031) of the second mask (903). 18. A method for manufacturing a semiconductor device according to claim 17.

[0107] (Appendix 19) 19. The method for manufacturing a semiconductor device according to claim 18, further comprising forming a resin layer (910) that seals the mounting portion (24, 26) and the semiconductor element (40).

[0108] (Appendix 20) forming a third mask (904) having third openings (9041) for forming bonding portions (30, 31, 32) on the second mask (903) and the plating layer (920); forming the bonding portion (30) on the plating layer (920); 20. A method for manufacturing a semiconductor device according to claim 19, comprising:

[0109] (Appendix 21) 209. The method for manufacturing a semiconductor device according to claim 209, further comprising the step of mounting a semiconductor element (40) to the mounting portion (24, 26) using the bonding portion (30).

[0110] (Appendix 22) providing a support substrate (900); forming a seed layer (901) on the upper surface of the support substrate (900); wherein the first mask (902) is formed on the upper surface of the seed layer (901); 22. A method for manufacturing a semiconductor device according to any one of claims 19 to 21.

[0111] (Appendix 23) removing the support substrate (900) and the seed layer (901) to expose the lower surface (232, 252) of the conductive portion (20); forming a separation groove (912) in the resin layer (910) to expose the side surfaces (234, 244, 254, 264) of the conductive portion (20); 23. A method for manufacturing a semiconductor device according to claim 22, comprising:

[0112] (Appendix 24) 24. The method for manufacturing a semiconductor device according to claim 23, further comprising forming an external conductive film (50, 51, 52) that covers the lower surface (232, 252) and the side surface (234, 244, 254, 264) of the conductive portion (20).

[0113] (Appendix 25) 25. The method for manufacturing a semiconductor device according to claim 24, further comprising cutting the resin layer (910) within the separation grooves to separate the semiconductor devices. (Appendix 1-1) a first conductive portion and a second conductive portion spaced apart in a first direction; a semiconductor element mounted on the first conductive portion and the second conductive portion; A semiconductor device comprising: the first conductive portion and the second conductive portion are formed by plating layers, the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending on a side of the first mounting portion opposite to the semiconductor element, the second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending on a side of the second mounting portion opposite to the semiconductor element, the first mounting portion extends further in the first direction along the first mounting surface than the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward an inside of the semiconductor device, the first protruding portion forms a part of the first mounting surface, and a first bonding portion that bonds the semiconductor element to the first conductive portion is provided at a portion of the first mounting surface that corresponds to the first protruding portion, the second mounting portion extends further in the first direction along the second mounting surface than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward an inside of the semiconductor device, the second protruding portion forms a part of the second mounting surface, and a second bonding portion that bonds the semiconductor element to the second conductive portion is provided at a portion of the second mounting surface that corresponds to the second protruding portion, the first mounting portion and the first terminal portion are integrally formed, The second mounting portion and the second terminal portion are integrally formed. Semiconductor device. (Appendix 1-2) the first conductive portion is electrically connected to the semiconductor element by the first joint portion; the second conductive portion is electrically connected to the semiconductor element by the second joint portion; The semiconductor device according to claim 1-1. (Appendix 1-3) the semiconductor element includes an element substrate, first electrode pads provided on a substrate main surface of the element substrate, a first redistribution layer connected to the first electrode pads, first element electrodes connected to the first redistribution layer, second electrode pads provided on the substrate main surface of the element substrate, a second redistribution layer connected to the second electrode pads, and second element electrodes connected to the second redistribution layer; the first element electrode is disposed at a position not overlapping with the first electrode pad when viewed in a thickness direction of the semiconductor element, The second element electrode is disposed at a position where it does not overlap the second electrode pad when viewed from the thickness direction of the semiconductor element. the first element electrode is electrically connected to the first conductive portion by the first joint portion; the second element electrode is electrically connected to the second conductive portion by the second joint portion; The semiconductor device according to claim 1-1 or 1-2. (Appendix 1-4) the first joint portion includes a first plating layer provided on the first mounting surface of the first mounting portion, and a first solder layer provided between the first plating layer and the first element electrode; the second joint portion includes a second plating layer provided on the second mounting surface of the second mounting portion, and a second solder layer provided between the second plating layer and the second element electrode, the first solder layer connects the first plating layer and the first element electrode; the second solder layer connects the second plating layer and the second element electrode; 4. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device having a first insulating layer. (Appendix 1-5) The semiconductor device according to any one of Supplementary Note 1-1 to Supplementary Note 1-4, further comprising a sealing resin that seals the first conductive portion, the second conductive portion, and the semiconductor element. (Appendix 1-6) the sealing resin includes a first resin portion between a first terminal portion of the first conductive portion and a second terminal portion of the second conductive portion, and a second resin portion between a first mounting portion of the first conductive portion and a second mounting portion of the second conductive portion, The first resin portion and the second resin portion are integrally formed. 6. The semiconductor device according to claim 1-5. (Appendix 1-7) the sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, and a resin lower surface facing the opposite side to the resin upper surface; the first conductive portion and the second conductive portion have lower surfaces exposed from the lower surface of the resin; The semiconductor device according to claim 1-5 or 1-6. (Appendix 1-8) the sealing resin has a resin side surface that intersects with the resin lower surface, the first conductive portion and the second conductive portion have side surfaces exposed from the resin side surface; 8. The semiconductor device according to claim 1-7. (Appendix 1-9) A semiconductor device described in Appendix 1-8, having an external conductive film covering the lower surface and the side surface of the first conductive portion exposed from the sealing resin and an external conductive film covering the lower surface and the side surface of the second conductive portion. (Appendix 1-10) a semiconductor device comprising a first conductive portion and a second conductive portion arranged apart in a first direction, and a semiconductor element mounted on the first conductive portion and the second conductive portion, wherein the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending on a side opposite the semiconductor element with respect to the first mounting portion, the second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending on a side opposite the semiconductor element with respect to the second mounting portion, the first mounting portion extending further in the first direction along the first mounting surface than the first terminal portion, and extending from the first terminal portion to an inner side of the semiconductor device; a first protruding portion that protrudes toward the first terminal portion, the first protruding portion constituting a part of the first mounting surface, and a first bonding portion that bonds the semiconductor element to the first conductive portion is provided at a portion of the first mounting surface corresponding to the first protruding portion; the second mounting portion extends further in the first direction along the second mounting surface than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward an inside of the semiconductor device, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion that bonds the semiconductor element to the second conductive portion is provided at a portion of the second mounting surface corresponding to the second protruding portion, a step of integrally forming the first mounting portion and the first terminal portion by a plating layer, and integrally forming the second mounting portion and the second terminal portion by a plating layer; forming a third mask having third openings for forming the first bonding portion and the second bonding portion, and growing a plating layer and a solder layer in the third openings; Equipped with A method for manufacturing a semiconductor device. (Appendix 1-11) forming a first mask having first openings for forming the first terminal portion and the second terminal portion; forming a second mask on the first mask, the second mask having a second opening for forming the first mounting portion and the second mounting portion; Including, In the step of integrally forming the first conductive portion and the first terminal portion and integrally forming the second conductive portion and the second terminal portion, the plating layer is formed by growing a plating metal from the first opening of the first mask to the second opening of the second mask. A method for manufacturing a semiconductor device according to appendix 1-10. (Appendix 1-12) 12. A method for manufacturing a semiconductor device according to claim 1, further comprising forming a resin layer that seals the first mounting portion, the second mounting portion, and the semiconductor element.

[0114] The above description is merely illustrative. Those skilled in the art will recognize that many more possible combinations and permutations are possible other than the components and methods (manufacturing processes) listed for the purpose of illustrating the technology of the present disclosure. The present disclosure is intended to embrace all alternatives, modifications, and variations that fall within the scope of the present disclosure, including the claims. [Explanation of symbols]

[0115] 1A,1R semiconductor device 10 Sealing resin 10r resin bottom surface 10s resin top surface 101 First resin side 102 Second resin side 103 Third resin side 104 4th resin side 111 First aspect 112 Second aspect 12 steps 131 First resin part 132 Second resin part 20 Conductive part 21 First conductive part 22 Second conductive part 23 1st terminal section 232 Bottom surface 233 Side 234 Side 24 First mounting section 24A protruding part 241 Top surface, mounting surface 242 Bottom surface 243 Side 244 Side 25 2nd terminal section 252 Bottom surface 253 Side 254 Side 26 Second mounting section 26A Protruding part 261 Top surface, mounting surface 262 Bottom surface 263 Side 264 Side 30 Joint 31 1st joint 32 Second joint 33 plating layer 34 solder layer 40 Semiconductor elements 41 Element substrate 41r Back side of the board 41s Main surface of the board 411 First board side 412 Second board side 413 Third board side 414 Side of the 4th board 42 Electrode Pads 421 First electrode pad 422 Second electrode pad 43 Insulating film 43s surface 44 Redistribution layer 441 1st redistribution layer 442 2nd redistribution layer 45 Element electrode 451 First element electrode 452 Second element electrode 461 Conductive Layer 462 Barrier Layer 50 External conductive film 51 First outer conductive film 511 First conductive film 512 Second conductive film 52 Second outer conductive film 521 First conductive film 522 Second conductive film 60 Sealing resin 61 1st resin layer 61r bottom side 61s top 62 2nd resin layer 70 Conductive part 71 Terminal section 71s top 712 Bottom side 714 Side 72 Mounting section 724 Side 73 1st metal layer 74 Second metal layer 900 Support substrate 900r back 900s main surface 901 seed layer 901s top side 902 First Mask 9021 First Opening 903 Second Mask 903s top surface 9031 Second Opening 904 Third Mask 9041 Third Opening 910 Resin layer 910r top side 910s bottom side 912 Separation groove 920 plating layer 920s top 961 1st resin layer 961r bottom side 961s top surface 962 2nd resin layer 971 Terminal section 971s top surface 972 Mounting section 973 1st metal layer 974 2nd metal layer DL1 dashed line DL2 cutting line L23~L26 length T23~T26 thickness

Claims

1. a first conductive portion and a second conductive portion spaced apart in a first direction; a semiconductor element mounted on the first conductive portion and the second conductive portion; a sealing resin that seals the first conductive portion, the second conductive portion, and the semiconductor element; a first external conductive film and a second external conductive film covering the first conductive portion and the second conductive portion, respectively; A semiconductor device comprising: the first conductive portion and the second conductive portion are formed of a plating layer, the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending on a side of the first mounting portion opposite to the semiconductor element, the second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending on a side of the second mounting portion opposite to the semiconductor element, the first mounting portion extends further in the first direction along the first mounting surface than the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward an inside of the semiconductor device, the first protruding portion forms a part of the first mounting surface, and a first bonding portion that bonds the semiconductor element to the first conductive portion is provided at a portion of the first mounting surface that corresponds to the first protruding portion, the second mounting portion extends further in the first direction along the second mounting surface than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward an inside of the semiconductor device, the second protruding portion forms a part of the second mounting surface, and a second bonding portion that bonds the semiconductor element to the second conductive portion is provided at a portion of the second mounting surface that corresponds to the second protruding portion, the first mounting portion and the first terminal portion are integrally formed, the second mounting portion and the second terminal portion are integrally formed, the sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, a resin lower surface facing the opposite side to the resin upper surface, and a first resin side surface and a second resin side surface intersecting the resin lower surface; the first conductive portion has a first conductive portion side surface exposed from the first resin side surface and a first conductive portion lower surface exposed from the resin lower surface, the first external conductive film covers the lower surface and the side surface of the first conductive portion exposed from the sealing resin, the second conductive portion has a second conductive portion side surface exposed from the second resin side surface and a second conductive portion lower surface exposed from the resin lower surface, the second external conductive film covers the second conductive portion lower surface and the second conductive portion side surface exposed from the sealing resin, When a direction perpendicular to the first mounting surface and the second mounting surface is defined as a second direction, a position in the second direction from a portion of the first mounting surface corresponding to the first protruding portion to a portion of the first mounting surface corresponding to the first terminal portion and in contact with the first resin side surface is the same; a position in the second direction from a portion of the second mounting surface corresponding to the second protruding portion to a portion of the second mounting surface corresponding to the second terminal portion and in contact with the second resin side surface is the same; Semiconductor device.

2. When viewed from the second direction, the first terminal portion and the semiconductor element at least partially overlap each other, When viewed from the second direction, the second terminal portion and the semiconductor element at least partially overlap each other. The semiconductor device according to claim 1 .

3. the first conductive portion is electrically connected to the semiconductor element by the first joint portion; the second conductive portion is electrically connected to the semiconductor element by the second joint portion; 3. The semiconductor device according to claim 1.

4. the semiconductor element includes an element substrate, first electrode pads provided on a substrate main surface of the element substrate, a first redistribution layer connected to the first electrode pads, first element electrodes connected to the first redistribution layer, second electrode pads provided on the substrate main surface of the element substrate, a second redistribution layer connected to the second electrode pads, and second element electrodes connected to the second redistribution layer; the first element electrode is disposed at a position not overlapping with the first electrode pad when viewed in a thickness direction of the semiconductor element, The second element electrode is disposed at a position where it does not overlap the second electrode pad when viewed from the thickness direction of the semiconductor element. the first element electrode is electrically connected to the first conductive portion by the first joint portion; the second element electrode is electrically connected to the second conductive portion by the second joint portion; The semiconductor device according to claim 1 .

5. the first joint portion includes a first plating layer provided on the first mounting surface of the first mounting portion, and a first solder layer provided between the first plating layer and the first element electrode, the second joint portion includes a second plating layer provided on the second mounting surface of the second mounting portion, and a second solder layer provided between the second plating layer and the second element electrode, the first solder layer connects the first plating layer and the first element electrode; the second solder layer connects the second plating layer and the second element electrode; The semiconductor device according to claim 4 .

6. the sealing resin includes a first resin portion between a first terminal portion of the first conductive portion and a second terminal portion of the second conductive portion, and a second resin portion between a first mounting portion of the first conductive portion and a second mounting portion of the second conductive portion, The first resin portion and the second resin portion are integrally formed. The semiconductor device according to claim 1 .

7. a semiconductor device comprising: a first conductive portion and a second conductive portion arranged apart in a first direction; a semiconductor element mounted on the first conductive portion and the second conductive portion; a sealing resin that seals the first conductive portion, the second conductive portion, and the semiconductor element; and a first external conductive film and a second external conductive film that cover the first conductive portion and the second conductive portion, respectively; wherein the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending on an opposite side of the first mounting portion from the semiconductor element; a second mounting portion having a second mounting surface on which a semiconductor element is mounted, and a second terminal portion extending on an opposite side of the second mounting portion from the semiconductor element, the first mounting portion extending in the first direction along the first mounting surface further than the first terminal portion and having a first protruding portion protruding from the first terminal portion toward an inside of the semiconductor device, the first protruding portion constituting a part of the first mounting surface, a first bonding portion for bonding the semiconductor element to the first conductive portion provided at a portion of the first mounting surface corresponding to the first protruding portion, the second mounting portion has a second protruding portion that extends further in the first direction along the second mounting surface than the second terminal portion and protrudes from the second terminal portion toward an inside of the semiconductor device, the second protruding portion forms a part of the second mounting surface, and a second bonding portion that bonds the semiconductor element to the second conductive portion is provided at a portion of the second mounting surface that corresponds to the second protruding portion, and the sealing resin has a resin upper surface that faces the same direction as the first mounting surface and the second mounting surface, a resin lower surface that faces the opposite side to the resin upper surface, and a first resin side surface that intersects with the resin lower surface. and a second resin side surface, the first conductive portion has a first conductive portion side surface exposed from the first resin side surface and a first conductive portion lower surface exposed from the resin lower surface, the first external conductive film covers the first conductive portion lower surface and the first conductive portion side surface exposed from the sealing resin, the second conductive portion has a second conductive portion side surface exposed from the second resin side surface and a second conductive portion lower surface exposed from the resin lower surface, and the second external conductive film covers the second conductive portion lower surface and the second conductive portion side surface exposed from the sealing resin, a step of integrally forming the first mounting portion and the first terminal portion by a plating layer, and integrally forming the second mounting portion and the second terminal portion by a plating layer; forming a third mask having third openings for forming the first bonding portion and the second bonding portion, and growing a plating layer and a solder layer in the third openings; Equipped with When a direction perpendicular to the first mounting surface and the second mounting surface is defined as a second direction, the step of integrally forming the first mounting portion and the first terminal portion and integrally forming the second mounting portion and the second terminal portion includes integrally forming the first mounting portion and the first terminal portion so that a position in the second direction from a portion on the first mounting surface corresponding to the first protruding portion to a portion on the first mounting surface corresponding to the first terminal portion and contacting the first resin side surface is the same, and integrally forming the second mounting portion and the second terminal portion so that a position in the second direction from a portion on the second mounting surface corresponding to the second protruding portion to a portion on the second mounting surface corresponding to the second terminal portion and contacting the second resin side surface is the same; A method for manufacturing a semiconductor device.

8. When viewed from the second direction, the first terminal portion and the semiconductor element at least partially overlap each other, When viewed from the second direction, the second terminal portion and the semiconductor element at least partially overlap each other. The method for manufacturing a semiconductor device according to claim 7 .

9. forming a first mask having first openings for forming the first terminal portion and the second terminal portion; forming a second mask on the first mask, the second mask having a second opening for forming the first mounting portion and the second mounting portion; Including, In the step of integrally forming the first conductive portion and the first terminal portion and integrally forming the second conductive portion and the second terminal portion, a plating metal is grown from the first opening of the first mask to the second opening of the second mask to form the plating layer.

9. The method for manufacturing a semiconductor device according to claim 7.

10. The method for manufacturing a semiconductor device according to claim 9 , further comprising the step of forming a resin layer that seals the first mounting portion, the second mounting portion, and the semiconductor element.

Images