Imaging devices and electronic devices

Abstract

The present invention suppresses a deterioration in image quality while suppressing a deterioration in transfer efficiency. An imaging device according to an embodiment is provided with a plurality of pixels arranged in a two-dimensional grid formation, wherein each pixel comprises a photoelectric conversion unit which is provided on a first surface side of a semiconductor substrate and which performs photoelectric conversion of incident light, a vertical gate electrode provided in the semiconductor substrate so as to be in close proximity to the photoelectric conversion unit from a second surface side on the opposite side to the first surface, a gate insulating film provided between the vertical gate electrode and the semiconductor substrate, a transfer gate electrode connected to the vertical gate electrode on the second surface of the semiconductor substrate, and a first diffusion region provided on the second surface side of the semiconductor substrate, and wherein the vertical gate electrode has a structure in which a bottom portion on the photoelectric conversion unit side thereof is more diffused than an upper portion on the transfer gate electrode side thereof.

Description

[Technical Field]

[0001] The present disclosure relates to an imaging device and an electronic device. [Background technology]

[0002] In conventional CMOS (Complementary Metal-Oxide-Semiconductor) solid-state imaging devices (CMOS image sensors), a potential is sometimes created that allows charge to be stored deep within the photodiode, which performs photoelectric conversion in the pixel area, in order to increase the amount of charge that can be stored. In such cases, instead of a normal transfer gate, a vertical gate electrode inserted into the silicon is used to modulate the deep region, apply an electric field, and perform readout. Furthermore, a structure employing multiple vertical gate electrodes has also been proposed to increase the modulation power. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-190797 Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional device structures, the width of the transfer gate electrode in the channel length direction must be made wider than the diameter of the vertical gate electrode to prevent a decrease in transfer efficiency when extracting charges stored in the photodiode. However, if the width of the transfer gate electrode is made wider, the strong electric field formed when the transfer gate electrode and the floating diffusion region are close to each other can cause an electron avalanche, which can saturate the amplitude of the pixel signal, resulting in image quality degradation such as white spots.

[0005] Therefore, the present disclosure proposes an imaging device and electronic device that can suppress a decrease in image quality while suppressing a decrease in transfer efficiency. [Means for solving the problem]

[0006] In order to solve the above problem, an imaging device according to one embodiment of the present disclosure includes a plurality of pixels arranged in a two-dimensional lattice pattern, each of the pixels including: a photoelectric conversion unit provided on a first surface side of a semiconductor substrate for photoelectrically converting incident light; a vertical gate electrode provided on the semiconductor substrate so as to be adjacent to the photoelectric conversion unit from a second surface side opposite the first surface; a gate insulating film provided between the vertical gate electrode and the semiconductor substrate; a transfer gate electrode connected to the vertical gate electrode on the second surface of the semiconductor substrate; and a first diffusion region provided on the second surface side of the semiconductor substrate, wherein the vertical gate electrode has a structure in which the bottom on the photoelectric conversion unit side is wider in diameter than the top on the transfer gate electrode side. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a block diagram illustrating an example of a schematic configuration of an imaging device applied to each embodiment of the present disclosure. [Figure 2] 1A and 1B are diagrams for explaining an example of the seat structure of an imaging device applied to each embodiment of the present disclosure. [Figure 3] 3 is a circuit diagram showing an example of a pixel and a readout circuit shown in FIG. 2. FIG. [Figure 4] FIG. 1 is a block diagram illustrating an example of the configuration of an imaging device mounted on an electronic device applied to each embodiment of the present disclosure. [Figure 5] 1 is a top view showing a schematic configuration example of a pixel according to a first embodiment. [Figure 6] FIG. 6 is a vertical cross-sectional view showing a structural example of the AA′ cross section in FIG. 5. [Figure 7] FIG. 6 is a vertical cross-sectional view showing a structural example of the cross-section BB′ in FIG. 5. [Figure 8] 6 is a vertical cross-sectional view showing a structural example of the CC' cross section in FIG. 5. FIG. [Figure 9] 1A to 1C are process cross-sectional views showing an example of a manufacturing process of a pixel according to the first embodiment (part 1). [Figure 10]4A to 4C are process cross-sectional views (part 2) illustrating an example of a manufacturing process for a pixel according to the first embodiment. [Figure 11] 5A to 5C are process cross-sectional views showing an example of a manufacturing process of a pixel according to the first embodiment (part 3). [Figure 12] 4A to 4C are process cross-sectional views illustrating an example of a manufacturing process for a pixel according to the first embodiment (part 4). [Figure 13] 5A to 5C are process cross-sectional views illustrating an example of a manufacturing process of a pixel according to the first embodiment. [Figure 14] 6 is a process cross-sectional view showing an example of a manufacturing process of a pixel according to the first embodiment (part 6). FIG. [Figure 15] 7A to 7C are process cross-sectional views illustrating an example of a manufacturing process of a pixel according to the first embodiment; [Figure 16] 8 is a process cross-sectional view showing an example of a manufacturing process of a pixel according to the first embodiment; FIG. [Figure 17] 9 is a process cross-sectional view showing an example of a manufacturing process of a pixel according to the first embodiment; FIG. [Figure 18] FIG. 10 is a top view showing a schematic configuration example of a pixel according to a second embodiment. [Figure 19] 19 is a vertical cross-sectional view showing a structural example of the AA' cross section in FIG. 18. [Figure 20] FIG. 10 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to a third embodiment. [Figure 21] FIG. 10 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to a fourth embodiment. [Figure 22] FIG. 10 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to a fifth embodiment. [Figure 23] FIG. 13 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to a sixth embodiment. [Figure 24] FIG. 13 is a top view showing a schematic configuration example of a pixel according to a seventh embodiment. [Figure 25] FIG. 13 is a top view showing a schematic configuration example of a pixel according to an eighth embodiment. [Figure 26] FIG. 13 is a top view showing a schematic configuration example of a pixel according to a ninth embodiment. [Figure 27]FIG. 22 is a partial cross-sectional view showing an example of the structure of a pixel according to a tenth embodiment. [Figure 28] FIG. 22 is a partial cross-sectional view showing an example of the structure of a pixel according to an eleventh embodiment. [Figure 29] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Figure 30] FIG. 2 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. [Figure 31] FIG. 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 32] FIG. 2 is a block diagram showing an example of the functional configuration of a camera head and a CCU. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the drawings. In the following embodiments, the same components are designated by the same reference numerals, and redundant description will be omitted.

[0009] The present disclosure will be described in the following order. 1. Common configuration 1.1 Example of the schematic configuration of an imaging device 1.2 Example of stacked structure of imaging device 1.3 Example of a schematic configuration of an electronic device 2. First embodiment 2.1 Pixel configuration example 2.2 Manufacturing process example 2.3 Summary 3. Second embodiment 4. Third Embodiment 5. Fourth Embodiment 6. Fifth Embodiment 7. Sixth Embodiment 8. Seventh Embodiment 9. Eighth Embodiment 10. Ninth embodiment 11. Tenth embodiment 12. Eleventh embodiment 13. Mobile application examples 14. Application example to endoscopic surgery system

[0010] 1. Common configuration First, the configurations of the imaging device and electronic device common to the following embodiments will be described in detail with reference to the drawings.

[0011] 1.1 Example of the schematic configuration of an imaging device FIG. 1 is a block diagram showing a schematic configuration example of an imaging device applicable to each embodiment of the present disclosure. As shown in FIG. 1, the imaging device 1 includes a pixel array section (so-called imaging region) 3 in which pixels 2, each including a plurality of photoelectric conversion elements, are regularly arranged two-dimensionally on a semiconductor substrate ST (e.g., a silicon substrate), and a peripheral circuit section. The pixels 2 include, for example, photodiodes serving as photoelectric conversion elements, and a plurality of pixel transistors (so-called MOS transistors). The plurality of pixel transistors may be configured with, for example, three transistors: a transfer transistor, a reset transistor, and an amplification transistor. Alternatively, a selection transistor may be added to form a total of four transistors. The equivalent circuit of a unit pixel is the same as a conventional one, and therefore a detailed description thereof will be omitted. The pixel 2 may also have a shared pixel structure. This pixel sharing structure includes a plurality of photodiodes, a plurality of transfer transistors, a shared floating diffusion, and each of the other pixel transistors, which are shared by the pixel 2.

[0012] The peripheral circuit section includes a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

[0013] The control circuit 8 receives an input clock and data instructing the operation mode, etc., and outputs data such as internal information of the imaging device. That is, the control circuit 8 generates clock signals and control signals that serve as the basis for the operation of the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock. These signals are then input to the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc.

[0014] The vertical drive circuit 4 is configured, for example, by a shift register, and selects pixel drive wirings, supplies pulses for driving pixels to the selected pixel drive wirings, and drives the pixels row by row. That is, the vertical drive circuit 4 selects and scans each pixel 2 in the pixel array unit 3 in the vertical direction row by row, and supplies pixel signals based on signal charges generated in accordance with the amount of light received in, for example, photodiodes serving as photoelectric conversion elements of each pixel 2 to the column signal processing circuit 5 via vertical signal lines 24.

[0015] The column signal processing circuit 5 is arranged, for example, for each column of pixels 2, and performs signal processing such as noise removal for each pixel column on signals output from one row of pixels 2. That is, the column signal processing circuit 5 performs signal processing such as correlated double sampling (CDS) for removing fixed pattern noise specific to the pixels 2, signal amplification, AD conversion, etc. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 5 and connected between it and the horizontal signal line HL.

[0016] The horizontal drive circuit 6 is configured, for example, by a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 5 in turn, causing each of the column signal processing circuits 5 to output a pixel signal to the horizontal signal line HL.

[0017] The output circuit 7 processes and outputs signals sequentially supplied from each column signal processing circuit 5 via the horizontal signal line HL. For example, the output circuit 7 may perform only buffering HL, or may perform black level adjustment, column variation correction, various digital signal processing, etc. The input / output terminal I / O exchanges signals with the outside.

[0018] 1.2 Example of stacked structure of imaging device Next, an example of the stacked structure of the imaging device 1 applied to each embodiment of the present disclosure will be described. FIG. 2 is a diagram for explaining an example of the stacked structure of the imaging device applied to each embodiment of the present disclosure. As shown in FIG. 2, the imaging device 1 can have a three-dimensional structure formed by bonding together three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). The first substrate 10, the second substrate 20, and the third substrate 30 are stacked in this order.

[0019] The first substrate 10 has, on a semiconductor substrate 11, a plurality of pixels 2 that perform photoelectric conversion. The plurality of pixels 2 are arranged in a matrix within a pixel array section 3 on the first substrate 10. The second substrate 20 has, on a semiconductor substrate 21, readout circuits 22 that output pixel signals based on charges output from the pixels 2, one for every four pixels 2. The second substrate 20 has a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction. The third substrate 30 has, on a semiconductor substrate 31, a logic circuit 32 that processes pixel signals. The logic circuit 32 has, for example, a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, and a control circuit 8. The logic circuit 32 (specifically, the horizontal drive circuit 6) outputs an output voltage Vout for each pixel 2 to the outside. In the logic circuit 32, for example, a low-resistance region made of silicide such as CoSi2 or NiSi formed using a salicide (self-aligned silicide) process may be formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode.

[0020] The vertical drive circuit 4, for example, sequentially selects a plurality of pixels 2 row by row. The column signal processing circuit 5, for example, performs CDS processing on pixel signals output from each pixel 2 in the row selected by the vertical drive circuit 4. The column signal processing circuit 5, for example, extracts the signal level of the pixel signal by performing CDS processing and holds pixel data according to the amount of light received by each pixel 2. The horizontal drive circuit 6, for example, sequentially outputs the pixel data held in the column signal processing circuit 5 to the outside. The control circuit 8, for example, controls the driving of each block (the vertical drive circuit 4, the column signal processing circuit 5, and the horizontal drive circuit 6) in the logic circuit 32.

[0021] Fig. 3 shows an example of a pixel 2 and a readout circuit 22. Below, a case will be described in which four pixels 2 share one readout circuit 22, as shown in Fig. 3. Here, "shared" means that the outputs of the four pixels 2 are input to a common readout circuit 22.

[0022] Each pixel 2 has components in common with the others. In Fig. 3, in order to distinguish the components of each pixel 2 from one another, an identification number (1, 2, 3, 4) is added to the end of the reference numeral of the component of each pixel 2. Hereinafter, when it is necessary to distinguish the components of each pixel 2 from one another, an identification number will be added to the end of the reference numeral of the component of each pixel 2, but when it is not necessary to distinguish the components of each pixel 2 from one another, the identification number at the end of the reference numeral of the component of each pixel 2 will be omitted.

[0023] Each pixel 2 includes, for example, a photodiode PD, a transfer transistor TR electrically connected to the photodiode PD, and a floating diffusion region FD that temporarily holds the charge output from the photodiode PD via the transfer transistor TR. The photodiode PD corresponds to a specific example of a "photoelectric conversion unit" in the present disclosure. The photodiode PD performs photoelectric conversion to generate a charge according to the amount of light received. The cathode of the photodiode PD is electrically connected to the source of the transfer transistor TR, and the anode of the photodiode PD is electrically connected to a reference potential line (e.g., ground). The drain of the transfer transistor TR is electrically connected to the floating diffusion region FD, and the gate of the transfer transistor TR is electrically connected to a pixel drive line 23. The transfer transistor TR is, for example, a CMOS transistor.

[0024] The floating diffusion regions FD of the pixels 2 that share one readout circuit 22 are electrically connected to each other and to an input terminal of the common readout circuit 22. The readout circuit 22 includes, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP. The selection transistor SEL may be omitted if necessary. The source of the reset transistor RST (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion region FD, and the drain of the reset transistor RST is electrically connected to a power supply line VDD and the drain of the amplification transistor AMP. The gate of the reset transistor RST is electrically connected to a pixel drive line 23 (see FIG. 2). The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST. The source of the selection transistor SEL (the output terminal of the readout circuit 22) is electrically connected to a vertical signal line 24, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 23 (see FIG. 2).

[0025] 1.3 Example of a schematic configuration of an electronic device Furthermore, the imaging device 1 as described above can be applied to various electronic devices, such as imaging systems such as digital still cameras and digital video cameras, mobile phones with imaging functions, or other devices with imaging functions.

[0026] FIG. 4 is a block diagram showing an example of the configuration of an imaging device mounted on an electronic device.

[0027] As shown in FIG. 4, electronic device 2001 includes an optical system 2002, an imaging device 2003, and a DSP (Digital Signal Processor) 2004, and is configured by connecting DSP 2004, a display device 2005, an operation system 2006, a memory 2008, a recording device 2009, and a power supply system 2010 via a bus 2007, and is capable of capturing still and moving images.

[0028] The optical system 2002 is configured to have one or more lenses, and guides image light (incident light) from a subject to the imaging device 2003 , forming an image on the light receiving surface (sensor section) of the imaging device 2003 .

[0029] The imaging device 2003 may be any of the imaging devices 1 having the above-described configuration examples. Electrons are accumulated in the imaging device 2003 for a certain period of time in accordance with an image formed on the light receiving surface via the optical system 2002. A signal corresponding to the electrons accumulated in the imaging device 2003 is then supplied to the DSP 2004.

[0030] The DSP 2004 performs various signal processing on the signal from the imaging device 2003 to acquire an image, and temporarily stores the image data in a memory 2008. The image data stored in the memory 2008 is recorded in a recording device 2009 or supplied to a display device 2005 to display the image. In addition, an operation system 2006 accepts various operations by a user and supplies operation signals to each block of the electronic device 2001, and a power supply system 2010 supplies power necessary to drive each block of the electronic device 2001.

[0031] In the electronic device 2001 configured in this manner, by applying the imaging device 1 as described above as the imaging device 2003, the number of metal layers 58 can be reduced more effectively, thereby reducing costs.

[0032] 2. First embodiment First, an imaging device and an electronic device according to a first embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 100 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example.

[0033] 2.1 Pixel configuration example Fig. 5 is a top view showing a schematic configuration example of a pixel according to this embodiment. Fig. 6 is a vertical cross-sectional view showing a structural example of the A-A' cross section in Fig. 5. Fig. 7 is a vertical cross-sectional view showing a structural example of the B-B' cross section in Fig. 5. Fig. 8 is a vertical cross-sectional view showing a structural example of the C-C' cross section in Fig. 5.

[0034] As shown in FIGS. 5 to 8, in this embodiment, a semiconductor substrate 101 is divided into pixel regions in a two-dimensional grid pattern by pixel separating portions 109, and one pixel 100 is provided in each pixel region.

[0035] The pixel 100 comprises a photoelectric conversion unit 102 disposed, for example, on the back side (bottom side in the drawing) of the semiconductor substrate 101, a transfer gate 103 for extracting the charge stored in the photoelectric conversion unit 102 to the front side (top side in the drawing) of the semiconductor substrate 101, a gate insulating film 104 disposed between the transfer gate 103 and the semiconductor substrate 101, a floating diffusion region 105 disposed in one of the four corners of the pixel region in the upper layer of the semiconductor substrate 101, a ground contact 106 disposed in one of the four corners of the pixel region in the upper layer of the semiconductor substrate 101 that is diagonally opposite to the corner where the floating diffusion region 105 is disposed, and an insulating film 107 disposed at least between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106.

[0036] In the above configuration, the transfer gate 103 is composed of a plurality of vertical gate electrodes 103-1 and 103-2 protruding in the substrate thickness direction from the surface side of the semiconductor substrate 101 so that their tips (corresponding to the bottom surface) are close to the photoelectric conversion unit 102, and a transfer gate electrode 103-3 connecting the plurality of vertical gate electrodes 103-1 and 103-2 on the surface of the semiconductor substrate 101. Note that in this example, the number of vertical gate electrodes is two and the transfer gate 103 has an overall π-shape, but this is not limited thereto and the number of vertical gate electrodes may be one or three or more. Furthermore, in this example, the pixel structure of the pixel 100 including the transfer gate 103 is illustrated as having an axisymmetric structure with respect to a line connecting the floating diffusion region 105 and the ground contact 106 as the center line, but this is not limited thereto and the pixel structure may be asymmetric.

[0037] Each of the vertical gate electrodes 103-1 and 103-2 has a structure in which the upper side (transfer gate electrode 103-3 side) has a diameter approximately equal to the width of the transfer gate electrode 103-3, and the bottom side (photoelectric conversion body 102 side) has a larger diameter than the upper side. That is, in this example, when the semiconductor substrate 101 is viewed from above, the expanded diameter portions 103a and 103b on the bottom side of the vertical gate electrodes 103-1 and 103-2, respectively, protrude from the transfer gate electrode 103-3 on the semiconductor substrate 101.

[0038] The enlarged diameter portions 103a and 103b may be provided at a position deeper than the depth position of the floating diffusion region 105 and / or the ground contact 106 in the substrate thickness direction. However, this is not limitative, and various modifications may be made to the positions as long as the distance from the transfer gate 103 to the floating diffusion region 105 and / or the ground contact 106 can be ensured.

[0039] In this way, by making the bottom side of each of the vertical gate electrodes 103-1 and 103-2 wider in diameter than the upper side, it is possible to increase the area of ​​the surface (bottom surface) of the transfer gate 103 facing the photoelectric conversion section 102 while ensuring the distance from the transfer gate electrode 103-3 to the floating diffusion region 105 and / or ground contact 106, thereby making it possible to suppress a decrease in image quality due to the formation of a strong electric field and a decrease in transfer efficiency.

[0040] 8, the widths of the enlarged diameter portions 103a and 103b in the channel length direction of the vertical gate electrodes 103-1 and 103-2 may be the same or different. When the widths are different, for example, the width of the enlarged diameter portion 103b on the floating diffusion region 105 side may be wider than the width of the enlarged diameter portion 103a on the ground contact 106 side. This makes it possible to further suppress the formation of a strong electric field between the transfer gate 103 and the floating diffusion region 105. The channel length direction may be the direction connecting the floating diffusion region 105 and the transfer gate 103 (for example, the ground contact 106 on the extension line).

[0041] In this example, an insulating film 107 is provided on the upper portion of each of the vertical gate electrodes 103-1 and 103-2. In the following description, the portions of the insulating film 107 that are disposed on the side surfaces of the vertical gate electrodes 103-1 and 103-2 are also referred to as buried sidewalls 107a and 107b.

[0042] In this way, it is possible to lower the dielectric constant between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106, thereby making it possible to further reduce the strength of the electric field formed between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106.

[0043] The width of the buried sidewalls 107a and 107b in the channel length direction may be adjusted depending on the width of the enlarged diameter portions 103a and 103b directly below them.

[0044] In this example, the insulating film 107 may be provided so as to cover the side surfaces of the vertical gate electrodes 103-1 and 103-2 and the side and top surface of the transfer gate electrode 103-3. Sidewalls 108 made of an insulating film may be provided on the side surfaces of the mesa structure formed by the transfer gate electrode 103-3 covered with the insulating film 107. Furthermore, the surface of the semiconductor substrate 101 on which the transfer gate electrodes 10303 and the like are formed may be covered with a passivation film 110 which is an insulating film.

[0045] 2.2 Manufacturing process example Next, an example of a manufacturing process for the pixel 100 according to this embodiment will be described in detail with reference to the drawings. Figures 9 to 17 are process cross-sectional views showing an example of a manufacturing process for the pixel according to this embodiment. Note that Figure 9 is a plan view of the semiconductor substrate 101 in which the pixel 100 is fabricated, as seen from above, Figures 10, 12, 14, and 16 are process cross-sectional views corresponding to the A-A' cross section in Figures 5 and 9, and Figures 11, 13, 15, and 17 are process cross-sectional views corresponding to the C-C' cross section in Figures 5 and 9.

[0046] In this example of the manufacturing process, first, as shown in FIGS. 9 to 11 , an N-type dopant is ion-implanted into a semiconductor substrate 101 such as a silicon substrate from the top surface side with a predetermined implantation energy, and the implanted dopant is thermally diffused to form a photoelectric conversion unit 102, which is an N-type diffusion region, in a region biased toward the back surface side of the semiconductor substrate 101. For example, a P-type semiconductor substrate may be used for the semiconductor substrate 101, or a P-type dopant may be thinly diffused. In this description, N-type refers to an N-type with a small number of free electrons, and N+ type refers to an N-type with a large number of free electrons. Similarly, P-type refers to a P-type with a small number of holes, and P+ type refers to a P-type with a large number of holes.

[0047] Next, a trench is formed from the top surface to the back surface in the region where the pixel separation section 109 for dividing the semiconductor substrate 101 into individual pixel regions is to be formed, and the trench thus formed is filled with an insulator such as silicon oxide (SiO2) or silicon nitride (SiN), thereby forming the pixel separation section 109 for dividing the semiconductor substrate 101 into individual pixel regions.

[0048] In this example, the pixel separation section 109 is exemplified as a so-called FFTI (Front Full Trench Isolation) type pixel separation section that reaches from the top surface of the semiconductor substrate 101 to the back surface, but is not limited to this. It is also possible to adopt an FTI (Full Trench Isolation) type pixel separation section that penetrates the semiconductor substrate 101 from the back surface side, or a DTI (Deep Trench Isolation) type or RDTI (Reverse Deep Trench Isolation) type pixel separation section formed from the front surface or back surface to the middle of the semiconductor substrate 101.

[0049] Furthermore, when the pixel separating portion 109 is to have a light confinement effect, a reflective material such as tungsten (W) may be embedded in the trench formed in the semiconductor substrate 101. In this case, when an electrically conductive reflective material is embedded, it is preferable to provide an insulating film between the semiconductor substrate 101 and the reflective material.

[0050] Furthermore, in this example, the pixel separating portion 109 is not limited to a pixel separating structure having a trench structure, and may have, for example, a pixel separating structure using a diffusion region. In this case, the pixel separating portion 109 may be, for example, a diffusion region into which a dopant having a polarity opposite to that of the channel is implanted to a predetermined depth as a channel stopper.

[0051] Furthermore, not only the transfer gate 103 (transfer transistor TR) described later but also other transistors constituting the readout circuit 22 may be formed on the semiconductor substrate 101. That is, the imaging device 1 according to this embodiment is not limited to the three-layer stacked structure described above with reference to FIG. 2, but may have a single-layer structure or a two-layer or four-or-more-layer stacked structure.

[0052] Next, an insulating film such as a silicon oxide film (SiO2) is formed on the upper surface of the semiconductor substrate 101, and this insulating film is patterned by photolithography and etching to form a hard mask M1 for forming a trench A1 in which the transfer gate 103 will be formed. The opening shape of this hard mask may be the same as the outline shape of the transfer gate 103, which is made up of the vertical gate electrodes 103-1 and 103-2 and the transfer gate electrode 103-3, when viewed from the substrate thickness direction.

[0053] Then, the semiconductor substrate 101 is etched through the openings in the hard mask M1 formed as described above to form trenches A1 for forming the transfer gates 103. For example, anisotropic dry etching such as RIE (Reactive Ion Etching) can be used to etch the semiconductor substrate 101. However, the method is not limited to this, and the trenches A1 may be formed by various methods.

[0054] Thereafter, the hard mask M1 is removed, and then, as shown in FIGS. 12 and 13, a gate insulating film 104 is formed on the upper surface of the semiconductor substrate 101 and on the surface of the semiconductor substrate 101 inside the trench A1. Annealing under oxygen-rich conditions can be used to form the gate insulating film 104. However, the method is not limited thereto, and the gate insulating film may also be formed using a sputtering method, a CVD (Chemical Vapor Deposition) method, or the like. Furthermore, the insulating film formed on the upper surface of the semiconductor substrate 101 other than inside the trench A1 may be removed by CMP (Chemical Mechanical Polishing), wet etching, or the like.

[0055] Next, a conductor layer 103A to be processed into the transfer gate 103 is formed on the upper surface of the semiconductor substrate 101 on which the gate insulating film 104 is formed and in the trench A1. The conductor layer 103A may be made of polysilicon or amorphous silicon, which contains impurities and thus has conductivity. However, the conductor layer 103A is not limited to these materials, and other conductive materials such as metals and alloys may also be used. Furthermore, various film formation techniques, such as sputtering and CVD, may be used to form the conductor layer 103A. Furthermore, the surface of the conductor layer 103A formed on the semiconductor substrate 101 may be planarized, for example, by CMP or the like.

[0056] 14 and 15, a hard mask M2 is formed on the conductor layer 103A by performing a film formation process using, for example, a sputtering method or a CVD method, and a patterning process using photolithography and etching. The opening shape of the hard mask M2 may be the same as the outline shape of the transfer gate electrode 103-3 of the transfer gate 103 when viewed from the substrate thickness direction. Note that the material of the hard mask M2 may be an insulating material, such as a silicon nitride film (SiN), that can ensure an etching selectivity with respect to the gate insulating film 104 or the semiconductor substrate 101.

[0057] Next, the conductive layer 103A is etched through the openings in the hard mask M2 to process the conductive layer 103A on the semiconductor substrate 101 into a transfer gate electrode 103-3, while the conductive layer 103A in the trench A1 is processed into vertical gate electrodes 103-1 and 103-2 with reduced diameters at the top. For example, by over-etching the conductive layer 103A in the trench A1 to a certain depth, it is possible to remove part of the conductive layer 103A in the trench A1 and form the vertical gate electrodes 103-1 and 103-2 with expanded diameter portions 103a and 103b at the bottom. Note that anisotropic dry etching such as RIE may be used to pattern the conductive layer 103A.

[0058] 16 and 17, an insulating film is formed on the semiconductor substrate 101 on which the transfer gate 103 is formed so as to fill the gap in the trench A1, and then patterned by photolithography and etching to form an insulating film 107 having embedded sidewalls 107a and 107b on the side surfaces of the vertical gate electrodes 103-1 and 103-2. The insulating film 107 may be made of an insulating material that can ensure an etching selectivity with respect to the gate insulating film 104. For example, when the gate insulating film 104 is made of a silicon oxide film (SiO2), the insulating film 107 may be made of a silicon nitride film (SiN) or the like.

[0059] Next, a sidewall 108 made of an insulating film such as silicon nitride (SiN) is formed on the side surface of the transfer gate electrode 103-3 covered with the insulating film 107. Subsequently, a floating diffusion region 105, which is an N+ type diffusion region, is formed by, for example, ion implantation at one of the four corners of the pixel region in the upper layer portion of the semiconductor substrate 101, and a ground contact 106, which is a P+ type diffusion region, is formed at the corner diagonally opposite this corner by, for example, ion implantation. The ion-implanted dopant may be stabilized by annealing the upper surface of the semiconductor substrate 101. Thereafter, a passivation 110 made of an insulating film is formed on the upper surface of the semiconductor substrate 101 on which the transfer gate 103 is formed, thereby forming the pixel 100 having the structure shown in FIGS. 5 to 8.

[0060] 2.3 Summary As described above, according to this embodiment, the diameters of the photoelectric conversion section 102 sides of the vertical gate electrodes 103-1 and 103-2 are expanded so as to protrude beyond the transfer gate electrode 103-3 (expanded diameter sections 103a and 103b). This makes it possible to increase the area of ​​the surface of the transfer gate 103 facing the photoelectric conversion section 102 while ensuring the distance from the transfer gate electrode 103-3 to the floating diffusion region 105 and / or the ground contact 106. This makes it possible to suppress a decrease in image quality due to the formation of a strong electric field and a decrease in transfer efficiency.

[0061] Furthermore, by locating the enlarged diameter portions 103a and 103b at a position deeper than the depth of the floating diffusion region 105 and / or the ground contact 106 in the substrate thickness direction, it is possible to ensure the distance from the vertical gate electrodes 103-1 and 103-2 to the floating diffusion region 105 and / or the ground contact 106, thereby making it possible to prevent a strong electric field from being formed between the vertical gate electrodes 103-1 and 103-2 and the floating diffusion region 105 and / or the ground contact 106.

[0062] Furthermore, by providing an insulating film 107 on the upper portion (non-expanded portion) of each of the vertical gate electrodes 103-1 and 103-2, it is possible to lower the dielectric constant between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106, thereby making it possible to further reduce the strength of the electric field formed between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106.

[0063] 3. Second embodiment Next, an imaging device and an electronic device according to a second embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 200 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiment will be cited and redundant description will be omitted.

[0064] Fig. 18 is a top view showing a schematic configuration example of a pixel according to this embodiment, and Fig. 19 is a vertical cross-sectional view showing a structural example of the AA' cross section in Fig. 18.

[0065] As shown in Figures 18 and 19, the pixel 200 of this embodiment has a structure similar to that of the pixel 100 described in the first embodiment using Figures 5 to 8, except that the transfer gate 103 and the insulating film 107 are replaced with a transfer gate 203 and an insulating film 207.

[0066] The transfer gate 203 is composed of a transfer gate electrode 103-3 similar to that in the first embodiment, and a plurality of vertical gate electrodes 203-1 and 203-2.

[0067] The vertical gate electrodes 203-1 and 203-2 have the same structure as the vertical gate electrodes 103-1 and 103-2 according to the first embodiment, but are expanded in diameter to such an extent that they come into contact with the pixel separating section 109 in the AA' cross section direction.

[0068] In this way, by expanding the diameter of the vertical gate electrodes 203-1 and 203-2 to the extent that they come into contact with the pixel separation portion 109, it is possible to reduce the area where the transfer gate 203 and the semiconductor substrate 101 face each other via the gate insulating film 104, thereby reducing the parasitic capacitance between the transfer gate 203 and the semiconductor substrate 101 and improving the transfer efficiency.

[0069] In addition, by expanding the diameter of the vertical gate electrodes 203-1 and 203-2 to the extent that they come into contact with the pixel separation section 109, it is possible to prevent electric charges from sneaking between the vertical gate electrodes 203-1 or 203-2 and the pixel separation section 109, thereby limiting the charge transfer path and improving the transfer efficiency.

[0070] In the above description, the vertical gate electrodes 203-1 and 203-2 are expressed as being enlarged in diameter, but this may also include reducing the individual pixel regions partitioned by the pixel separating portion 109. In this case, it is possible to increase the degree of freedom in layout design when miniaturizing the pixel 200.

[0071] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0072] 4. Third Embodiment Next, an imaging device and an electronic device according to a third embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 300 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiments will be cited and redundant description will be omitted.

[0073] 20 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to this embodiment. Note that the cross section taken along line AA' in FIG. 20 may correspond to the cross-section taken along line AA' in FIG.

[0074] As shown in Figure 20, the pixel 300 of this embodiment has a structure similar to that of the pixel 100 described in the first embodiment using Figures 5 to 8, in which the gate insulating film 104 is replaced with a gate insulating film 304.

[0075] In the A-A' cross section, the thickness of the gate insulating film 304 at a portion between the vertical gate electrodes 103-1 / 103-2 and the pixel separating portion 109 is thicker than the thickness of other portions. For example, the thickness of the gate insulating film 304 provided on the side surface of the vertical gate electrodes 103-1 / 103-2, between the vertical gate electrodes 103-1 / 103-2 and the pixel separating portion 109, is thicker than the thickness of the gate insulating film 304 provided on the bottom surface of the vertical gate electrodes 103-1 / 103-2.

[0076] In this way, by thickening the gate insulating film 304 between the vertical gate electrodes 103-1 / 103-2 and the pixel separation section 109, it is possible to reduce the parasitic capacitance between the transfer gate 203 and the semiconductor substrate 101, thereby improving the transfer efficiency of the charges stored in the photoelectric conversion section 102.

[0077] 20 , the gate insulating film 304 between the vertical gate electrodes 103-1 and / or 103-2 and the pixel separating portion 109 may be thickened to such an extent that it comes into contact with the pixel separating portion 109, as in the gate insulating film 304-1 between the vertical gate electrode 103-1 and the pixel separating portion 109. However, without being limited thereto, the gate insulating film 304 between the vertical gate electrodes 103-1 and / or 103-2 and the pixel separating portion 109 may be thickened to such an extent that it does not come into contact with the pixel separating portion 109, as in the gate insulating film 304-2 between the vertical gate electrode 103-2 and the pixel separating portion 109.

[0078] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0079] 5. Fourth Embodiment Next, an imaging device and an electronic device according to a fourth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 400 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiments will be cited and redundant description will be omitted.

[0080] 21 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to this embodiment. Note that the AA' cross section in FIG. 21 may correspond to the AA' cross section in FIG.

[0081] As shown in Figure 21, the pixel 400 of this embodiment has a structure similar to that of the pixel 100 described in the first embodiment using Figures 5 to 8, in which the transfer gate 103 is replaced with a transfer gate 403.

[0082] The transfer gate 403 is composed of a transfer gate electrode 103-3 similar to that in the first embodiment, and a plurality of vertical gate electrodes 203-1 and 203-2.

[0083] Each of the vertical gate electrodes 403-1 and 403-2 has a tapered shape whose diameter decreases toward the bottom in a vertical cross section parallel to the arrangement direction of the vertical gate electrodes 403-1 and 403-2. In other words, the vertical cross section parallel to the arrangement direction of the vertical gate electrodes 403-1 and 403-2 is a plane perpendicular to the line connecting the floating diffusion region 105 and the ground contact 106, and is also a plane perpendicular to the channel length direction of the channel formed between the transfer gate 103 and the floating diffusion region 105.

[0084] In this way, by making the vertical gate electrodes 403-1 and 403-2 tapered, it is possible to form a potential profile with low modulation on the bottom side and high modulation on the top side, thereby improving the transfer efficiency of the charges accumulated in the photoelectric conversion unit 102.

[0085] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0086] 6. Fifth Embodiment Next, an imaging device and an electronic device according to a fifth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 500 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiments will be cited and redundant description will be omitted.

[0087] 22 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to this embodiment. Note that the CC' cross section in Fig. 22 may correspond to CC' in Fig. 5.

[0088] As shown in Figure 22, the pixel 500 of this embodiment has a structure similar to that of the pixel 100 described in the first embodiment using Figures 5 to 8, except that the transfer gate 103 and the insulating film 107 are replaced with a transfer gate 503 and an insulating film 507.

[0089] The transfer gate 503 is composed of a transfer gate electrode 103-3 similar to that of the first embodiment, and a plurality of vertical gate electrodes 503-1 and 503-2 (however, only the vertical gate electrode 503-1 is shown in FIG. 22).

[0090] The vertical gate electrodes 503-1 and 503-2 have the same structure as the vertical gate electrodes 103-1 and 103-2 according to the first embodiment, but the expanded diameter portions 503a and 503b have different depths in the substrate thickness direction (depth direction) between the floating diffusion region 105 side and the ground contact 106 side. In this example, the expanded diameter portion 503b on the floating diffusion region 105 side is set to a deeper position in the depth direction on the upper surface than the expanded diameter portion 503a on the ground contact 106 side. However, this is not limited thereto, and the expanded diameter portion 503a on the ground contact 106 side may be set to a deeper position in the depth direction on the upper surface than the expanded diameter portion 503b on the floating diffusion region 105 side.

[0091] Furthermore, the insulating film 507 has a structure similar to that of the insulating film 107 according to the first embodiment, and is configured to fill the trench A1 (see, for example, FIG. 15) according to the difference in depth between the enlarged diameter portions 503a and 503b.

[0092] In this way, by configuring the expanded diameter portions 503a and 503b to have different depths in the substrate thickness direction (depth direction) between the floating diffusion region 105 side and the ground contact 106 side, it is possible to expand the process margin during manufacturing. For example, in the process described in the first embodiment with reference to Fig. 15, between the floating diffusion region 105 side and the ground contact 106 side across the hard mask M2, the conductive layer 103A tends to be carved deeper on the floating diffusion region 105 side, which has a wider distance from the side surface of the trench A1 (width in the channel direction). Even in such a case, it is possible to suppress the problem of a decrease in yield due to a difference in depth after carving.

[0093] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0094] 7. Sixth Embodiment Next, an imaging device and an electronic device according to a sixth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 600 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiments will be cited and redundant description will be omitted.

[0095] 23 is a vertical cross-sectional view showing a schematic configuration example of a pixel according to this embodiment. Note that the CC' cross section in Fig. 23 may correspond to CC' in Fig. 5.

[0096] As shown in Figure 23, the pixel 600 of this embodiment has a structure similar to that of the pixel 100 described in the first embodiment using Figures 5 to 8, except that the transfer gate 103 and the insulating film 107 are replaced with a transfer gate 603 and an insulating film 607.

[0097] The transfer gate 603 is composed of a transfer gate electrode 103-3 similar to that of the first embodiment, and a plurality of vertical gate electrodes 603-1 and 603-2 (however, only the vertical gate electrode 603-1 is shown in FIG. 23).

[0098] The vertical gate electrodes 603-1 and 603-2 have a structure similar to that of the vertical gate electrodes 103-1 and 103-2 according to the first embodiment, except that the enlarged diameter portions 103a and 103b are omitted.

[0099] The insulating film 607 is configured to fill the trench A1 (see, for example, FIG. 15) in place of the omitted enlarged diameter portions 103a and 103b.

[0100] In this way, by placing the insulating film 607 instead of the enlarged diameter portions 103a and 103b on the bottom side surfaces of each vertical gate electrode 603-1 and 603-2, it is possible to reduce the parasitic capacitance between the transfer gate 603 and the semiconductor substrate 101, thereby improving the transfer efficiency of the charges accumulated in the photoelectric conversion portion 102.

[0101] Furthermore, since the structure of the vertical gate electrodes 603-1 and 603-2 in the trench A1 can be simplified, the process margin during the manufacturing process can be expanded.

[0102] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0103] 8. Seventh Embodiment Next, an imaging device and an electronic device according to a seventh embodiment will be described in detail with reference to the drawings. In this embodiment, pixels 700-1 and 700-2 may have a configuration corresponding to pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, configurations, operations, manufacturing processes, and effects similar to those of the above-described embodiments will be cited and redundant description will be omitted.

[0104] In the above-described embodiments, a case where one pixel 100, 200, 300, 400, 500, or 600 has one floating diffusion region 105 has been exemplified, but the pixel 2 in the present disclosure may have a structure in which one floating diffusion region is shared among multiple pixels 2. Therefore, in the seventh embodiment, a case in which two pixels 2 share one floating diffusion region will be exemplified.

[0105] 24 is a plan view showing a schematic configuration example of a pixel according to this embodiment. As shown in FIG. 24, in this embodiment, two pixels 700-1 and 700-2 adjacent in the row direction (horizontal direction in the drawing) share one floating diffusion region 705. Furthermore, each of the pixels 700-1 and 700-2 may share a ground contact 706 with the adjacent pixel on the opposite side in the row direction. In the following description, when there is no need to distinguish between the pixels 700-1 and 700-2, the reference numeral '700' is used.

[0106] Each pixel 700 has a configuration in which a photoelectric conversion unit 102, a transfer gate 703, and an insulating film 707 are provided in a pixel region of a semiconductor substrate 101 partitioned by a pixel separating unit 109. Note that each pixel 700 may also have a gate insulating film 104, a sidewall 108, and a passivation 110, which are not shown.

[0107] The transfer gate 703 is composed of a transfer gate electrode 703-3 that runs across the pixel region in the column direction (vertical direction in the drawing) and multiple (two in this example) vertical gate electrodes 703-1 and 703-2 that are arranged in the column direction along the transfer gate electrode 703-3, and has an overall π-shaped configuration. Enlarged diameter portions 703a and 703b are provided on the bottom sides of the vertical gate electrodes 703-1 and 703-2, respectively.

[0108] The insulating film 707 includes a buried sidewall 707a provided between the vertical gate electrodes 703-1 and 7-3-2 and the ground contact 706, and a buried sidewall 707b provided between the vertical gate electrodes 703-1 and 7-3-2 and the floating diffusion region 705, and is configured to cover, for example, the transfer gate 703.

[0109] In this configuration, the floating diffusion region 705 shared by the two pixels 700-1 and 700-2 is configured to straddle the pixel separation unit 109 that separates the two pixels 700-1 and 700-2. For example, the floating diffusion region 705 is configured from diffusion regions formed near opposing sides of the pixel regions of the two pixels 700-1 and 700-2, and a conductor film configured to connect these diffusion regions on the semiconductor substrate 101.

[0110] Similarly, the ground contact 706 shared by the two pixels 700 is composed of, for example, diffusion regions formed near the opposing sides of the pixel regions of the two pixels 700, and a conductive film configured to connect these diffusion regions on the semiconductor substrate 101.

[0111] As described above, even when one floating diffusion region 705 is shared by two pixels 700, by expanding the diameter of the photoelectric conversion unit 102 side of each of the vertical gate electrodes 703-1 and 703-2 so that it extends beyond the transfer gate electrode 703-3, it is possible to increase the area of ​​the surface of the transfer gate 703 facing the photoelectric conversion unit 102 while ensuring the distance from the transfer gate electrode 703-3 to the floating diffusion region 705 and / or ground contact 706, thereby suppressing a decrease in image quality due to the formation of a strong electric field and a decrease in transfer efficiency.

[0112] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0113] 9. Eighth Embodiment Next, an imaging device and an electronic device according to an eighth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixels 800-1 to 800-4 may have a configuration corresponding to the pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above-described embodiments will be cited and redundant description will be omitted.

[0114] In the seventh embodiment described above, a case where two pixels 700 share one floating diffusion region 705 is illustrated, whereas in this embodiment, a case where four pixels 800-1 to 800-4 share one floating diffusion region is illustrated.

[0115] Fig. 25 is a plan view showing a schematic configuration example of a pixel according to this embodiment. As shown in Fig. 25, in this embodiment, four pixels 800-1 to 800-4 arranged in a 2x2 matrix share one floating diffusion region 805. Each of the pixels 800-1 to 800-4 may share a ground contact 806 with its adjacent pixel on the opposite diagonal direction. In the following description, when the pixels 800-1 to 800-4 are not to be distinguished from one another, they will be referred to as "800."

[0116] Each pixel 800 may have a structure similar to any one of the pixels 100, 200, 300, 400, 500, and 600 illustrated in the first to sixth embodiments described above. In this case, the orientations of the pixels 800-1 to 800-4 may be changed so that the floating diffusion regions 105 are concentrated in the center of the 2×2 array.

[0117] In this configuration, the floating diffusion region 805 shared by the four pixels 800-1 to 800-4 is made up of the floating diffusion regions 105 gathered in the center and a conductive film configured to connect these on the semiconductor substrate 101.

[0118] Similarly, the ground contact 806 shared by the four pixels 800 is composed of, for example, ground contacts 106 gathered in the center of a 2x2 array and a conductive film configured to connect these on the semiconductor substrate 101.

[0119] As described above, even when one floating diffusion region 805 is shared by four pixels 800, by expanding the diameter of the photoelectric conversion unit 102 side of each of the vertical gate electrodes 103-1 and 103-2 so that it extends beyond the transfer gate electrode 103-3, it is possible to increase the area of ​​the surface of the transfer gate 103 facing the photoelectric conversion unit 102 while ensuring the distance from the transfer gate electrode 103-3 to the floating diffusion region 805 and / or ground contact 806, thereby suppressing a decrease in image quality due to the formation of a strong electric field and a decrease in transfer efficiency.

[0120] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0121] 10. Ninth embodiment Next, an imaging device and an electronic device according to a ninth embodiment will be described in detail with reference to the drawings. In this embodiment, pixels 900-1 and 900-2 may have a configuration corresponding to pixel 2 provided on the first substrate 10 in the above-described common configuration example. Furthermore, configurations, operations, manufacturing processes, and effects similar to those of the above-described embodiments will be cited and redundant description will be omitted.

[0122] In the above-described embodiment, the case where each pixel 100, 200, 300, 400, 500, 600, 700, or 800 is provided in a pixel region partitioned into a substantially square shape by the pixel separator 109 has been illustrated, but the shape of the pixel region is not limited to a substantially square and can be variously modified, such as a rectangle, a trapezoid, a rhombus, a regular hexagon, a circle, an ellipse, etc. Therefore, in the ninth embodiment, the case where each pixel region is partitioned into a rectangle that is long in the column direction will be illustrated.

[0123] Fig. 26 is a plan view showing a schematic configuration example of a pixel according to this embodiment. As shown in Fig. 26, in this embodiment, each pixel region partitioned by pixel separator 109 has a rectangular shape that is long in the column direction.

[0124] In each pixel region, an element structure constituting pixel 900-1 or 900-2 is provided on one side in the longitudinal direction of the rectangle. In the following description, when there is no need to distinguish between pixels 900-1 and 900-2, the reference numeral '900' will be used.

[0125] The element structure of each pixel 900 may be any of the element structures of the pixels 100, 200, 300, 400, 500, and 600 according to the above-described embodiments, except that the photoelectric conversion unit 102 is replaced with a photoelectric conversion unit 902 that extends over the entire pixel region.

[0126] This example illustrates a case where two adjacent pixels 900-1 and 900-2 in the row direction share one floating diffusion region 905 and one ground contact 906. The floating diffusion region 905 may be composed of, for example, a diffusion region formed at the corner where a side where element structures are closely arranged intersects with a side facing the other pixel 900 that shares the floating diffusion region 905, and a conductive film that connects these diffusion regions across the pixel separator 109.

[0127] Similarly, the ground contact 906 may be composed of, for example, a diffusion region formed at the corner where the side opposite to the side on which the element structures are closely arranged intersects with the side facing the other pixel 900 that shares the floating diffusion region 905, and a conductive film that connects these diffusion regions across the pixel separation portion 109.

[0128] As described above, even when each pixel region has a shape other than a square, by expanding the diameter of the photoelectric conversion section 102 side of each of the vertical gate electrodes 103-1 and 103-2 so that it extends beyond the transfer gate electrode 103-3, it is possible to increase the area of ​​the surface of the transfer gate 103 facing the photoelectric conversion section 102 while ensuring the distance from the transfer gate electrode 103-3 to the floating diffusion region 905 and / or ground contact 906, thereby suppressing a decrease in image quality due to the formation of a strong electric field and a decrease in transfer efficiency.

[0129] The other configurations, operations, manufacturing processes, and effects may be similar to those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0130] 11. Tenth embodiment Next, a modification of the pixel structure according to the above-described embodiments will be described as a tenth embodiment. Note that, for clarity, the following description will be based on the pixel structure according to the first embodiment, but the present embodiment is not limited to this and can be applied to other embodiments.

[0131] In the first embodiment (and other embodiments) described above, the vertical gate electrodes 103-1 and 103-2 have a structure in which the bottom side is wider than the upper side, thereby ensuring the distance from the transfer gate electrode 103-3 to the floating diffusion region 105 and / or the ground contact 106 and increasing the area of ​​the surface (bottom) of the transfer gate 103 facing the photoelectric conversion unit 102. In this case, by providing the insulating film 107 (buried sidewalls 107a and 107b) having a higher dielectric constant than the semiconductor substrate 101 on the side surfaces of the vertical gate electrode 103-1 other than the wider-diameter portions 107a and 107b, it becomes possible to ensure the electrical distance from the transfer gate 103 to the floating diffusion region 105 and / or the ground contact 106, thereby suppressing a decrease in transfer efficiency and suppressing a decrease in image quality due to the formation of a strong electric field between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106.

[0132] In contrast to this, this embodiment illustrates a structure that can ensure a greater electrical distance from the transfer gate 103 to the floating diffusion region 105 and / or the ground contact 106. The structure according to this embodiment can further suppress degradation of image quality caused by the formation of a strong electric field between the transfer gate 103 and the floating diffusion region 105 and / or the ground contact 106.

[0133] Fig. 27 is a partial cross-sectional view showing an example of the structure of a pixel according to this embodiment. Fig. 27 shows an excerpt of the structure around the transfer gate electrode 1003 from the cross-sectional structure of a plane corresponding to the CC' cross section shown in Fig. 8 in the first embodiment.

[0134] 27, in this embodiment, a trench A1 (see FIG. 11) for providing a transfer gate has a structure in which its diameter increases toward the surface (element formation surface) of the semiconductor substrate 101, and a vertical gate electrode 1003-1 having increasing diameter portions 103a and 103b and an insulating film 1007 including buried sidewalls 1007a and 1007b are provided in this trench A1. Therefore, in this embodiment, the buried sidewalls 1007a and 1007b have a structure in which their diameter increases toward the surface (element formation surface) of the semiconductor substrate 101.

[0135] By providing such a structure, it is possible to ensure a greater electrical distance from the transfer gate 1003 to the floating diffusion region 105 and / or the ground contact 106, thereby making it possible to further suppress the strength of the electric field formed between the transfer gate 1003 and the floating diffusion region 105 and / or the ground contact 106.

[0136] Furthermore, in this embodiment, a step A1007 is provided on the inner surface of the trench A1, so that the diameters of the embedded sidewalls 1007a and 1007b on the surface (element formation surface) side of the semiconductor substrate 101 are increased. This makes it possible to further ensure the electrical distance from the transfer gate 1003 to the floating diffusion region 105 and / or the ground contact 106, thereby further suppressing the strength of the electric field formed between the transfer gate 1003 and the floating diffusion region 105 and / or the ground contact 106.

[0137] The other configurations, operations, and effects may be the same as those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0138] 12. Eleventh embodiment Next, another modification of the pixel structure according to the above-described embodiments will be described as an eleventh embodiment. Note that, for clarity, the following description will be based on the pixel structure according to the tenth embodiment, but the present invention is not limited to this and can be applied to other embodiments as well.

[0139] The structure of the enlarged diameter portions 103a and 103b in the above-mentioned 10th embodiment (and other embodiments) is not limited to a structure in which they protrude in a direction parallel to the element formation surface of the semiconductor substrate 101 at the bottom of the vertical gate electrode 1003-1 / 1003-2.

[0140] Fig. 28 is a partial cross-sectional view showing an example of the structure of a pixel according to this embodiment. Note that Fig. 28 shows the structure around the transfer gate electrode 1103 extracted from the cross-sectional structure of a plane corresponding to the CC' cross section shown in Fig. 8 in the first embodiment, as in the tenth embodiment.

[0141] 28, in this embodiment, the enlarged diameter portions 1103a and 1103b have a structure in which they warp up along the inner side surface of the trench A1. That is, in this embodiment, the upper surfaces of the enlarged diameter portions 1103a and 1103b warp up as they move outward, and as a result, the upper surfaces of the enlarged diameter portions 1103a and 1103b have a structure in which the diameters of the upper surfaces of the enlarged diameter portions 1103a and 1103b increase as they move outward.

[0142] By providing such a structure, it is possible to increase the area of ​​the surface of the vertical gate electrode 1103-1 facing the semiconductor substrate 101, thereby improving the modulation efficiency of the vertical gate electrodes 1103-1 and 1103-2.

[0143] Furthermore, since the enlarged diameter portions 1103a and 1103b extend to a shallower position in the semiconductor substrate 101 (i.e., a position closer to the element formation surface), it is possible to provide the photoelectric conversion portion 102 to a shallower position in the semiconductor substrate 101. This allows the photoelectric conversion region to be expanded, and therefore the photosensitivity of the pixel 2 can be further increased.

[0144] The other configurations, operations, and effects may be the same as those of the above-described embodiment, and therefore detailed description thereof will be omitted here.

[0145] 13. Mobile application examples The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0146] FIG. 29 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0147] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 29, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0148] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0149] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0150] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc., based on the received images.

[0151] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0152] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0153] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drivetrain control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating collisions between vehicles, following based on the distance between vehicles, maintaining vehicle speed, warning of vehicle collisions, or warning of vehicle lane departure.

[0154] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0155] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0156] The audio / video output unit 12052 transmits at least one output signal of audio and / or video to an output device capable of visually or audibly notifying information to passengers in the vehicle or to the outside of the vehicle. In the example of Fig. 29, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0157] FIG. 30 is a diagram showing an example of the installation position of the imaging unit 12031.

[0158] In FIG. 30, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0159] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0160] 30 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0161] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0162] For example, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on driver operation.

[0163] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0164] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. The pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0165] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 of the above-described configuration. By applying the technology according to the present disclosure to the imaging unit 12031, it becomes possible to acquire images with good image quality, thereby achieving various effects such as improving the accuracy of various detection processes.

[0166] 14. Application example to endoscopic surgery system The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0167] FIG. 31 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0168] 31 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment instrument 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0169] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0170] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens towards an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0171] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0172] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0173] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0174] The light source device 11203 is configured from a light source such as an LED (Light Emitting Diode), and supplies irradiation light to the endoscope 11100 when photographing an operation site or the like.

[0175] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiating light, magnification, focal length, etc.) of the endoscope 11100.

[0176] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0177] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical site can be configured from a white light source configured from, for example, an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 11203. In this case, it is also possible to capture images corresponding to each RGB in a time-division manner by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0178] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0179] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0180] FIG. 32 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0181] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so that they can communicate with each other.

[0182] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0183] The imaging unit 11402 is configured with an imaging element. The imaging element constituting the imaging unit 11402 may be one (a so-called single-chip type) or multiple (a so-called multi-chip type). When the imaging unit 11402 is configured with a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured with a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. 3D display enables the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured with a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0184] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0185] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0186] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0187] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0188] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0189] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0190] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0191] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0192] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data sent from the camera head 11102 .

[0193] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0194] Furthermore, the control unit 11413 causes the display device 11202 to display a captured image showing the surgical site, etc., based on the image signal that has been image processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0195] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0196] In the illustrated example, communication is performed by wire using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0197] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the components described above, the technology according to the present disclosure can be applied to, for example, the endoscope 11100, the camera head 11102 (the imaging unit 11402), the CCU 11201 (the image processing unit 11412), etc. By applying the technology according to the present disclosure to these components, clearer images of the surgical site can be obtained, allowing the surgeon to reliably confirm the surgical site.

[0198] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0199] Although the embodiments of the present disclosure have been described above, the technical scope of the present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present disclosure. Furthermore, components of different embodiments and modifications may be combined as appropriate.

[0200] Furthermore, the effects of each embodiment described in this specification are merely examples and are not intended to be limiting, and other effects may also be obtained.

[0201] The present technology can also be configured as follows. (1) A plurality of pixels arranged in a two-dimensional grid, Each of the pixels is a photoelectric conversion unit provided on the first surface side of the semiconductor substrate and performing photoelectric conversion on incident light; a vertical gate electrode provided on the semiconductor substrate so as to be adjacent to the photoelectric conversion unit from a second surface side opposite to the first surface; a gate insulating film provided between the vertical gate electrode and the semiconductor substrate; a transfer gate electrode connected to the vertical gate electrode on the second surface of the semiconductor substrate; a first diffusion region provided on the second surface side of the semiconductor substrate; Equipped with The vertical gate electrode has a structure in which the bottom on the photoelectric conversion portion side is wider than the top on the transfer gate electrode side. Imaging device. (2) Each of the pixels further includes an insulating film provided on a side surface of the upper portion of the vertical gate electrode, at least between the vertical gate electrode and the first diffusion region. The imaging device according to (1) above. (3) a pixel separating section that divides the second surface of the semiconductor substrate into a plurality of pixel regions; The pixels are provided in one-to-one correspondence with the pixel regions. The imaging device according to (1) or (2). (4) Each of the pixels further includes a second diffusion region provided on the second surface side of the semiconductor substrate, the first diffusion region is disposed at one corner of a plurality of corners of the pixel region; The second diffusion region is disposed at a corner diagonally opposite to the corner at which the first diffusion region is disposed, among the plurality of corners of the pixel region. The imaging device according to (3) above. (5) The vertical gate electrode is composed of a plurality of vertical gate electrodes including a first vertical gate electrode and a second vertical gate electrode. The imaging device according to (4) above. (6) The first vertical gate electrode and the second vertical gate electrode are arranged symmetrically with respect to a line connecting the first diffusion region and the second diffusion region. The imaging device according to (5) above. (7) At least a part of the side surface of the vertical gate electrode is in contact with the pixel separating portion with the gate insulating film interposed therebetween. The imaging device according to any one of (4) to (6) above. (8) The thickness of the gate insulating film provided on the side surface of the vertical gate electrode and between the vertical gate electrode and the pixel separating portion is thicker than the thickness of the gate insulating film provided on the bottom surface of the vertical gate electrode. The imaging device according to any one of (4) to (7) above. (9) The cross-sectional shape of the vertical gate electrode in a plane perpendicular to a line connecting the first diffusion region and the second diffusion region is a tapered shape whose diameter decreases as it approaches the bottom surface. The imaging device according to any one of (4) to (8) above. (10) the bottom of the vertical gate electrode includes a first expanded diameter portion protruding toward the first diffusion region and a second expanded diameter portion protruding toward the second diffusion region; The distance from the second surface to the upper surface of the first expanded diameter portion is different from the distance from the second surface to the upper surface of the second expanded diameter portion. The imaging device according to any one of (4) to (9) above. (11) The shape of the pixel region on the first surface is one of a square, a rectangle, a trapezoid, a rhombus, and a regular hexagon. The imaging device according to any one of (3) to (10) above. (12) The first diffusion region is shared by two or more of the pixels. The imaging device according to any one of (1) to (11) above. (13) a readout circuit connected to the transfer gate electrode; The readout circuit is provided on a second semiconductor substrate bonded to the semiconductor substrate. The imaging device according to any one of (1) to (12) above. (14) The insulating film has a larger diameter on the second surface side of the semiconductor substrate than on the first surface side. The imaging device according to (2) above. (15) The expanded structure at the bottom of the vertical gate electrode is expanded toward the outside. The imaging device according to any one of (1) to (14) above. (16) An electronic device comprising the imaging device according to any one of (1) to (15). [Explanation of symbols]

[0202] 1. Imaging device 2, 100, 200, 300, 400, 500, 600, 700-1 to 700-2, 800-1 to 800-4, 900-1 to 900-2 pixels 3 Pixel array section 4 Vertical drive circuit 5 Column signal processing circuit 6 Horizontal drive circuit 7 Output circuit 8 Control Circuit 10 First board 11, 21, 31, 101, ST semiconductor substrate 20 Second board 22 Readout circuit 23 pixel drive line 24 vertical signal line 30 Third board 32 Logic Circuits 102, 902 Photoelectric conversion unit 103, 203, 403, 503, 603, 703, 1003, 1103 Transfer gates 103a, 103b, 203a, 203b, 503a, 503b, 703a, 703b, 1103a, 1103b Expanded diameter part 103-1, 103-2, 203-1, 203-2, 403-1, 403-2, 503-1, 503-2, 603-1, 603-2, 703-1, 703-2, 1003-1, 1003-2, 1103-1, 1103-2 Vertical gate electrode 103-3 Transfer gate electrode 104, 304, 304-1, 304-2 Gate insulating film 105, 705, 805, 905, FD1~FD4 Floating diffusion regions 106, 706, 806, 906 Ground Contact 107, 207, 507, 607, 707, 1007 insulating film 107a, 107b, 207a, 207b, 507a, 507b, 607a, 607b, 707a, 707b, 1007a, 1007b Recessed sidewall 108 Sidewall 109 Pixel separation section 110 Passivation 2001 Electronic equipment 2002 Optical system 2003 Imaging device 2004 DSP 2005 Display device 2006 Operation system 2007 Bus 2008 Memory 2009 Recording Device 2010 Power system A1007 Step AMP Amplifying transistor HL horizontal signal line I / O Input / Output Circuit PD1 to PD4 photodiodes RST Reset transistor SEL Select transistor TR1~TR4 Transfer transistors

Claims

1. A plurality of pixels arranged in a two-dimensional grid pattern, Each of the pixels is a photoelectric conversion unit provided on the first surface side of the semiconductor substrate and performing photoelectric conversion on incident light; a vertical gate electrode provided on the semiconductor substrate so as to be adjacent to the photoelectric conversion portion from a second surface side opposite to the first surface; a gate insulating film provided between the vertical gate electrode and the semiconductor substrate; a transfer gate electrode connected to the vertical gate electrode on the second surface of the semiconductor substrate; a first diffusion region provided on the second surface side of the semiconductor substrate; Equipped with the vertical gate electrode has a structure in which a bottom portion on the photoelectric conversion portion side is wider than an upper portion on the transfer gate electrode side, a pixel separating section that divides the second surface of the semiconductor substrate into a plurality of pixel regions; The pixels are provided in a one-to-one correspondence with the pixel regions, Each of the pixels further includes a second diffusion region provided on the second surface side of the semiconductor substrate, the first diffusion region is disposed at one corner of a plurality of corners of the pixel region; the second diffusion region is disposed at a corner diagonally opposite to the corner at which the first diffusion region is disposed, among the plurality of corners of the pixel region; The thickness of the gate insulating film provided on the side surface of the vertical gate electrode and between the vertical gate electrode and the pixel separating portion is thicker than the thickness of the gate insulating film provided on the bottom surface of the vertical gate electrode. Imaging device.

2. A plurality of pixels arranged in a two-dimensional grid, Each of the pixels is a photoelectric conversion unit provided on the first surface side of the semiconductor substrate and performing photoelectric conversion on incident light; a vertical gate electrode provided on the semiconductor substrate so as to be adjacent to the photoelectric conversion portion from a second surface side opposite to the first surface; a gate insulating film provided between the vertical gate electrode and the semiconductor substrate; a transfer gate electrode connected to the vertical gate electrode on the second surface of the semiconductor substrate; a first diffusion region provided on the second surface side of the semiconductor substrate; Equipped with the vertical gate electrode has a structure in which a bottom portion on the photoelectric conversion portion side is wider than an upper portion on the transfer gate electrode side, a pixel separating section that divides the second surface of the semiconductor substrate into a plurality of pixel regions; The pixels are provided in a one-to-one correspondence with the pixel regions, Each of the pixels further includes a second diffusion region provided on the second surface side of the semiconductor substrate, the first diffusion region is disposed at one corner of a plurality of corners of the pixel region; the second diffusion region is disposed at a corner diagonally opposite to the corner at which the first diffusion region is disposed, among the plurality of corners of the pixel region; the bottom of the vertical gate electrode includes a first expanded diameter portion that protrudes toward the first diffusion region and a second expanded diameter portion that protrudes toward the second diffusion region, The distance from the second surface to the upper surface of the first expanded diameter portion is different from the distance from the second surface to the upper surface of the second expanded diameter portion. Imaging device.

3. Each of the pixels further includes an insulating film provided on a side surface of the upper portion of the vertical gate electrode, and between at least the vertical gate electrode and the first diffusion region.

3. The imaging device according to claim 1.

4. The vertical gate electrode is composed of a plurality of vertical gate electrodes including a first vertical gate electrode and a second vertical gate electrode.

3. The imaging device according to claim 1.

5. The first vertical gate electrode and the second vertical gate electrode are arranged symmetrically with respect to a line connecting the first diffusion region and the second diffusion region. The imaging device according to claim 4 .

6. At least a part of the side surface of the vertical gate electrode is in contact with the pixel separating portion with the gate insulating film interposed therebetween.

3. The imaging device according to claim 1.

7. The cross-sectional shape of the vertical gate electrode in a plane perpendicular to a line connecting the first diffusion region and the second diffusion region is a tapered shape whose diameter decreases as it approaches the bottom surface.

3. The imaging device according to claim 1.

8. The shape of the pixel region on the first surface is one of a square, a rectangle, a trapezoid, a rhombus, and a regular hexagon.

3. The imaging device according to claim 1.

9. The first diffusion region is shared by two or more of the pixels.

3. The imaging device according to claim 1.

10. a readout circuit connected to the transfer gate electrode; The readout circuit is provided on a second semiconductor substrate bonded to the semiconductor substrate.

3. The imaging device according to claim 1.

11. The expanded structure at the bottom of the vertical gate electrode is expanded toward the outside.

3. The imaging device according to claim 1.

12. An electronic device comprising the imaging device according to claim 1 or 2.

Images