Semiconductor Devices

Abstract

To provide a semiconductor device which attains improvement of a dielectric strength.SOLUTION: A semiconductor device A1 comprises a first lead, a second lead, a first semiconductor element (control element 111), a second semiconductor element (drive element 112), an insulation element 12, a plurality of first lead terminals, a plurality of second lead terminals, a plurality of first wires, a plurality of second wires, a plurality of third wires, a plurality of fourth wires, and a plurality of fifth wires. The first lead includes a first die pad 21 and a plurality of first terminals (two first support terminals 51). The second lead includes a second die pad 22 and a plurality of second terminals (two second support terminals 52). Each of the plurality of first terminals includes a first bent part. The first bent part is defined by two first edges which are opposed to each other in a planar view and each of which is continuously bent. Each of the two first edges is recessed mutually in the same direction.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device that transmits signals between a plurality of semiconductor elements mounted in one package using insulating elements. [Background technology]

[0002] For example, inverter devices mounted on electric vehicles or hybrid vehicles are required to convert high-voltage DC power into AC power, and therefore use semiconductor devices equipped with isolation elements. The inverter devices include, for example, the semiconductor device and multiple switching elements, such as IGBTs (Insulated Gate Bipolar Transistors) and MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The semiconductor device includes a control element, an isolation element, and a drive element. In an inverter device for an electric vehicle, a control signal output from an ECU (Engine Control Unit) is input to the control element of the semiconductor device. The control element converts the control signal into a PWM (Pulse Width Modulation) control signal and transmits it to the drive element via the isolation element. The drive element drives the multiple switching elements based on the PWM control signal. This converts DC power from the vehicle battery into three-phase AC power for driving the motor.

[0003] In this semiconductor device, the power supply voltage supplied to the control element is low (approximately 5 V), while the power supply voltage supplied to the drive element is high (approximately 600 V or higher). Therefore, an isolation element is required for transmitting a PWM control signal from the control element to the drive element. Traditionally, the isolation element has been a photocoupler. However, in recent years, inductively coupled isolation elements have become more common. An inductively coupled isolation element transmits an electrical signal in an isolated state by inductively coupling two inductors (coils). That is, one coil converts an electrical signal into magnetism, and the other coil converts the magnetism into an electrical signal, thereby transmitting the electrical signal in an isolated state. Unlike photocouplers, inductively coupled isolation elements contribute to the miniaturization of semiconductor devices and have the advantage of being able to handle high-speed switching operations of multiple switching elements because there is almost no delay in the transmission of even high-frequency electrical signals. For example, Patent Document 1 discloses a semiconductor device in which a semiconductor element having a transmitting circuit, an inductor-coupled insulating element, and a driving element (gate driver IC) having a receiving circuit are mounted in one package.

[0004] A semiconductor device that incorporates semiconductor elements with a significant potential difference in the power supply voltage, such as a control element and a drive element, in one package is required to incorporate an insulating element and also to improve the dielectric strength voltage. When the package of the semiconductor device is an SOP (Small Outline Package), the multiple terminals exposed from one side of the sealing resin and the drive element, etc. In terms of improving the dielectric strength voltage, it is preferable that the multiple terminals exposed from the other side of the sealing resin located on the opposite side of the element are arranged with a sufficient distance between them. Also, in terms of improving the dielectric strength voltage, it is preferable that no part of the lead other than the multiple terminals is exposed from the sealing resin. The higher the power supply voltage supplied to the motor controlled by the inverter device, the stronger the demand for improved dielectric strength voltage.

[0005] For example, Patent Document 2 discloses the structure of a conventional SOP semiconductor device. During the manufacturing process of this semiconductor device, a support member called an island support supports an island portion (die pad) on which a semiconductor element or the like is mounted. The island support extends perpendicularly to the direction in which the multiple terminals extend, with one end connected to the island portion and the other end connected to the outer frame of the lead. After the encapsulation resin is formed, the island portion is supported by the encapsulation resin, so the island support is no longer necessary. When the semiconductor device is cut from the leads, the island support is also cut. At this time, the cut surface of the island support is exposed from the side of the encapsulation resin. Because the cut surface is part of the leads, this semiconductor device structure is not suitable for improving the dielectric strength voltage. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-51547 [Patent Document 2] Japanese Patent Application Laid-Open No. 2000-68437 Summary of the Invention [Problem to be solved by the invention]

[0007] SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a semiconductor device with improved dielectric strength. [Means for solving the problem]

[0008] The semiconductor device provided by the present invention comprises a semiconductor element, a die pad on which the semiconductor element is mounted, a plurality of first terminals arranged along a first direction, a conductive support member including a plurality of second terminals arranged along the first direction and positioned on the opposite side of the plurality of first terminals across the semiconductor element in a second direction perpendicular to the first direction, and a support terminal connected to the die pad, and a sealing resin covering each of the plurality of first terminals, the plurality of second terminals, and the support terminals, the semiconductor element, and the die pad, wherein the sealing resin has a pair of resin first side surfaces formed and spaced apart in the second direction and a pair of resin second side surfaces formed and spaced apart in the first direction, and the plurality of first terminals and the plurality of second terminals are each exposed from the pair of resin first side surfaces, and the conductive support member is not exposed from the pair of resin second side surfaces.

[0009] In carrying out the present invention, preferably, the die pad includes a first die pad and a second die pad, and the first die pad and the second die pad are arranged spaced apart from each other in the second direction.

[0010] In carrying out the present invention, preferably, the support terminals include a pair of support terminals spaced apart in the first direction, and the pair of support terminals are connected to both ends of the die pad in the first direction.

[0011] In implementing the present invention, preferably, the pair of support terminals includes a pair of first support terminals connected to the first die pad and a pair of second support terminals connected to the second die pad, and the pair of first support terminals and the pair of second support terminals are exposed from the pair of first resin side surfaces, respectively.

[0012] In implementing the present invention, preferably, the semiconductor element includes a control element and a drive element that requires a higher voltage than the control element, and the control element is mounted on the first die pad and the drive element is mounted on the second die pad.

[0013] In carrying out the present invention, preferably, the control element is electrically connected to at least one or more of the first terminals, and the drive element is electrically connected to at least one or more of the second terminals.

[0014] In carrying out the present invention, preferably, the control element is electrically connected to at least one or more of the first support terminals, and the drive element is electrically connected to at least one or more of the second support terminals.

[0015] In carrying out the present invention, it is preferable that an insulating element be further provided which is in electrical communication with the control element and the drive element, and the insulating element be located between the control element and the drive element in the second direction.

[0016] In carrying out the present invention, preferably, an inductor is formed in the insulating element.

[0017] In carrying out the present invention, it is preferable that the control element, the drive element and the insulating element all have a shape in plan view of an elongated rectangle with the long side extending in the first direction.

[0018] In carrying out the present invention, preferably, the area of ​​the first die pad is larger than the area of ​​the second die pad, and the insulating element is mounted on the first die pad.

[0019] In carrying out the present invention, preferably, a through hole is formed in the first die pad.

[0020] In carrying out the present invention, preferably, in the first die pad, the pair of first support terminals and the through hole are arranged on a straight line extending in the first direction.

[0021] In carrying out the present invention, preferably, the first die pad and the second die pad each have a shape in plan view of a long rectangle with the long sides extending in the first direction.

[0022] In carrying out the present invention, preferably, the plurality of first terminals and the pair of first support terminals are each exposed from one of the first resin side surfaces.

[0023] In carrying out the present invention, preferably, the pair of first support terminals are arranged on both sides of the plurality of first terminals in the first direction.

[0024] In carrying out the present invention, preferably, the plurality of second terminals and the pair of second support terminals are exposed from the other first resin side surface.

[0025] In carrying out the present invention, preferably, the second terminals are arranged on both sides of each of the pair of second support terminals in the first direction.

[0026] In carrying out the present invention, preferably, the second terminals arranged on the outer sides of the pair of second support terminals in the first direction are each formed with a protrusion protruding toward the second support terminal.

[0027] In implementing the present invention, it is preferable that the device further comprises a plurality of bonding wires bonded to the control element or the drive element, and some of the plurality of bonding wires are bonded to at least one of the first terminals or the second terminals.

[0028] In carrying out the present invention, preferably, some of the plurality of bonding wires are bonded to at least one of the first support terminals or the second support terminals.

[0029] In carrying out the present invention, it is preferable that some of the plurality of bonding wires are bonded to the insulating element.

[0030] In carrying out the present invention, preferably, the plurality of bonding wires bonded to the insulating element are arranged along the second direction.

[0031] In carrying out the present invention, it is preferable that all of the plurality of bonding wires bonded to the insulating element have a first bonding portion bonded to the insulating element.

[0032] In carrying out the present invention, the conductive support member is preferably made of an alloy containing Cu.

[0033] In carrying out the present invention, the sealing resin is preferably made of an epoxy resin having electrical insulating properties.

[0034] In carrying out the present invention, preferably, the device further comprises an interior plating layer having portions formed on the plurality of first terminals, the plurality of second terminals, and the support terminal.

[0035] In carrying out the present invention, the interior plating layer is preferably made of Ag.

[0036] In an implementation of the present invention, preferably, the plurality of first terminals and the pair of first support terminals, and the plurality of second terminals and the pair of second support terminals, each further include an exterior plating layer formed on a portion exposed from the pair of resin first side surfaces.

[0037] In carrying out the present invention, the exterior plating layer is preferably made of an alloy containing Sn. [Effects of the Invention]

[0038] According to the present invention, the plurality of first terminals and the plurality of second terminals are each exposed from the pair of resin first side surfaces. Furthermore, the die pad, the plurality of first terminals, the plurality of second terminals, and the support terminals that constitute the semiconductor device are all components of the conductive support member. Furthermore, the conductive support member, such as an island support, is not exposed from the pair of resin second side surfaces. This configuration eliminates the metal portion of the conductive support member exposed from the sealing resin near the plurality of second terminals, to which a higher voltage is applied than the plurality of first terminals. This makes it possible to improve the dielectric strength of the semiconductor device.

[0039] Other features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0040] [Figure 1] 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a plan view showing the semiconductor device of FIG. 1 (sealing resin is omitted). [Figure 3] FIG. 2 is a left side view showing the semiconductor device of FIG. [Figure 4] FIG. 2 is a right side view showing the semiconductor device of FIG. [Figure 5] FIG. 2 is a front view showing the semiconductor device of FIG. [Figure 6] FIG. 2 is a rear view showing the semiconductor device of FIG. [Figure 7] FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2. [Figure 9] 2 is a plan view showing leads of the semiconductor device of FIG. 1. FIG. [Figure 10] 2A to 2C are cross-sectional views of a main part showing a manufacturing process of the bonding wire of the semiconductor device of FIG. [Figure 11] 2A to 2C are cross-sectional views of a main part showing a manufacturing process of the bonding wire of the semiconductor device of FIG. [Figure 12] 2A to 2C are cross-sectional views of a main part showing a manufacturing process of the bonding wire of the semiconductor device of FIG. [Figure 13] 2A to 2C are cross-sectional views of a main part showing a manufacturing process of the bonding wire of the semiconductor device of FIG. [Figure 14] 2A to 2C are cross-sectional views of a main part showing a manufacturing process of the bonding wire of the semiconductor device of FIG. [Figure 15] FIG. 10 is a plan view showing a semiconductor device according to a second embodiment of the present invention (sealing resin is omitted). [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. [Figure 17] FIG. 10 is a plan view showing a semiconductor device according to a third embodiment of the present invention (sealing resin is omitted). [Figure 18] FIG. 18 is a partial enlarged view of the upper right region in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0041] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device according to the present invention will be described with reference to the accompanying drawings.

[0042] [First embodiment] 1 to 12, a semiconductor device A1 according to a first embodiment of the present invention will be described. For convenience of description, the up-down direction in the plan view is defined as a first direction X, and the left-right direction in the plan view, which is perpendicular to the first direction X, is defined as a second direction Y. Both the first direction X and the second direction Y are perpendicular to the thickness direction of the semiconductor device A1.

[0043] FIG. 1 is a plan view showing the semiconductor device A1. FIG. 2 is a plan view in which the sealing resin 6 described later is omitted from FIG. 1 for ease of understanding. FIG. 3 is a left side view showing the semiconductor device A1. FIG. 4 is a right side view showing the semiconductor device A1. FIG. 5 is a front view showing the semiconductor device A1. FIG. 6 is a rear view showing the semiconductor device A1. FIG. 7 is a cross-sectional view taken along line VII-VII (a dashed line) in FIG. 2. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2. In FIG. 2, the sealing resin 6 is shown by an imaginary line (a dashed line). In FIGS. 7 and 8, the sealing resin 6 is not omitted.

[0044] The semiconductor device A1 shown in these figures is surface-mounted on a circuit board of an inverter device for an electric vehicle, a hybrid vehicle, or the like, and is packaged in an SOP format. The semiconductor device A1 of this embodiment includes a semiconductor element 11, an insulating element 12, a conductive support member 80, a sealing resin 6, a bonding wire 71, an interior plating layer 72, and an exterior plating layer 73. In this embodiment, the semiconductor device A1 has a rectangular shape in a plan view.

[0045] The semiconductor element 11 and the insulating element 12 are elements that cause the semiconductor device A1 to function. The semiconductor element 11 includes a control element 111 and a drive element 112. The control element 111 has a circuit that converts a control signal input from an ECU into a PWM control signal, a transmission circuit that transmits the PWM control signal to the drive element 112, and a receiving circuit that receives an electrical signal from the drive element 112. The drive element 112 has a receiving circuit that receives the PWM control signal, a circuit (gate driver) that performs a switching operation of a power semiconductor element such as an IGBT based on the PWM signal, and a transmission circuit that transmits an electrical signal to the control element 111. The electrical signal may be, for example, an output signal from a temperature sensor arranged near the motor.

[0046] The insulating element 12 is an element for transmitting the PWM control signal and other electrical signals in an insulated state. The driving element 112 requires a higher voltage than the control element 111, which causes a significant potential difference between the control element 111 and the driving element 112, and therefore the insulating element 12 is necessary. Specifically, in an inverter device for an electric vehicle or a hybrid vehicle, the power supply voltage supplied to the control element 111 is approximately 5 V, while the power supply voltage supplied to the driving element 112 is approximately 600 V or more. In this embodiment, the insulating element 12 is an inductor-coupled insulating element. An inductor-coupled insulating element transmits electrical signals in an insulated state by inductively coupling two inductors (coils). The insulating element 12 has a substrate made of Si. An inductor made of Cu is formed on the substrate. The inductors include a transmitting inductor and a receiving inductor, and these inductors are stacked on top of each other in the thickness direction of the insulating element 12. A dielectric layer made of SiO2 or the like is interposed between the transmitting inductor and the receiving inductor. The transmitting inductor and the receiving inductor are electrically insulated from each other by the dielectric layer.

[0047] As shown in FIG. 2, the insulating element 12 is located between the control element 111 and the driving element 112 in the second direction Y. In this embodiment, the control element 111, the driving element 112, and the insulating element 12 all have a rectangular shape in plan view with their longer sides extending in the first direction X. The control element 111 and the insulating element 12 are mounted on a first die pad 21 of a die pad 2, which will be described later. The driving element 112 is mounted on a second die pad 22 of the die pad 2, which will be described later. A plurality of pads 111a are formed on the upper surface of the control element 111 (the upper surface of the control element 111 shown in FIG. 7). Similarly, a plurality of pads 112a are formed on the upper surface of the driving element 112 (the upper surface of the driving element 112 shown in FIG. 7), and a plurality of pads 12a are formed on the upper surface of the insulating element 12 (the upper surface of the insulating element 12 shown in FIG. 7).

[0048] The conductive support member 80 is a member in the semiconductor device A1 that carries the semiconductor element 11 and the insulating element 12 and that forms a conductive path between the semiconductor element 11 and the insulating element 12 and the circuit board of the inverter device. The conductive support member 80 is made of an alloy containing Cu, for example. The conductive support member 80 is formed from leads 81, which will be described later. The conductive support member 80 includes a die pad 2, a plurality of first terminals 3, a plurality of second terminals 4, and a support terminal 5.

[0049] The die pad 2 is a member on which the semiconductor element 11 and the insulating element 12 are mounted. The die pad 2 includes a first die pad 21 and a second die pad 22. As shown in FIG. 2, the first die pad 21 and the second die pad 22 are spaced apart from each other in the second direction Y. In this embodiment, the area of ​​the first die pad 21 is larger than the area of ​​the second die pad 22. In addition, in this embodiment, the first die pad 21 and the second die pad 22 each have a rectangular shape in plan view with the longer side extending in the first direction X. As shown in FIGS. 7 and 8, the first die pad 21 and the second die pad 22 are both flat.

[0050] 7 and 8, the first die pad 21 has a first die pad upper surface 211 and a first die pad lower surface 212. The first die pad upper surface 211 and the first die pad lower surface 212 face in opposite directions. In this embodiment, an interior plating layer 72 is formed on the first die pad upper surface 211. The control element 111 and the insulating element 12 are respectively mounted on the interior plating layer 72 formed on the first die pad upper surface 211 by die bonding via a bonding layer (not shown). The entire surface of the first die pad lower surface 212 is in contact with the sealing resin 6.

[0051] 7, the second die pad 22 has a second die pad upper surface 221 and a second die pad lower surface 222. The second die pad upper surface 221 and the second die pad lower surface 222 face opposite each other. In this embodiment, an interior plating layer 72 is formed on the second die pad upper surface 221. The driving element 112 is mounted on the interior plating layer 72 formed on the second die pad upper surface 221 by die bonding via a bonding layer (not shown). The entire surface of the second die pad lower surface 222 is in contact with the sealing resin 6.

[0052] 2 and 7, a sealing resin 6 is interposed between the first die pad 21 and the second die pad 22 in the second direction Y. In this embodiment, as will be described later, the sealing resin 6 is made of, for example, a black epoxy resin having electrical insulation properties. Therefore, the first die pad 21 and the second die pad 22 are electrically insulated by the insulating element 12 and the sealing resin 6.

[0053] The first terminals 3 are components that are joined to a circuit board of an inverter device to form a conductive path between the semiconductor device A1 and the circuit board. As shown in Figures 1 and 3, the first terminals 3 are arranged along a first direction X. Each of the first terminals 3 is exposed from a first resin side surface 63 of a sealing resin 6 (described later) so as to extend in a second direction Y. The first terminals 3 include a plurality of first intermediate terminals 31 and a pair of first side terminals 32.

[0054] 2 and 3, the first intermediate terminals 31 are arranged in the first direction X, sandwiched between a pair of first side terminals 32. Each of the first intermediate terminals 31 has a lead portion 311 and a pad portion 312.

[0055] The lead portion 311 is a rectangular portion extending along the second direction Y, and as shown in FIGS. 5 and 6, the portion exposed from the one resin first side surface 63 is bent into a gull-wing shape. Furthermore, as shown in FIG. 7, the exposed portion is covered with an exterior plating layer 73. Portions of the lead portion 311 where the exterior plating layer 73 is not formed are covered with the sealing resin 6. The pad portion 312 is connected to the lead portion 311 and has a rectangular shape that is wider than the lead portion 311 in the first direction X. As shown in FIG. 7, in this embodiment, an interior plating layer 72 is formed on the upper surface of the pad portion 312. The entire surface of the pad portion 312 is covered with the sealing resin 6. Furthermore, the pad portion 312 is flat.

[0056] 2 and 3, the pair of first side terminals 32 are arranged on both sides of the plurality of first intermediate terminals 31 in the first direction X. Each of the pair of first side terminals 32 has a lead portion 321 and a pad portion 322.

[0057] The lead portion 321 is an elongated rectangular portion extending along the second direction Y, and as shown in FIGS. 5 and 6 , the portion exposed from the one resin first side surface 63 is bent into a gull-wing shape. Similar to the lead portion 311 of the first intermediate terminal 31, the exposed portion is covered with an exterior plating layer 73. The portion of the lead portion 321 where the exterior plating layer 73 is not formed is covered with the sealing resin 6. The pad portion 322 is connected to the lead portion 321 and is wider than the lead portion 321 in the first direction X. In this embodiment, similar to the pad portion 312 of the first intermediate terminal 31, an interior plating layer 72 is formed on the upper surface of the pad portion 322 (the surface facing the same direction as the first die pad upper surface 211 in FIG. 7 ). The entire surface of the pad portion 322 is covered with the sealing resin 6. The pad portion 322 is flat.

[0058] Like the first terminals 3, the second terminals 4 are members that are joined to the circuit board of the inverter device to form conductive paths between the semiconductor device A1 and the circuit board. As shown in FIGS. 1 and 4, the second terminals 4 are arranged along the first direction X. As shown in FIG. 2, the second terminals 4 are located on the opposite side of the semiconductor element 11 from the first terminals 3 in the second direction Y. The second terminals 4 are exposed from the other first resin side surface 63 of the sealing resin 6 (described later) so as to extend in the second direction Y. The second terminals 4 include second intermediate terminals 41 and a pair of second side terminals 42.

[0059] 2 and 4, the second intermediate terminals 41 are arranged in the first direction X, sandwiched between a pair of second side terminals 42. Furthermore, the second intermediate terminals 41 are arranged in the first direction X, sandwiched between a pair of second support terminals 52 of a support terminal 5, which will be described later. Each of the second intermediate terminals 41 has a lead portion 411 and a pad portion 412.

[0060] The lead portion 411 is an elongated rectangular portion extending along the second direction Y. As shown in FIGS. 5 and 6, the portion exposed from the other resin first side surface 63 is bent into a gull-wing shape. As shown in FIG. 7, the exposed portion is covered with an exterior plating layer 73. The portion of the lead portion 411 on which the exterior plating layer 73 is not formed is covered with the sealing resin 6. The pad portion 412 is connected to the lead portion 411 and has a rectangular shape that is wider than the lead portion 411 in the first direction X. As shown in FIG. 7, in this embodiment, an interior plating layer 72 is formed on the upper surface of the pad portion 412 (the upper surface of the pad portion 412 shown in FIG. 7). The entire surface of the pad portion 412 is covered with the sealing resin 6. The pad portion 412 is flat. In this embodiment, the shape of the second terminal 4 is the same as the shape of the first terminal 3.

[0061] 2 and 4, the pair of second side terminals 42 are arranged on both sides of the plurality of second side terminals 42 in the first direction X. Each of the pair of second side terminals 42 has a lead portion 421 and a pad portion 422.

[0062] The lead portion 421 is an elongated rectangular portion extending along the second direction Y, and as shown in FIGS. 5 and 6 , the portion exposed from the other resin first side surface 63 is bent into a gull-wing shape. Similar to the lead portion 411 of the second intermediate terminal 41, the exposed portion is covered with an exterior plating layer 73. Portions of the lead portion 421 on which the exterior plating layer 73 is not formed are covered with the sealing resin 6. The length of the portion of the lead portion 421 covered with the sealing resin 6 is longer than the length of the corresponding portion of the lead portion 411 of the second intermediate terminal 41. The pad portion 422 is connected to the lead portion 421 and extends in the first direction X. As shown in FIG. 2 , an end of the pad portion 422 is spaced apart from the second die pad 22. In this embodiment, like the pad portion 412 of the second intermediate terminal 41, an interior plating layer 72 is formed on the upper surface of the pad portion 422 (the surface facing in the same direction as the second die pad upper surface 221 in FIG. 7). The pad portion 422 is entirely covered with the sealing resin 6. The pad portion 422 is also flat.

[0063] The support terminals 5 are connected to the die pad 2. The support terminals 5 support the die pad 2 and, like the plurality of first terminals 3 and the plurality of second terminals 4, are joined to the circuit board of the inverter device to form a conductive path between the semiconductor device A1 and the circuit board. The support terminals 5 include one configured from a pair of members, and further include a pair of first support terminals 51 and a pair of second support terminals 52. As shown in FIG. 2 , the pair of first support terminals 51 are arranged spaced apart in the first direction X and are connected to both ends of the first die pad 21. The pair of second support terminals 52 are arranged spaced apart in the first direction X and are connected to both ends of the second die pad 22.

[0064] 2 and 3, the pair of first support terminals 51 are arranged on both sides of the plurality of first terminals 3 in the first direction X. The pair of first support terminals 51 are exposed so as to extend in the second direction Y from the one first resin side surface 63 on which the plurality of first terminals 3 are exposed. Each of the pair of first support terminals 51 has a lead portion 511 and a pad portion 512.

[0065] The lead portion 511 is an elongated rectangular portion extending along the second direction Y. As shown in FIGS. 5 and 6 , the portion exposed from the first resin side surface 63 is bent into a gull-wing shape. Similar to the lead portion 311 of the first intermediate terminal 31, the exposed portion is covered with an exterior plating layer 73. The portion of the lead portion 511 on which the exterior plating layer 73 is not formed is covered with the sealing resin 6. The length of the portion of the lead portion 511 covered with the sealing resin 6 is longer than the length of the corresponding portion of the lead portion 311 of the first intermediate terminal 31 or the lead portion 311 of the first side terminal 32. The pad portion 512 is connected to the lead portion 511 and extends in the first direction X. As shown in FIG. 2 , an end of the pad portion 512 is connected to the first die pad 21. As shown in FIG. 8 , in this embodiment, similar to the pad portion 312 of the first intermediate terminal 31, an interior plating layer 72 is formed on the upper surface of the pad portion 512. The entire surface of the pad portion 512 is covered with the sealing resin 6. The pad portion 512 is flat.

[0066] 2 and 4, a plurality of second intermediate terminals 41 are arranged inside the pair of second support terminals 52 in the first direction X. Furthermore, the second side terminals 42 are arranged outside the pair of second support terminals 52 in the first direction X. Therefore, the second terminals 4 are arranged on both sides of each of the pair of second support terminals 52. The pair of second support terminals 52 are exposed so as to extend in the second direction Y from the other first resin side surface 63 from which the plurality of second terminals 4 are exposed. Each of the pair of second support terminals 52 has a lead portion 521, a pad portion 522, and a connecting portion 524.

[0067] The lead portion 521 is an elongated rectangular portion extending along the second direction Y. As shown in FIGS. 5 and 6 , the portion exposed from the other resin first side surface 63 is bent into a gull-wing shape. Similar to the lead portion 411 of the second intermediate terminal 41, the exposed portion is covered with an exterior plating layer 73. The portion of the lead portion 521 on which the exterior plating layer 73 is not formed is covered with the sealing resin 6. The pad portion 522 is connected to the lead portion 521 and is wider than the lead portion 521 in the first direction X. The pad portion 522 extends in the second direction Y. In this embodiment, similar to the pad portion 412 of the second intermediate terminal 41, an interior plating layer 72 is formed on the upper surface of the pad portion 522 (the surface facing the same direction as the second die pad upper surface 221 in FIG. 7 ). The entire surface of the pad portion 522 is covered with the sealing resin 6. The pad portion 522 is flat. The connecting portion 524 is a portion that is connected to the pad portion 522 and extends in the first direction X. As shown in FIG. 2, an end of the connecting portion 524 is connected to the second die pad 22. In this embodiment, similar to the pad portion 522, an interior plating layer 72 is formed on the upper surface of the connecting portion 524 (the surface facing in the same direction as the upper surface of the pad portion 522). The connecting portion 524 is entirely covered with the sealing resin 6.

[0068] Fig. 9 is a plan view showing a lead 81 of the semiconductor device A1. In Fig. 9, the region where the sealing resin 6 is formed is indicated by an imaginary line (two-dot chain line). Also, the region where the interior plating layer 72 is formed is indicated by a diagonal line.

[0069] The aforementioned conductive support member 80 is formed from a lead 81. In the manufacturing process of the semiconductor device A1, the die pad 2, the plurality of first terminals 3, the plurality of second terminals 4, and the support terminal 5 are all formed from the same lead 81. The lead 81 is made of an alloy containing Cu, for example. The lead 81 has an outer frame 811, an island portion 812, a plurality of first leads 813, a plurality of second leads 814, a support lead 815, and a dam bar 816. Of these, the outer frame 811 and the dam bar 816 do not constitute the semiconductor device A1. The lead 81 will be described below with reference to FIG. 9.

[0070] The outer frame 811 is a member formed to surround the island portion 812, the plurality of first leads 813, the plurality of second leads 814, the support lead 815, and the dam bar 816. The plurality of first leads 813, the plurality of second leads 814, and the support lead 815 are connected to each other along the first direction X of the outer frame 811. In addition, the dam bar 816 is connected to the outer frame 811 along the second direction Y.

[0071] The island portion 812 is a rectangular member with its long sides extending in the first direction X in a plan view. The island portion 812 corresponds to the die pad 2. The island portion 812 is supported by the outer frame 811 via support leads 815. The island portion 812 includes a first island portion 812a and a second island portion 812b. The first island portion 812a corresponds to the first die pad 21, and the second island portion 812b corresponds to the second die pad 22. The first island portion 812a and the second island portion 812b are arranged spaced apart from each other.

[0072] The multiple first leads 813 are arranged along the first direction X and are components that each extend in the second direction Y. The multiple first leads 813 correspond to the multiple first terminals 3. One end of each of the first leads 813 is connected to the outer frame 811. The multiple first leads 813 include multiple first intermediate leads 813a and a pair of first side leads 813b. The first intermediate lead 813a corresponds to the first intermediate terminals 31, and the first side lead 813b corresponds to the first side terminals 32.

[0073] The multiple second leads 814 are arranged along the first direction X and each extend in the second direction Y. The multiple second leads 814 are located on opposite sides of the island portion 812 in the second direction Y. The multiple second leads 814 correspond to the multiple second terminals 4. One end of each second lead 814 is connected to the outer frame 811. The multiple second leads 814 include multiple second intermediate leads 814a and a pair of second side leads 814b. The second intermediate lead 814a corresponds to the second intermediate terminal 41, and the second side lead 814b corresponds to the second side terminal 42.

[0074] The support leads 815 are components that extend in the second direction Y and have one end connected to the outer frame 811 and the other end connected to the island portion 812. The support leads 815 correspond to the support terminals 5. The support leads 815 include a pair of first support leads 815a and a pair of second support leads 815b. The first support leads 815a correspond to the first support terminals 51, and the second support leads 815b correspond to the second support terminals 52. The pair of first support leads 815a are spaced apart in the first direction X and are connected to both ends of the first island portion 812a. The pair of second support leads 815b are spaced apart in the first direction X and are connected to both ends of the second island portion 812b.

[0075] The dam bars 816 are a pair of members that extend in the first direction X and have both ends connected to the outer frame 811. The dam bars 816 support the multiple first leads 813, the multiple second leads 814, and the support leads 815 in the first direction X, and also function to hold back the molten synthetic resin in the process of forming the sealing resin 6. One dam bar 816 is connected to the multiple first intermediate leads 813a, a pair of first side leads 813b, and a pair of first support leads 815a. The other dam bar 816 is connected to the multiple second intermediate leads 814a, a pair of second side leads 814b, and a pair of second support leads 815b.

[0076] The sealing resin 6 is made of, for example, black epoxy resin having electrical insulation properties. The sealing resin 6 covers a portion of each of the plurality of first terminals 3, the plurality of second terminals 4, and the support terminal 5, as well as the semiconductor element 11, the insulating element 12, the die pad 2, the bonding wires 71, and the interior plating layer 72. The sealing resin 6 is formed by transfer molding using a mold. The sealing resin 6 has a resin upper surface 61, a resin lower surface 62, a pair of resin first side surfaces 63, and a pair of resin second side surfaces 64.

[0077] 3 to 6, the resin upper surface 61 is a surface facing upward. The resin lower surface 62 is a surface facing downward. The resin upper surface 61 and the resin lower surface 62 face in opposite directions. Both the resin upper surface 61 and the resin lower surface 62 are flat.

[0078] As shown in FIGS. 1 and 2 , a pair of resin first side surfaces 63 are formed and spaced apart in the second direction Y. The pair of resin first side surfaces 63 face opposite each other. In this embodiment, a plurality of first terminals 3 and a pair of first support terminals 51 are exposed from one of the resin first side surfaces 63. Furthermore, a plurality of second terminals 4 and a pair of second support terminals 52 are exposed from the other resin first side surface 63. Each of the pair of resin first side surfaces 63 has a resin first side surface upper portion 631, a resin first side surface central portion 632, and a resin first side surface lower portion 633.

[0079] 3 to 6, resin first side surface upper portion 631 is a portion whose upper end is connected to resin upper surface 61 and whose lower end is connected to resin first side surface central portion 632. Resin first side surface upper portion 631 is inclined so that its upper end is located inside semiconductor device A1.

[0080] As shown in FIGS. 3 to 6, resin first side surface central portion 632 is a portion whose upper end is connected to resin first side surface upper portion 631 and whose lower end is connected to resin first side surface lower portion 633. Resin first side surface central portion 632 is perpendicular to resin upper surface 61 and resin lower surface 62. A plurality of first terminals 3 and a pair of first support terminals 51 are exposed from one resin first side surface central portion 632. A plurality of second terminals 4 and a pair of second support terminals 52 are exposed from the other resin first side surface central portion 632.

[0081] 3 to 6, the resin first side surface lower portion 633 is a portion whose upper end is connected to the resin first side surface central portion 632 and whose lower end is connected to the resin lower surface 62. The resin first side surface lower portion 633 is inclined so that its lower end is located inside the semiconductor device A1.

[0082] 1 and 2, the pair of resin second side surfaces 64 are formed to be spaced apart in the first direction X. The pair of resin second side surfaces 64 face opposite each other. As shown in FIGS. 2, 5, and 6, in this embodiment, the conductive support member 80 is not exposed from the pair of resin second side surfaces 64. Each of the pair of resin second side surfaces 64 has a resin second side surface upper portion 641, a resin second side surface central portion 642, and a resin second side surface lower portion 643.

[0083] 3 to 6, the resin second side surface upper portion 641 is a portion whose upper end is connected to the resin upper surface 61 and whose lower end is connected to the resin second side surface central portion 642. The resin second side surface upper portion 641 is inclined so that its upper end is located inside the semiconductor device A1.

[0084] 3 to 6, resin second side surface central portion 642 is a portion whose upper end is connected to resin second side surface upper portion 641 and whose lower end is connected to resin second side surface lower portion 643. Resin second side surface central portion 642 is perpendicular to resin upper surface 61 and resin lower surface 62, and is orthogonal to resin first side surface central portion 632. In this embodiment, the height of resin second side surface central portion 642 and the height of resin first side surface central portion 632 are approximately the same in the thickness direction of semiconductor device A1.

[0085] 3 to 6, the resin second side surface lower portion 643 is a portion whose upper end is connected to the resin second side surface central portion 642 and whose lower end is connected to the resin lower surface 62. The resin second side surface lower portion 643 is inclined so that its lower end is located inside the semiconductor device A1.

[0086] The bonding wires 71, together with the first terminals 3, second terminals 4, and support terminal 5, form conductive paths within the semiconductor device A1 that allow the semiconductor element 11 and insulating element 12 to perform their predetermined functions. The bonding wires 71 include first bonding wires 711, second bonding wires 712, third bonding wires 713, and fourth bonding wires 714.

[0087] 2, the multiple first bonding wires 711 form conductive paths between the control element 111 and the multiple first terminals 3 and the pair of first support terminals 51. The multiple first bonding wires 711 electrically connect the control element 111 to at least one of the first terminals 3 and the first support terminals 51. The multiple first bonding wires 711 are bonded to the pad 111a of the control element 111 and the pad portion 312 of the first intermediate terminal 31, the pad portion 322 of the first side terminal 32, or the pad portion 512 of the first support terminal 51, respectively.

[0088] 2, the plurality of second bonding wires 712 form a conductive path between the insulating element 12 and the control element 111. The insulating element 12 and the control element 111 are electrically connected to each other by the plurality of second bonding wires 712. The plurality of second bonding wires 712 are bonded to the pad 12a of the insulating element 12 and the pad 111a of the control element 111, respectively. In this embodiment, the plurality of second bonding wires 712 are arranged along the second direction Y.

[0089] 2, the plurality of third bonding wires 713 form a conductive path between the insulating element 12 and the driving element 112. The insulating element 12 and the driving element 112 are electrically connected to each other by the plurality of third bonding wires 713. The plurality of third bonding wires 713 are bonded to the pad 12a of the insulating element 12 and the pad 112a of the driving element 112, respectively. In this embodiment, the plurality of third bonding wires 713 are arranged along the second direction Y.

[0090] 2, the multiple fourth bonding wires 714 form conductive paths between the driving element 112 and the multiple second terminals 4 and the pair of second support terminals 52. The multiple fourth bonding wires 714 electrically connect the driving element 112 to at least one of the second terminals 4 and the second support terminals 52. The multiple fourth bonding wires 714 are bonded to the pads 112a of the driving element 112 and the pad portion 412 of the second intermediate terminal 41, the pad portion 422 of the second side terminal 42, or the pad portion 522 of the second support terminal 52, respectively.

[0091] 10 to 14 are cross-sectional views of the essential part showing wire bonding of the bonding wires 71 of the semiconductor device A1.

[0092] All of the plurality of second bonding wires 712 and third bonding wires 713 bonded to insulating element 12 have first bonding portions 712a and 713a bonded to insulating element 12. The wire bonding process of second bonding wires 712 and third bonding wires 713 will be described with reference to Figures 10 to 14.

[0093] As shown in FIG. 10, the capillary 88 is lowered toward the insulating element 12, and the tip of the wire 871 is pressed against the pad 12a of the insulating element 12. At this time, the weight of the capillary 88 and the action of ultrasonic waves generated from the capillary 88 cause the tip of the wire 871 to be pressed against the pad 12a. The capillary 88 is cylindrical with a through hole, and its tip is configured with a gently curved surface. A wire 871 that will become the bonding wire 71 is fed out from the capillary 88 so that it can move forward and backward. Next, as shown in FIG. 11, the capillary 88 is raised while feeding out the wire 871, thereby forming a first bonding portion 712a of the second bonding wire 712 on the pad 12a. A first bonding portion 713a of the third bonding wire 713 is formed in a similar manner.

[0094] 12, the capillary 88 is moved to a position directly above the pad 111a of the control element 111, and then the capillary 88 is lowered to press the tip of the capillary 88 against the pad 111a. At this time, the wire 871 is sandwiched between the tip of the capillary 88 and the pad 111a, and a part of the wire 871 adheres to the tip of the capillary 88. Next, as shown in FIG. 13, the capillary 88 is raised, whereby the wire 871 is cut and a second bonding portion 712b of the second bonding wire 712 is formed on the pad 111a. Through the above process, the second bonding wire 712 bonded to the insulating element 12 and the control element 111 is formed.

[0095] 14, when forming the second bonding portion 713b of the third bonding wire 713, the tip of the capillary 88 is pressed against the pad 112a of the driving element 112. At this time, the wire 871 is sandwiched between the tip of the capillary 88 and the pad 112a. This tip is located on the opposite side of the wire 871 from the tip of the capillary 88 when the second bonding wire 712 is formed. By performing this wire bonding process, it is possible to prevent the wire 871 from being biased toward the tip of the capillary 88, which can hinder wire bonding.

[0096] The interior plating layer 72 has portions formed on the plurality of first terminals 3, the plurality of second terminals 4, and the support terminal 5. Specific portions are shown in the above-mentioned description of the plurality of first terminals 3, the plurality of second terminals 4, and the support terminal 5. In this embodiment, the interior plating layer 72 is also formed on the first die pad upper surface 211 of the first die pad 21 and the second die pad upper surface 221 of the second die pad 22. As shown in FIG. 9 , the interior plating layer 72 is formed in the region indicated by the hatched area on the lead 81. The interior plating layer 72 functions to protect the lead 81 from impact during wire bonding. The interior plating layer 72 is made of, for example, Ag.

[0097] The exterior plating layer 73 is formed on the portions of the plurality of first terminals 3 and the pair of first support terminals 51, and the plurality of second terminals 4 and the pair of second support terminals 52 that are exposed from the pair of first resin side surfaces 63. When the semiconductor device A1 is surface-mounted on the circuit board of an inverter device by soldering, the exterior plating layer 73 improves the adhesion of solder to the exposed portions while also preventing erosion of the exposed portions due to soldering. The exterior plating layer 73 is made of an alloy containing Sn, such as solder.

[0098] Next, the effects of the semiconductor device A1 will be described.

[0099] According to this embodiment, the plurality of first terminals 3 and the plurality of second terminals 4 are each exposed from the pair of resin first side surfaces 63. The die pad 2, the plurality of first terminals 3, the plurality of second terminals 4, and the support terminal 5 that constitute the semiconductor device A1 are all components of the conductive support member 80. The conductive support member 80, such as an island support, is not exposed from the pair of resin second side surfaces 64. With this configuration, no metal portion of the conductive support member 80 exposed from the sealing resin 6 exists near the plurality of second terminals 4, to which a higher voltage is applied than the plurality of first terminals 3. This makes it possible to improve the dielectric strength of the semiconductor device A1.

[0100] The plurality of second bonding wires 712 and third bonding wires 713 bonded to insulating element 12 are arranged along second direction Y. For example, when semiconductor device A1 is mounted on an inverter device of an electric vehicle or a hybrid vehicle, the voltage applied to the plurality of second bonding wires 712 is approximately 5 V, while the voltage applied to the plurality of third bonding wires 713 is approximately 600 V or more. Therefore, such an arrangement of the plurality of second bonding wires 712 and third bonding wires 713 is preferable from the viewpoint of improving the withstand voltage of semiconductor device A1.

[0101] In order to improve the dielectric strength of the semiconductor device A1, there is a tendency for the separation distance between the plurality of first terminals 3 and the plurality of second terminals 4 to become longer. Therefore, by making the semiconductor element 11, the insulating element 12, and the die pad 2 all have their long sides in the first direction X in plan view, it is possible to prevent the semiconductor device A1 from becoming larger.

[0102] Both ends of the first die pad 21 and the second die pad 22 are supported by a pair of first support terminals 51 and second support terminals 52, respectively, at approximately the center in the second direction Y. When the sealing resin 6 is formed, the molten resin injected into the mold comes into contact with the die pad 2, causing displacement of the die pad 2 in the thickness direction of the semiconductor device A1. Therefore, by adopting such a configuration, it is possible to suppress this displacement and avoid defects in the semiconductor device A1.

[0103] When forming the sealing resin 6, the molten resin is generally injected into the mold from the corners of the leads 81. According to this embodiment, the conductive support members 80 such as the island support are not exposed from the pair of resin second side surfaces 64. With this configuration, the molten resin can be injected from the center in the second direction Y, thereby preventing voids from occurring in the sealing resin 6.

[0104] 15 to 18 show other embodiments of the present invention. In these figures, elements that are the same as or similar to those in the semiconductor device A1 described above are given the same reference numerals, and redundant explanations will be omitted.

[0105] Second Embodiment A semiconductor device A2 according to a second embodiment of the present invention will be described with reference to FIGS.

[0106] Fig. 15 is a plan view showing the semiconductor device A2 with the sealing resin 6 omitted for ease of understanding. Fig. 16 is a cross-sectional view taken along line XVI-XVI (dashed line) in Fig. 15. Note that in Fig. 15, the sealing resin 6 is shown by an imaginary line (dashed line with two dots). In Fig. 16, the sealing resin 6 is not omitted. In this embodiment, the semiconductor device A2 has a rectangular shape in a plan view.

[0107] The semiconductor device A2 of this embodiment differs from the semiconductor device A1 described above in the shape of the first die pad 21. As shown in FIGS. 15 and 16 , through holes 213 are formed in the first die pad 21. In this embodiment, three through holes 213 are formed in the first die pad 21 in a region located between the control element 111 and the insulating element 12. Each of the through holes 213 is an elongated hole extending in the first direction X. The number and shape of the through holes 213 in a plan view can be freely set. As shown in FIG. 15 , in the first die pad 21, a pair of first support terminals 51 and the through holes 213 are arranged on a straight line N (a dashed line) that extends along the first direction X.

[0108] This embodiment also makes it possible to improve the dielectric strength of the semiconductor device A2. Furthermore, according to this embodiment, a through hole 213 is formed in the first die pad 21. Because the area of ​​the first die pad 21 is larger than the area of ​​the second die pad 22, voids are likely to occur in the portion of the sealing resin 6 located near the first die pad 21 when the sealing resin 6 is formed. Therefore, by forming the through hole 213 in the first die pad 21, the molten resin injected into the mold when forming the sealing resin 6 can be sufficiently filled, and the occurrence of voids in the sealing resin 6 can be further suppressed.

[0109] Third Embodiment A semiconductor device A3 according to a third embodiment of the present invention will be described with reference to FIGS.

[0110] Fig. 17 is a plan view showing the semiconductor device A3 with the sealing resin 6 omitted for ease of understanding. Fig. 18 is a partial enlarged view of the upper right region of Fig. 17. Note that in Figs. 17 and 18, the sealing resin 6 is shown by an imaginary line (two-dot chain line). Also, in Fig. 18, an imaginary line (two-dot chain line) is used to show a state in which a pull-out force acts on the second support terminal 52 in the second direction Y and the second die pad 22 tries to come out of the sealing resin 6. In this embodiment, the semiconductor device A3 has a rectangular shape when viewed from above.

[0111] The semiconductor device A3 of this embodiment differs from the semiconductor devices A1 and A2 described above in the shape of a pair of second side terminals 42 and a pair of first support terminals 51 among the multiple second terminals 4. As shown in FIGS. 17 and 18 , the second terminals 4 arranged on the outer sides of the pair of second support terminals 52 in the first direction X, i.e., the pair of second side terminals 42, each have a protrusion 423 protruding toward the second support terminal 52. In this embodiment, the shape of the protrusion 423 in a plan view is trapezoidal. Note that the shape of the protrusion 423 in a plan view can be any shape, such as rectangular. Due to the nature of the processing of the lead 81, the pair of first support terminals 51 also have a protrusion 513 protruding toward the first side terminal 32.

[0112] This embodiment also makes it possible to improve the dielectric strength of the semiconductor device A3. Furthermore, according to this embodiment, a pair of second side terminals 42 each have a protrusion 423. Because the area of ​​the second die pad 22 is smaller than that of the first die pad 21, the bonding strength between the second die pad 22 and the sealing resin 6 is smaller than the bonding strength between the first die pad 21 and the sealing resin 6. Therefore, when the leads 81 are cut into individual pieces after the sealing resin 6 is formed, the second die pad 22 may be pulled out of the sealing resin 6 due to the pull-out force acting on the second support terminals 52 in the second direction Y. As shown in FIG. 18 , the protrusions 423 protrude in a direction (first direction X) perpendicular to the direction (second direction Y) of the pull-out force acting on the pair of second support terminals 52. Therefore, when the pulling force acts on the second support terminal 52 and the second die pad 22 tries to come out of the sealing resin 6, the second support terminal 52 receives a reaction force from the protrusion 423. This makes it possible to prevent the second die pad 22 from coming out of the sealing resin 6.

[0113] The semiconductor device according to the present invention is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present invention can be freely modified in various ways. [Explanation of symbols]

[0114] A1, A2, A3: Semiconductor device 11: Semiconductor element 111: Control element 111a: Pad 112: Drive element 112a: Pad 12: Isolation element 12a: Pad 2: Die pad 21: First die pad 211: First die pad top surface 212: Lower surface of first die pad 213:Through hole 22: Second die pad 221: Top surface of second die pad 222: Second die pad bottom surface 3: 1st terminal 31: First intermediate terminal 311: Lead section 312: Pad section 32: First side terminal 321: Lead section 322: Pad section 4: 2nd terminal 41: Second intermediate terminal 411: Lead section 412: Pad section 42: Second side terminal 421: Lead section 422: Pad section 423:Protrusion 5: Support terminal 51: 1st support terminal 511: Lead section 512: Pad section 513:Protrusion 52:Second support terminal 521: Lead section 522: Pad section 524: Connection part 6: Sealing resin 61: Resin top surface 62:Resin bottom surface 63: Resin first side 631: Upper part of first side of resin 632:Resin first side center part 633: Lower part of first side of resin 64: Resin second side 641: Upper part of the second side of the resin 642:Resin second side center part 643: Resin second side lower part 71: Bonding wire 711: First bonding wire 712: Second bonding wire 712a: First bonding section 712b: Second bonding section 713: Third bonding wire 713a: First bonding section 713b: Second bonding section 714: 4th bonding wire 72: Interior plating layer 73: Exterior plating layer 80: Conductive support member 81: Lead 811: Outer frame 812: Island 812a: Island 1 812b: Second Island 813: 1st lead 813a: 1st intermediate lead 813b: First side lead 814: Second Lead 814a: Second intermediate lead 814b: Second side lead 815: Supporting Lead 815a: 1st support lead 815b: Second Support Lead 816:Dambar 871: Wire 88: Capillary X: 1st direction Y: Second direction N: Straight line

Claims

1. a first lead including a first die pad and a plurality of first terminals each integrally formed with the first die pad and extending from the first die pad, each having a first curved portion; a first semiconductor element mounted on the first die pad, the first semiconductor element having a first side extending in a longitudinal direction in a plan view and a second side having a length shorter than that of the first side and intersecting with the first side; an insulating element mounted on the first die pad; a second lead including a second die pad and a plurality of second terminals each integrally formed with the second die pad and extending from the second die pad, each having a second curved portion; a second semiconductor element mounted on the second die pad, the second semiconductor element having a third side extending in a longitudinal direction in a plan view and a fourth side having a length shorter than that of the third side and intersecting with the third side; a plurality of first lead terminals located closer to the first die pad than the second die pad; a plurality of second lead terminals located closer to the second die pad than the first die pad; a plurality of first wires connecting the insulating element and the first semiconductor element; a plurality of second wires connecting the insulating element and the second semiconductor element; a plurality of third wires, each connected to the first semiconductor element and conducting to the first die pad, each crossing the second side in a plan view; a plurality of fourth wires, each connecting the first semiconductor element to one of the plurality of first lead terminals and each crossing one of the first side and the second side in a plan view; a plurality of fifth wires, each of which connects the second semiconductor element to any of the plurality of second lead terminals and each of which crosses any of the third side and the fourth side in a plan view; the first curved portion is defined by two first edges that are opposed to each other in a plan view and that are each continuously curved; The two first edges are recessed in the same direction as each other, the second curved portion is defined by two second edges that are opposed to each other in a plan view and are each continuously curved; The two second edges are recessed in the same direction as each other, each of the plurality of second terminals has a connecting portion that connects the second die pad and the second curved portion; When a direction perpendicular to a direction in which each of the plurality of second terminals extends in a plan view is defined as a specific direction, The semiconductor device, wherein the distance between the two second edges in the particular direction is greater than the dimension of the connecting portion in the particular direction.

2. A semiconductor device as described in Claim 1, wherein the distance between the two second edges in the specific direction is greater than the dimension of the connecting portion in a direction perpendicular to the specific direction when viewed in a plane.

3. each of the plurality of fourth wires intersects the first side of the first semiconductor element in a plan view; The semiconductor device according to claim 1 , wherein each of the plurality of fifth wires intersects with the third side of the second semiconductor element in a plan view.

4. 4. The semiconductor device according to claim 1, further comprising a plurality of sixth wires, each of which connects said first semiconductor element to one of said plurality of first terminals.

5. The semiconductor device according to claim 4 , further comprising a plurality of seventh wires, each connecting said second semiconductor element to one of said plurality of second terminals.

6. A semiconductor device as described in Claim 5, wherein each of the multiple seventh wires is spaced apart from the connecting portion.

7. An additional lead terminal; 7. The semiconductor device according to claim 1, further comprising an additional wire connecting either said first semiconductor element or said second semiconductor element to said additional lead terminal.

8. Further comprising a third lead terminal, 8. The semiconductor device according to claim 1, wherein, in a plan view, the third lead terminal is located either between the plurality of first terminals or between the plurality of second terminals.

9. A semiconductor device described in any one of claims 1 to 8, wherein the first die pad and the second die pad are arranged on the same plane.

10. A semiconductor device described in any one of claims 1 to 9, further comprising a sealing resin covering the first semiconductor element, the second semiconductor element and the insulating element.

11. A semiconductor device described in any one of claims 1 to 10, wherein the first semiconductor element, the second semiconductor element and the insulating element are formed as an SOP package.

12. A semiconductor device as described in any one of claims 1 to 11, wherein the first die pad has a plurality of through holes.

13. A semiconductor device as described in Claim 12, wherein each of the plurality of through holes is a long hole extending in a predetermined direction.

14. A semiconductor device as described in any one of claims 1 to 13, wherein the composition of each of the first lead and the second lead includes copper.

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