oxide semiconductor film

Abstract

To provide a highly reliable semiconductor device having stable electrical characteristics by using an oxide semiconductor film for a transistor.SOLUTION: In transistors 160 to 180, an oxide semiconductor film 359 includes a region having crystallinity, in which the a-b plane is approximately parallel to the film surface and the c-axis is approximately perpendicular to the film surface. The oxide semiconductor film 359 has stable electrical conductivity and a structure that is more electrically stable even when irradiated with visible light, ultraviolet light, or the like.SELECTED DRAWING: Figure 11

Description

[Technical Field]

[0001] The present invention relates to an oxide semiconductor film and a semiconductor device using the oxide semiconductor film.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general, and electro-optical devices, semiconductor circuits, and electronic equipment are all semiconductor devices. [Background technology]

[0003] As typified by liquid crystal display devices, transistors formed on glass substrates are amorphous. It is made up of amorphous silicon, polycrystalline silicon, etc. The transistors used in this method can easily be adapted to larger glass substrates. Amorphous silicon transistors have the drawback of low field-effect mobility. In addition, transistors using polycrystalline silicon have high field-effect mobility, but the glass substrate It has the drawback that it is not suitable for making large-area plates.

[0004] In contrast to silicon-based transistors, which have such drawbacks, oxide semiconductor-based transistors The technology of fabricating transistors using this material and applying it to electronic and optical devices is attracting attention. For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. A technique for fabricating a transistor is disclosed in Patent Document 1. Patent Document 2 discloses a technique for fabricating such a semiconductor device and using it as a switching element for a pixel of a display device. There are.

[0005] Regarding the oxide semiconductor used in such transistors, It is insensitive to metals, and there is no problem even if a considerable amount of metal impurities are contained in the film. "Inexpensive soda-lime glass, which contains a large amount of alkali metals such as sodium, can also be used." It has also been stated that (see Non-Patent Document 1). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165529 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-165528 [Non-patent literature]

[0007] [Non-Patent Document 1] Kamiya, Nomura, and Hosono, "Physical Properties of Amorphous Oxide Semiconductors and Current Status of Device Development," Solid State Physics, September 2009, Vol. 44, pp. 621-633 Summary of the Invention [Problem to be solved by the invention]

[0008] However, in a manufacturing process of an oxide semiconductor film and a semiconductor device using the oxide semiconductor film, In this case, defects such as oxygen vacancies may occur in the oxide semiconductor film, or a supply source of carriers may become If hydrogen is mixed in, the electrical conductivity of the oxide semiconductor film may change. Such a phenomenon is a factor in fluctuation of the electrical characteristics of a transistor including an oxide semiconductor film. This causes a decrease in the reliability of the semiconductor device.

[0009] When such an oxide semiconductor film is irradiated with visible light or ultraviolet light, it becomes particularly electrically conductive. Such a phenomenon may also occur in a transistor including an oxide semiconductor film. This causes fluctuations in electrical characteristics and reduces the reliability of the semiconductor device.

[0010] In view of these problems, it is an objective to provide an oxide semiconductor film having more stable electrical conductivity. Further, by using the oxide semiconductor film, a stable electric current can be obtained in a semiconductor device. An object of the present invention is to provide a highly reliable semiconductor device by imparting electrical characteristics. [Means for solving the problem]

[0011] One embodiment of the disclosed invention includes a region having crystallinity, and the region having crystallinity is a The oxide semiconductor is composed of crystals in which the -b plane is approximately parallel to the film surface and the c axis is approximately perpendicular to the film surface. That is, the region having crystallinity included in the oxide semiconductor film has a c-axis orientation. Note that the oxide semiconductor film is non-single-crystal. does not become amorphous.

[0012] One embodiment of the disclosed invention includes a region having crystallinity, and the region having crystallinity is a The crystals have planes roughly parallel to the film surface and c-axes roughly perpendicular to the film surface. In the electron diffraction intensity measurement using an electron beam irradiated from the - 1 Above 4.1nm -1 The full width at half maximum of the following peaks and the magnitude of the scattering vector are 5.5 nm -1 Above 7.1nm -1 The full width at half maximum of the following peaks is 0.2 nm -1 That's all The oxide semiconductor film.

[0013] In the above, the magnitude of the scattering vector is 3.3 nm -1 Above 4.1nm-1 The following p The full width at half maximum at the -1 More than 0.7nm -1 is less than or equal to the scattering vector Size: 5.5nm -1 Above 7.1nm -1 The full width at half maximum of the following peaks is 0.45 nm -1 Over 1.4nm -1 It is preferable that g is 1.0 or less in ESR measurement. The spin density of the peak near 93 is 1.3 × 10 18 (spins / cm 3 ) smaller than The oxide semiconductor film preferably includes a plurality of crystalline regions. The directions of the a and b axes may be different from each other. m It is preferable that the compound has a structure represented by the formula (m is a non-natural number).

[0014] Another embodiment of the disclosed invention is a semiconductor device including a first insulating film and a second insulating film provided on the first insulating film. an oxide semiconductor film including a crystalline region and a a source electrode, a drain electrode, a second insulating film provided on the oxide semiconductor film, and a second and a gate electrode provided on the insulating film, and the crystalline region has an ab plane on the film surface. The semiconductor device is made of crystals whose planes are approximately parallel to each other and whose c-axes are approximately perpendicular to the film surface.

[0015] Another embodiment of the disclosed invention is a gate electrode and a first an insulating film; and an oxide semiconductor film including a crystalline region provided over the first insulating film; a source electrode and a drain electrode provided so as to be in contact with the oxide semiconductor film; a second insulating film provided on the insulating film, and the crystalline region has an ab-plane on the film surface. The semiconductor device is made of crystals whose c-axis is approximately parallel to the film surface and whose c-axis is approximately perpendicular to the film surface.

[0016] In the above, a first metal oxide film is provided between the first insulating film and the oxide semiconductor film, and The metal oxide film of the present invention contains gallium oxide and zinc oxide and includes a crystalline region, The crystalline region has an ab plane approximately parallel to the film surface and a c axis approximately perpendicular to the film surface. In addition, the first metal oxide film is preferably made of a zinc oxide crystal. The amount of the gallium oxide is preferably less than 25% of the amount of the oxide semiconductor film. A second metal oxide film is provided between the second insulating films, and the second metal oxide film is made of gallium oxide. The crystalline region includes zinc oxide and has a crystalline structure, and the crystalline region has an ab plane. It is preferable that the film be made of crystals whose c-axes are approximately parallel to the film surface and approximately perpendicular to the film surface. In the second metal oxide film, the amount of zinc oxide is 25% of the amount of gallium oxide. It is preferable that it is less than 10 ...

[0017] In this specification, the expression "surface A is approximately parallel to face B" means that the normal line to face A and the normal line to face B are perpendicular to each other. The angle is defined as a state in which the angle is between 0° and 20°. "Approximately perpendicular to plane B" means that the angle between line C and the normal to plane B is between 0° and 20°. Let's say. [Effects of the Invention]

[0018] The crystalline region includes a region in which the ab plane is approximately parallel to the film surface. The oxide semiconductor film in which the c-axis is approximately perpendicular to the film surface has stable electrical conductivity. It has a structure that is electrically stable even when exposed to visible light or ultraviolet light. By using semiconductor films in transistors, it is possible to achieve stable electrical characteristics and high reliability. Therefore, a semiconductor device with high reliability can be provided. [Brief explanation of the drawings]

[0019] [Figure 1] 1 is a cross-sectional TEM image according to one embodiment of the present invention. [Figure 2] 1A and 1B are a plan view and a cross-sectional view of a crystal structure according to one embodiment of the present invention. [Figure 3] Graph showing the results of electron density of states calculation. [Figure 4] Band diagram of an amorphous oxide semiconductor with oxygen vacancies. [Figure 5] Recombination model in amorphous oxide semiconductors with oxygen vacancies. [Figure 6] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Figure 7] FIG. 1 is a schematic diagram illustrating a sputtering apparatus. [Figure 8] FIG. 2 is a schematic diagram illustrating the crystal structure of a seed crystal. [Figure 9] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Figure 10] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 11] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A and 1B are diagrams illustrating band structures of a semiconductor device according to one embodiment of the present invention. [Figure 13] 1 is a cross-sectional TEM image according to an embodiment of the present invention. [Figure 14] 1 is a planar TEM image according to an embodiment of the present invention. [Figure 15] 1 is an electron beam diffraction pattern according to an embodiment of the present invention. [Figure 16] 1 shows a planar TEM image and an electron diffraction pattern according to an embodiment of the present invention. [Figure 17] 1 is a graph showing electron beam diffraction intensity according to an example of the present invention. [Figure 18] 1 is a graph showing the full width at half maximum of the first peak of the electron beam diffraction intensity according to an example of the present invention. [Figure 19] 10 is a graph showing the full width at half maximum of the second peak of the electron beam diffraction intensity according to one example of the present invention. [Figure 20] 1 is an XRD spectrum according to an example of the present invention. [Figure 21] 1 is an XRD spectrum according to an example of the present invention. [Figure 22] 1 is a graph showing the results of ESR measurement according to an embodiment of the present invention. [Figure 23] 1 shows a model of oxygen defects used in quantum chemical calculations according to an embodiment of the present invention. [Figure 24] 1 is a graph showing the results of low-temperature PL measurements according to an embodiment of the present invention. [Figure 25] 10 is a graph showing the results of negative-bias stress stress temperature stress measurement according to an embodiment of the present invention. [Figure 26] 10 is a graph of photocurrent in a photoresponsive defect evaluation method according to one embodiment of the present invention. [Figure 27] 1 shows the results of a TDS analysis according to an embodiment of the present invention. [Figure 28] 1 shows the results of a SIMS analysis according to one embodiment of the present invention. [Figure 29] 1A and 1B are a block diagram and an equivalent circuit diagram illustrating one embodiment of the present invention. [Figure 30] 1A to 1C are external views of electronic devices illustrating one embodiment of the present invention. [Figure 31] 1 is a cross-sectional TEM image according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0020] The embodiments and examples of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and methods thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. The present invention should not be construed as being limited to the following embodiments and examples. In the configuration of the present invention described below, the same parts or parts having similar functions are designated by the same Reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted.

[0021] In each figure described in this specification, the size, layer thickness, or area of ​​each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0022] In addition, terms such as first, second, and third used in this specification are used interchangeably to avoid confusion of components. It is not intended to limit the number of items. The terms "second" or "third" can be used interchangeably to explain the present invention.

[0023] (Embodiment 1) In this embodiment, as one embodiment of the present invention, an oxide semiconductor film will be described with reference to FIGS. 5 will be used to explain.

[0024] The oxide semiconductor film according to this embodiment includes a region having crystallinity. The region where the ab plane is approximately parallel to the film surface and the c axis is approximately perpendicular to the film surface is the crystal. That is, the crystalline region included in the oxide semiconductor film is c-axis oriented. When observing the cross section of the crystalline region, atoms arranged in layers are seen to be moving from the substrate to the surface. It has a layered structure, and the c-axis of the crystal is roughly perpendicular to the surface. Since the oxide semiconductor film includes a region having crystallinity in which the c axis is aligned, the oxide semiconductor film is Aligned Crystalline Oxide Semiconductor ; Also called CAAC-OS membrane.

[0025] Here, a cross-sectional TEM image of an actually fabricated oxide semiconductor film including a crystalline region is shown. As shown in Figure 1, the atoms are oriented in layers, i.e., the c-axis is oriented. A region 21 having crystallinity is certainly observed in the oxide semiconductor film.

[0026] Similarly, a crystalline region 22 is observed in the oxide semiconductor film. The region 21 and the crystalline region 22 are three-dimensionally surrounded by a region having an amorphous structure. As described above, the oxide semiconductor film has a plurality of crystalline regions. No grain boundaries are observed in Figure 1, and no grain boundaries are observed throughout the oxide semiconductor film. I couldn't.

[0027] In addition, in FIG. 1, the crystalline region 21 and the crystalline region 22 are amorphous structures. The crystalline region 21 and the crystalline region 2 are separated by a region of The atoms appear to be layered at equal intervals, forming an amorphous structure. It appears to form a continuous layer across the region.

[0028] In addition, in FIG. 1, the size of the crystalline region 21 and the crystalline region 22 is 3 The crystallinity formed in the oxide semiconductor film shown in this embodiment is approximately 100 nm to 7 nm. The size of the region having the above structure can be set to about 1 nm or more and 1000 nm or less. For example, As shown in FIG. 31, the crystalline region of the oxide semiconductor film is set to be several tens of nanometers or more. It is also possible.

[0029] Furthermore, when the crystalline region is observed from a direction perpendicular to the film surface, it appears as a hexagonal lattice structure. It is preferable that the crystal has a structure in which atoms are arranged in a The region having this property can easily take on a hexagonal structure with three-fold symmetry. In the specification, the hexagonal crystal structure is a member of the hexagonal crystal family. This refers to crystal systems that include trigonal and hexagonal crystals.

[0030] In addition, the oxide semiconductor film according to this embodiment may include a plurality of crystalline regions. In each crystalline region, the direction of the a-axis or b-axis of the crystal is different from each other. That is, the oxide semiconductor film according to this embodiment may have individual crystallinity. In the region where the crystal is located, the crystal is crystallized along the c-axis, but is not necessarily aligned along the ab-plane. However, it is necessary to ensure that regions with different a-axis or b-axis directions do not come into contact with each other. Therefore, it is preferable to prevent the formation of grain boundaries at the interface where the two regions contact each other. an oxide semiconductor film having an amorphous region three-dimensionally surrounding a crystalline region; That is, the oxide semiconductor film including the crystalline region is preferably non-crystalline. The film is crystalline, and the entire film does not become amorphous.

[0031] The oxide semiconductor film contains a quaternary metal oxide, In-Sn-Ga-Zn-O metal oxide. oxides, ternary metal oxides such as In-Ga-Zn-O and In-Sn-Z nO-based metal oxides, In-Al-Zn-O-based metal oxides, Sn-Ga-Zn-O-based metals oxides, Al-Ga-Zn-O based metal oxides, Sn-Al-Zn-O based metal oxides, and In-Zn-O based metal oxides, Sn-Zn-O based metal oxides, etc. It is used.

[0032] Among them, In-Ga-Zn-O based metal oxides have an energy gap of 2 eV or more and are preferred. Preferably, the energy gap is 2.5 eV or more, and more preferably 3 eV or more. When a transistor is fabricated using these, the resistance in the off state is sufficiently high. It is possible to reduce the current sufficiently. The regions with this property often have a hexagonal, non-wurtzite crystal structure, e.g. , YbFe2O4 type structure, Yb2Fe3O7 type structure, and modified structures thereof ( M. Nakamura, N. Kimizuka, and T. Mohri , “The Phase Relations in the In2O3-Ga2Zn "O4-ZnO System at 1350℃", J. Solid State C hem., 1991, Vol.93, p.298-315). In addition, YbFe2O4 type The structure is ABB|ABB|ABB, where the layer containing Yb is layer A and the layer containing Fe is layer B. It has a repeating structure of |, and its modified structure is, for example, a repeating structure of ABBB|ABBB| The Yb2Fe3O7 type structure is an ABB|AB|AB It has a repeating structure of B|AB|, and its modified structure is, for example, ABBB|ABB| The repeating structure of ABBB|ABB|ABBB|ABB| can be mentioned. When the amount of ZnO in the metal oxide is large, the metal oxide may take on a wurtzite crystal structure.

[0033] A typical example of In-Ga-Zn-O metal oxide is InGaO3(ZnO). m (m >0). Here, examples of In-Ga-Zn-O based metal oxides include For example, a gold alloy having a composition ratio of In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] Metal oxide, with a composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] The composition ratio of the metal oxides is In2O3:Ga2O3:ZnO=1:1:4 [molar ratio]. Here, it is more preferable that m is a non-natural number. The above composition is derived from the crystal structure and is merely an example. For example, In2O3:Ga2 Metal oxide with a composition ratio of O3:ZnO=2:1:8 [molar ratio], In2O3:G Metal oxide with a composition ratio of a2O3:ZnO=3:1:4 [molar ratio], or In Metal oxides with a composition ratio of 2O3:Ga2O3:ZnO=2:1:6 [molar ratio] It may be used.

[0034] An example of the structure of a crystalline region included in an oxide semiconductor film having the above structure The crystal structure of In2Ga2ZnO7 is shown in Figure 2. The crystal structure of 7 is shown using a plan view parallel to the a-axis and b-axis and a cross-sectional view parallel to the c-axis. Therefore, the c-axis is perpendicular to the a-axis and the b-axis, and the angle between the a-axis and the b-axis is 120°. In2Ga2ZnO7 shown in 2 shows the possible sites 11 for In atoms in the plan view, and The figure shows an In atom 12, a Ga atom 13, a Ga or Zn atom 14, and an O atom 15.

[0035] As shown in the cross-sectional view of Figure 2, In2Ga2ZnO7 is a single layer between In oxide layers. The Ga oxide layer and the two oxide layers between the In oxide layer are the Ga oxide layer and the Zn oxide layer. The structure is one in which layers containing one of each are stacked alternately in the c-axis direction. As shown in the plan view of Figure 2, In2Ga2ZnO7 has a hexagonal crystal structure with three-fold symmetry. .

[0036] The oxide semiconductor film including a crystalline region described in this embodiment has a crystallinity of at least a certain level. In addition, the oxide semiconductor film including the crystalline region preferably exhibits the following formula: In this way, the oxide semiconductor film including the crystalline region is different from the single crystal. Since the oxide semiconductor film has good crystallinity compared to the oxide semiconductor film having an amorphous structure, the oxide semiconductor film is free from oxygen defects. The defects that cause defects and impurities such as hydrogen that bind to dangling bonds are reduced. In particular, oxygen bound to metal atoms in the crystal is more likely to be bonded to oxygen bound to metal atoms in the amorphous state. Compared to silicon, the bonding strength is higher and the reactivity with impurities such as hydrogen is lower, so the number of defects is The production is reduced.

[0037] For example, an oxide film including a crystalline region made of an In-Ga-Zn-O metal oxide is In electron diffraction intensity measurements of semiconductor films irradiated with an electron beam from the c-axis direction, the scattering vector The size of the hole is 3.3 nm -1 Above 4.1nm -1 The full width at half maximum and scattering of the following peaks The vector size is 5.5 nm -1 Above 7.1nm -1 The full width at half maximum of the following peaks is 0.2nm -1 Preferably, the crystallinity is such that the scattering vector is is 3.3 nm -1 Above 4.1nm -1 The full width at half maximum of the following peaks is 0.4 nm-1 Below Upper 0.7nm -1 The scattering vector is less than 5.5 nm -1 Above 7.1nm - 1 The full width at half maximum of the following peaks is 0.45 nm -1 Over 1.4nm -1 The following will be true: It exhibits good crystallinity.

[0038] As described above, the oxide semiconductor film including the crystalline region described in this embodiment is It is preferable that defects in the film, such as element defects, are reduced. Such defects function as a carrier supply source in the oxide semiconductor film, and therefore, This can cause fluctuations in the electrical conductivity of the semiconductor film. The oxide semiconductor film including the crystalline region has stable electrical conductivity and is resistant to visible light and ultraviolet light. It has a structure that is more electrically stable against irradiation such as ultraviolet light.

[0039] Note that the ESR (Electron Spin Resonance) of the oxide semiconductor film including the crystalline region By performing a (N Resonance) measurement, the amount of lone electrons in the film can be measured. This allows us to estimate the amount of oxygen defects. The oxide semiconductor film containing the crystalline region made of -O-based metal oxide exhibited a high The spin density of the peak near g = 1.93 is 1.3 × 10 18 (spins / cm 3 ) Smaller, preferably 5 x 10 17 (spins / cm 3 ) or less, more preferably 5× 10 16 (spins / cm 3 ), more preferably 1 × 10 16(spins / cm 3 )

[0040] As described above, hydrogen, water, a hydroxyl group, or the like in the oxide semiconductor film including the crystalline region It is preferable that the amount of impurities containing hydrogen, such as hydrides, is reduced. The hydrogen concentration in the oxide semiconductor film containing 19 atoms / cm 3 The following shall be done: Hydrogen bonded to dangling bonds, water, hydroxyl groups, hydrides, etc. are preferred. The impurities containing hydrogen function as a carrier source in the oxide semiconductor film. This can cause fluctuations in the electrical conductivity of the oxide semiconductor film. The hydrogen reacts with the oxygen bonded to the metal atom to form water, and the oxygen is released from the lattice ( Defects are formed in the areas where oxygen is released. The oxide semiconductor film including the crystalline region has stable electrical conductivity and is resistant to visible light. It has a structure that is electrically stable even against irradiation of ultraviolet light and the like.

[0041] Furthermore, impurities such as alkali metals in the oxide semiconductor film including the crystalline region are reduced. For example, in an oxide semiconductor film including a crystalline region, The concentration of lithium is 5×10 15 cm -3 Less than 1 × 10 15 cm -3 Below, The concentration of thorium is 5×10 16 cm -3 Less than 1 × 10 16 cm -3 Below, More preferably, 1×10 15 cm -3 Below, the potassium concentration is 5 × 1015 cm -3 below , preferably 1 x 10 15 cm -3 The following applies.

[0042] Alkali metals and alkaline earth metals are effective for oxide semiconductors that include crystalline regions. In particular, when the oxide semiconductor film is used as a transistor, When sodium is used in the oxide semiconductor including a crystalline region, The oxide film containing the crystalline region can diffuse into the insulating film in contact with the oxide film and supply carriers. In the compound semiconductor film, the metal breaks the bond between metal and oxygen or intervenes in the bond. As a result, the transistor characteristics deteriorate (for example, normally-on (negative shift of threshold voltage), This can cause problems such as a decrease in mobility, and can also cause variations in characteristics.

[0043] Such a problem occurs particularly when the concentration of hydrogen in the oxide semiconductor film including the crystalline region is insufficient. Therefore, this becomes significant when the crystalline structure of an oxide semiconductor is relatively low. The hydrogen concentration in the film is 5×10 19 cm -3 Below, especially 5x10 18 cm -3 If In this case, it is strongly required to set the alkali metal concentration to the above value. The impurities in the oxide semiconductor film including the region having the alkali metal are extremely reduced, and the concentration of the alkali metal is reduced to 5× 10 16 atoms / cm 3 Below, the concentration of hydrogen is 5×10 19 atoms / cm 3 and It is preferable to do so.

[0044] As described above, the oxide semiconductor film including the crystalline region is an oxide semiconductor film having an amorphous structure as a whole. Since it has good crystallinity compared to semiconductor films, it can prevent defects such as oxygen defects and Impurities such as hydrogen bound to dangling bonds are reduced. Defects such as pits and hydrogen bound to dangling bonds cause oxide semiconductors to Since it functions as a carrier source in the conductive film, the electrical conductivity of the oxide semiconductor film is This can cause fluctuations. Therefore, the crystallinity of the crystals is reduced. Oxide semiconductor films have stable electrical conductivity and are resistant to irradiation with visible light and ultraviolet light. The oxide semiconductor film having such a crystalline region has a structure that is electrically stable. When used in transistors, it is a highly reliable semiconductor with stable electrical characteristics. An apparatus can be provided.

[0045] Next, we will explain how oxygen defects in an oxide semiconductor film affect the electrical conductivity of the oxide semiconductor film. The results of first-principles calculations based on density functional theory are presented. The following first-principles calculations were performed using first-principles calculation software from Accelrys. The functional is GGA-PBE, and the pseudopotential is Ur. A trasoft type was used.

[0046] In this calculation, amorphous InGaZnO4 is used as a model of the oxide semiconductor film. A model was created in which one oxygen atom was removed and a vacancy (oxygen defect) was left at the site. The calculation was performed using the following model. The number of atoms in the model is 12 In, 12 Ga, 12 Zn, The atomic arrangement of InGaZnO4 with this structure is optimized. The electron density of states was calculated by optimization. At this time, the cutoff energy was set to 300 eV. did.

[0047] The results of the electron density of states calculation are shown in Figure 3. In Figure 3, the vertical axis shows the density of states (DOS). ty of State) [states / eV], and energy [eV] on the horizontal axis. The origin of the energy shown on the horizontal axis indicates the Fermi energy. As shown, the upper edge of the valence band of InGaZnO4 is -0.74 eV, and the lower edge of the conduction band is 0.56 The band gap value is 3.15 eV, which is comparable to the experimental value of InGaZnO4. The band gap is very small, but the first-principles calculation based on density functional theory shows that It is well known that the calculated value is smaller than the experimental value, which indicates that the calculation is inappropriate. That's not the case.

[0048] As can be seen from Figure 3, amorphous InGaZnO4 with oxygen vacancies has In other words, it is an amorphous oxide semiconductor with oxygen defects. In the band structure of a conductor, trap levels caused by oxygen vacancies exist deep within the band gap. It is assumed that the level is expressed as a

[0049] Based on the above considerations, the band diameter of an amorphous oxide semiconductor with oxygen vacancies is The graph is shown in Figure 4. The vertical axis is energy and the horizontal axis is DOS. The energy level Ev at the top of the conduction band (CB:Cond The energy gap up to the lower energy level Ec of the suction band is The experimental value was set to 3.15 eV.

[0050] The band diagram shown in Figure 4 shows the amorphous structure of the oxide semiconductor. The tail state is shown near the bottom of the conduction band. Dangling bonds in the amorphous oxide semiconductor are present at shallow energy levels. The hydrogen donor level is assumed to be approximately 1000 times lower than the conduction band minimum. The oxygen in the amorphous oxide semiconductor is at a deep energy level of 0.8 eV. The trap level caused by oxygen defects is shown. The values ​​of the energy levels will be explained in detail in the examples below.

[0051] Furthermore, based on the above considerations, it is possible to avoid such energy levels in the band gap, especially oxygen. In the case of amorphous oxide semiconductors with deep trap levels due to defects, The electron-hole recombination model of the band structure is shown in Figure 5(A) and Figure 5(B).

[0052] The recombination model shown in Figure 5(A) assumes that there are a sufficient number of holes in the valence band and that there are This is a recombination model when a sufficient number of electrons are present. By exposing the membrane to a light irradiation environment, a sufficient number of electron-hole pairs are generated, and the oxidation The band structure of a compound semiconductor is expressed by the recombination model shown in Figure 5(A). In the device, holes are trapped not only at the top of the valence band but also in deep trap levels caused by oxygen vacancies. is also generated.

[0053] The recombination model shown in Figure 5(A) assumes that two types of recombination processes occur in parallel. One recombination process is the interband recombination, where electrons in the conduction band recombine directly with holes in the valence band. The other recombination process is called recombination. This is a recombination process in which electrons recombine with holes in trap levels caused by elementary defects. Since recombination is more frequent than recombination at trap levels caused by oxygen vacancies, the valence band When the number of holes in the junction becomes sufficiently small, the interband recombination ends first. The recombination model shown in (A) is based on the assumption that electrons at the bottom of the conduction band are trapped in the positive trap level due to oxygen vacancies. The recombination process with the hole is the only one, and we move on to the recombination model shown in Figure 5(B).

[0054] In addition, the number of holes in the valence band and the number of electrons in the conduction band must be sufficient. To achieve this, the oxide semiconductor is irradiated with light for a sufficient period of time, and then the irradiation is stopped. As a result, recombination of electrons and holes occurs as shown in the recombination model in Figure 5(A). The time required for the current (also called photocurrent) flowing through the oxide semiconductor to decay is The relaxation time is compared with the relaxation time of the photocurrent in the recombination model shown in Figure 5(B). For details of these, please refer to the examples described below.

[0055] Next, the recombination model shown in FIG. 5(B) is a model in which the recombination model shown in FIG. 5(A) progresses and the valence This is a model of recombination after the number of holes in the electron band has been sufficiently reduced. In the model, the recombination process is almost entirely limited to recombination at trap levels caused by oxygen vacancies. Therefore, the number of electrons in the conduction band decreases gradually compared to the recombination model shown in Figure 5(A). During this recombination process, the electrons in the conduction band are gradually reduced in the oxide semiconductor film. This leads to the conclusion that interband recombination is the main recombination process, as shown in Figure 5(A ), the recombination model shown in Fig. 5(B) has a longer relaxation time for the photocurrent. For details of these, please refer to the examples described below.

[0056] Thus, the amorphous oxide semiconductor with deep trap levels due to oxygen defects Conductors have two types of recombination models for electron-hole pairs in the band structure, and the relaxation time of the photocurrent is In particular, the light in the recombination model shown in Figure 5(B) The delay in current relaxation can be observed by using the oxide semiconductor film in a transistor or the like and controlling the gate When a negative bias is applied to the electrode, a fixed charge is formed in the oxide semiconductor film or at the interface. In this way, oxygen defects in the oxide semiconductor film can cause the electric field of the oxide semiconductor film to decrease. It is believed that this has a negative effect on air conductivity.

[0057] However, in the oxide semiconductor film including a crystalline region according to one embodiment of the present invention, Since the oxide semiconductor film has good crystallinity compared to the amorphous oxide semiconductor film, the oxide semiconductor film has a high resistance to oxygen defects. Therefore, the crystalline region according to one embodiment of the present invention has reduced defects such as crystalline defects. The oxide semiconductor film containing the oxide semiconductor has stable electrical conductivity and is resistant to irradiation with visible light, ultraviolet light, etc. The oxide semiconductor including such a crystalline region has a more electrically stable structure. By using this film in transistors, highly reliable semiconductors with stable electrical characteristics can be produced. A conductor device can be provided.

[0058] The structure and the like described in this embodiment mode may be combined as appropriate with structures and methods described in other embodiments. They can be used in combination.

[0059] (Embodiment 2) In this embodiment, the oxide semiconductor film including the crystalline region described in Embodiment 1 is The transistors used and a manufacturing method of the transistors will be described with reference to FIGS. 6 to 10. FIG. 6 shows a top-gate structure transistor, which is one example of the configuration of a semiconductor device. 120 is a cross-sectional view showing the manufacturing process.

[0060] First, before an oxide semiconductor film including a crystalline region is formed, as shown in FIG. It is preferable to form an underlying insulating film 53 on the substrate 51 as shown in FIG.

[0061] The substrate 51 must have at least enough heat resistance to withstand subsequent heat treatment. When a glass substrate is used as the substrate 51, it is necessary to use a substrate having a distortion point of 730° C. or higher. The glass substrate is preferably made of, for example, aluminosilicate glass or aluminoboron glass. Glass materials such as silicate glass and barium borosilicate glass are used. It is preferable to use a glass substrate containing more BaO than the substrate 3. In this case, the size of the board is 1st generation (320mm x 400mm), 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm), 4th generation (680mm x 880mm) m, or 730mm x 920mm), 5th generation (1000mm x 1200mm or 100mm x 1250mm), 6th generation (1500mm x 1800mm), 7th generation (1 900mm x 2200mm), 8th generation (2160mm x 2460mm), 9th generation (2 400mm x 2800mm or 2450mm x 3050mm, 10th generation (295 Mother glass is used because the processing temperature is high and the processing time is long. If the processing time is long, the glass will shrink significantly. Therefore, when mass-producing using mother glass, The heat treatment in this step is preferably carried out at a temperature of 600° C. or less, and more preferably at a temperature of 450° C. or less.

[0062] Instead of the glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. A substrate made of an insulating material can be used. Alternatively, crystallized glass can be used. Furthermore, the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can be It is also possible to use a material having an insulating layer formed on its surface.

[0063] The base insulating film 53 is formed using an oxide insulating film from which part of oxygen is released by heating. As the oxide insulating film from which part of oxygen is released by heating, it is preferable that the oxide insulating film has a stoichiometric ratio of 0.1 to 0.2. It is preferable to use an oxide insulating film containing more oxygen than oxygen added by heating. By using an oxide insulating film from which part of the oxide is released as the base insulating film 53, heat treatment can be performed in a later step. When the heating is performed, oxygen can be diffused into the oxide semiconductor film. Typical oxide insulating films include silicon oxide, silicon oxynitride, and aluminum oxide. aluminum oxide nitride, gallium oxide, hafnium oxide, yttrium oxide, etc. It can be used.

[0064] The base insulating film 53 has a thickness of 50 nm or more, preferably 200 nm or more and 500 nm or less. By increasing the thickness of the base insulating film 53, the amount of oxygen released from the base insulating film 53 can be increased. The increase in the thickness of the insulating film 53 and the oxide semiconductor film to be formed later can be prevented. It is possible to reduce defects at the interface.

[0065] The base insulating film 53 is formed by a sputtering method, a CVD method, or the like. The oxide insulating film from which part of the oxygen is released can be easily formed by using a sputtering method. An oxide insulating film that releases part of the oxygen by heating can be formed by sputtering. When forming the film, it is preferable that the amount of oxygen in the film forming gas is high, and oxygen or oxygen and rare gas is Typically, the oxygen concentration in the deposition gas is 6% or more. It is preferable to set it to 00% or less.

[0066] The base insulating film 53 does not necessarily have to be an oxide insulating film from which part of oxygen is released by heating. It is not necessary to form the layer using silicon nitride, silicon nitride oxide, aluminum nitride, etc. Alternatively, the base insulating film 53 may be a combination of the oxide insulating film and the nitride insulating film. In this case, an oxide insulating film may be provided on a nitride insulating film. By using a nitride insulating film as the base insulating film 53, it is possible to When a glass substrate containing impurities such as alkali metals is used, the oxide semiconductor film Alkali metals such as lithium, sodium, and potassium can penetrate into oxide semiconductors. Since it is a harmful impurity against the oxide semiconductor film, it is preferable to reduce the content of the impurities in the oxide semiconductor film. The nitride insulating film can be formed by a CVD method, a sputtering method, or the like.

[0067] Next, as shown in FIG. 6(B), a sputtering method using a sputtering device is used. , an oxide including a region having crystallinity with a thickness of 30 nm or more and 50 μm or less on the base insulating film 53; A semiconductor film 55 is formed.

[0068] Here, the processing chamber of the sputtering device will be described with reference to FIG. An exhaust means 33 and a gas supply means 35 are connected to the processing chamber 31. A substrate support 40 and a target 41 are provided. The target 41 is connected to a power supply 37. To be continued.

[0069] The processing chamber 31 is connected to GND. The leak rate of the processing chamber 31 is set to 1×10 -10 Pa·m 3 / sec or less, impurities in the film formed by sputtering This can reduce the contamination.

[0070] To reduce the leak rate, it is necessary to reduce not only external leaks but also internal leaks. An external leak is when gas enters the vacuum system from outside due to a small hole or poor seal. Internal leaks are leaks from partitions such as valves in the vacuum system or from internal components. The leak rate is 1×10 -10 Pa·m 3 / sec or less It is necessary to take measures against both external and internal leaks.

[0071] To reduce external leakage, it is advisable to seal the opening and closing parts of the processing chamber with metal gaskets. Metal gaskets are coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal material. Metal gaskets have a higher adhesion than O-rings and are It can reduce leakage and also has passivation properties such as iron fluoride, aluminum oxide, and chromium oxide. By using a metal material coated with hydrogen, the released gases including hydrogen generated from the metal gasket can be reduced. This suppresses the noise and reduces internal leakage.

[0072] The inner wall of the processing chamber 31 is made of aluminum, which emits less gas including hydrogen. Chromium, titanium, zirconium, nickel or vanadium is used. Also, the above materials The alloy material containing iron, chromium, nickel, etc. may be coated with the material. Alloy materials containing nickel and the like are rigid, heat resistant, and easy to process. In order to reduce the surface area, if the surface irregularities of the component are reduced by polishing, the released gas Alternatively, the components of the sputtering device can be replaced with iron fluoride, aluminum oxide, etc. Alternatively, the metal may be coated with a passivating material such as aluminum or chromium oxide.

[0073] It is preferable that the components provided inside the processing chamber 31 are made of metal materials as much as possible. Even when installing a viewing window made of quartz or other materials, the surface should be covered to suppress gas emissions. A thin coating of passivating material such as iron fluoride, aluminum oxide, or chromium oxide is recommended.

[0074] Furthermore, a sputtering gas refiner is provided immediately before the sputtering gas is introduced into the processing chamber 31. In this case, the length of the piping from the refiner to the treatment chamber is preferably 5 m or less, The length of the piping should be 5m or less, or 1m or less, to reduce the amount of gas released from the piping. The influence of the noise can be reduced depending on the length.

[0075] The pipes for flowing sputtering gas from the cylinder to the processing chamber 31 are filled with iron fluoride and arsenic oxide. It is preferable to use metal piping whose inside is coated with a passivating material such as aluminum or chromium oxide. The aforementioned piping releases less gas, including hydrogen, than, for example, SUS316L-EP piping. This reduces the amount of impurities that get mixed into the deposition gas. It is recommended to use metal gasket fittings (UPG fittings). Also, use only metal piping materials. By using this material, the effects of released gas and external leaks are reduced compared to when resin is used. This is preferable because it can be reduced.

[0076] The processing chamber 31 is evacuated using a roughing pump such as a dry pump, a sputter ion pump, a tumble pump, etc. It is recommended to use a suitable combination of a high vacuum pump such as a molecular pump or a cryopump. While turbomolecular pumps are excellent at pumping large molecules, they have poor pumping capabilities for hydrogen and water. Therefore, we have developed a cryopump with high pumping capacity for water and a sputter pump with high pumping capacity for hydrogen. Combining it with a pump is effective.

[0077] The adsorbed substances present inside the processing chamber 31 are adsorbed to the inner wall and therefore do not affect the pressure in the processing chamber. However, it can cause gas emissions when the processing chamber is evacuated. Although there is no correlation with the speed, using a pump with high exhaust capacity will remove the adsorbed matter present in the treatment chamber. It is important to desorb as much as possible and evacuate the gas beforehand. The treatment chamber may be baked. Baking increases the desorption rate of adsorbed substances by about 10 times. Baking can be performed at a temperature between 100°C and 450°C. By introducing an inert gas while removing adsorbed substances, water and other substances that are difficult to remove by exhausting alone can be removed. The desorption rate can be further increased.

[0078] The exhaust means 33 exhausts impurities from the processing chamber 31 and controls the pressure in the processing chamber 31. It is preferable that the exhaust means 33 is an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. By using the adsorption vacuum pump, the amount of hydrogen contained in the oxide semiconductor film can be reduced. can be reduced.

[0079] Note that hydrogen contained in the oxide semiconductor film may be a hydrogen atom, a hydrogen molecule, water, a hydroxyl group, or may also be included as a hydride.

[0080] The gas supply means 35 supplies gas for sputtering the target into the processing chamber 31. The gas supply means 35 is a means for supplying gas. The gas supply means 35 is composed of a valve, a mass flow controller, etc. By providing the filter, it is possible to reduce impurities contained in the gas introduced into the processing chamber 31. The gases used to sputter the target are helium, neon, argon, and A rare gas such as fluorine or krypton is used. Alternatively, a mixed gas of one of the rare gases and oxygen is used. can be used.

[0081] The power supply 37 may be an RF power supply, an AC power supply, a DC power supply, or the like. Although not shown, a target support that supports the target may be provided inside or outside the target support. By providing a magnet, high density plasma can be confined around the target, and film deposition can be achieved. This method can improve the speed and reduce plasma damage to the substrate. Furthermore, in the magnetron sputtering method, By making the target rotatable, the bias of the magnetic field can be reduced, which increases the utilization efficiency of the target and This also reduces the variation in film quality within the surface of the substrate.

[0082] The substrate support 40 is connected to GND. The substrate support 40 is provided with a heater. As a heater, the heat generated by the heat conduction or heat radiation from a heating element such as a resistance heating element is A device for heating the material to be treated can be used.

[0083] As the target 41, it is preferable to use a metal oxide target containing zinc. A typical example of the target 41 is a quaternary metal oxide, In-Sn-Ga-Zn-O. In-Ga-Zn-O based metal oxides, ternary metal oxides, In-S n-Zn-O metal oxide, In-Al-Zn-O metal oxide, Sn-Ga-Zn-O Metal oxides, Al-Ga-Zn-O metal oxides, Sn-Al-Zn-O metal oxides and binary metal oxides such as In-Zn-O and Sn-Zn-O. Targets such as the following can be used.

[0084] As an example of the target 41, a metal oxide target containing In, Ga, and Zn is used. The composition ratio is In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. A target with a composition ratio of n2O3:Ga2O3:ZnO=1:1:2 [molar ratio] or a composition ratio of In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] The target has a composition ratio of In2O3:Ga2O3:ZnO=2:1:8 [molar ratio]. A target that does not change color can also be used.

[0085] The distance between the target 41 and the substrate 51 (TS distance) is set so that atoms with small atomic weights It is preferable that the interval be such that the light beam can reach the underlying insulating film 53 on the substrate 51 preferentially. .

[0086] As shown in FIG. 7(A), a substrate 51 having an underlying insulating film 53 formed on a substrate support 40 is , and is installed in the processing chamber 31 of the sputtering device. Next, gas is supplied from the gas supply means 35 to the processing chamber 3 A gas for sputtering the target 41 is introduced into the chamber 1. The purity of the target 41 is 9 The target 41 is then brought into contact with the substrate 41. As a result, the gas supply means 35 supplies the gas to the processing chamber 31. Ions 43 and electrons of the introduced sputtering gas sputter the target 41. Click here.

[0087] Here, the distance between the target 41 and the substrate 51 is set so that atoms with smaller atomic weights preferentially contact the substrate 51. 7( As shown in B), among the atoms contained in the target 41, the atom 45 with the small atomic weight is , can move toward the substrate side preferentially over atoms 47 with a larger atomic weight.

[0088] In the target 41, zinc has a smaller atomic weight than indium, etc. Zinc is preferentially deposited on the underlying insulating film 53. In addition, the atmosphere during film formation contains oxygen, and the substrate The support 40 is provided with a heater for heating the substrate and the deposited film during film formation. The zinc deposited on the film 53 is oxidized to form a seed crystal 55a having zinc-containing crystals with a hexagonal structure. Typically, a seed crystal having zinc oxide with a hexagonal crystal structure is formed. If an atom with a smaller atomic weight than zinc, such as aluminum, is included, the aluminum will be mixed with the zinc. Atoms having a smaller atomic weight than zinc, such as ammonium, are preferentially deposited on the underlying insulating film 53 .

[0089] The seed crystal 55a has bonds with a hexagonal lattice in the ab plane, and the ab plane is the film surface. It contains zinc with a hexagonal wurtzite structure, with the c-axis approximately parallel to the film surface and the c-axis approximately perpendicular to the film surface. The crystal has bonds with a hexagonal lattice in the ab plane, and the ab plane is The zinc-containing crystals have a hexagonal structure with the c-axis roughly parallel to the film surface and roughly perpendicular to the film surface. This will be explained using Figure 8. Here, as a representative example of a zinc-containing crystal with a hexagonal structure, , zinc oxide is used for explanation, and the black circle represents zinc and the white circle represents oxygen. 8(B) is a schematic diagram of zinc oxide with a hexagonal crystal structure, and in FIG. 8(B), the vertical direction of the paper is the c-axis direction. As shown in FIG. 8(A), the ab plane is On the upper plane of the ZnO film, zinc and oxygen atoms are bonded in a hexagonal shape. As shown in the figure, layers having bonds with a hexagonal lattice formed by zinc and oxygen are stacked, and the c-axis The direction is perpendicular to the ab plane. The seed crystal 55a has a hexagonal lattice in the ab plane. The layer having bonds has one or more atomic layers in the c-axis direction.

[0090] The target 41 is then sputtered with a sputtering gas to form a seed crystal. Atoms contained in the target are deposited on the surface of the seed crystal 55a, and at this time, the atoms are deposited with the seed crystal 55a as a nucleus. In order to grow a crystal, an oxide semiconductor including a region having hexagonal crystal structure is formed on the seed crystal 55a. The substrate 51 can be attached to a heater provided on the substrate support 40. The atoms deposited on the surface are oxidized using the seed crystal 55a as a nucleus. Crystals grow.

[0091] The oxide semiconductor film 55b is formed by growing atoms on the surface of the target 41 using the seed crystal 55a as a nucleus. The atoms with a larger atomic mass are sputtered after the formation of the seed crystal 55a. Since the crystal grows while being oxidized, the crystal has a hexagonal lattice structure on the ab plane, similar to the seed crystal 55a. The ab plane is approximately parallel to the film surface, and the c axis is approximately perpendicular to the film surface. That is, the seed crystal 55 a and the oxide semiconductor film 55 The oxide semiconductor film 55 having the structure b is formed in the ab plane, which is substantially parallel to the surface of the base insulating film 53. The crystallinity is a hexagonal structure with bonds forming a hexagonal lattice and the c-axis is roughly perpendicular to the film surface. That is, the oxide semiconductor film 55 includes a region having hexagonal crystallinity. 6B, the region where the seed crystal 55a and the oxide semiconductor film 55 are aligned along the c-axis. The interface in b is shown by a dotted line, and the description is of a stack of oxide semiconductor films. The illustration is not intended to be a comprehensive explanation, but is provided solely for ease of understanding.

[0092] At this time, the heating temperature of the substrate by the heater is preferably more than 200° C. and less than 400° C. The temperature is 250°C or higher and 350°C or lower. By heating the substrate between 0℃ and 350℃ while forming the film, heating can be performed simultaneously with film formation. Therefore, an oxide semiconductor film including a region having good crystallinity can be formed. During sputtering, the temperature of the surface to be deposited must be 250°C or higher. The temperature must be below the upper limit.

[0093] The sputtering gas may be a rare gas (typically argon), oxygen, or a rare gas and oxygen. The sputtering gas may be a mixture of hydrogen, water, hydroxyl group or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0094] The pressure in the processing chamber containing the substrate support 40 and the target 41 is set to 0.4 Pa or less. By this, it is possible to form an oxide semiconductor film having a crystalline structure on the surface thereof and in the film. This can reduce the inclusion of impurities such as hydrogen.

[0095] In addition, the leak rate of the sputtering equipment processing chamber was set to 1×10 -10 Pa·m 3 / seconds or more By setting the film thickness to below 100 nm, it is possible to form an acid film containing a crystalline region during film formation by sputtering. The inclusion of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides in the semiconductor film In addition, by using an adsorption type vacuum pump as the exhaust system, the exhaust system It is possible to reduce the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl radicals, or hydrides from the can.

[0096] Furthermore, by setting the purity of the target 41 to 99.99% or more, a crystalline region can be formed. The oxide semiconductor film containing the alkali metal, hydrogen, water, a hydroxyl group, or hydride is reduced. In addition, by using the target, the oxide semiconductor film 55 The lithium concentration is 5×10 15 cm -3 Less than 1 × 10 15 cm -3 below , the sodium concentration is 5 x 10 16 cm -3 Less than 1 × 10 16 cm -3 below , and more preferably 1 × 10 15 cm-3 The potassium concentration is 5 x 10 15 cm -3 Less than 1 × 10 15 cm -3 It can be as follows:

[0097] In the above-described film forming method, atoms contained in the target are Taking advantage of the difference in the amount of zinc, which has a smaller atomic weight, the zinc is preferentially deposited on the oxide insulating film to form seed crystals. At the same time, indium or other elements with a large atomic weight are deposited on the seed crystal while growing as crystals. In addition, an oxide semiconductor film including a crystalline region can be formed without multiple steps. Cut.

[0098] In the above-described method for forming the oxide semiconductor film 55, a seed crystal is formed by sputtering. The oxide semiconductor film 55a and the oxide semiconductor film 55b were simultaneously formed and crystallized. The oxide semiconductor film does not necessarily have to be formed in this manner. The deposition and crystallization of the semiconductor film may be carried out separately.

[0099] Hereinafter, the seed crystal and the oxide semiconductor film are formed and crystallized separately with reference to FIG. In addition, an oxide semiconductor film including a crystalline region can be formed as follows. This film formation method is sometimes referred to as the two-step method in this specification. The oxide semiconductor film including the crystalline region shown in the image was obtained by the two-step method. It was formed.

[0100] First, a first oxide semiconductor film having a thickness of 1 nm to 10 nm is formed on the base insulating film 53. The first oxide semiconductor film is formed by a sputtering method. The substrate temperature during film formation is preferably 200°C or higher and 400°C or lower. The film forming conditions are the same as those in the above-described method for forming the oxide semiconductor film.

[0101] Next, the atmosphere in the chamber in which the substrate is placed is changed to nitrogen or dry air, and the first heating process is performed. The temperature of the first heat treatment is 400°C or higher and 750°C or lower. The first oxide semiconductor film is crystallized by this, and a seed crystal 56a is formed (see FIG. 9A). ).

[0102] Although it depends on the temperature of the first heat treatment, crystallization occurs from the film surface due to the first heat treatment. This causes crystal growth from the surface of the film toward the inside, resulting in c-axis oriented crystals. The treatment causes zinc and oxygen to gather on the surface of the film, forming a hexagonal top surface. One or more layers of graphene-type two-dimensional crystals are formed on the outermost surface, and this is When the temperature of the heat treatment is increased, the layers grow from the surface to the inside, and then from the inside to the inside. Crystal growth proceeds from the top to the bottom.

[0103] In addition, an oxide insulating film from which part of oxygen is released by heating is used as the base insulating film 53. As a result, the oxygen in the base insulating film 53 is transported to the interface with the seed crystal 56a by the first heat treatment. or its vicinity (within ±5 nm from the interface), to form oxygen defects in the seed crystal 56a. can be reduced.

[0104] Next, a second oxide semiconductor film having a thickness of more than 10 nm is formed on the seed crystal 56a. The oxide semiconductor film is formed by sputtering, and the substrate temperature during the film formation is 2 The temperature is 00° C. or higher and 400° C. or lower. The film formation method is the same.

[0105] Next, the atmosphere in the chamber in which the substrate is placed is changed to nitrogen or dry air, and a second heating process is performed. The temperature of the second heat treatment is 400°C or higher and 750°C or lower. The second oxide semiconductor film is crystallized by this to form an oxide semiconductor film 56b (FIG. 9( The second heat treatment is carried out in a nitrogen atmosphere, an oxygen atmosphere, or a mixture of nitrogen and oxygen. By performing the treatment in an atmosphere, the density of the oxide semiconductor film 56b can be increased and the number of defects can be reduced. By the second heat treatment, crystals grow in the film thickness direction, that is, from the bottom to the inside, using the seed crystals 56a as nuclei. As a result, the oxide semiconductor film 56b including a crystalline region is formed. As a result, an oxide semiconductor film 56 consisting of the seed crystal 56a and the oxide semiconductor film 56b is formed. In FIG. 9B, the interface between the seed crystal 56a and the oxide semiconductor film 56b is indicated by a dotted line. Although it is described as a conductor laminate, there is no clear interface, and it is merely an easy-to-understand The illustration is for ease of explanation.

[0106] In addition, the steps from the formation of the base insulating film 53 to the second heat treatment are performed continuously without exposure to the atmosphere. The steps from the formation of the base insulating film 53 to the second heat treatment are preferably performed successively. An atmosphere that contains almost no oxygen or moisture (inert atmosphere, reduced pressure atmosphere, dry air atmosphere, etc.) For example, the moisture content is controlled to a dew point of -40°C or less, preferably It is preferable to use a dry nitrogen atmosphere with a dew point of -50°C or less.

[0107] In the above film formation method, atoms with small atomic weights are preferentially deposited on the oxide insulating film. Compared with the oxide semiconductor, even if the substrate temperature during film formation is low, it is possible to obtain an oxide semiconductor including regions with good crystallinity. The oxide semiconductor film formed by the above two-step method can be The oxide film 56 is also formed using a film formation method that preferentially deposits atoms with small atomic weights on the oxide insulating film. The oxide semiconductor film 55 has the same degree of crystallinity as the oxide semiconductor film 55 deposited thereon, and the electrical conductivity is stable. Regardless of the method used, the oxide semiconductor film has stable electrical characteristics and is reliable. In the following steps, a highly reliable semiconductor device can be provided. The manufacturing process of the transistor 120 will be described using the conductive film 55. A semiconductor film 56 may also be used.

[0108] Through the above steps, a stack of the seed crystal 55 a and the oxide semiconductor film 55 b is formed on the base insulating film 53. Next, the substrate 51 is subjected to heat treatment. The oxide semiconductor film 55 is heated to a temperature higher than that of the base insulating film 53. The oxide semiconductor film 55 and the vicinity of the interface between the base insulating film 53 and the oxide semiconductor film 55 are formed. It is preferable to disperse it.

[0109] The heat treatment temperature is set to a temperature at which hydrogen is released from the oxide semiconductor film 55 and the base insulating film 53 is heated. The temperature is preferably set to a temperature at which part of the oxygen contained in the oxide semiconductor film 55 is released and diffused into the oxide semiconductor film 55. Typically, the temperature is 150° C. or higher and lower than the strain point of the substrate 51, and preferably 250° C. or higher and 450° C. Note that the heat treatment temperature is set to the temperature at which the oxide semiconductor film including a crystalline region is formed. By increasing the temperature to a value higher than 500°C, a larger amount of oxygen contained in the base insulating film 53 can be released. can be done.

[0110] The heat treatment is carried out in an inert gas atmosphere, oxygen atmosphere, or nitrogen atmosphere that contains almost no hydrogen or moisture. It is preferable to carry out the treatment in an inert gas atmosphere, a mixed atmosphere of oxygen and nitrogen, etc. Typically, in a rare gas atmosphere such as helium, neon, argon, xenon, or krypton. The heating time for the heat treatment is preferably from 1 minute to 24 hours.

[0111] The heat treatment allows hydrogen to be released from the oxide semiconductor film 55 and the base insulating film 5 A part of the oxygen contained in the oxide semiconductor film 55, the base insulating film 53 and the oxide semiconductor film 5 By this process, the oxide semiconductor film 55 can be diffused into the vicinity of the interface between the oxide semiconductor film 55 and the oxide semiconductor film 55. As a result, the hydrogen concentration and oxygen defects are reduced. By using this method, an oxide semiconductor film including a region having crystallinity can be formed.

[0112] Next, as shown in FIG. 6C, a mask is formed over the oxide semiconductor film 55. The oxide semiconductor film 55 is selectively etched using the etching gas to form the oxide semiconductor film 59. After this, the mask is removed.

[0113] The mask for etching the oxide semiconductor film 55 is formed by a photolithography process. The oxide semiconductor film 55 can be formed by appropriately using a jet method, a printing method, or the like. The etching can be wet etching or dry etching as appropriate.

[0114] Next, as shown in FIG. 6(D), the source electrode 61a and the The drain electrode 61b is formed.

[0115] The source electrode 61a and the drain electrode 61b are made of aluminum, chromium, copper, or tantalum. , a metal element selected from titanium, molybdenum, tungsten, manganese, and zirconium; Or an alloy containing the above-mentioned metal elements as components, or an alloy combining the above-mentioned metal elements, etc. It can be formed by using titanium, tantalum, tungsten, etc. A metal element selected from the group consisting of silicon, molybdenum, chromium, neodymium, and scandium, or Alternatively, an alloy film or a nitride film may be used. The drain electrode 61b may have a single layer structure or a laminated structure of two or more layers. Single layer structure of aluminum film containing copper, two-layer structure of copper film laminated on Cu-Mg-Al alloy film Two-layer structure: titanium film laminated on aluminum film; titanium film laminated on titanium nitride film Two-layer structure with a tungsten film layered on a titanium nitride film, two-layer structure with a tantalum nitride film layered on a titanium nitride film Two-layer structure with a tungsten film on top, a titanium film, and an aluminum film on top of the titanium film There is also a three-layer structure in which a titanium film is formed on top of the laminated layer.

[0116] The source electrode 61a and the drain electrode 61b are made of indium tin oxide, tungsten oxide, or the like. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, oxide Indium oxide containing titanium, indium tin oxide containing titanium oxide, indium zinc Conductive materials with transparency such as indium tin oxide or silicon oxide are used. Also, a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element can be used. It can also be done as follows.

[0117] The source electrode 61a and the drain electrode 61b are formed by sputtering, CVD, or vapor deposition. After forming a conductive film by the above method, a mask is formed on the conductive film and the conductive film is etched to form the conductive film. The mask formed on the conductive film is made by printing, inkjet printing, or photolithography. The source electrode 61a and the drain electrode 61b can be formed by a printing method or a method using a thin film. Alternatively, it can be directly formed by an ink jet method.

[0118] Here, a conductive film is formed over the oxide semiconductor film 59 and the base insulating film 53, and then the conductive film The silicon dioxide is etched into a predetermined shape to form a source electrode 61a and a drain electrode 61b.

[0119] After the conductive film is formed over the oxide semiconductor film 55, an oxide semiconductor film is formed by etching the conductive film with an acid using a multi-tone photomask. The oxide semiconductor film 55 and the conductive film are etched to form the oxide semiconductor film 59 and the source electrode Alternatively, a mask having a concave and convex shape may be formed on the surface of the substrate 61a and the drain electrode 61b. After etching the oxide semiconductor film 55 and the conductive film using a mask, the unevenness is removed by ashing. Separating the mask and selectively etching the conductive film using the separated mask. Then, the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b are formed. This process can reduce the number of photomasks and photolithography steps. This can be done.

[0120] Next, a gate electrode is formed on the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b. A gate insulating film 63 is formed.

[0121] The gate insulating film 63 is made of silicon oxide, silicon oxynitride, silicon nitride, or silicon nitride oxide. Aluminum oxide, aluminum oxynitride, or gallium oxide in a single layer or laminated The gate insulating film 63 can be formed as a layer in contact with the oxide semiconductor film 59. It is preferable that the portion contains oxygen, and it is particularly preferable that the portion contains oxygen by heating, similarly to the base insulating film 53. The oxide insulating film is formed by using an oxide insulating film that releases oxygen. By using the silicon film, oxygen can be diffused into the oxide semiconductor film 59 during heat treatment in a later step. This allows the transistor 120 to have good characteristics.

[0122] The gate insulating film 63 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium Laminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. By using high-k materials, gate leakage can be reduced. Silicon, silicon oxynitride, silicon nitride, silicon nitride oxide, aluminum oxide, oxide The laminated structure can be formed with at least one of aluminum nitride and gallium oxide. The thickness of the gate insulating film 63 is 1 nm or more and 300 nm or less, and more preferably 5 nm or more. By making the thickness of the gate insulating film 63 5 nm or more, the gate The leak current can be reduced.

[0123] Before forming the gate insulating film 63, the surface of the oxide semiconductor film 59 is treated with oxygen, ozone, or the like. The surface of the oxide semiconductor film 59 is oxidized by exposing it to plasma of an oxidizing gas such as nitrous oxide. The oxygen vacancies may be reduced.

[0124] Next, a gate electrode is formed on the gate insulating film 63 in a region overlapping with the oxide semiconductor film 59. Form 65.

[0125] The gate electrode 65 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or titanium. a metal element selected from the group consisting of tin, manganese, and zirconium, or a metal element containing the above-mentioned metal elements; The metal element can be formed by using an alloy containing the metal element or an alloy combining the metal elements mentioned above. In addition, titanium, tantalum, tungsten, molybdenum, chromium, nickel, an alloy film made of a single or multiple combinations of metal elements selected from the group consisting of chromium, chromium, and scandium; Alternatively, a nitride film may be used. The gate electrode 65 may have a single layer structure or a laminated structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on a titanium nitride film; a two-layer structure in which a titanium film is laminated on a titanium nitride film; Two-layer structure with tungsten film stacked on tantalum film, and tungsten film stacked on tantalum nitride film A two-layer structure with a titanium film and an aluminum film stacked on top of that titanium film. There are also three-layer structures that form a titanium film on the surface.

[0126] The gate electrode 65 is made of indium tin oxide, indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide containing titanium oxide A light-transmitting conductive material such as indium tin oxide can also be used. In-Ga-Zn-O metal oxide was used as a target and sputtered in a nitrogen-containing atmosphere. A compound conductor obtained by coating may also be used. It is also possible to have a laminated structure of an electrically conductive material and the above metal element.

[0127] Furthermore, an insulating film 69 may be formed on the gate electrode 65 as a protective film (see FIG. 6(E)). After forming contact holes in the gate insulating film 63 and the insulating film 69, Wiring may be formed to connect to the source electrode 61a and the drain electrode 61b.

[0128] The insulating film 69 can be formed using an insulating film similar to that of the gate insulating film 63 as appropriate. Furthermore, when a silicon nitride film obtained by sputtering is formed as the insulating film 69, the external It is possible to prevent the intrusion of moisture and alkali metals from the inside, and the oxide semiconductor film 59 is The content of impurities can be reduced.

[0129] After the gate insulating film 63 or the insulating film 69 is formed, a heat treatment is performed. By the heat treatment, hydrogen is released from the oxide semiconductor film 59 and the base A part of the oxygen contained in the insulating film 53, the gate insulating film 63 or the insulating film 69 is converted into an oxide semiconductor The oxide semiconductor film 59, the vicinity of the interface between the base insulating film 53 and the oxide semiconductor film 59, and the gate insulating film 63 and the oxide semiconductor film 59 are The oxide semiconductor film 59 and the vicinity of the interface can be diffused by this process. The oxygen defects contained in the oxide semiconductor film 59 can be reduced, and the oxide semiconductor film 59 and the underlying Defects at the interface between the base insulating film 53 or the oxide semiconductor film 59 and the gate insulating film 63 are reduced. As a result, the oxide semiconductor film 59 in which the hydrogen concentration and oxygen defects are reduced can be obtained. In this way, it can be highly purified and can be formed into an i-type (intrinsic semiconductor) or i-type only. By forming an oxide semiconductor film with nearly no resistivity, a transistor with excellent characteristics can be realized. It is possible.

[0130] Through the above steps, an oxide semiconductor film including a crystalline region is formed in a channel region. The transistor 120 can be fabricated. 20 is a film formed by an insulating base 53 provided on a substrate 51 and an oxide film provided on the insulating base 53. The oxide semiconductor film 59 and the solenoids provided to be in contact with the top surface and side surfaces of the oxide semiconductor film 59 are The source electrode 61a and the drain electrode 61b are connected to a gate insulating film provided on the oxide semiconductor film 59. an insulating film 63 and a gate electrode provided on the gate insulating film 63 so as to overlap the oxide semiconductor film 59; 65 and an insulating film 69 provided on the gate electrode 65.

[0131] The oxide semiconductor film including the crystalline region used in the transistor 120 is entirely Since the oxide semiconductor film has good crystallinity compared to the amorphous oxide semiconductor film, The defects that cause defects and impurities such as hydrogen that bind to dangling bonds are reduced. These bonds to defects such as oxygen vacancies and dangling bonds. Hydrogen and the like function as a carrier supply source in the oxide semiconductor film. This can cause fluctuations in the electrical conductivity of the conductive film. The oxide semiconductor film including the region having the conductivity has stable electrical conductivity and is resistant to visible light, ultraviolet light, and other light. The region with such crystallinity has a structure that is more electrically stable against any irradiation. By using an oxide semiconductor film containing As a result, a highly reliable semiconductor device can be provided.

[0132] The semiconductor device according to the present invention is not limited to the transistor 120 shown in FIG. For example, a structure like that of a transistor 130 shown in FIG. The transistor 130 is formed by a base insulating film 53 provided on a substrate 51 and a thin film transistor 130 provided on the base insulating film 53. The source electrode 61a and the drain electrode 61b are connected to each other. The oxide semiconductor film 59 is provided so as to be in contact with the upper surface and side surfaces of the electrode 61b. A gate insulating film 63 provided on the conductor film 59 and a gate insulating film 64 overlapping the oxide semiconductor film 59 are formed. A gate electrode 65 is provided on the insulating film 63, and an insulating film 69 is provided on the gate electrode 65. That is, in the transistor 130, the oxide semiconductor film 59 is and the drain electrode 61b. It is different from Transistor 120.

[0133] Alternatively, a structure like that of a transistor 140 shown in FIG. The capacitor 140 is made up of an underlying insulating film 53 provided on a substrate 51 and a A gate electrode 65, a gate insulating film 63 provided on the gate electrode 65, and a gate insulating film 6 3 and the oxide semiconductor film 59 provided on the upper surface and the side surface of the oxide semiconductor film 59. The source electrode 61a and the drain electrode 61b are provided on the oxide semiconductor film 59. That is, the transistor 140 has a gate electrode 65 and an insulating film 69 formed thereon. The gate insulating film 63 is provided under the oxide semiconductor film 59, forming a bottom gate structure. In this respect, it differs from transistor 120.

[0134] Alternatively, a structure like that of a transistor 150 shown in FIG. The capacitor 150 includes an underlying insulating film 53 provided on a substrate 51 and a A gate electrode 65, a gate insulating film 63 provided on the gate electrode 65, and a gate insulating film 6 3, a source electrode 61a and a drain electrode 61b are provided on the and an oxide semiconductor film 59 provided in contact with the upper surface and side surfaces of the drain electrode 61b. , and an insulating film 69 provided over the oxide semiconductor film 59. That is, the transistor 15 0 is a bottom structure in which a gate electrode 65 and a gate insulating film 63 are provided under an oxide semiconductor film 59. It differs from transistor 130 in that it has a multi-gate structure.

[0135] As described above, the configurations, methods, etc. shown in this embodiment may be different from the configurations, methods, etc. shown in other embodiments. They can be used in appropriate combinations.

[0136] (Embodiment 3) In this embodiment, the oxide semiconductor film including the crystalline region described in the above embodiment is 11 and 12 are used for transistors with different structures. I will explain.

[0137] The top-gate transistor 160 shown in FIG. 11A is provided over a substrate 351. a metal oxide film 371 provided on the base insulating film 353; The oxide semiconductor film 359 provided over the oxide film 371 and the top surface of the oxide semiconductor film 359 and a source electrode 361a and a drain electrode 361b provided in contact with the side surfaces of the semiconductor layer 361a and the semiconductor layer 361b. A metal oxide film 373 provided over the oxide semiconductor film 359 and a metal oxide film 374 provided over the metal oxide film 373 The gate insulating film 363 overlaps with the oxide semiconductor film 359. and an insulating film 369 provided on the gate electrode 365. do.

[0138] That is, in the transistor 160, a metal film is formed between the base insulating film 353 and the oxide semiconductor film 359. A metal oxide film 371 is provided between the oxide semiconductor film 359 and the gate insulating film 363. The oxide film 373 is provided in the transistor 120 described in the above embodiment. The other components of the transistor 160 are the same as those of the transistors shown in the above embodiments. The same applies to the register 120. In other words, the details of the substrate 351 are the same as those of the substrate 51. For details of the base insulating film 353, see the description of the base insulating film 53. For details of the oxide semiconductor film 359, see the description of the base insulating film 53. The description of the oxide semiconductor film 59 is as follows: For details of b, see the description of the source electrode 61a and the drain electrode 61b. For details of 363, see the description of the gate insulating film 63. For details of the gate electrode 365, see The description of the gate electrode 65 can be taken into consideration.

[0139] The metal oxide film 371 and the metal oxide film 373 contain the same kind of compound as the oxide semiconductor film 359. It is preferable to use a metal oxide having the same components as the oxide semiconductor film. means that the oxide semiconductor film contains one or more atoms selected from the constituent metal atoms of the oxide semiconductor film. In particular, the crystalline structure of the oxide semiconductor film 359 is similar to that of the crystalline region of the oxide semiconductor film 359. In this way, the oxide semiconductor film 359 is preferably made of a constituent atom that can have the same structure as the oxide semiconductor film 359. The metal oxide film 371 and the metal oxide film 373 are formed using a metal oxide having the following components: Like the oxide semiconductor film 359, the oxide semiconductor film 354 preferably includes a region having crystallinity. The crystalline region has an ab plane approximately parallel to the film surface and a c axis approximately perpendicular to the film surface. In other words, the crystalline region is preferably made of crystals that are c-axis oriented. Furthermore, when the crystalline region is observed from a direction perpendicular to the film surface, When the crystalline structure is formed, it is preferable that the atoms are arranged in a hexagonal lattice pattern.

[0140] By providing the metal oxide film 371 including the crystalline region as described above, The c-axis orientation is continuous at the interface between the metal oxide film 371 and the oxide semiconductor film 359 and in the vicinity thereof. As a result, a region having high crystallinity can be formed between the metal oxide film 371 and the oxide semiconductor. At the interface with the organic film 359 and its vicinity, defects such as oxygen defects and dans Impurities such as hydrogen bonded to green bonds can be reduced. Similarly, the c-axis orientation is also continuous at the interface between the oxide semiconductor film 73 and the oxide semiconductor film 359 and its vicinity. A region having continuous crystallinity can be formed.

[0141] As mentioned above, defects such as oxygen vacancies and dangling bonds The hydrogen and other atoms bonded to the oxide semiconductor film act as carrier sources, Therefore, the oxide semiconductor film 359 is 1 and the metal oxide film 373 and their vicinity. In particular, the oxide semiconductor film 359 has stable electrical conductivity and is resistant to irradiation with visible light, ultraviolet light, or the like. The oxide semiconductor film 359 has a more electrically stable structure even when the oxide semiconductor film 359 is made of a metal oxide. By using the film 371 and the metal oxide film 373 in a transistor, stable electrical conductivity can be obtained. Therefore, it is possible to provide a highly reliable semiconductor device having excellent characteristics.

[0142] The metal oxide film 371 and the metal oxide film 373 may be, for example, an oxide semiconductor film 35 When an In-Ga-Zn-O-based metal oxide is used for 9, a metal oxide containing gallium oxide is used. In particular, metal oxides such as Ga-Zn-O, which are gallium oxides doped with zinc oxide, are used. The Ga-Zn-O metal oxide is formed by using zinc oxide as the gallium oxide. The amount of the substance should be less than 50%, more preferably less than 25%. The Ga-Zn-O metal oxide and the In-Ga-Zn-O metal oxide were contacted. In this case, the energy barrier is set to about 0.5 eV on the conduction band side and about 0.7 eV on the valence band side. It is possible.

[0143] Since the oxide semiconductor film 359 is used as an active layer, the metal oxide film 371 and the metal The energy gap of the oxide film 373 is larger than that of the oxide semiconductor film 359. In addition, the thickness between the metal oxide film 371 and the oxide semiconductor film 359 is required to be larger than the thickness between the metal oxide film 371 and the oxide semiconductor film 359. Alternatively, a layer of a temperature at least equal to room temperature (20° C.) may be formed between the metal oxide film 373 and the oxide semiconductor film 359. In this case, an energy barrier is formed to a degree that carriers do not flow out of the oxide semiconductor film 359. For example, the lower end of the conduction band of the metal oxide film 371 or the metal oxide film 373 and the oxide The energy difference between the lower end of the conduction band of the metal oxide semiconductor film 359 and the lower end of the conduction band of the metal oxide film 371 or The upper end of the valence band of the metal oxide film 373 and the upper end of the valence band of the oxide semiconductor film 359 The energy difference is preferably 0.5 eV or more, and more preferably 0.7 eV or more. It is also desirable that the potential be 1.5 eV or less.

[0144] The energy gap of the metal oxide film 371 is the same as that of the insulating film 353. The energy gap of the metal oxide film 373 is smaller than that of the gate insulating film 363. It is preferable that the energy gap is smaller than the energy gap.

[0145] 12, the transistor 160, that is, the gate insulating layer 365 is The insulating film 363, the metal oxide film 373, the oxide semiconductor film 359, the metal oxide film 371 and the The energy band diagram (schematic diagram) of the structure in which the insulating film 353 is bonded is shown in FIG. 3, from the gate electrode 365 side, the gate insulating film 363, the metal oxide film 373, and the oxide semiconductor film 359, the metal oxide film 371, and the underlying insulating film 353 are all intrinsic. Assuming a typical situation, silicon oxide (band The gap Eg8eV~9eV is set to Ga-Zn-O metal oxide ( The band gap (Eg4.4 eV) is achieved by using an In-Ga-Zn-O system as an oxide semiconductor film. The figure shows the case where metal oxide (band gap Eg 3.2 eV) is used. The energy difference between the vacuum level and the bottom of the conduction band of silicon dioxide is 0.95 eV. The energy difference between the vacuum level and the conduction band edge of O-based metal oxides is 4.1 eV. The energy difference between the vacuum level and the bottom of the conduction band of a-Zn-O metal oxides is 4.6 eV. .

[0146] As shown in FIG. 12, the oxide semiconductor film 359 has an oxide layer on the gate electrode side (channel side). The interface between the compound semiconductor film 359 and the metal oxide film 373 is filled with energies of about 0.5 eV and about 0.7 eV. Similarly, the back channel side (gate electrode) of the oxide semiconductor film 359 The oxide semiconductor film 359 and the metal oxide film 371 are also electrically connected to each other at a temperature of about 0.5 e V and an energy barrier of approximately 0.7 eV exist at the interface between an oxide semiconductor and a metal oxide. In this case, the existence of such an energy barrier prevents carriers from Since the movement of the oxide semiconductor film 359 is hindered, the carriers are transferred from the oxide semiconductor film 359 to the metal oxide film 371 or does not move to the metal oxide film 373 but moves through the oxide semiconductor. The semiconductor film 359 is made of a material having a band gap gradually larger than that of an oxide semiconductor (herein In the case of the oxide semiconductor, the carriers are transported between the metal oxide film and the insulating film. Moves through the membrane.

[0147] There is no particular limitation on the method for forming the metal oxide film 371 and the metal oxide film 373. For example, Metal oxide films 371 and 372 are formed using deposition methods such as plasma CVD and sputtering. It is possible to produce a metal oxide film 373. In addition, it is said that hydrogen and water are hardly mixed in. On the other hand, in terms of improving the quality of the film, Plasma CVD method is suitable. When a Ga-Zn-O metal oxide film is used as 3, the use of zinc makes it possible to The improved conductivity of metal oxides makes it possible to fabricate them using DC sputtering. can.

[0148] The semiconductor device according to the present invention is not limited to the transistor 160 shown in FIG. For example, a structure like that of a transistor 170 shown in FIG. The transistor 170 includes a base insulating film 353 provided over a substrate 351 and a base insulating film 354. A metal oxide film 371 formed on the metal oxide film 353 and an oxide film formed on the metal oxide film 371 The semiconductor film 359 and the solenoids provided in contact with the top surface and the side surface of the oxide semiconductor film 359 are The source electrode 361 a, the drain electrode 361 b, and a gate insulating film 361 b provided over the oxide semiconductor film 359 The gate insulating film 363 and the oxide semiconductor film 359 are overlapped with each other and provided over the gate insulating film 363. The insulating film 369 is provided on the gate electrode 365. That is, in the transistor 170, a metal oxide semiconductor film is formed between the oxide semiconductor film 359 and the gate insulating film 363. The transistor 160 differs from the transistor 160 in that the oxide film 373 is not provided.

[0149] Alternatively, a structure like that of a transistor 180 shown in FIG. The capacitor 180 includes a base insulating film 353 provided on a substrate 351 and a thin film The oxide semiconductor film 359 is formed by the insulating film 354 so as to be in contact with the top surface and the side surface of the oxide semiconductor film 359. The source electrode 361 a and the drain electrode 361 b are provided on the oxide semiconductor film 359. a metal oxide film 373 formed on the gate insulating film 3 63, a gate electrode provided over the gate insulating film 363 and overlapping with the oxide semiconductor film 359 365 and an insulating film 369 provided on the gate electrode 365. The metal oxide film 371 is formed between the base insulating film 353 and the oxide semiconductor film 359. This differs from the transistor 160 in that it is not provided.

[0150] In this embodiment, the transistors shown in FIGS. , a top gate structure, and the source electrode 361a and the drain electrode 361b are made of oxide. The semiconductor device according to the present invention has a structure in which the upper surface and the side surface of the semiconductor film 359 are in contact with each other. However, the present invention is not limited to this. ) may have a bottom gate structure, or may be an oxide semiconductor. The body film 359 contacts the top and side surfaces of the source electrode 361a and the drain electrode 361b. The structure may be such that the electrodes are provided as follows.

[0151] As described above, the configurations, methods, etc. shown in this embodiment may be different from the configurations, methods, etc. shown in other embodiments. They can be used in appropriate combinations.

[0152] (Fourth embodiment) In this embodiment, at least a part of the driver circuit and a transistor disposed in the pixel portion are formed on the same substrate. An example of fabricating a transistor will be described below.

[0153] The transistors arranged in the pixel portion are formed according to the second or third embodiment. Since the transistor can be easily made into an n-channel type, the n-channel type A part of the driver circuit, which can be configured with transistors, is mounted on the same substrate as the transistors in the pixel portion. In this way, when the transistor described in the above embodiment is used in a pixel portion or a driver circuit, This makes it possible to provide a highly reliable display device.

[0154] An example of a block diagram of an active matrix display device is shown in FIG. On the substrate 500, a pixel section 501, a first scanning line driving circuit 502, a second scanning line driving circuit 503, and a The pixel portion 501 has a signal line driver circuit 503 and a signal line driver circuit 504. A plurality of scanning lines are arranged extending from a first scanning line driving circuit 502 and a second scanning line driving circuit 504. The scanning line driving circuit 503 is extended and disposed. In each of the display devices, pixels each having a display element are arranged in a matrix. The board 500 is a connecting part for FPC (Flexible Printed Circuit) and the like. It is connected to a timing control circuit (also called a controller or control IC) via

[0155] In FIG. 29A, a first scanning line driver circuit 502, a second scanning line driver circuit 503, a signal The line driver circuit 504 is formed on the same substrate 500 as the pixel section 501. The number of components such as drive circuits to be provided is reduced, which contributes to cost reduction. 500 If an external drive circuit is provided, the wiring must be extended, increasing the number of connections between the wiring. When a driving circuit is provided on the same substrate 500, the number of connections between the wirings can be reduced. This can improve reliability or yield.

[0156] An example of the circuit configuration of the pixel section is shown in Figure 29(B). The pixel structure of the

[0157] This pixel structure has multiple pixel electrode layers in one pixel, and each pixel electrode layer has a transistor. Each transistor is configured to be driven by a different gate signal. That is, in a pixel with a multi-domain design, each pixel electrode layer The applied signals are independently controlled.

[0158] The gate wiring 512 of the transistor 516 and the gate wiring 513 of the transistor 517 are separated so that different gate signals can be applied. The source electrode layer or drain electrode layer 514 functioning as a transistor 516 is connected to the transistor 516. Transistors 516 and 517 are used in common. The transistor shown in the above embodiment can be appropriately used. A display panel can be provided.

[0159] A first pixel electrode layer electrically connected to the transistor 516 and a second pixel electrode layer electrically connected to the transistor 517 are The second electrically connected pixel electrode layer has a different shape and is separated by a slit. The second pixel electrode layer is formed so as to surround the outside of the first pixel electrode layer that spreads in a V shape. The timing of the voltages applied to the first pixel electrode layer and the second pixel electrode layer is controlled by a transistor. The alignment of the liquid crystal is controlled by varying the polarity of the polarity of the capacitor 516 and the polarity of the transistor 517 . The transistor 516 is connected to the gate wiring 512, and the transistor 517 is connected to the gate wiring 51 3. The gate wiring 512 and the gate wiring 513 are connected to each other by applying different gate signals. This allows the operation timing of the transistors 516 and 517 to be different. Cut.

[0160] Also, the capacitor wiring 510, the gate insulating film functioning as a dielectric, and the first pixel electrode layer Alternatively, a storage capacitor is formed by the second pixel electrode layer and a capacitor electrode electrically connected thereto.

[0161] The first pixel electrode layer, the liquid crystal layer, and the counter electrode layer are overlapped with each other, so that the first liquid crystal element 518 In addition, the second pixel electrode layer, the liquid crystal layer, and the counter electrode layer are overlapped with each other, so that the first A first liquid crystal element 518 and a second liquid crystal element 519 are formed in one pixel. It is a multi-domain structure provided with a crystal element 519.

[0162] Note that the pixel configuration shown in FIG. 29(B) is not limited to this. For example, The pixel shown may be newly equipped with a switch, a resistor, a capacitor, a transistor, a sensor, or a logic circuit. etc. may be added.

[0163] An example of the circuit configuration of the pixel section is shown in Figure 29(C). 1 shows the pixel structure of the display panel.

[0164] In an organic EL element, when a voltage is applied to the light-emitting element, electrons and positive electrodes are released from a pair of electrodes. The holes are then injected into a layer containing a light-emitting organic compound, allowing a current to flow. The recombination of carriers (electrons and holes) causes light-emitting organic compounds to form excited states. The excited state is formed, and light is emitted when the excited state returns to the ground state. Such a light-emitting element is called a current-excited light-emitting element.

[0165] FIG. 29(C) shows an example of a semiconductor device having a pixel configuration to which digital time gray scale driving can be applied. FIG.

[0166] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. In this paper, we consider an n-channel transistor using an oxide semiconductor layer for the channel formation region. Here is an example using two elements.

[0167] The pixel 520 includes a switching transistor 521, a driving transistor 522, and a light emitting element. The switching transistor 521 has a gate element 524 and a capacitor element 523. The source electrode layer is connected to the scanning line 526, and the first electrode (one of the source electrode layer and the drain electrode layer) is connected to the scanning line 526. The first electrode (the other of the source electrode layer and the drain electrode layer) is connected to a signal line 525, and the second electrode (the other of the source electrode layer and the drain electrode layer) is connected to a signal line 525. It is connected to the gate electrode layer of the driving transistor 522. The gate electrode layer is connected to a power supply line 527 via a capacitor element 523, and the first electrode is connected to the power supply line 527, and the second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 524. The second electrode of the light emitting element 524 corresponds to the common electrode 528. The common electrode 528 is formed on the same substrate. It is electrically connected to the common potential line formed thereon.

[0168] The switching transistor 521 and the driving transistor 522 are the same as those in the previous embodiment. This allows for a highly reliable organic EL device. It is possible to provide a display panel using the above.

[0169] A low power supply potential is set to the second electrode (common electrode 528) of the light emitting element 524. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 527. <A potential that satisfies the high power supply potential, and examples of the low power supply potential include GND and 0V. The potential difference between the high power supply potential and the low power supply potential may be applied to the light emitting element 524, In order to make the light emitting element 524 emit light by passing a current through the light emitting element 524, a high power supply potential and a low power supply potential are The potentials are set so that the potential difference between the two is equal to or greater than the forward threshold voltage of the light emitting element 524. Set it up.

[0170] The capacitance element 523 can be omitted by substituting the gate capacitance of the driving transistor 522. The gate capacitance of the driving transistor 522 can be calculated by the following equation: A capacitance may be formed between the gate electrode layer and the transistor.

[0171] In the case of a voltage input voltage driving system, the gate electrode layer of the driving transistor 522 In other words, the driving transistor 522 is in two states, either fully on or off. In other words, the driving transistor 522 is operated in the linear region. The driving transistor 522 is operated in a linear region, so that the voltage is higher than the voltage of the power supply line 527. A high voltage is applied to the gate electrode layer of the driving transistor 522. A voltage equal to or greater than (power supply line voltage+Vth of driving transistor 522) is applied.

[0172] Also, when analog grayscale driving is used instead of digital time grayscale driving, the input of the signal is changed. By doing so, the same pixel configuration as in FIG. 29(C) can be used.

[0173] When analog gradation driving is performed, the gate electrode layer of the driving transistor 522 is connected to the light emitting element 5 A voltage equal to or greater than the forward voltage of the light emitting element 524 plus the Vth of the driving transistor 522 is applied. The forward voltage of 24 refers to the voltage required to achieve the desired brightness, and is at least It should be noted that the driving transistor 522 is operated in the saturation region. By inputting a signal, a current can be passed through the light emitting element 524. In order to operate the driving transistor 522 in the saturation region, the potential of the power supply line 527 is By converting the video signal into an analog signal, the light emitting element 524 can receive the video signal. A current corresponding to a video signal is passed through the pixel, and analog gray scale driving can be performed.

[0174] Note that the pixel configuration shown in FIG. 29(C) is not limited to this. For example, The pixel shown may be newly equipped with a switch, a resistor, a capacitor, a sensor, a transistor, a logic circuit, etc. Any of these may be added.

[0175] (Embodiment 5) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television (also called digital receivers), computer monitors, digital cameras, digital video cameras cameras such as digital cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) (c), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the display devices described in the above embodiments will be described. Reveal.

[0176] FIG. 30(A) shows a portable information terminal, which includes a main body 1001, a housing 1002, a display unit 1003, and a display unit 1004. The display unit 1003a, 1003b, etc. The display unit 1003b is a touch panel. By touching the keyboard button 1004 displayed on the display unit 1003b, Of course, the display unit 1003a can be configured as a touch panel. The transistor described in the above embodiment may be used as a switching element to form a liquid crystal panel. By fabricating a display panel or an organic light-emitting panel and applying it to the display parts 1003a and 1003b, This makes it possible to provide a highly reliable portable information terminal.

[0177] The portable information terminal shown in FIG. 30(A) displays various information (still images, moving images, text images, etc.) Functions that display calendars, dates, or times on the display, functions that display Functions for manipulating or editing displayed information, processing by various software (programs) In addition, external connection terminals can be provided on the back and sides of the housing. It may also be configured to include a connector (such as an earphone jack or USB terminal), a recording medium insertion section, etc.

[0178] The portable information terminal shown in FIG. 30(A) is configured to be capable of transmitting and receiving information wirelessly. You can also purchase and download desired book data from an electronic book server wirelessly. It is also possible to configure it so that it is downloaded.

[0179] FIG. 30(B) shows a portable music player, and the main body 1021 has a display unit 1023 and earphones. The device has a fixing part 1022 for attaching to a speaker, an operation button 1024, an external memory slot, and The transistors described in the above embodiments are used as switching elements. By manufacturing a liquid crystal panel or an organic light-emitting panel as a display unit 1023, This makes the portable music player more reliable.

[0180] Furthermore, the portable music player shown in Figure 30(B) is equipped with an antenna, microphone function, and wireless function. If you carry it and connect it to your mobile phone, you can enjoy wireless hands-free driving while driving a car. Conversations in Lee are also possible.

[0181] FIG. 30C shows a mobile phone, which is composed of two housings, a housing 1030 and a housing 1031. The housing 1031 is provided with a display panel 1032, a speaker 1033, a microphone, and the like. a phone 1034, a pointing device 1036, a camera lens 1037, an external connection terminal The housing 1030 also includes a solar cell for charging the mobile phone. The device is equipped with a cell 1040, an external memory slot 1041, etc. The transistor described in the above embodiment is incorporated in the display panel 103. By applying this to 2, a highly reliable mobile phone can be achieved.

[0182] The display panel 1032 is equipped with a touch panel, and the image displayed on the display panel 1032 is shown in FIG. The multiple operation keys 1035 are shown by dotted lines. A boost circuit is also implemented to boost the input voltage to the voltage required for each circuit.

[0183] For example, a power transistor used in a power supply circuit such as a booster circuit may be used in the same manner as in the above embodiment. The thickness of the oxide semiconductor film of the transistor shown is 2 μm to 50 μm. It is possible.

[0184] The display direction of the display panel 1032 changes appropriately depending on the usage mode. The camera lens 1037 is located on the same surface as the lens 1032, so video calls are possible. The speaker 1033 and the microphone 1034 are not limited to voice calls, but also to video calls. Furthermore, the housing 1030 and the housing 1031 can be slid apart. As shown in Figure 30(C), it can be folded from the unfolded state to the overlapped state, making it easy to carry. Suitable miniaturization is possible.

[0185] The external connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 1041, it is possible to store and transfer a larger amount of data. Cut.

[0186] In addition to the above functions, it also has infrared communication functions, TV reception functions, etc. Good too.

[0187] FIG. 30(D) shows an example of a television device. The television device 1050 is A display unit 1053 is built into the housing 1051. The display unit 1053 displays an image. In addition, the stand 1055 with the built-in CPU can be used to display the chassis. The transistor shown in the above embodiment is used for the display unit. By applying the present invention to the television set 1053, a highly reliable television set 1050 can be obtained. Cut.

[0188] The television device 1050 can be operated using an operation switch provided on the housing 1051 or a separate remote control. This can be done by a remote control operation device. A display unit may be provided to display information output from the device.

[0189] The television device 1050 is configured to include a receiver, a modem, and the like. It is possible to receive general television broadcasts, and also to receive wired or wireless signals via a modem. By connecting to a communication network, it can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between a sender and a receiver, or between receivers). .

[0190] The television device 1050 also includes an external connection terminal 1054 and a storage medium playback / recording unit 1055. 052, and an external memory slot. The external connection terminal 1054 is for connecting a USB cable or the like. It can be connected to any type of cable, enabling data communication with a personal computer, etc. In the storage medium playback / recording unit 1052, a disk-shaped recording medium is inserted and It is possible to read the stored data and write it to the recording medium. Images and videos stored in the external memory 1056 inserted in the reslot It is also possible to display it on the display unit 1053.

[0191] In addition, the semiconductor device described in the above embodiment can be applied to the external memory 1056 or the CPU. This results in a television device 1050 with sufficiently reduced power consumption and high reliability. This can be done. [Example]

[0192] In the present example, various measurement methods were used to measure the oxide semiconductor film or the oxide film according to the present invention. The results of measurements performed on a semiconductor device using a nitride semiconductor film will be described below.

[0193] <1. TEM image observation, electron beam diffraction intensity measurement, and XRD measurement> In this section, an oxide semiconductor film is formed according to the above embodiment. Transmission electron microscope (TEM) We will explain the results of observations made using a scope.

[0194] In this section, an oxide semiconductor film is formed on a quartz substrate by sputtering. Sample A, Sample B, Sample C, Sample D and Sample E were prepared. The substrate temperatures during film formation for Sample B, Sample C, Sample D, and Sample E were The temperatures were room temperature, 200°C, 250°C, 300°C and 400°C. For sample B, the substrate temperature during film formation was lower than that of sample C. For Sample E, the substrate temperature was set within the range described in the film formation method shown in the second embodiment. The semiconductor film deposition target was In2O3:Ga2O3:ZnO=1:1:2 [mol number The other film formation conditions were as follows: the flow rate of the film formation gas was argon gas 30 The pressure was 0.4 Pa and the substrate-target distance was 6 The sample A, sample B, and sample C were set to 0.0 mm and the RF power was set to 0.5 kW. Sample E was formed with a film thickness of 50 nm, while Samples C and D were formed with a film thickness of 100 nm. The film was formed with this goal in mind.

[0195] After the oxide semiconductor film is formed, the quartz substrate on which the oxide semiconductor film is formed is subjected to heat treatment. The heat treatment was carried out in a dry atmosphere with a dew point of -24°C, at a heating temperature of 450°C, and for a heating time of 1000kJ / min. The time required for deposition was 1 hour. In this way, the oxide semiconductor film was deposited on the quartz substrate. Samples A, B, C, D and E were prepared.

[0196] Moreover, unlike Samples A to E, the two-step method shown in the second embodiment was used. Sample F was fabricated by forming an oxide semiconductor film using the above method. A first oxide semiconductor film is formed, and the first oxide semiconductor film is subjected to first heat treatment. A second oxide semiconductor film having a thickness of 30 nm was formed on the oxide semiconductor film, and the first oxide semiconductor film The second oxide semiconductor film was subjected to second heat treatment.

[0197] Here, the film formation target for the first oxide semiconductor film is In2O3:Ga2O3:ZnO The other film formation conditions were as follows: The flow rates were argon gas 30 sccm and oxygen gas 15 sccm, the pressure was 0.4 Pa, and the base The plate-target distance was 60 mm, and the radio frequency (RF) power supply was 0.5 kW. The heat treatment conditions were a nitrogen atmosphere, a heating temperature of 650° C., and a heating time of 1 hour.

[0198] The film formation target for the second oxide semiconductor film was In2O3:Ga2O3:ZnO= The composition ratio of the film was 1:1:2 [molar ratio]. The flow rate was 30 sccm of argon gas and 15 sccm of oxygen gas, the pressure was 0.4 Pa, and the substrate -The target distance was 60 mm, and the radio frequency (RF) power supply was 0.5 kW. The treatment conditions were a dry atmosphere with a dew point of -24°C, a heating temperature of 650°C, and a heating time of 1 hour. Ta.

[0199] In this way, an oxide semiconductor film was formed on a quartz substrate using the two-step method. Pull F was prepared.

[0200] In addition, as a comparison of Samples A to F, yttria-stabilized zirconia (Y Sample G was prepared by depositing a 150 nm thick IGZO single crystal film on a SZ substrate. .

[0201] For the above samples A to G, the oxide semiconductor films were formed using TEM. The electron beam is irradiated perpendicularly to the substrate, that is, parallel to the c-axis direction in the previous embodiment. TEM images and electron diffraction patterns were taken. 13 shows cross-sectional TEM images of samples A to E, respectively. In the area TEM image, the upper side of the paper corresponds to the surface direction of the sample, so the vertical direction of the paper corresponds to the c-axis direction. 14(A) to 14(E) show planar TEM images of Samples A to E. In the planar TEM image shown in Fig. 14, the front side of the paper is the surface of the sample. 15(A) to 15(C), the direction perpendicular to the paper surface is the c-axis direction. E) shows the electron diffraction patterns of Samples A to E, respectively. In the electron beam diffraction pattern shown in 5, the surface of the paper is the surface direction of the sample, so the perpendicular direction to the paper is The perpendicular direction is the c-axis direction. The planar TEM images of sample G and sample G are shown in Fig. 16(C). The electron diffraction patterns of sample G are shown in Fig. 16(D) and Fig. 16(E). Here, the planar TEM image and electron diffraction pattern shown in Figure 16 are taken from the sample on the front side of the paper. Since the direction of the c-axis is the surface direction of the pull, the direction perpendicular to the paper surface is the c-axis direction.

[0202] In this section, cross-sectional TEM images, planar TEM images, and electron diffraction patterns are The electron beam spot diameter was set to 1 / 320 mm using the H-9000NAR manufactured by Hitachi High-Technologies Corporation. The image was taken at 1 nm and an accelerating voltage of 300 kV.

[0203] The cross-sectional TEM images shown in Figures 13(C) to 13(E) show that the c-axis oriented crystals In the cross-sectional TEM images shown in Figures 13(A) and 13(B), The region with crystalline c-axis orientation was not clearly observed. By setting the substrate temperature during film formation to be higher than 200°C, preferably 250°C or higher, the c-axis It can be seen that a region having crystallinity in which the crystal orientation is oriented is formed in the oxide semiconductor film. The regions with crystalline orientation of the c-axis are clearly seen in the order of Figs. 13(C) to 13(E). Therefore, the higher the substrate temperature during the deposition of the oxide semiconductor film, the higher the crystallinity of the oxide semiconductor film. It is expected that this will become more common.

[0204] In the planar TEM image shown in Figure 14(E), atoms arranged in a hexagonal lattice were observed. In addition, the planar TEM images shown in Figures 14(C) and 14(D) also show a hexagonal lattice structure. The atoms arranged in a tetragonal pattern were faintly observed. In the M image, the atoms arranged in a hexagonal lattice were not clearly observed. The planar TEM images shown in Figures 16(A) and 16(B) also show the hexagonal lattice-shaped This indicates that the oxide semiconductor film has a region with crystallinity in which the c-axis is aligned. It is estimated that ZnO tends to have a hexagonal crystal structure with three-fold symmetry, as shown in Figure 2. In addition, sample F, which was fabricated using the 2-step method, was also fabricated using the same method as samples C to E. It was found that a crystalline region was formed in the oxide semiconductor film. As with the cross-sectional TEM image observation results, the higher the substrate temperature during the deposition of the oxide semiconductor film, It is presumed that the crystallinity of the oxide semiconductor film increases. Therefore, Sample A and Sample B are oxides of amorphous structure with almost no crystallinity. Samples C to F contain regions with c-axis oriented crystallinity. It can be seen that the oxide semiconductor film is

[0205] The electron beam diffraction patterns shown in FIGS. 15(A) to 15(E) have a wide diffraction pattern width. It is a blurred concentric halo pattern, with the outer halo pattern being more prominent than the inner halo pattern. The electron beam diffraction intensity is weaker in the halo pattern. 5(E), the electron diffraction intensity of the outer halo pattern tends to increase. In addition, the electron diffraction pattern shown in FIG. 16(C) also becomes a concentric halo pattern. However, compared with Figures 15(A) to 15(E), the width of the halo pattern is narrower, and the inner halo The electron beam diffraction intensity of the low pattern and the outer halo pattern is almost the same.

[0206] The electron beam diffraction pattern shown in FIG. 16(D) is the same as that shown in FIGS. 15(A) to 15(E) and Unlike Figure 16(C), a spot-shaped electron diffraction pattern appears. The electron diffraction pattern shown in Fig. 16(E) was processed to produce a concentric pattern. ), but unlike Figures 15(A) to 15(E) and Figure 16(C), The width of the turn is narrow, so it does not form a halo. Also, the outer circle pattern is smaller than the inner concentric circle pattern. The concentric pattern in Fig. 15(A) also has a stronger electron beam diffraction intensity. ) to 15(E) and 16(C).

[0207] FIG. 17 shows graphs of the electron beam diffraction intensities of Samples A to G. The vertical axis represents the electron diffraction intensity (arbitrary units) and the horizontal axis represents the magnitude of the scattering vector of the sample. The magnitude of the scattering vector (1 / d[1 / nm]) is taken as the ) corresponds to the interplanar spacing of the crystal. Here, the magnitude of the scattering vector (1 / d) shows the concentricity of the diffracted wave from the central transmitted wave spot in the film of the electron beam diffraction pattern. The distance to the circular pattern, r, and the distance between the sample and the film in the TEM, cam, are It can be expressed by the following formula using the wavelength L of the electron beam irradiated by the TEM and the wavelength λ of the electron beam.

[0208]

number

[0209] That is, the magnitude (1 / d) of the scattering vector shown on the horizontal axis of FIG. 17 is 15(E), the center in the electron diffraction patterns shown in Fig. 16(C) and Fig. 16(E). is a quantity proportional to the distance r from the speck of the transmitted wave to the concentric pattern of the diffracted wave.

[0210] That is, in the graph shown in FIG. 17, FIGS. 15(A) to 15(E) and FIG. 16(C) and corresponds to the inner halo pattern in the electron diffraction pattern shown in FIG. 16(E). The peak is 3.3 nm -1 ≦1 / d≦4.1nm -1 The first peak in the outer The peak corresponding to the halo pattern is at 5.5 nm. -1 ≦1 / d≦7.1nm -1 in This is the second peak.

[0211] 18 and 19 show the half-maximum values ​​of the first and second peaks of Samples A to G. The graph shown in FIG. 18 shows the full width at half maximum (FWHM) of the first peak on the vertical axis. m -1 ) and the horizontal axis represents the substrate temperature (°C) during film formation for Samples A to E. The dotted lines in the graph of FIG. 18 indicate the first peaks of sample F and sample G, respectively. The graph shown in FIG. 19 also shows the full width at half maximum of the second peak, as in FIG. The peak widths of the first and second peaks shown in Figs. position (nm -1 ) and full width at half maximum (nm -1 ) is summarized in Table 1.

[0212] [Table 1]

[0213] 18 and 19, both the first peak and the second peak are observed on the substrate during the formation of the oxide semiconductor film. As the temperature increases, the full width at half maximum of the peak tends to decrease and the peak position tends to become smaller. In addition, both the first and second peaks were observed when the substrate temperature during film formation was between 300°C and 400°C. It was shown that the full width at half maximum of the peak did not change significantly over the temperature range. The full width at half maximum and peak of sample F formed using the 2-step method for both the first and second peaks. The full width at half maximum and peak position are smaller than those of samples A to E, and are single crystals. The full width at half maximum and peak position were larger than those of sample G.

[0214] The oxide semiconductor film including the region having crystallinity in which the c-axis is oriented is a sample having a single crystal structure. Since the crystallinity is different from that of ZnSe, the electron diffraction intensity measured by irradiating the electron beam from the c-axis direction The full width at half maximum of the first and second peaks is 0.2 nm. -1 That's all, and it's preferable. The full width at half maximum of the first peak is 0.4 nm. -1 The full width at half maximum of the second peak is 0.45 nm. -1 That's all there is to it.

[0215] Furthermore, from Figs. 13 and 14, it can be seen that the substrate temperatures during film formation for Sample A and Sample B are Considering that the oxide semiconductor film heated at a temperature of 200° C. or less did not show clear crystallinity, The oxide semiconductor film including the region having the crystallinity in which the c-axis is oriented is irradiated with an electron beam from the c-axis direction. In the electron diffraction intensity measurement, the full width at half maximum of the first peak was 0.7 nm. -1 Below, the second part The full width at half maximum of the peak is 1.4 nm. -1 It is preferable that the following is true:

[0216] In addition, samples A, E, and G were further analyzed by X-ray diffraction (XRD). ray diffraction measurements were performed to confirm the TEM results. The measurement results obtained were as follows.

[0217] Figure 20 shows the results of the out-of-plane method for samples A and E. The results of measuring the XRD spectrum are shown in Figure 20. The vertical axis represents the X-ray diffraction intensity (arbitrary unit). The horizontal axis represents the rotation angle 2θ (deg.).

[0218] As can be seen from Figure 20, sample E shows a strong peak near 2θ=30°, while sample B shows a strong peak near 2θ=30°. It can be seen that almost no peak is observed in the vicinity of 2θ=30° in sample A. This is due to diffraction on the (009) plane of the IGZO crystal. Sample E is an oxide semiconductor film containing a region with crystalline orientation along the c-axis, and is amorphous. It can be seen that this is clearly different from sample A, which has a hexagonal structure.

[0219] In addition, Figure 21(A) shows the XRD spectrum of sample E using the in-plane method. Similarly, Fig. 21(B) shows the results of measuring the thickness of sample G using the in-plane method. The results of measuring the XRD spectrum using the above are shown in Figures 21(A) and 21(B). The vertical axis represents the X-ray diffraction intensity (arbitrary unit), and the horizontal axis represents the rotation angle φ (deg.). In the in-plane method used in the examples, the c-axis direction of the sample is used as the axis of rotation. The XRD measurement was carried out while rotating the sample at a rotation angle φ.

[0220] The XRD spectrum of sample G shown in Figure 21(B) shows that the XRD spectrum is exactly equal to every 60° of rotation angle. The peak in the spacing appears, indicating that sample G is a single crystal film with six-fold symmetry. In contrast, the XRD spectrum of sample E shown in Figure 21(A) shows a regular It is clear that there is no peak and the orientation of the crystalline region in the ab plane direction is not observed. In other words, in the individual crystalline regions of sample E, the crystal orientation is Although the sample is aligned, it is not necessarily aligned with the ab plane. E is an oxide semiconductor film including a region having crystallinity in which the c-axis is oriented, but it has a single crystal structure. It can be seen that this is clearly different from sample G.

[0221] As described above, the oxide semiconductor film according to the present invention, which includes a region having crystallinity in which the c-axis is aligned, The oxide semiconductor film is clearly different from both an amorphous oxide semiconductor film and a single-crystal oxide semiconductor film. It can be said that the crystallinity is

[0222] The oxide semiconductor film including the region having crystallinity in which the c-axis is aligned as described above has a crystallinity of 0.05 to 0.05 μm. Since the oxide semiconductor film has good crystallinity compared to the amorphous oxide semiconductor film, the oxide semiconductor film has a high resistance to oxygen defects. Defects such as hydrogen bonding to dangling bonds and other impurities are reduced. These defects, such as oxygen vacancies, and hydrogen bonds to dangling bonds, and the like function as a carrier source in the oxide semiconductor film, This can cause fluctuations in the electrical conductivity of the film. The oxide semiconductor film including the region has stable electrical conductivity and is resistant to visible light, ultraviolet light, and other light. The structure is electrically stable even against irradiation. By using an oxide semiconductor film in a transistor, it is possible to realize a high-speed, reliable transistor with stable electrical characteristics. A highly reliable semiconductor device can be provided.

[0223] <2.ESR measurement> In this section, an oxide semiconductor film is formed according to the above embodiment. Using the electron spin resonance (ESR) method, The results of the evaluation will be explained below.

[0224] In this section, we describe a sample in which an oxide semiconductor film is formed on a quartz substrate by sputtering. Sample H, and Sample I, which is a quartz substrate on which the oxide semiconductor film is formed and then subjected to heat treatment. The oxide semiconductor film was deposited using a target of In2O3:Ga2O3:ZnO=1. The other film formation conditions were: film formation gas flow rate The gas pressure was 30 sccm of argon gas and 15 sccm of oxygen gas, and the substrate temperature during film formation was 400°C. , pressure 0.4 Pa, substrate-target distance 60 mm, radio frequency (RF) power supply 0.5 kW, The film thickness was 100 nm.

[0225] For Sample I, after the oxide semiconductor film was formed, The quartz substrate was then heat-treated in a dry atmosphere with a dew point of -24°C. The heating temperature was 450°C and the heating time was 1 hour. Samples H and I were prepared by depositing films on the above.

[0226] In this section, ESR measurements are carried out on Sample H and Sample I. ESR measurement is a method for measuring isolated electrons in a material using the Zeeman effect. By sweeping the magnetic field H applied to the sample while irradiating it with microwaves of a constant frequency ν, Therefore, at a certain magnetic field H, isolated electrons in the sample absorb microwaves and move parallel to the magnetic field. The energy level of the spin transitions from a normal spin to an anti-parallel spin. When the frequency ν of the microwave absorbed by the isolated electron in the sample and the magnetic field H applied to the sample are The relationship can be expressed by the following formula:

[0227]

number

[0228] where h is Planck's constant, μ B is the Bohr magneton, and g is a coefficient called the g-value. and changes depending on the local magnetic field applied to the isolated electron in the material. In other words, the g value from the above equation can be calculated as By finding this, we can determine the environment of isolated electrons such as dangling bonds.

[0229] In this example, ESR measurements were performed using a Bruker E500, and the measurement conditions were as follows: The constant temperature was room temperature, the microwave frequency was 9.5 GHz, and the microwave power was 0.2 mW.

[0230] The results of ESR measurements on Sample H and Sample I are shown in the graph in Figure 22. The graph shown in FIG. 22 shows the first derivative of the microwave absorption intensity on the vertical axis and the Take the g value as.

[0231] As shown in the graph in Figure 22, the signal corresponding to microwave absorption in Sample I was Although not observed, in sample H, the absorption of microwaves occurs near g = 1.93. By calculating the integral value of the signal near g = 1.93, , the spin density of the isolated electron corresponding to the microwave absorption is 1.3×10 18 (spins / cm 3 ) is obtained. In sample I, the microwave absorption is below the detection limit. Therefore, the spin density of the isolated electron in sample I is 1×10 16 (spin s / cm 3 ) as follows.

[0232] Here, in the In-Ga-Zn-O based oxide semiconductor film, the signal Quantum chemical calculations were performed to investigate which dangling bonds the nulls belong to. As a specific calculation method, the metal atom has a dangling bond corresponding to the oxygen vacancy. We create a cluster model like this and perform structural optimization. The g value was calculated.

[0233] The ADF (Amst) was used to calculate the structural optimization of the model and the g-value of the structurally optimized model. We used the erdam Density Functional software. In addition, both the structural optimization of the model and the calculation of the g value of the structurally optimized model include the G GA:BP was used as the basis function, and TZ2P was used as the core type. Large is used for the structural optimization of the core, and None is used for calculating the g value.

[0234] The quantum chemical calculations described above were used to calculate the A model of the dangling bond is shown in Figure 23. Figure 23 shows the oxygen in the indium-oxygen bond. Dangling bonds due to defects (g=1.984) and oxygen defects in gallium-oxygen bonds The dangling bond (g = 1.995) is due to the oxygen vacancy in the zinc-oxygen bond. The g value of these dangling bonds is , which is relatively close to the g = 1.93 of the signal corresponding to the microwave absorption of sample H. In other words, in sample H, only one of indium, gallium, or zinc Alternatively, it has been suggested that oxygen defects may have occurred in the bonds between the atoms and oxygen.

[0235] However, in sample I, there is a signal corresponding to microwave absorption near g = 1.93. This is because the oxide semiconductor film is heated under a dry atmosphere after being formed. This suggests that oxygen has been replenished to the oxygen defects. As mentioned in the previous section, oxygen defects in the oxide semiconductor film act as carriers that change the electrical conductivity. Therefore, by reducing the oxygen defects, a transistor using an oxide semiconductor film can be realized. This can improve the reliability of the transistor.

[0236] Therefore, according to one aspect of the present invention, an oxide semiconductor including a region having crystallinity in which the c-axis is oriented is It is preferable to heat-treat the film after deposition to replenish oxygen to oxygen vacancies. The spin density near g=1.93 in the constant is 1.3×10 18 (spins / cm 3 )Yo Preferably, the spin density is less than 1×10 16 (spins / cm 3 ) or more It is more preferable that the temperature is lower.

[0237] <3. Low-temperature PL measurement> In this section, an oxide semiconductor film is formed according to the above embodiment. Using low-temperature photoluminescence (PL) measurements The evaluation results will be explained.

[0238] In this study, we used the sputtering method to deposit an acid on a quartz substrate at a substrate temperature of 200°C. Sample J was formed with a nitride semiconductor film, and Sample J was formed with an oxide semiconductor film at a substrate temperature of 400°C. In other words, sample J has a region with crystalline orientation along the c-axis. The oxide semiconductor film of sample K does not contain a region having crystallinity in which the c-axis is aligned. The oxide semiconductor film is made of In2O3:Ga2O3 The composition ratio of ZnO was 1:1:2 [molar ratio]. The deposition gas flow rate was argon gas 30 sccm and oxygen gas 15 sccm, and the pressure was 0.4 Pa, substrate-target distance 60 mm, radio frequency (RF) power supply 0.5 kW, film thickness 100 n The value was m.

[0239] Furthermore, after the oxide semiconductor film was formed, both Sample J and Sample K were The quartz substrate on which the film was formed was subjected to heat treatment. The heat treatment was carried out in a dry atmosphere with a dew point of -24°C. The heating was carried out at a temperature of 450°C for one hour. Samples J and K were prepared by depositing the films on quartz substrates.

[0240] In this section, low-temperature PL measurements are performed on Sample J and Sample K. In low-temperature PL measurements, excitation light is irradiated onto the sample in an extremely low-temperature atmosphere to provide energy. While generating electrons and holes in the sample, the irradiation of the excitation light is stopped, and the The light emitted by the recombination of the generated electrons and holes is recorded on a CCD (Charge Coupled Device). It is detected using a device.

[0241] In this example, low-temperature PL measurements were performed in a helium gas atmosphere at a measurement temperature of 10 K. The excitation light was irradiated with light of wavelength 325 nm using a He-Cd gas laser oscillator. A CCD was used to detect the luminescence.

[0242] Figure 2 shows the emission spectra detected by low-temperature PL measurements for Sample J and Sample K. The graph shown in FIG. 24 shows the PL emission detection counts (counts) on the vertical axis. ) and the horizontal axis represents the energy (eV) of the detected light emission.

[0243] From the graph in Figure 24, both sample J and sample K emit light at an energy of approximately 1.8 eV. Although there is a peak, sample K has a PL emission detection count of about 100 compared to sample J. It can be seen that the emission energy of sample J and sample K is close to 3.2 eV. The adjacent peak is due to the quartz window of the low-temperature PL measurement device.

[0244] Here, the peak near 1.8 eV shown in the graph of FIG. 24 is the band of the oxide semiconductor film. In the doped structure, an energy level exists at a depth of about 1.8 eV from the bottom of the conduction band. This suggests that the deep energy levels in the band gap are This coincides with the trap level caused by oxygen vacancies shown in the calculation results. The emission peak near 1.8 eV shown in the graph is due to the oxygen vacancy in the band diagram shown in Figure 4. It can be thought of as representing the energy level of the trap level caused by the defect. The number of detected counts of light emission near 1.8 eV in sample K is smaller than that in sample J. This means that the oxide semiconductor film including the region having crystallinity in which the c-axis is aligned is more likely to have oxygen defects. The number of trap levels resulting from this is reduced, that is, the number of oxygen defects is reduced. It is possible that...

[0245] <4. Measurement of negative bias light photodegradation> In this example, a transistor using an oxide semiconductor film was manufactured according to the above embodiment. A negative voltage is applied to the gate of the transistor while irradiating it with light to apply stress. Evaluation results of the threshold voltage of transistors that change with time when stress is applied This stress can cause the threshold voltage of a transistor to change. This is called negative bias light photodegradation.

[0246] In this section, a region having crystalline orientation of the c-axis shown in the previous embodiment is formed. A transistor (sample L) including an oxide semiconductor film and a comparative example similar to sample L an oxide semiconductor made of the above material, but in which no region having crystallinity with a c-axis orientation is formed A transistor with a film (sample M) was fabricated. A negative voltage was applied to the gate while irradiating light onto the device. The threshold voltages Vth of samples L and M, which change depending on the time, were evaluated. Next, the methods for producing Samples L and M will be described.

[0247] First, a silicon nitride film with a thickness of 100 nm was formed as a base film using the plasma CVD method. A silicon oxynitride film with a thickness of 150 nm was successively formed on a glass substrate, followed by oxidation. A tungsten film with a thickness of 100 nm is formed on the silicon nitride film using the sputtering method. Here, the tungsten film was selectively etched to form a tapered shape. Then, a gate electrode was formed on the gate electrode using the plasma CVD method. A silicon oxynitride film having a thickness of 100 nm was formed as a photoinsulating film.

[0248] Next, an oxide semiconductor film was formed over the gate insulating film by sputtering. The oxide semiconductor film of sample L was formed on a 5-nm-thick oxide semiconductor film serving as a seed crystal. A 30-nm-thick oxide semiconductor film was stacked on the silicon substrate to form a region with crystallinity in which the c-axis was aligned. The oxide semiconductor film of Sample M has a thickness of 25 n The insulating film is formed by performing heat treatment on the oxide semiconductor film of m.

[0249] First, a method for fabricating the oxide semiconductor film of Sample L will be described. The oxide semiconductor film was formed by sputtering, and In2O The composition ratio of 3:Ga2O3:ZnO = 1:1:2 [molar ratio] was used. The film formation conditions are a substrate temperature of 200°C, a film formation gas flow rate of 50% oxygen gas, and 10% aluminum. The gas was 50% Gon gas, the pressure was 0.6 Pa, the substrate-target distance was 100 mm, and direct current (DC After film formation, the heating temperature was 450°C in a nitrogen atmosphere for 20 minutes. Heat treatment was performed for 1 hour, and the oxide semiconductor film serving as a seed crystal was crystallized. A 30 nm thick oxide semiconductor film was deposited on the oxide semiconductor film serving as a seed crystal by a sputtering method. m) is deposited under the same deposition conditions as the oxide semiconductor film serving as a seed crystal; Heat treatment was carried out in an oven at 450°C for 1 hour in a nitrogen atmosphere. Further, heat treatment was carried out in a mixed atmosphere of nitrogen and oxygen at a heating temperature of 450°C for 1 hour. Thus, an oxide semiconductor film in which a region having crystallinity with its c-axis aligned was formed was formed.

[0250] The oxide semiconductor film of sample M was also formed by sputtering. The composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] is Other film formation conditions were a substrate temperature of 200°C during film formation, and a film formation gas flow rate of 0.01%. The gas mixture was 50% nitrogen and 50% argon, the pressure was 0.6 Pa, and the substrate-target distance was 10 The thickness was 25 nm, the DC power was 5 kW, and the thickness was 25 nm. The thermal annealing method was used in a nitrogen atmosphere at a heating temperature of 650°C. The heating time was 6 minutes, and then the sample was heated in an oven under a mixed atmosphere of nitrogen and oxygen. Heat treatment was carried out at a temperature of 450°C for 1 hour to obtain a region with crystalline orientation along the c-axis. An oxide semiconductor film in which no region was formed was formed.

[0251] Next, a conductive film in which a titanium film, an aluminum film, and another titanium film are stacked is formed over the oxide semiconductor film. The conductive film is formed by sputtering, and the conductive film is selectively etched to form the source electrode and the Then, a 400 nm thick oxide film was formed as the first interlayer insulating film. A silicon film was then formed. Furthermore, a 1.5 μm thick acrylic resin film was used as the second interlayer insulating film. Finally, the insulating film was heated at 250°C for 1 hour in a nitrogen atmosphere. Samples L and M were prepared by heat treatment.

[0252] For the above samples L and M, a negative voltage was applied to the gate while irradiating light. The Id-Vg characteristics of sample L and sample M were measured according to the stress time. The change in threshold voltage was measured before and after the stress was applied.

[0253] The above stress was applied in an atmospheric environment at room temperature, with a gate voltage of -20V and a drain voltage of The voltage was set to 0.1V, the source voltage to 0V, and the illuminance of the irradiated light was set to 36000 (lx). The time can be set to 100 seconds, 300 seconds, 600 seconds, 1000 seconds, 1800 seconds, 3600 seconds, 720 Sample L and The Id-Vg characteristics of sample M were measured. The voltage is set to +10V, and the gate voltage is swept in the range of -10V to +10V. The same was done when stressed.

[0254] FIG. 25 shows a graph of the amount of change in threshold voltage between sample L and sample M. The graph shown in Fig. 1 has the threshold voltage change ΔVth (V) on the vertical axis and the stress Take a pause (sec).

[0255] From Figure 25, the change in threshold voltage ΔVth of sample L is about -1 V at most. On the other hand, the variation in the threshold voltage ΔVth of sample M is up to about -2V. The amount of change in threshold voltage ΔVth of sample L is reduced to about half of that of sample M.

[0256] As a result, an oxide semiconductor film in which a region having crystallinity in which the c-axis is oriented is formed is obtained. The transistors used have more stable electrical characteristics against light irradiation and gate voltage stress. It was shown that the reliability is improved.

[0257] <5. Measurement by photo-responsive defect evaluation method> In this section, a transistor including an oxide semiconductor film is manufactured according to the above embodiment. The stability of the oxide semiconductor film against light irradiation was evaluated using a photoresponsive defect evaluation method. The evaluation results will be explained.

[0258] In this section, samples N and M were prepared using the same method as samples L and M. The photoresponsive defect evaluation method was performed using sample O. The photoresponsive defect evaluation method is a method for evaluating the defect in a semiconductor film. The relaxation of the current (photocurrent) that flows when light is irradiated is measured, and a graph of the relaxation of the photocurrent is created. The relaxation time τ is calculated by fitting with an equation expressed as a linear combination of exponential functions. This is a method for evaluating defects in the semiconductor film.

[0259] Here, the relaxation time τ1 corresponding to the fast response and the relaxation time τ2 corresponding to the slow response (τ2 >τ1), the current ID can be expressed as a linear combination of two exponential functions, resulting in the following equation:

[0260]

number

[0261] In the light response defect evaluation method shown in this section, after 60 seconds of darkness, the light is irradiated for 600 seconds. The photocurrent was measured for 3000 seconds after the irradiation. Intensity 3.5mW / cm 2 The gate and source voltages of sample N and sample O are The electrode is fixed at 0 V, and a small voltage of 0.1 V is applied to the drain electrode to measure the photocurrent. The channel length L and channel width W of sample N and sample O were L / W=3 The thickness was set to 0 μm / 10,000 μm.

[0262] Figures 26(A) and 26(B) show the optical response defect evaluation method for sample N and sample O. 26(A) and 26(B) show graphs of the change in photocurrent at The vertical axis represents the photocurrent ID, and the horizontal axis represents the elapsed time t (sec). If we fit the graphs shown in Figure 26(B) with an equation expressed as a linear combination of exponential functions, , which is expressed by the following formula:

[0263]

number

[0264]

number

[0265] 26(A) and 26(B), the oxide film includes a region with crystalline orientation of the c-axis. The maximum photocurrent value of sample N with the compound semiconductor film is smaller than that of sample O. The time τ1 and relaxation time τ2 were also short. Here, the maximum photocurrent Imax of sample N was 6. 2×10 -11A, the relaxation time τ1 was 0.3 seconds, and the relaxation time τ2 was 39 seconds. In contrast, the maximum photocurrent Imax of sample O is 8.0 × 10 -9 A, and during relaxation The time τ1 was 3.9 seconds, and the relaxation time τ2 was 98 seconds.

[0266] Both sample N and sample O are linear exponential functions consisting of at least two types of relaxation times. It was shown that the relaxation of the photocurrent ID can be fitted by the The relaxation of the photocurrent ID in both sample N and sample O suggests that there are two or more relaxation processes. This is because the photoelectric conversion is based on two different recombination models shown in Figure 5(A) and Figure 5(B). In other words, as shown in the band diagram of the previous embodiment in FIG. It has been suggested that trap levels exist in the band gap of nitride semiconductors.

[0267] Furthermore, in the case of Sample N, which is an oxide semiconductor film including a region having crystallinity in which the c-axis is oriented, The relaxation times τ1 and τ2 were shorter in the sample A than in the sample O. This is because ) and the recombination model shown in Fig. 5(B), the trap level caused by oxygen vacancies is This suggests that the amount of c-axis oriented crystals in sample N was smaller than that in sample N. When the oxide semiconductor film contains a region having a high conductivity, defects that can function as trap states are generated. This can be considered to be due to a decrease.

[0268] From the above, it was found that a region having crystallinity in which the c-axis is aligned is formed in the oxide semiconductor film. It was found that the structure becomes more stable when exposed to light. The use of such an oxide semiconductor film in a transistor has stable electrical characteristics and reliability. It is possible to provide a transistor with high performance.

[0269] <6.TDS analysis> In this section, an oxide semiconductor film is formed according to the above embodiment. Using TDS (Thermal Desorption Spectroscopy) analysis The results of the evaluation will be explained below.

[0270] In this section, an oxide semiconductor film is formed on a quartz substrate by sputtering. Sample P1 has a substrate temperature of room temperature, sample P2 has a substrate temperature of 100°C during film formation, and Sample P3 with a substrate temperature of 200°C during film formation, and sample P4 with a substrate temperature of 300°C during film formation. Sample P5 was fabricated with a substrate temperature of 400°C during film formation. Samples P2 and P3 are oxide semiconductors that do not contain regions with c-axis oriented crystallinity. Samples P4 and P5 are films containing regions with c-axis oriented crystallinity. The oxide semiconductor film is made of In2O3:Ga2O3 The composition ratio of ZnO was 1:1:2 [molar ratio]. The deposition gas flow rate was argon gas 30 sccm and oxygen gas 15 sccm, and the pressure was 0.4 Pa, substrate-target distance 60 mm, radio frequency (RF) power supply 0.5 kW, film thickness 50 nm In addition, the quartz substrate was used to reduce the cause of gas desorption from the substrate during TDS analysis. To achieve this, a heat treatment was carried out in advance at 850°C in a dry atmosphere.

[0271] TDS analysis involves heating a sample in a vacuum chamber with a halogen lamp and measuring the temperature of the sample. The gas components generated from the whole were analyzed by a quadrupole mass spectrometer (QMS). The gas components detected are M / z (mass / charge) and detected as a mass spectrum.

[0272] In this example, TDS analysis was carried out using a WA1000S manufactured by Denshi Kagaku Co., Ltd. The measurement conditions were SEM voltage 1500V, substrate surface temperature from room temperature to 400°C, and vacuum degree 1.5× 10 -7 Pa or less, Dwell Time 0.2 (sec / U), Temperature rise rate 30 (℃ / min), a mass spectrum of M / z = 18 corresponding to HO was detected.

[0273] The results of TDS analysis of samples P1 to P5 are shown in the graph of FIG. The graph shown in FIG. 27 shows the molecular weight of desorbed water (M / z=18) on the vertical axis [molecule s / cm 3 ] (counts), and the horizontal axis represents the substrate temperature (°C) during film formation. The molecular weight of desorbed water is the integral value of the mass spectrum of M / z=18 at a heating temperature of around 300°C. This is the amount of water desorbed from the oxide semiconductor film, which can be determined by the above equation. The mass spectrum of / z=18 also has a peak near the heating temperature of 100°C. This is considered to be the amount of water adsorbed on the surface of the oxide semiconductor film, so it is counted as the molecular weight of desorbed water. Not yet.

[0274] From the graph in Figure 27, the higher the substrate temperature during film formation, the more moisture is desorbed from each sample. Therefore, it is necessary to increase the substrate temperature during film formation, that is, to increase the oxidation rate. By forming a region having crystallinity in which the c-axis is oriented in the oxide semiconductor film, Molecules and ions containing H (hydrogen atoms), such as H2O (water) molecules, contained in the conductive film It can be said that this can reduce noise.

[0275] From the above, it is possible to form an oxide semiconductor film including a region having crystallinity in which the c-axis is aligned. Therefore, the oxide semiconductor film is filled with carriers, such as water (HO) molecules, which can be a carrier source in the oxide semiconductor film. It is possible to reduce impurities such as molecules and ions containing H (hydrogen atoms). A transistor using an oxide semiconductor film is formed by preventing a change in electrical conductivity of the oxide semiconductor film. This can improve the reliability of the resistor.

[0276] 7. Secondary Ion Mass Spectrometry In this section, an oxide semiconductor film is formed according to the above embodiment. Secondary Ion Mass Spectroscopy (SIMS) The results of evaluation using the NMR spectroscopy are explained below.

[0277] In this section, an oxide semiconductor film is formed on a quartz substrate by sputtering. The substrate temperature during film formation was room temperature for samples Q1 to Q7, and the substrate temperature during film formation was 400°C for samples Q1 to Q7. Samples R1 to R7 were fabricated. Samples Q1 to Q7 were fabricated using the c-axis The oxide semiconductor film does not include a region having oriented crystallinity. The layer R7 is an oxide semiconductor film including a region having crystallinity in which the c-axis is oriented. The deposition target for the conductor film was In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] The other film formation conditions were as follows: argon gas flow rate 30 s ccm and oxygen gas 15sccm, the pressure was 0.4 Pa, and the substrate-target distance was 60 The thickness was set to 300 nm, the RF power was 0.5 kW, and the quartz substrate was The sample was previously heat-treated at 850°C for 1 hour in a nitrogen atmosphere.

[0278] Furthermore, for samples Q2 to Q7 and samples R2 to R7, After the oxide semiconductor film was formed, the quartz substrate on which the oxide semiconductor film was formed was subjected to heat treatment. The heat treatment is carried out by raising the temperature to a specified temperature in a nitrogen atmosphere, then switching to an oxygen atmosphere and maintaining the specified temperature. The sample was held for 1 hour and then cooled in an oxygen atmosphere. Sample R2 was at 200°C, Sample Q3 and Sample R3 were at 250°C, Sample Q4 and Sample R4 was heated at 350°C, Sample Q5 and Sample R5 at 450°C, Sample Q6 and Sample R6 at 500°C, The temperature is 550°C for samples Q7 and R6, and 650°C for samples Q7 and R7. In this manner, oxide semiconductor films were formed on quartz substrates, and the samples Q1 to Q7 were Samples R1 to R7 were prepared.

[0279] In this section, the above samples Q1 to Q7, samples R1 to R7, SIMS analysis was performed on samples Q1 to Q7. The results of the SIMS analysis of samples R1 to R7 are shown in FIG. 28(A). The results are shown in the graph of Figure 28(B). The vertical axis of the graphs of Figures 28(A) and 28(B) represents water. Element (H) concentration (atoms / cm 3 ) and the horizontal axis represents the oxide density from the surface of the oxide semiconductor film. The depth (nm) of the semiconductor film and quartz substrate is taken.

[0280] From the graphs in Figures 28(A) and 28(B), the oxides of sample Q1 and sample R1 The hydrogen concentrations in the semiconductor films are almost the same, but the oxide semiconductors of samples R2 to R7 The hydrogen concentration in the film tends to be lower than that in samples Q2 to Q7. This is because the higher the substrate temperature during oxide semiconductor film formation, the less hydrogen is mixed in during the subsequent heat treatment. In particular, looking at the graphs for samples Q3 to Q5, As the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor The layer with high hydrogen concentration spreads deep into the film, and when the temperature is further increased, hydrogen is released from the surface side of the oxide semiconductor film. As can be seen, hydrogen is released from the oxide semiconductor film. If a crystalline region is not formed, hydrogen will be mixed in and released during the heat treatment. In addition, a region having crystallinity in which the c-axis is oriented is formed in the oxide semiconductor film. This behavior is not observed in sample R7.

[0281] This is because the substrate temperature is increased during oxide semiconductor film formation, and the c-axis is oriented in the oxide semiconductor film. By forming a region having high crystallinity, hydrogen is easily bonded from the oxide semiconductor film. This is thought to be due to the reduction of dangling bonds and the like.

[0282] Therefore, the substrate temperature during the oxide semiconductor film formation is increased to orient the c-axis in the oxide semiconductor film. By forming a region having crystallinity, a carrier can be supplied in the oxide semiconductor film. This prevents the increase of hydrogen that may occur due to heat treatment. The change in electrical conductivity of the oxide semiconductor film is suppressed, and a transistor using the oxide semiconductor film is Reliability can be improved. [Explanation of symbols]

[0283] 11 sites 12 In atoms 13 Ga atoms 14 Zn atoms 15 O atoms 31 Processing Room 33 Exhaust means 35 Gas supply means 37 Power supply 40 Substrate support 41 Target 43 Aeon 45 atoms 47 atoms 51 PCB 53 Undercoat insulating film 55 Oxide semiconductor film 56 Oxide semiconductor film 59 Oxide semiconductor film 63 Gate insulating film 65 gate electrode 69 Insulating Film 120 transistors 130 transistors 140 transistors 150 transistors 160 transistors 170 transistors 180 transistors 351 Circuit Board 353 Undercoat insulating film 359 Oxide semiconductor film 363 Gate insulating film 365 gate electrode 369 Insulating Film 371 Metal Oxide Films 373 Metal Oxide Films 55a seed crystal 55b Oxide semiconductor film 56a Seed Crystal 56b Oxide semiconductor film 61a Source electrode 61b drain electrode 361a Source electrode 361b Drain electrode 500 boards 501 Pixel unit 502 Scanning line driving circuit 503 Scanning line driving circuit 504 Signal line driver circuit 510 Capacitance wiring 512 Gate wiring 513 Gate wiring 514 Drain electrode layer 516 Transistor 517 Transistor 518 Liquid crystal element 519 Liquid crystal element 520 pixels 521 Switching Transistor 522 Drive transistor 523 Capacitor 524 Light-emitting element 525 signal line 526 scan lines 527 Power line 528 Common electrode 1001 Main Unit 1002 Case 1004 keyboard buttons 1021 Main Unit 1022 Fixed part 1023 Display section 1024 operation buttons 1025 external memory slots 1030 Case 1031 Case 1032 Display Panel 1033 Speaker 1034 Microphone 1035 Operation Key 1036 Pointing Device 1037 Camera Lenses 1038 External connection terminal 1040 solar cell 1041 External memory slot 1050 Television Equipment 1051 Case 1052 Storage media playback and recording unit 1053 Display section 1054 External connection terminal 1055 Stand 1056 external memory 1003a Display section 1003b Display section

Claims

1. An oxide semiconductor film containing In, Ga, and Zn, a first region made of crystals in which a layer parallel to the a-b plane is stacked in a thickness direction of the oxide semiconductor film; a second region made of crystals in which a layer parallel to the a-b plane is stacked in the thickness direction of the oxide semiconductor film; and an amorphous third region between the first region and the second region, In the electron beam diffraction intensity measurement in which an electron beam was irradiated from the thickness direction, when the magnitude of the scattering vector is plotted on the horizontal axis, the first peak is at 3.3 nm on the horizontal axis. －１ 4.1nm or more －１ and the full width at half maximum of the first peak is 0.2 nm. －１ An oxide semiconductor film having a region where the above is true.

2. An oxide semiconductor film containing In, Ga, and Zn, a first region made of crystals in which a layer parallel to the a-b plane is stacked in a thickness direction of the oxide semiconductor film; a second region made of crystals in which a layer parallel to the a-b plane is stacked in the thickness direction of the oxide semiconductor film; and an amorphous third region between the first region and the second region, In the electron beam diffraction intensity measurement in which an electron beam was irradiated from the thickness direction, when the magnitude of the scattering vector is plotted on the horizontal axis, the first peak is at 3.3 nm on the horizontal axis. －１ 4.1nm or more －１ The full width at half maximum of the first peak is 0.4 nm. －１ 0.7nm or more －１ An oxide semiconductor film having a region having the following characteristics:

Images