Semiconductor Devices

Abstract

To provide a semiconductor device capable of suppressing a seal resin body from being peeled from a semiconductor element.SOLUTION: A semiconductor device comprises: a semiconductor element 40; and a seal resin body sealing the semiconductor element 40. The semiconductor element 40 comprises: a semiconductor substrate 41; an emitter electrode 42 that is a main electrode arranged onto one surface 41a of the semiconductor substrate 41; a protection film 45; and an oxide film 46. The protection film 45 includes an open part 451 that exposes the emitter electrode 42 so as to be jointed. The oxide film 46 is arranged so as to cover at least one part of the protection film 45.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] TECHNICAL FIELD The disclosure herein relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor element and an encapsulating resin body that encapsulates the semiconductor element. The contents of the prior art document are incorporated by reference as an explanation of the technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-197706 Summary of the Invention [Problem to be solved by the invention]

[0004] In Patent Document 1, an oxide film is provided on the surface of a metal member connected to the main electrode of a semiconductor element. This oxide film is formed by irradiating the metal member with laser light. The surface of the oxide film has continuous irregularities, which can prevent the encapsulating resin body from peeling off from the surface of the metal member. However, there is a risk that stress concentration will cause the encapsulating resin body to peel off from the top surface of the semiconductor element, i.e., from the protective film. In particular, in a semiconductor device with a double-sided heat dissipation structure in which wiring members are arranged to sandwich the semiconductor element, stress concentrated on the top surface of the semiconductor element increases, making the encapsulating resin body more likely to peel off. In terms of the above and other aspects not mentioned, further improvements in semiconductor devices are required.

[0005] An object of the present disclosure is to provide a semiconductor device that can prevent a sealing resin body from peeling off from a semiconductor element. Another object of the present disclosure is to prevent a sealing resin body from peeling off from a semiconductor element in a semiconductor device with a double-sided heat dissipation structure. [Means for solving the problem]

[0006] The semiconductor device disclosed herein comprises: a semiconductor element (40) having a semiconductor substrate (41), a main electrode (42) disposed on one surface of the semiconductor substrate, and a protective film (45) having an opening (451) that exposes the main electrode so that it can be bonded; a sealing resin body (30) that seals the semiconductor element; Equipped with The protective film has a wall surface (453) that defines the opening and an upper surface (454) that is continuous with the wall surface, The semiconductor element has, on one surface, a pad (44) arranged at a position different from the main electrode, The protective film has a first opening that is an opening and a second opening (452) that exposes the pad so that it can be bonded, Further provided is a bonding wire (90) connected to the pad exposed from the second opening, The semiconductor element is Without contacting the semiconductor substrate, Protective film Surface only The oxide film (46) is disposed so as to cover the death, The oxide film covers the peripheral portion of the upper surface around the second opening.

[0007] According to the disclosed semiconductor device, an intermolecular force such as hydrogen bonding acts between the oxide film and the sealing resin body, thereby preventing the sealing resin body from peeling off from the semiconductor element.

[0008] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims and in this section are intended to exemplify correspondences with the following embodiments and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a diagram showing a schematic configuration of a vehicle drive system to which a semiconductor device according to a first embodiment is applied; [Figure 2] 1 is a plan view showing a semiconductor device according to a first embodiment. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. [Figure 5] FIG. 1 is a plan view showing a semiconductor element. [Figure 6] FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 5. [Figure 7] FIG. 10 is a conceptual diagram showing the adhesion between the sealing resin body and the oxide film. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, several embodiments will be described with reference to the drawings. Note that in each embodiment, corresponding components are designated by the same reference numerals, and redundant description may be omitted. When only a portion of the configuration is described in each embodiment, the configuration of another embodiment previously described may be applied to the remaining portion of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of several embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.

[0011] The semiconductor device of this embodiment is applied to, for example, a power conversion device of a mobile object using a rotating electric machine as a drive source. The mobile object may be, for example, an electric vehicle such as a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), or a plug-in hybrid electric vehicle (PHEV), an aircraft such as an electric vertical take-off and landing aircraft or a drone, a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.

[0012] (First embodiment) First, the schematic configuration of a vehicle drive system will be described with reference to FIG.

[0013] <Vehicle drive system> As shown in FIG. 1, a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion device 4.

[0014] The DC power supply 2 is a DC voltage source made up of a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, i.e., an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 converts power between the DC power supply 2 and the motor generator 3.

[0015] <Power conversion device> Next, the circuit configuration of the power conversion device 4 will be described with reference to Fig. 1. The power conversion device 4 includes a power conversion circuit. As shown in Fig. 1, the power conversion device 4 includes a smoothing capacitor 5 and an inverter 6, which is a power conversion circuit.

[0016] The smoothing capacitor 5 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7, which is a power line on the high potential side, and an N line 8, which is a power line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. Similarly, the negative electrode is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2.

[0017] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage into a three-phase AC voltage in accordance with switching control by a control circuit (not shown) and outputs the voltage to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 in response to rotational force from the wheels into a DC voltage in accordance with switching control by the control circuit and outputs the DC voltage to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0018] The inverter 6 is configured with upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. Each upper and lower arm circuit 9 has an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. The inverter 6 has six arms. At least a portion of each of the P line 7, the N line 8, and the output line 10 is made up of a conductive member such as a bus bar.

[0019] The elements constituting each arm include an insulated gate bipolar transistor 11 (hereinafter referred to as IGBT 11) which is a switching element, and a freewheeling diode 12. In this embodiment, an n-channel IGBT 11 is used. The diode 12 is connected in anti-parallel to the corresponding IGBT 11. In the upper arm 9H, the collector of the IGBT 11 is connected to the P line 7. In the lower arm 9L, the emitter of the IGBT 11 is connected to the N line 8. The emitter of the IGBT 11 in the upper arm 9H and the collector of the IGBT 11 in the lower arm 9L are connected to each other. The anode of the diode 12 is connected to the emitter of the corresponding IGBT 11, and the cathode is connected to the collector.

[0020] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter is configured with, for example, a reactor and the above-mentioned upper and lower arm circuits 9. This configuration allows for voltage increase and decrease. The power conversion device 4 may also include a filter capacitor that removes power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0021] The power conversion device 4 may include a drive circuit for a switching element constituting the inverter 6 or the like. The drive circuit supplies a drive voltage to the gate of the IGBT 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding IGBT 11, i.e., turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0022] The power conversion device 4 may include a control circuit for the switching elements. The control circuit generates a drive command for operating the IGBT 11 and outputs it to the drive circuit. The control circuit generates the drive command based on a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as the drive command. The control circuit is configured to include, for example, a processor and a memory. ECU is an abbreviation for Electronic Control Unit. PWM is an abbreviation for Pulse Width Modulation.

[0023] <Semiconductor device> Next, a schematic configuration of the semiconductor device will be described with reference to Figs. 2 to 5. Fig. 2 is a plan view showing the semiconductor device according to this embodiment. Fig. 2 is a top plan view of the semiconductor device. Fig. 3 is a cross-sectional view taken along line III-III in Fig. 2. Fig. 4 is a cross-sectional view taken along line IV-IV in Fig. 2. Fig. 5 is a plan view showing a semiconductor element. For convenience, a protective film 45 and an oxide film 46, which will be described later, are omitted in Figs. 3 and 4.

[0024] In the following, the thickness direction of a semiconductor element (semiconductor substrate) is referred to as the Z direction. The direction perpendicular to the Z direction is referred to as the X direction. The direction perpendicular to both the Z direction and the X direction is referred to as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. Furthermore, the planar view from the Z direction may sometimes be simply referred to as the planar view.

[0025] 2 to 4, the semiconductor device 20 includes a sealing resin body 30, a semiconductor element 40, wiring members 50 and 60, a conductive spacer 70, and an external connection terminal 80. The semiconductor device 20 further includes a bonding wire 90 and bonding materials 91 to 93. The semiconductor device 20 constitutes one of the above-mentioned arms. In other words, two semiconductor devices 20 constitute one phase of the upper and lower arm circuits 9.

[0026] The encapsulating resin body 30 encapsulates some of the other elements that make up the semiconductor device 20. The remaining parts of the other elements are exposed to the outside of the encapsulating resin body 30. The encapsulating resin body 30 is made of, for example, a resin. One example of a resin is an epoxy-based resin. The encapsulating resin body 30 is molded by, for example, a transfer molding method. The encapsulating resin body 30 may also be called a molded resin, a resin molded body, or the like.

[0027] As shown in FIGS. 2 to 4, the sealing resin body 30 has a generally rectangular planar shape. The sealing resin body 30 has, as surfaces forming an outer periphery, one surface 30a and a back surface 30b opposite to the one surface 30a in the Z direction. The one surface 30a and the back surface 30b are, for example, generally flat surfaces. The sealing resin body 30 also has side surfaces 30c, 30d, 30e, and 30f continuous with the one surface 30a and the back surface 30b. The side surface 30c is the surface from which the main terminals 81 and 82 of the external connection terminals 80 protrude. The side surface 30d is the surface opposite to the side surface 30c in the Y direction. The side surface 30d is the surface from which the signal terminal 83 protrudes. The side surfaces 30e and 30f are surfaces from which the external connection terminals 80 do not protrude. The side surface 30e is the surface opposite to the side surface 30f in the X direction.

[0028] The semiconductor element 40 includes a semiconductor substrate 41, an emitter electrode 42, a collector electrode 43, and a pad 44. The semiconductor element 40 is sometimes referred to as a semiconductor chip. The semiconductor substrate 41 is made of a material such as silicon (Si) or a wide bandgap semiconductor with a wider bandgap than silicon, and a vertical element is formed on the semiconductor substrate 41. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond.

[0029] The vertical element is configured to pass a main current in the thickness direction of the semiconductor substrate 41 (semiconductor element 40), i.e., in the Z direction. The vertical element of this embodiment is an IGBT 11 and a diode 12 that form one arm. The vertical element is an IGBT with the diode 12 connected in reverse parallel, i.e., an RC (Reverse Conducting)-IGBT. The vertical element is a heat-generating element that generates heat when current is applied. A gate electrode (not shown) is formed on the semiconductor substrate 41. The gate electrode has, for example, a trench structure.

[0030] The semiconductor substrate 41 has one surface 41a and a back surface 41b as plate surfaces on which main electrodes are provided. The one surface 41a is the surface of the semiconductor substrate 41 facing the one surface 30a of the sealing resin body 30. The back surface 41b is the surface opposite to the one surface 41a in the plate thickness direction. An emitter electrode 42, which is one of the main electrodes, is disposed on the one surface 41a of the semiconductor substrate 41. A collector electrode 43, which is the other of the main electrodes, is disposed on the back surface 41b of the semiconductor substrate 41. The emitter electrode 42 corresponds to a first main electrode, and the collector electrode 43 corresponds to a second main electrode.

[0031] When the IGBT 11 is turned on, a current (main current) flows between the main electrodes, that is, between the emitter electrode 42 and the collector electrode 43. The emitter electrode 42 also serves as the anode electrode of the diode 12. The collector electrode 43 also serves as the cathode electrode of the diode 12. The collector electrode 43 is formed on almost the entire back surface 41b of the semiconductor substrate 41. The emitter electrode 42 is formed on a portion of one surface 41a of the semiconductor substrate 41.

[0032] The pads 44 are electrodes for signals. The pads 44 are formed on one surface 41a of the semiconductor substrate 41 in an area different from the area where the emitter electrodes 42 are formed. The pads 44 are formed at the end opposite the area where the emitter electrodes 42 are formed in the Y direction. The pads 44 are provided alongside the emitter electrodes 42 in the Y direction. The number of pads 44 is not particularly limited. The pads 44 include at least a pad for a gate electrode.

[0033] 5, the semiconductor element 40 has five pads 44. Specifically, the pads are for a gate electrode, for detecting an emitter potential, for detecting a cathode potential of a temperature-sensitive diode (not shown) included in the semiconductor element 40, for detecting an anode potential of the same, and for current sensing. The five pads 44 are aligned in the X direction. The detailed structure of the semiconductor element 40 will be described later.

[0034] The wiring member 50 is electrically connected to the emitter electrode 42 and provides a wiring function. Similarly, the wiring member 60 is electrically connected to the collector electrode 43 and provides a wiring function. The wiring members 50, 60 are arranged to sandwich the semiconductor element 40 in the Z direction. The wiring members 50, 60 are arranged so that at least a portion of each of them faces each other in the Z direction. The wiring members 50, 60 enclose the semiconductor element 40 in a plan view. The wiring member 50 corresponds to a first wiring member, and the wiring member 60 corresponds to a second wiring member.

[0035] The wiring members 50, 60 provide a heat dissipation function for dissipating heat generated by the semiconductor element 40. The wiring members 50, 60 may also be referred to as heat sinks or heat sinks. The wiring members 50, 60 of this embodiment are metal plates made of a metal with good conductivity, such as Cu or a Cu alloy. The metal plate is provided, for example, as part of a lead frame. Instead of a metal plate, a substrate having metal bodies disposed on both sides of an insulating base material may be used. The wiring members 50, 60 may have a plating film of Ni, Au, or the like on the surface.

[0036] The wiring member 50 has an opposing surface 50a, which is the surface facing the semiconductor element 40, and a back surface 50b, which is the surface opposite the opposing surface 50a. Similarly, the wiring member 60 also has an opposing surface 60a and a back surface 60b. The wiring members 50 and 60 have, for example, a substantially rectangular planar shape. The back surfaces 50b and 60b of the wiring members 50 and 60, respectively, are exposed from the encapsulating resin body 30. The back surfaces 50b and 60b are sometimes referred to as heat dissipation surfaces or exposed surfaces. The back surface 50b of the wiring member 50 is substantially flush with one surface 30a of the encapsulating resin body 30. The back surface 60b of the wiring member 60 is substantially flush with the back surface 30b of the encapsulating resin body 30.

[0037] The conductive spacer 70 is interposed between the semiconductor element 40 and the wiring member 50. The conductive spacer 70 functions as a spacer to ensure a predetermined distance between the semiconductor element 40 and the wiring member 50. For example, the conductive spacer 70 ensures a height sufficient to electrically connect the corresponding signal terminal 83 to the pad 44 of the semiconductor element 40. The conductive spacer 70 is located midway along the electrical and thermal conduction paths between the emitter electrode 42 of the semiconductor element 40 and the wiring member 50, and provides wiring and heat dissipation functions.

[0038] The conductive spacer 70 contains a metal material such as Cu that has good electrical and thermal conductivity. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 may also be called a terminal, a terminal block, a metal block, or the like. The conductive spacer 70 of this embodiment is a columnar body that is substantially rectangular in plan view.

[0039] The external connection terminals 80 are terminals for electrically connecting the semiconductor device 20 to external devices. The external connection terminals 80 are formed using a metal material with good conductivity, such as copper. The external connection terminals 80 are, for example, a plate material. The external connection terminals 80 are sometimes called leads. The external connection terminals 80 include main terminals 81 and 82 and a signal terminal 83. The main terminals 81 and 82 are external connection terminals 80 electrically connected to main electrodes of the semiconductor element 40.

[0040] The main terminal 81 is electrically connected to the emitter electrode 42. The main terminal 81 is sometimes referred to as an emitter terminal. The main terminal 81 is connected to one end of the wiring member 50 in the Y direction. The thickness of the main terminal 81 is thinner than that of the wiring member 50. The main terminal 81 is connected to the wiring member 50 so as to be, for example, substantially flush with the opposing surface 50a. The main terminal 81 may be connected by being provided continuously and integrally with the wiring member 50, or may be provided as a separate member and connected by joining.

[0041] The main terminal 81 in this embodiment is provided integrally with the wiring member 50 as part of the lead frame. The main terminal 81 extends in the Y direction from the wiring member 50 and protrudes to the outside from the side surface 30c of the sealing resin body 30. The main terminal 81 has a bent portion midway through the portion covered by the sealing resin body 30, and protrudes from near the center in the Z direction on the side surface 30c.

[0042] The main terminal 82 is electrically connected to the collector electrode 43. The main terminal 82 is sometimes referred to as a collector terminal. The main terminal 82 is connected to the collector electrode 43 via the wiring member 60. The main terminal 82 is connected to one end of the wiring member 60 in the Y direction. The thickness of the main terminal 82 is thinner than that of the wiring member 60. The main terminal 82 is connected to the wiring member 60 so as to be substantially flush with the opposing surface 60a, for example. The main terminal 82 may be connected by being provided continuously and integrally with the wiring member 60, or may be provided as a separate member and connected by joining.

[0043] The main terminal 82 of this embodiment is provided integrally with the wiring member 60 as part of a lead frame separate from the main terminal 81. The main terminal 82 extends in the Y direction from the wiring member 60 and protrudes to the outside from the same side surface 30c as the main terminal 81. The main terminal 82 also has a bent portion midway through the portion covered by the sealing resin body 30, and protrudes from near the center in the Z direction on the side surface 30c. The two main terminals 81, 82 are arranged side by side in the X direction with their side surfaces facing each other.

[0044] The signal terminals 83 are electrically connected to the corresponding pads 44 of the semiconductor element 40. The signal terminals 83 are electrically connected to the pads 44 via bonding wires 90. The signal terminals 83 extend in the Y direction and protrude from the side surface 30d of the sealing resin body 30 to the outside. The semiconductor device 20 of this embodiment has five signal terminals 83 corresponding to the pads 44. The five signal terminals 83 are arranged side by side in the X direction. The signal terminals 83 are formed on a lead frame that is common to the wiring member 60 and the main terminals 82, for example. The multiple signal terminals 83 are electrically isolated from each other by cutting tie bars (not shown).

[0045] The bonding material 91 is interposed between the emitter electrode 42 of the semiconductor element 40 and the conductive spacer 70, and bonds the emitter electrode 42 and the conductive spacer 70 together. The bonding material 91 is sometimes referred to as an upper-element bonding material. The bonding material 92 is interposed between the conductive spacer 70 and the wiring member 50, and bonds the conductive spacer 70 and the wiring member 50 together. The bonding material 92 is sometimes referred to as an upper-spacer bonding material. The bonding material 93 is interposed between the collector electrode 43 of the semiconductor element 40 and the wiring member 60, and bonds the collector electrode 43 and the wiring member 60 together. The bonding material 93 is sometimes referred to as an under-element bonding material.

[0046] The bonding materials 91 to 93 may be made of the same material or different materials. As an example, the bonding materials 91 to 93 are solder. For example, a multi-element lead-free solder containing Sb, Bi, and the like in addition to Sn can be used.

[0047] As described above, in the semiconductor device 20, the semiconductor element 40 constituting one arm is encapsulated by the encapsulating resin body 30. The encapsulating resin body 30 integrally encapsulates the semiconductor element 40, a portion of the wiring member 50, a portion of the wiring member 60, the conductive spacer 70, and a portion of each of the external connection terminals 80.

[0048] The semiconductor element 40 is disposed between the wiring members 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the wiring members 50 and 60, which are disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the wiring member 50 is substantially flush with one surface 30a of the sealing resin body 30. The back surface 60b of the wiring member 60 is substantially flush with the back surface 30b of the sealing resin body 30. Because the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be improved.

[0049] <Semiconductor element> Next, the structure of semiconductor element 40, particularly the structure on one surface 41a, will be described with reference to Figures 5 and 6. In Figure 5, the oxide film is indicated by a broken line. Figure 6 is a cross-sectional view taken along line VI-VI in Figure 5.

[0050] 5 and 6, the semiconductor element 40 has a protective film 45 disposed on one surface 41a of the semiconductor substrate 41. The protective film 45 is an insulating film provided on the one surface 41a of the semiconductor substrate 41 so as to cover the peripheral edge of the emitter electrode 42. The protective film 45 may be made of a material such as polyimide or silicon nitride.

[0051] The protective film 45 has an opening 451 that defines a bonding region between the emitter electrode 42 and the bonding material 91. The opening 451 is a through-hole that penetrates the protective film 45 in the Z direction. The opening 451 is provided so as to overlap the emitter electrode 42 in a plan view. Similarly, the protective film 45 has an opening 452 that defines a bonding region in the pad 44. The opening 451 corresponds to a first opening, and the opening 452 corresponds to a second opening.

[0052] The emitter electrode 42 has an exposed portion 421 that is exposed from the opening 451 of the protective film 45 and provides a junction region. The exposed portion 421 forms a junction with the bonding material 91. In a plan view, the outline of the exposed portion 421 matches the outline of the opening 451. The exposed portion 421 is disposed on the region of the semiconductor substrate 41 where the vertical element is formed, i.e., on the active region. The emitter electrode 42 has a multi-layer structure. The emitter electrode 42 has a base electrode 422 and a connection electrode 423. The pad 44 has a similar configuration to the emitter electrode 42.

[0053] The base electrode 422 is a metal layer formed adjacent to the semiconductor substrate 41 in the multi-layered emitter electrode 42. The base electrode 422 may also be referred to as a lower electrode, a lower layer electrode, a wiring electrode, a first metal layer, etc. The base electrode 422 is connected to one surface 41a of the semiconductor substrate 41. The base electrode 422 is formed using a material containing Al (aluminum) as a main component, for example. In this embodiment, as an example, an Al alloy such as AlSi or AlSiCu is used as the material.

[0054] In a plan view, the base electrode 422 encompasses the active region and extends onto a peripheral region surrounding the active region. A breakdown voltage structure such as a guard ring is formed in the peripheral region. The base electrode 422 is connected to the vertical element (emitter). The base electrode 422 has a peripheral edge portion 422a surrounding the exposed portion 421 in a plan view. The peripheral edge portion 422a is a portion of the base electrode 422 that overlaps with the protective film 45. The protective film 45 is disposed on one surface 41a of the semiconductor substrate 41 so as to cover the peripheral edge portion 422a of the base electrode 422.

[0055] The connection electrode 423 is layered on the base electrode 422 for the purposes of improving the bonding strength with the bonding material 91 and improving wettability with respect to the bonding material 91. The connection electrode 423 may also be referred to as an upper electrode, an upper electrode, an upper layer electrode, a second metal layer, etc. The connection electrode 423 includes at least one metal layer. The metal layer constituting the connection electrode 423 includes, for example, any of Ni, Pd, Au, Pt, and Ag.

[0056] The connection electrode 423 of this embodiment includes at least a Ni (nickel) layer. Ni is harder than the Al alloy that constitutes the base electrode 422. An Au (gold) layer may be further provided on the Ni layer. The Au layer, for example, suppresses oxidation of the Ni layer and improves wettability with the solder that is the bonding material 91. Because Au diffuses into the solder during soldering, the Au layer exists in the state before bonding, but does not exist in the bonded state.

[0057] The connection electrode 423 is laminated on the base electrode 422 and exposed from the opening 451. As an example, the connection electrode 423 of this embodiment is disposed on the base electrode 422 within the opening 451. The outer peripheral edge of the connection electrode 423 is in contact with a wall surface 453 of the protective film 45 that defines the opening 451. The exposed portion 421 of the emitter electrode 42 is composed of the connection electrode 423 and a portion of the base electrode 422 that overlaps with the opening 451 in a plan view.

[0058] 5 and 6, the semiconductor element 40 further includes an oxide film 46 arranged to cover at least a portion of the protective film 45. The oxide film 46 is arranged to cover at least a portion of the upper surface 454. The upper surface 454 is a surface of the protective film 45 that continues to the wall surface 453. The upper surface 454 is the surface opposite to the surface in contact with the base electrode 422 in the Z direction.

[0059] The oxide film 46 is preferably disposed on the upper surface 454 so as to cover the peripheral portion of the opening 452. In other words, it is preferably disposed around the pad 44. The oxide film 46 is preferably disposed near the outer peripheral edge of the protective film 45 on the upper surface 454. The oxide film 46 may be disposed on the wall surface 453. As an example, the oxide film 46 of this embodiment is disposed over almost the entire upper surface 454. In other words, the oxide film 46 is also disposed around the pad 44 and near the outer peripheral edge of the protective film 45. A portion of the oxide film 46 is disposed on the wall surface 453.

[0060] The oxide film 46 is formed on the protective film 45, for example, in a wafer state before being divided into individual semiconductor elements 40 (chips). The oxide film 46 is formed by a deposition method such as ALD or CVD, with unnecessary portions masked. ALD is an abbreviation for Atomic Layer Deposition. CVD is an abbreviation for Chemical Vapor Deposition. Examples of the oxide film 46 include SiO2, Al2O3, and NiO.

[0061] <Summary of the First Embodiment> In this embodiment, the semiconductor element 40 has an oxide film 46 arranged so as to cover at least a portion of the protective film 45. As shown in FIG. 7 , an intermolecular force, specifically, hydrogen bonding, acts between the hydrogen of the hydroxyl groups (OH groups) of the epoxy resin that constitutes the sealing resin body 30 and the oxygen of the oxide film 46. The oxide film 46 has many oxygen atoms as bonding bonds. This improves the adhesion of the sealing resin body 30 to the top surface of the semiconductor element 40. Therefore, peeling of the sealing resin body 30 from the semiconductor element 40 can be suppressed.

[0062] If peeling occurs around the pad 44, stress will be concentrated on the bonding wire 90, which may result in breakage of the bonding wire 90. In this embodiment, as an example, the oxide film 46 covers the peripheral portion of the opening 452 on the upper surface 454 of the protective film 45, i.e., the peripheral portion of the pad 44. This prevents peeling of the sealing resin body 30 around the pad 44, which in turn prevents stress from being concentrated on the bonding wire 90.

[0063] Stresses such as thermal stress and stresses due to expansion and / or contraction of the encapsulating resin body 30 are concentrated at the outer periphery of the upper surface of the semiconductor element 40. For this reason, peeling of the encapsulating resin body 30 is likely to occur starting from the outer periphery. As an example, in this embodiment, the oxide film 46 covers the upper surface 454 of the protective film 45 near the outer periphery. For example, it covers a predetermined area from the outer periphery. This makes it possible to prevent peeling of the encapsulating resin body 30 near the outer periphery of the protective film 45.

[0064] In particular, in this embodiment, the oxide film 46 covers the entire upper surface 454 of the protective film 45. Therefore, peeling of the sealing resin body 30 can be suppressed over the entire upper surface 454.

[0065] In this embodiment, the semiconductor element 40 is sandwiched between wiring members 50 and 60. The sealing resin body 30 integrally seals the semiconductor element 40 and the wiring members 50 and 60. In such a double-sided heat dissipation structure, the wiring member 50 (first wiring member) is disposed above the semiconductor element 40, which increases the stress acting on the upper part of the semiconductor element 40. However, in this embodiment, the oxide film 46 is provided so as to cover the protective film 45, which makes it possible to prevent the sealing resin body 30 from peeling off from the semiconductor element 40.

[0066] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure encompasses the exemplified embodiments and modifications thereto by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and / or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses the omission of parts and / or elements from the embodiments. The disclosure encompasses the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are defined by the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the claims.

[0067] The disclosure in the specification, drawings, etc. is not limited by the claims. The disclosure in the specification, drawings, etc. encompasses the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being bound by the claims.

[0068] When an element or layer is referred to as being "on," "coupled," "connected," or "coupled," it may be directly on, coupled, connected, or coupled to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly coupled" to another element or layer, there are no intervening elements or layers present. Other language used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0069] Spatially relative terms such as "inside," "outside," "back," "below," "low," "top," "top," and the like are used herein to facilitate the description of one element or feature's relationship to other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were turned over, elements described as "below" or "directly below" other elements or features would then be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0070] The vehicle drive system 1 is not limited to the above-described configuration. For example, although an example has been shown in which one motor generator 3 is provided, this is not limiting. Multiple motor generators may be provided. Although an example has been shown in which the power conversion device 4 is provided with an inverter 6 as a power conversion unit, this is not limiting. For example, a configuration may be provided with multiple inverters. A configuration may be provided with at least one inverter and a converter. Or only a converter may be provided.

[0071] The switching element is not limited to the IGBT 11. For example, a MOSFET may be used. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the case of an n-channel MOSFET, the source electrode corresponds to the main electrode on one side, i.e., the first main electrode, and the drain electrode corresponds to the second main electrode. In the case of a MOSFET, a parasitic diode (body diode) may be used as the freewheeling diode, or an external diode may be used.

[0072] Although an example has been shown in which the back surfaces 50b, 60b of the wiring members 50, 60 are exposed from the sealing resin body 30, this is not limiting. At least one of the back surfaces 50b, 60b may be covered by the sealing resin body 30. At least one of the back surfaces 50b, 60b may be covered by an insulating member (not shown) that is separate from the sealing resin body 30. Although an example has been shown in which the semiconductor device 20 includes the sealing resin body 30, this is not limiting. A configuration without the sealing resin body 30 may also be used.

[0073] Although the example has been shown in which the semiconductor device 20 includes only one semiconductor element 40 that configures one arm, the present invention is not limited to this. The semiconductor device 20 may also include multiple semiconductor elements 40 that configure one arm. In other words, multiple semiconductor elements 40 may be connected in parallel to configure one arm. In this case, the conductive spacer 70 is provided individually for each semiconductor element 40. The semiconductor device 20 may also include multiple semiconductor elements 40 that configure upper and lower arm circuits 9 for one phase. The semiconductor device 20 may also include multiple semiconductor elements 40 that configure upper and lower arm circuits 9 for multiple phases.

[0074] Instead of the conductive spacer 70, the wiring member 50 may be provided with a protrusion.

[0075] Although the semiconductor device 20 has been shown as having a double-sided heat dissipation structure, it is not limited to this. A single-sided heat dissipation structure is also possible. For example, the collector electrode 43 is connected to a heat sink or a metal body of the substrate, and the emitter electrode 42 is connected to a lead.

[0076] Although the semiconductor element 40 has main electrodes on both sides in the above example, the present invention is not limited to this. The semiconductor substrate 41 may have main electrodes only on one surface 41a.

[0077] Although an example has been shown in which the oxide film 46 is disposed so as to cover at least the upper surface 454, the present invention is not limited to this. The oxide film 46 may be disposed so as to cover only the wall surface 453. This makes it possible to prevent peeling of the sealing resin body 30 starting from the wall surface 453. [Explanation of symbols]

[0078] 1... drive system, 2... DC power supply, 3... motor generator, 4... power conversion device, 5... smoothing capacitor, 6... inverter, 7... P line, 8... N line, 9... upper and lower arm circuits, 9H... upper arm, 9L... lower arm, 10... output line, 11... IGBT, 12... diode, 20... semiconductor device, 30... sealing resin body, 30a... one side, 30b... back side, 30c, 30d, 30e, 30f... side, 40... semiconductor element, 41... semiconductor substrate, 41a... one side, 41b... back side, 42... Emitter electrode, 421... exposed portion, 422... base electrode, 422a... peripheral portion, 423... connection electrode, 43... collector electrode, 44... pad, 45... protective film, 451, 452... opening, 453... wall surface, 454... upper surface, 46... oxide film, 50... wiring member, 50a... opposing surface, 50b... rear surface, 60... wiring member, 60a... opposing surface, 60b... rear surface, 70... conductive spacer, 80... external connection terminal, 81, 82... main terminal, 83... signal terminal, 90... bonding wire, 91, 92, 93... bonding material

Claims

1. A semiconductor element (40) having a semiconductor substrate (41), a main electrode (42) arranged on one surface of the semiconductor substrate, and a protective film (45) having an opening (451) that exposes the main electrode so that it can be bonded; a sealing resin body (30) that seals the semiconductor element; Equipped with The protective film has a wall surface (453) that defines the opening and an upper surface (454) that is continuous with the wall surface, The semiconductor element has a pad (44) arranged at a position different from the main electrode on the one surface, The protective film has a first opening which is the opening, and a second opening (452) which exposes the pad so that it can be bonded, Further provided is a bonding wire (90) connected to the pad exposed from the second opening, The semiconductor element has an oxide film (46) that is not in contact with the semiconductor substrate and is arranged so as to cover only the surface of the protective film, the oxide film covers a peripheral portion of the upper surface of the semiconductor device around the second opening.

2. The semiconductor element has a first main electrode on the one surface, which is the main electrode, and a second main electrode (43) on a back surface opposite to the one surface in the plate thickness direction, a first wiring member (50) electrically connected to the first main electrode, and a second wiring member (60) electrically connected to the second main electrode and disposed so as to sandwich the semiconductor element between the first wiring member and the second wiring member in the plate thickness direction, 2. The semiconductor device according to claim 1, wherein the sealing resin body integrally seals the semiconductor element, the first wiring member, and the second wiring member.

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