Semiconductor module, semiconductor device, and vehicle

Abstract

The present invention prevents peeling at an interface between a sealing material and a lead bonded to an electrode of a semiconductor element by a bonding material. A semiconductor module (2) is provided with: a circuit board (5) on which a semiconductor element (510) is mounted; a lead (7) bonded to an electrode on an upper surface of the semiconductor element by a bonding material; and a sealing material (9) that seals the semiconductor element and the lead. In the lead, roughening recesses (720) that prevent peeling at an interface between the lead and the sealing material are formed on an upper surface (710) of a bonding part (701) bonded to the electrode. The roughening recesses include: a main recess (721) in which is formed a folded-back part facing one or more wall surfaces in the recess and protruding toward the wall surfaces; and a sub-recess (722) that has a center thereof at a position outside the main recess in plan view and a prescribed distance away from the wall surface on which the folded-back part is formed, and that has surfaces that incline so that the sub-recess (722) becomes shallower from the center toward an opening end of the main recess.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor module, a semiconductor device, and a vehicle. [Background technology]

[0002] Some power conversion devices, such as inverter devices, include semiconductor devices having circuit boards on which semiconductor elements, such as IGBTs (Insulated Gate Bipolar Transistors), power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), FWDs (Free Wheeling Diodes), etc. The circuit board includes a wiring board in which a conductor pattern is provided on the surface of an insulating substrate, and circuit components, such as semiconductor elements, that are arranged on the wiring board.

[0003] In this type of semiconductor device, a conductive plate called a lead or the like may be used as a conductive member that electrically connects electrodes of the semiconductor element provided on the surface (top surface) opposite to the surface facing the wiring board to the conductor pattern of the wiring board.

[0004] In semiconductor devices in which leads are used to electrically connect electrodes of a semiconductor element to a conductor pattern on a wiring board, various measures have been proposed to prevent peeling at the interface between the leads and the sealing material.

[0005] For example, Patent Document 1 describes a resin-sealed semiconductor device in which a plurality of recesses are arranged at approximately equal intervals vertically and horizontally on the surface of a metal plate to which a semiconductor element is fixed, in a portion other than a flat semiconductor element mounting area, and each of the recesses is two square recesses offset diagonally.

[0006] Furthermore, for example, Patent Document 2 describes a semiconductor device in which the side walls of dimples formed on a lead frame have inwardly protruding return portions, and the dimples are connected by grooves. Furthermore, for example, Patent Document 3 describes a semiconductor device in which a plurality of dimples formed on a lead frame each have a return portion that protrudes inward from a portion of the inner peripheral wall, and the plurality of dimples include two types of dimples with return portions facing different directions.

[0007] Furthermore, for example, Patent Document 4 describes a semiconductor device in which a large dimple that opens onto the main surface and a small dimple that opens onto the inner surface of the large dimple are formed on at least one main surface of a die pad in a lead frame.

[0008] Furthermore, for example, Patent Document 5 describes a semiconductor device in which a plurality of rectangular recesses are arranged vertically and horizontally at approximately equal intervals on the surface of a metal plate to which a semiconductor element is fixed, in a region other than the semiconductor element mounting region. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Patent No. 3748849 [Patent Document 2] Patent No. 4086774 [Patent Document 3] Japanese Patent Application Laid-Open No. 2017-005124 [Patent Document 4] Japanese Patent Application Laid-Open No. 2015-060889 [Patent Document 5] Japanese Patent Application Laid-Open No. 2004-186622 Summary of the Invention [Problem to be solved by the invention]

[0010] In the structure for preventing peeling at the interface between the lead and the encapsulant in the semiconductor device described above, when forming recesses or return portions called dimples or the like on the surface of the lead by press working, an external force perpendicular to the surface of the lead is applied to the lead to deform the conductive material of the lead. When forming return portions by such press working, it is difficult to form recesses or return portions with the dimensions required to prevent peeling of the encapsulant due to restrictions on processing dimensions, etc.

[0011] The present invention has been made in view of the above points, and one of its objects is to prevent peeling at the interface between the sealing material and the leads joined to the electrodes of the semiconductor element by the joining material. [Means for solving the problem]

[0012] A semiconductor module according to one embodiment of the present invention comprises a circuit board on which a semiconductor element is mounted, leads joined to electrodes on the upper surface of the semiconductor element with a bonding material, and a sealing material that seals the semiconductor element and the leads. The leads have a roughening recess formed on their upper surface opposite to the lower surface facing the electrode at the joint where the leads are joined to the electrodes, the roughening recess having a roughening recess that prevents peeling at the interface between the leads and the sealing material. The roughening recess includes a main recess having a return portion that protrudes toward a wall surface that faces one or more wall surfaces of the recess, and a sub-recess that is outside the main recess in a planar view, has its center at a predetermined distance from the wall surface on which the return portion is formed, and has a slope that becomes shallower from the center toward the opening end of the main recess. [Effects of the Invention]

[0013] According to the present invention, it is possible to prevent separation at the interface between the sealing material and the leads joined to the electrodes of the semiconductor element by the joining material. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a top view illustrating a configuration example of a semiconductor device according to an embodiment; [Figure 2]2 is a cross-sectional view of the semiconductor device of FIG. 1 taken along line AA'. [Figure 3] 2 is an enlarged partial top view of a region R in FIG. 1. FIG. [Figure 4] 4 is an enlarged partial top view of one of the roughening recesses formed in the portion shown in FIG. 3. FIG. [Figure 5] FIG. 5 is a cross-sectional view taken along line BB′ in FIG. 4. [Figure 6] 10A and 10B are diagrams illustrating examples of the positions and dimensions of a recess that becomes a main recess and a sub-recess. [Figure 7] FIG. 10 is a perspective view illustrating a punch used to form a recess that becomes a main recess. [Figure 8] 8 is a partial top view illustrating a recess formed in a first bonding portion of a lead by the punch illustrated in FIG. 7. FIG. [Figure 9] 9 is a cross-sectional view taken along the line CC' of the first bonding portion shown in FIG. 8. FIG. [Figure 10] FIG. 10 is a perspective view illustrating a punch used to form a sub-recess. [Figure 11] 11 is a partial top view illustrating a minor recess formed in a first bonding portion of a lead by the punch illustrated in FIG. 10. FIG. [Figure 12] 12 is a cross-sectional view taken along the line CC' of the first bonding portion shown in FIG. 11. FIG. [Figure 13] FIG. 10 is a partial top view illustrating a first bonding portion in which a second sub-recess is formed in each recess. [Figure 14] 14 is a cross-sectional view taken along line CC' of the first bonding portion shown in FIG. 13. FIG. [Figure 15] FIG. 10 is a partial top view illustrating a first bonding portion in which a third sub-recess is formed in each recess. [Figure 16] FIG. 10 is a partial top view illustrating a first bonding portion in which a fourth sub-recess is formed in each recess. [Figure 17] FIG. 10 is a perspective view showing another example of a punch used to form a sub-depression portion. [Figure 18] FIG. 10 is a partial top view illustrating a first modified example of the arrangement of roughening recesses. [Figure 19]FIG. 10 is a partial top view illustrating a second modified example of the arrangement of roughening recesses. [Figure 20] FIG. 10 is a partial top view illustrating a third modified example of the arrangement of roughening recesses. [Figure 21] FIG. 10 is a partial top view illustrating a fourth modified example of the arrangement of roughening recesses. [Figure 22] FIG. 10 is a partial top view illustrating a fifth modified example of the arrangement of roughening recesses. [Figure 23] 1 is a schematic plan view showing an example of a vehicle to which a semiconductor device according to the present invention is applied; DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The X, Y, and Z axes in each of the referenced figures are shown for the purpose of defining planes and directions in the illustrated semiconductor device, etc., and are orthogonal to each other and form a right-handed system. In the following description, the X direction may be referred to as the left-right direction, the Y direction as the front-back direction, and the Z direction as the up-down direction. Furthermore, a plane containing the X and Y axes may be referred to as the XY plane, a plane containing the Y and Z axes as the YZ plane, and a plane containing the Z and X axes as the ZX plane. These directions (front-back, left-right, up-down directions) and planes are terms used for convenience of explanation, and their correspondence with the X, Y, and Z directions may change depending on the mounting orientation of the semiconductor device. For example, the heat dissipation surface (cooler side) of a semiconductor device will be referred to as the bottom side, and the opposite side will be referred to as the top side. Furthermore, in this specification, a planar view refers to the top or bottom surface (XY plane) of a semiconductor device, etc., viewed from the Z direction. Furthermore, the aspect ratios and the size relationships between the components in each drawing are merely shown schematically and do not necessarily correspond to the relationships in the actually manufactured semiconductor device, etc. For the sake of convenience of explanation, it is assumed that the size relationships between the components may be exaggerated.

[0016] The semiconductor devices exemplified in the following description are applied to power conversion devices such as inverters for industrial or automotive motors, etc. Therefore, in the following description, detailed descriptions of configurations, functions, operations, etc. that are the same as or similar to those of known semiconductor devices will be omitted.

[0017] Fig. 1 is a top view showing an example of the configuration of a semiconductor device according to an embodiment. Fig. 2 is a cross-sectional view of the semiconductor device of Fig. 1 taken along line A-A'. In Fig. 1, the sealing material filled in the case is omitted. In Fig. 2, hatching showing the cross section of the sealing material filled in the case is omitted.

[0018] 1 and 2, the semiconductor device 1 according to this embodiment is configured by placing a semiconductor module 2 on the upper surface of a cooler 3. Note that the cooler 3 is an optional configuration relative to the semiconductor module 2.

[0019] The cooler 3 dissipates heat from the semiconductor module 2 to the outside and has an overall rectangular parallelepiped shape. Although not specifically shown, the cooler 3 is configured by providing multiple fins on the underside of a flat base and housing these fins in a water jacket. Note that the shape and configuration of the cooler 3 are not limited to this and can be modified as appropriate.

[0020] The semiconductor module 2 includes a base 4, a circuit board 5, a case 6, leads 7, bonding materials S1 to S4, bonding wires 8, and a sealing material 9.

[0021] The base 4 is a substrate on which the circuit board 5 is mounted. The base 4, on which the circuit board 5 is mounted, is attached to the underside of the case 6 with the surface on which the circuit board 5 is mounted facing upward. The case 6 includes a rectangular annular insulating member 601 with openings on the top and bottom, main terminals 602 and 603 integrated with the insulating member 601, and a plurality of control terminals 604. The circuit board 5 mounted on the base 4 is accommodated in the hollow portion of the insulating member 601 of the case 6. The base 4 is a metal plate, such as a copper plate or an aluminum plate, and conducts heat generated by the circuit board 5 to the cooler 3. This type of base 4 may also be called a heat sink or heat dissipation layer. The base 4, which is a heat sink, may be disposed on the upper surface of the cooler 3 via a thermally conductive material, such as thermal grease or thermal compound. The semiconductor module 2 may omit the base 4, and the lower surface of the circuit board 5 (the conductor pattern 504 of the wiring board 500 illustrated in FIG. 2 ) may be bonded to the cooler 3.

[0022] Circuit board 5 includes wiring board 500 and semiconductor element 510 mounted on the upper surface of wiring board 500. Wiring board 500 includes insulating substrate 501, conductor patterns 502 and 503 provided on the upper surface of insulating substrate 501, and conductor pattern 504 provided on the lower surface of insulating substrate 501. Wiring board 500 may be, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate. Wiring board 500 may also be called a laminated substrate.

[0023] The insulating substrate 501 is not limited to a specific substrate. The insulating substrate 501 may be a ceramic substrate formed from a ceramic material such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), aluminum oxide (Al2O3) and zirconium oxide (ZrO2). The insulating substrate 501 may be, for example, a substrate formed from an insulating resin such as epoxy resin, a substrate formed by impregnating a base material such as glass fiber with an insulating resin, or a substrate formed by coating the surface of a flat metal core with an insulating resin.

[0024] Conductive patterns 502 and 503 provided on the upper surface of insulating substrate 501 are conductive members used as wiring members in circuit board 5, and conductive pattern 504 provided on the lower surface of insulating substrate 501 is a conductive member used as a heat dissipation member that conducts heat generated in circuit board 5 to base 4. These conductive patterns 502 to 504 are formed of metal plates such as copper or aluminum. Conductive pattern 504 provided on the lower surface of insulating substrate 501 is joined to the upper surface of base 4 with a bonding material S1 such as solder. Conductive patterns 502 and 503 provided on the upper surface of insulating substrate 501 may also be called conductor layers, conductor plates, or wiring patterns. Conductive pattern 504 provided on the lower surface of insulating substrate 501 may also be called a heat dissipation layer, heat dissipation plate, or heat dissipation pattern.

[0025] As described above, the conductor patterns 502 and 503 provided on the upper surface of the insulating substrate 501 are conductive members used as wiring members in the circuit board 5. In the semiconductor module 2 illustrated in Figures 1 and 2, a semiconductor element 510 is mounted on the upper surface of the first conductor pattern 502. The semiconductor element 510 has a first main electrode (not shown) provided on the lower surface thereof joined to the first conductor pattern 502 by a bonding material S2.

[0026] A second main electrode (not shown) and a control electrode 512 are provided on the upper surface of the semiconductor element 510. These electrodes are electrically insulated by an insulating layer (not shown) formed on the upper surface of the semiconductor element 510. The insulating layer may be a surface protection film such as a passivation film formed on the upper surface of the semiconductor element 510. The second main electrode is electrically connected to a second conductor pattern 503 provided on the upper surface of the insulating substrate 501 via a lead 7. The lead 7 includes a first bonding portion 701, a second bonding portion 702, and a wiring portion 703 connecting the first bonding portion 701 and the second bonding portion 702. The first bonding portion 701 is electrically connected to the second main electrode of the semiconductor element 510 by a bonding material S3. The second bonding portion 702 is bonded to the second conductor pattern 503 of the wiring board 500 by a bonding material S4. A control electrode 512 on the upper surface of the semiconductor element 510 is electrically connected to a control terminal 604 provided on the case 6 by a bonding wire 8 .

[0027] In the semiconductor module 2 illustrated in FIGS. 1 and 2, the first conductor pattern 502 is electrically connected to a first main terminal 602 provided on the case 6, and the second conductor pattern 503 is electrically connected to a second main terminal 603 provided on the case 6. The method for electrically connecting the first conductor pattern 502 to the first main terminal 602 and the second conductor pattern 503 to the second main terminal 603 may be any known connection method and is not limited to a specific method. Furthermore, the shapes and positions of the main terminals 602 and 603 on the case 6, and the number and positions of the control terminals 604, etc., are not limited to those illustrated and can be changed as appropriate. Furthermore, the case 6 of the semiconductor module 2 of this embodiment may be provided with a third main terminal, etc. (not shown).

[0028] In this embodiment, the semiconductor element 510 is configured by, for example, an RC (Reverse Conducting)-IGBT element that integrates the functions of an IGBT (Insulated Gate Bipolar Transistor) element and an FWD (Free Wheeling Diode) element.

[0029] The semiconductor elements mounted on the upper surface of wiring board 500 are not limited to a specific type. Semiconductor elements serving as switching elements, such as IGBTs and power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and semiconductor elements serving as diode elements, such as FWDs, may be mounted on the upper surface of wiring board 500. Alternatively, a reverse blocking (RB)-IGBT or the like, which has sufficient voltage resistance against reverse bias, may be used as the semiconductor elements. The semiconductor elements are formed, for example, on a semiconductor substrate made of silicon (Si), silicon carbide (SiC), or the like, in a rectangular shape in a plan view. The shape, number, and location of the semiconductor elements may be changed as appropriate. The layout of the conductor patterns serving as wiring members provided on the upper surface of wiring board 500 may be changed depending on the type, shape, number, and location of the semiconductor elements to be mounted.

[0030] If the switching element in the semiconductor element 510 is an IGBT element, the second main electrode on the upper surface may be called an emitter electrode, and the first main electrode on the lower surface may be called a collector electrode. If the switching element in the semiconductor element 510 is a MOSFET element, the second main electrode on the upper surface may be called a source electrode, and the first main electrode on the lower surface may be called a drain electrode. The control electrode 512 provided on the upper surface of the semiconductor element 510 may include a gate electrode and an auxiliary electrode. For example, the auxiliary electrode may be an auxiliary emitter electrode or auxiliary source electrode electrically connected to the second main electrode and serving as a reference potential for the gate potential. The auxiliary electrode may be a temperature sense electrode electrically connected to a temperature sensor and measuring the temperature of the semiconductor element 510. Such electrodes formed on the upper surface of the semiconductor element 510 (the control electrode 512 including the second main electrode, gate electrode, and auxiliary electrode) may be collectively referred to as upper surface electrodes.

[0031] The lead 7 described above is formed by bending a metal plate such as a copper plate, and may also be called a lead frame or a metal wiring plate. An insulating layer is formed on the upper surface of the semiconductor element 510 so as to surround a second main electrode that is electrically connected to the first joint portion 701 of the lead 7. The insulating layer surrounding the second main electrode restricts the spreading of the bonding material S3 that bonds the second main electrode to the first joint portion 701 of the lead 7 within a plane (XY plane) when melted.

[0032] An end portion of the wiring portion 703 of the lead 7 on the first bonding portion 701 side is connected to one side surface of the first bonding portion 701 and is bent from that side surface in the direction opposite to the bottom surface of the first bonding portion 701 (in other words, the surface of the first bonding portion 701 that faces the second main electrode of the semiconductor element 510). Similarly, an end portion of the wiring portion 703 of the lead 7 on the second bonding portion 702 side is connected to one side surface of the second bonding portion 702 and is bent from that side surface in the direction opposite to the bottom surface of the second bonding portion 702 (in other words, the surface of the second bonding portion 702 that faces the conductor pattern 503).

[0033] The semiconductor element 510, leads 7, bonding wires 8, etc. housed in the case 6 are sealed with a sealing material 9. The sealing material 9 may be a single insulating material or a combination of multiple types of insulating materials with different compositions (properties). For example, the sealing material 9 may include a coating agent such as PA (polyamide) that is coated on the surfaces of the semiconductor element 510, leads 7, etc., and an insulating material such as epoxy resin that is additionally filled in after coating with the coating agent.

[0034] Although not shown in FIG. 1, in the semiconductor device 1 of this embodiment, for example, the upper surface of the first bonding portion 701 of the lead 7 (the surface opposite to the surface facing the semiconductor element 510) is subjected to a roughening treatment to prevent peeling at the interface between the first bonding portion 701 and the sealing material 9. Specifically, a plurality of recesses (hereinafter referred to as "roughening recesses") are provided on the upper surface of the first bonding portion 701. A first example of the plurality of roughening recesses provided on the upper surface of the first bonding portion 701 will be described below with reference to FIGS. 3 to 5.

[0035] FIG. 3 is a partial top view enlarging the region R in FIG. 1. FIG. 4 is a partial top view enlarging one of the roughening recesses (720) formed in the portion shown in FIG. 3. FIG. 5 is a cross-sectional view taken along line B-B' in FIG. 4. FIG. 6 is a diagram illustrating an example of the formation positions and dimensions of the recesses that become the main recesses and the sub-recesses. In FIGS. 3 and 4, the sealing material 9 that fills the case 6 and overlaps the first bonding portion 701 of the lead 7 is omitted. Furthermore, the cross-sectional view in FIG. 5 shows only a portion of the upper surface of the first bonding portion 701 and a portion of the sealing material 9, and the hatching that shows the cross section of the sealing material 9 filled in the case 6 is omitted.

[0036] In a first example of the roughening recesses formed on the upper surface 710 of the first bonding portion 701, one roughening recess 720 is composed of a main recess 721 and four sub-recesses 722 to 725, as illustrated in Figures 3 and 4. As will be described later with reference to Figures 6 and 7 to 9, the main recess 721 is formed by modifying a recess 721' that defines a space in the shape of a square pillar with a flat bottom, formed on the upper surface 710 of the first bonding portion 701, using the four sub-recesses 722 to 725. Each of the four sub-recesses 722 to 725 has a square opening end and is a recess that defines a space in the shape of a quadrangular pyramid with the opening end as the bottom, and is formed such that one face of the quadrangular pyramid deforms one wall surface of the recess 721' before it became the main recess 721 toward the opposing wall surface. One sub-recess (for example, sub-recess 722 located to the left of main recess 721 in FIGS. 4 and 5 (positive side in the Y direction)) deforms left wall surface 721a of recess 721' to the right (negative side in the Y direction), thereby forming a return portion 721b on wall surface 721a. Another sub-recess (for example, sub-recess 723 located to the right of main recess 721 in FIGS. 4 and 5) deforms left wall surface 721c of recess 721' to the left, thereby forming a return portion 721d on wall surface 721c. Furthermore, sub-recess 724 located above main recess 721 in FIG. 4 (positive side in the X direction) deforms upper wall surface 721e of recess 721' downward (negative side in the X direction), thereby forming a return portion 721f on wall surface 721e. In addition, the sub-recess 725 located below the main recess 721 in FIG. 4 deforms the lower wall surface 721g of the recess 721' upward, thereby forming a return portion 721h on the wall surface 721g.

[0037] The dimensions and depths of the bottom surfaces of the main recess 721 and the sub-recesses 722 to 725 are not limited to a specific combination of values. Assuming that the shapes of the open ends of the recess 721' before forming the main recess 721 and the open ends of the sub-recesses 722 to 725 are each substantially square in plan view, the length L2 of the sides of the sub-recesses 722 to 725 may be shorter than the length L1 of the sides of the recess 721'. The distance L3 between the centers (apex positions) of the sub-recesses 722 to 725 and the sides of the recess 721' in plan view may be such that L3 < L2 / 2. The gap L4 between two adjacent recesses 721' before forming the main recess 721 is set to be longer than the length L1 of the sides of the recess 721' so that the sub-recess for deforming the wall surface of one recess 721' and the sub-recess for deforming the wall surface of the other recess 721' do not communicate to form one recess. For example, when the length L1 of the sides of the recess 721' is 0.12 mm and the length L2 of the sides of the sub-recesses 722 to 725 is 0.08 mm, the gap L4 is set to, for example, 0.18 mm. Note that the combination of the values of the side lengths L1, L2, the distance L3, and the gap L4 described above is not limited to a specific combination and can be changed as appropriate.

[0038] Next, referring to FIGS. 7 to 16, the method for forming the roughening recess 720 described above as the first example will be described.

[0039] FIG. 7 is a perspective view illustrating a punch used for forming a recess that becomes a main recess. FIG. 8 is a partial top view illustrating a recess formed in the first joint portion of the lead by the punch illustrated in FIG. 7. FIG. 9 is a cross-sectional view taken along line C-C' of the portion of the first joint portion shown in FIG. 8. FIG. 10 is a perspective view illustrating a punch used for forming a sub-recess. FIG. 11 is a partial top view illustrating a sub-recess formed in the first joint portion of the lead by the punch illustrated in FIG. 10. FIG. 12 is a cross-sectional view taken along line C-C' of the portion of the first joint portion shown in FIG. 11. FIG. 13 is a partial top view illustrating the first joint portion in which a second sub-recess is formed in each recess. FIG. 14 is a cross-sectional view taken along line C-C' of the portion of the first joint portion shown in FIG. 13. FIG. 15 is a partial top view illustrating the first joint portion in which a third sub-recess is formed in each recess. FIG. 16 is a partial top view illustrating the first joint portion in which a fourth sub-recess is formed in each recess.

[0040] The process of forming the roughening recess 720 consisting of one main recess 721 and four sub-recesses 722 to 725 described above with reference to Figures 3 to 6 includes, for example, a process of forming a recess 721' that will become the main recess 721, followed by a process of forming the four sub-recesses 722 to 725.

[0041] In the process of forming the recesses 721', for example, as illustrated in FIG. 7, a mold 10 is used in which a plurality of rectangular pillar-shaped punches (pressing dies) 1001 are arranged adjacent to each other in the X and Y directions with a gap L4 therebetween to form the plurality of recesses 721' in a two-dimensional lattice pattern. At this time, as illustrated in FIGS. 8 and 9, the recesses 721' defining rectangular pillar-shaped spaces with a depth D1 are formed on the top surface 710 of the first bonding portion 701 of the lead 7. The depth D1 of the recesses 721' is set to be sufficiently smaller than the thickness of the first bonding portion 701 (not shown), for example, approximately 0.05 mm. The plurality of recesses 721' may be formed all over the top surface 710 of the first bonding portion 701 at once, or may be formed in multiple steps.

[0042] In the process of forming the four sub-recesses 722-725, the four sub-recesses 722-725 are formed in four separate steps, one for each recess 721′. In this case, for example, as illustrated in FIG. 10 , a die 11 having multiple punches 1101 is used in each sub-recess forming process, with one punch 1101 positioned in the region R2 corresponding to the punch 1001 that forms one recess 721′. The punches 1101 are, for example, square pyramid-shaped with a convex tip. When the die 11 is positioned above the first bonding portion 701 of the lead 7, each side of the square pyramid at the tip is aligned parallel to one of the four sides at the open end of the recess 721′. The punches 1101 are arranged at intervals L5, the same as the intervals L5 between the punches 1001 that form the recess 721′. As described above with reference to FIG. 7 , the interval L5 is the distance between the centers of two adjacent punches 1001, separated by a gap L4.

[0043] Figures 11 and 12 show an example in which, using the punch 1101 of the mold 11, as the first sub-recess for each of the recesses 721', a sub-recess 723 on the right side (negative Y direction) of the recess 721' in plan view is formed. In this example, in plan view, the apex of the quadrangular pyramid at the tip of the punch 1101 is outside the open end of the recess 721' and is at a position at a distance L3 from the right side of the open end (see FIG. 6). The lead 7 is aligned with the mold 11 so that the sub-recess 723 is formed. At this time, one of the triangular slopes in the quadrangular pyramid at the tip of the punch 1101 displaces the metal material portion between the slope and the wall surface 721c of the recess 721' in the direction of the wall surface 721a facing the wall surface 721c. As a result, a return portion 721d protruding in the direction of the wall surface 721a is formed on the wall surface 721c.

[0044] The relationship between the depth D2 of the sub-recess 723 and the depth D1 of the recess 721' is not limited to the relationship of D2 < D1 illustrated in FIG. 12. The depth D2 of the sub-recess 723 may be D2 = D1 or D2 ≈ D1. The position of the sub-recess 723 with respect to the recess 721', the ratio of the dimensions of the open end, the ratio of the depths, the angle of the apex angle of the quadrangular pyramid at the tip of the punch 1101, etc. can be appropriately changed according to, for example, the desired protruding amount L6 from the wall surface 721c of the return portion 721d. Further, by forming the sub-recess 723, a return portion 721d in which the entire wall surface 721c protrudes toward the facing wall surface 721a may be formed.

[0045] 13 and 14 show an example in which a punch 1101 of the mold 11 is used to form a sub-recess 722 to the left of the recess 721' in a plan view (positive Y-direction) as a second sub-recess for each recess 721'. In this example, the first bonding portion 701 of the lead 7 and the mold 11 are aligned so that the apex of the pyramid at the tip of the punch 1101 is outside the open end of the recess 721' and is positioned a distance L3 from the left side of the open end (see FIG. 6 ), forming the sub-recess 722. The sub-recess 722 is formed to a depth D2 under the same processing conditions (pressure conditions) as those used to form the sub-recess 723. At this time, one of the triangular slopes of the pyramid at the tip of the punch 1101 displaces the metal material portion between the slope and the wall surface 721a of the recess 721' toward the wall surface 721c on which the return portion 721d facing the wall surface 721a is formed. As a result, a return portion 721b that protrudes toward the wall surface 721c is formed on the wall surface 721a.

[0046] FIG. 15 shows an example in which a punch 1101 of the mold 11 is used to form a sub-recess 724 above the recess 721' (on the positive side in the X direction) in a plan view as a third sub-recess for each recess 721'. In this example, the first bonding portion 701 of the lead 7 and the mold 11 are aligned so that the apex of the pyramid at the tip of the punch 1101 is outside the opening edge of the recess 721' and is positioned a distance L3 from the upper edge of the opening edge (see FIG. 6 ), forming the sub-recess 724. The sub-recess 724 is formed to a depth D2 under the same processing conditions (pressure conditions) as those used to form the sub-recesses 722 and 723. At this time, one of the triangular slopes of the pyramid at the tip of the punch 1101 displaces a portion of the metal material between the slope and the wall surface 721e of the recess 721' toward the wall surface 721g opposite the wall surface 721e. As a result, a return portion 721f that protrudes in the direction of the wall surface 721g is formed on the wall surface 721e.

[0047] FIG. 16 shows an example in which a punch 1101 of the mold 11 is used to form a fourth sub-recess 725 below the recess 721′ (negative side in the X direction) in a plan view as a fourth sub-recess for each recess 721′. In this example, the first bonding portion 701 of the lead 7 and the mold 11 are aligned so that the apex of the pyramid at the tip of the punch 1101 is outside the opening edge of the recess 721′ and is positioned a distance L3 from the bottom edge of the opening edge (see FIG. 6 ), forming the sub-recess 725. The sub-recess 725 is formed to a depth D2 under the same processing conditions (pressure conditions) as those used to form the sub-recesses 722 to 724. At this time, one of the triangular slopes of the pyramid at the tip of the punch 1101 displaces a metal material portion between the slope and a wall surface 721g of the recess 721′ toward a wall surface 721e on which a return portion 721f facing the wall surface 721g is formed. As a result, a return portion 721h that protrudes in the direction of the wall surface 721e is formed on the wall surface 721g.

[0048] In the above example, the sub-concave portions 722-725 are formed under processing conditions such that the depth is D2. However, the depth of all the sub-concave portions does not have to be the same. For example, in the example shown in FIG. 3, if the stress (thermal strain) generated at the interface between the upper surface 710 of the first bonding portion 701 and the sealing material 9 differs between the X and Y directions, peeling of the sealing material 9 at either the X or Y end may be more likely to occur than peeling of the sealing material 9 at the other end. Alternatively, peeling of the sealing material 9 may be more likely to occur at the outer periphery of the upper surface 710 of the roughening recess 720 than at the inner periphery. In such a case, the sub-concave portion along the side of the roughening recess 720 located at the end in the direction in which greater stress (thermal strain) occurs may be made slightly deeper than D2, thereby increasing the size of the folded portion formed on the wall surface.

[0049] When the four sub-recesses 722 to 725 are formed in each of the recesses 721' in the above-described procedure, barbs 721b, 721d, 721f, and 721h are formed that protrude toward the opposing wall surfaces of the four wall surfaces 721a, 721c, 721e, and 721g of the recesses 721'. As a result, the recesses 721' formed in the first joint portion 701 of the lead 7 by the square pillar-shaped punch 1001 as illustrated in FIG. 7 become the main recesses 721 having the barbs 721b, 721d, 721f, and 721h described above with reference to FIGS. 4 and 5.

[0050] As described above, the upper surface 710 of the first bonding portion 701 of the lead 7 according to the present embodiment is formed with a plurality of roughening recesses 720, each including a main recess 721 having return portions 721b, 721d, 721f, and 721h on its wall surface. When the insulating material serving as the sealing material 9 is filled into the main recess 721 of the roughening recess 720, the return portions 721b, 721d, 721f, and 721h restrict the filled portion from moving in a direction away from the main recess 721 (positive side in the Z direction), making it difficult for the filled portion to come out of the main recess 721. Furthermore, the roughening recess 720 is formed with four sub-recesses 722 to 725, each defining a quadrangular pyramidal space, at positions outside the main recess 721 in a plan view. The formation of these sub-recesses 722-725 increases the area of ​​the interface between the upper surface 710 of the first bonding portion 701 of the lead 7 and the sealing material 9 in the region where one roughening recess 720 is formed, thereby improving adhesion between the first bonding portion 701 and the sealing material 9. Therefore, the semiconductor device 1 (semiconductor module 2) of this embodiment is less likely to peel at the interface between the first bonding portion 701 of the lead 7 and the sealing material 9 than when, for example, a punch 1001 shown in FIG. 7 is used to form only a recess 721′ defining a rectangular prism-shaped space on the upper surface 710 of the first bonding portion 701, as shown in FIGS. 8 and 9 , thereby suppressing failures due to peeling. In particular, the roughening recess 720 according to this embodiment can further improve adhesion between the upper surface 710 of the first bonding portion 701 and a coating agent such as PA applied to the surface of the lead 7, etc., to prevent increased distortion occurring in the failure portion due to peeling of the sealing resin such as epoxy resin used as the sealing material 9 from the first bonding portion 701.

[0051] Furthermore, as in the embodiment described above, when forming sub-recesses using die 11 aligned so that the center of punch 1101 is located outside recess 721' in plan view and at a distance L3 from the wall surface of recess 721', the process of forming multiple sub-recesses for one recess 721' can be performed multiple times. This means that the constraints on the processing dimensions when forming the sub-recesses are relatively relaxed, making it easy to form return portions with the desired protrusion amount.

[0052] 10 is merely an example of a punch that can be used to form the sub-depressions 722-725 for forming the main depression 721 having the return portions 721b, 721d, 721f, and 721h on the wall surface. The shape of the tip of the punch (pressing die) used to form the sub-depressions 722-725 may be other shapes.

[0053] FIG. 17 is a perspective view showing another example of a punch used to form the sub-recesses. In the mold 12 illustrated in FIG. 17, mountain-shaped (wedge-shaped) punches 1201, each having a tip formed with two flat surfaces, are arranged in a two-dimensional lattice pattern. Similar to the punch 1101 of the mold 11 illustrated in FIG. 11, the punch 1201 illustrated in FIG. 17 is arranged in a region R2 corresponding to the punch 1001 that forms one recess 721′. The punches 1201 are arranged at intervals L5, the same as the intervals L5 between the punches 1001 that form the recesses 721′. The interval L5 is the distance between the centers of two punches 1001 adjacent to each other across a gap L4. In this case, the multiple punches 1201 are arranged in a two-dimensional lattice pattern so that the ridges of their tips extend in the same direction (the X direction in FIG. 17).

[0054] 17, the sub-recess is formed by aligning the first joint portion 701 of the lead 7 with the mold 12 so that the ridge line of the tip of the punch 1201 is outside the open end of the recess 721' and parallel to the side corresponding to the side on which the return portion is formed by the punch 1201, at a distance L3 from the side. Although not shown, the sub-recess formed by each punch 1201 is a valley-shaped space having a valley line extending in a direction parallel to the ridge line of the tip of the punch 1201. In this case, the plane between the ridge line and the wall surface of the recess 721', one of the two planes constituting the mountain shape of the tip of the punch 1201, displaces the metal material portion between that plane and the wall surface of the recess 721', thereby forming the return portion. When forming a return portion on each of the four wall surfaces of the recess 721′ using a mold 12 having a punch 1201 as illustrated in FIG. 17, for example, a first mold may be prepared in which the extension direction of the ridge line of the punch 1201 is set to a first direction in order to form a return portion on a side surface of the recess 721′ that is parallel to the first direction (X direction), and a second mold may be prepared in which the extension direction of the ridge line of the punch 1201 is set to a second direction in order to form a return portion on a side surface of the recess 721′ that is parallel to the second direction (Y direction). Furthermore, when forming a return portion on each of the four wall surfaces of the recess 721′ using a mold 12 having a punch 1201 as illustrated in FIG. 17, for example, a common mold 12 may be used for the step of forming a return portion on a side surface of the recess 721′ parallel to the first direction (X direction) and the step of forming a return portion on a side surface of the recess 721′ parallel to the second direction (Y direction), and the mold 12 may be rotated for each step so that the extension direction of the ridge line of the punch 1201 is parallel to the side surface on which the return portion is to be formed.

[0055] In the above-described embodiment, an example is shown in which at least two sub-recesses are formed for one recess 721' using one mold. However, each of the four sub-recesses for one recess 721' may be formed using a different mold. In this case, the tip of the punch in one mold used to form one sub-recess may have any shape that allows a return portion to be formed on a desired wall surface of the recess 721'. For example, instead of the punch 1201 with a mountain-shaped tip shown in FIG. 17, a sub-recess may be formed using a mold in which single-edged punches are two-dimensionally arranged.

[0056] Furthermore, the arrangement of the plurality of roughening recesses 720 described in the above-described embodiment is not limited to a two-dimensional lattice arrangement across the entire upper surface 710 of the first bonding portion 701 of the lead 7 as illustrated in FIG. 3. The plurality of roughening recesses 720 may be arranged only within a predetermined region on the upper surface 710. Furthermore, the roughening recesses 720 including the main recess 721 and the sub-recesses 722 to 725, and recesses that do not include sub-recesses and do not have return portions formed on the wall surfaces (for example, the recess 721′ defining the above-described rectangular prism-shaped space) may be arranged on the upper surface 710 of the first bonding portion 701. That is, in the above-described embodiment, the recess 721′ defining the rectangular space may be formed on the upper surface 710 of the first bonding portion 701 as a second roughening recess, separate from the roughening recess 720.

[0057] Fig. 18 is a partial top view illustrating a first modified example of the arrangement of the roughening recesses. Fig. 19 is a partial top view illustrating a second modified example of the arrangement of the roughening recesses. Fig. 20 is a partial top view illustrating a third modified example of the arrangement of the roughening recesses. Fig. 21 is a partial top view illustrating a fourth modified example of the arrangement of the roughening recesses. Fig. 22 is a partial top view illustrating a fifth modified example of the arrangement of the roughening recesses.

[0058] FIG. 18 shows an example in which the roughening recesses 720 are not located at some of the lattice points of the two-dimensional lattice where the roughening recesses 720 are located. The upper surface 710 of the first bonding portion 701 of the lead 7 is generally a flat surface, and as illustrated in FIG. 3, the roughening recesses 720 can be formed in a two-dimensional lattice pattern across the entire upper surface 710. However, in some types of leads 7, for example, the upper surface 710 of the first bonding portion 701 may be partially provided with an area having a function different from the roughening recesses. In such a case, it may be impossible to form the roughening recesses 720 in the area provided on the upper surface 710 of the first bonding portion 701 of the lead 7. In such a case, for example, as illustrated in FIG. 18, the roughening recesses 720 may not be formed in the area where the roughening recesses 720 cannot be formed.

[0059] 19 and 20 show an example in which roughening recesses 720, each including a main recess 721 and sub-recesses 722-725, and recesses 721' without return portions formed using the sub-recesses are arranged in a two-dimensional lattice pattern on the upper surface 710 of the first bonding portion 701 of the lead 7. It is known that peeling at the interface between the upper surface 710 of the first bonding portion 701 and the encapsulant 9 occurs at the outer periphery of the upper surface 710 of the first bonding portion 701 and progresses in a direction perpendicular to the edge of the upper surface 710. Therefore, as shown in FIGS. 19 and 20, by arranging the roughening recesses 720, each including the main recess 721 and sub-recesses 722-725 with the return portions, along the outer periphery of the upper surface 710 of the first bonding portion 701, peeling of the encapsulant 9 at the outer periphery of the upper surface 710 can be suppressed. If peeling of the encapsulant 9 at the outer periphery of the upper surface 710 of the first bonding portion 701 can be suppressed, the progression of peeling will be reduced. Therefore, in the area of ​​the upper surface 710 surrounded by the roughening recesses 720 arranged along the outer periphery, recesses 721' without return portions, formed by the punch 1001 illustrated in Figure 7, may be arranged as second roughening recesses in order to prevent peeling at the interface between the conductive material as the lead 7 and the sealing material 9.

[0060] 19 shows an example in which, of the two-dimensional lattice set on the upper surface 710 of the first bonding portion 701 in a plan view, one row along the side 711 closest to the side 711 and one column along the side 712 closest to the side 712 are roughening recesses 720. In this example, of the recesses for preventing peeling of the sealant 9 arranged in a two-dimensional lattice pattern on the upper surface 710 of the first bonding portion 701, only the recesses arranged in a ring shape at the outermost periphery are roughening recesses 720 including a main recess 721 and sub-recesses 722 to 725, and recesses 721' without return portions are arranged within the area surrounded by the ring-shaped roughening recesses 720. The recesses 721' without return portions are not arranged in areas of the upper surface 710 of the first bonding portion 701 where recesses for preventing peeling of the sealant 9 cannot be formed.

[0061] 20 shows an example in which two rows along side 711 and two columns along side 712 of a two-dimensional lattice set on the upper surface 710 of the first bonding portion 701 in a plan view are roughening recesses 720. In this example, of the recesses for preventing peeling of the sealant 9 arranged in a two-dimensional lattice pattern on the upper surface 710 of the first bonding portion 701, only the recesses arranged in a ring shape on the outermost periphery and a second periphery adjacent to the outermost periphery are roughening recesses 720 including main recesses 721 and sub-recesses 722 to 725, and recesses 721' without return portions are arranged within the area surrounded by the ring-shaped roughening recesses 720. The recesses 721' without return portions are not arranged in areas of the upper surface 710 of the first bonding portion 701 where recesses for preventing peeling of the sealant 9 cannot be formed.

[0062] The number of rows and columns in which the roughening recesses 720, including the main recess 721 and the sub-recesses 722 to 725 having return portions, are arranged on the upper surface 710 of the first bonding portion 701 in a plan view is not limited to a specific combination. The number of rows and columns in which the roughening recesses 720 are arranged may be set, for example, according to the dimension of the upper surface 710 of the first bonding portion 701 in a first direction (X direction) and the dimension of the upper surface 710 of the first bonding portion 701 in a second direction (Y direction) perpendicular to the first direction. For example, in the example shown in FIGS. 19 and 20 , if the stress (thermal strain) generated at the interface between the upper surface 710 of the first bonding portion 701 and the sealing material 9 differs between the X direction and the Y direction, peeling of the sealing material 9 at either the end in the X direction or the end in the Y direction may be more likely to occur than peeling of the sealing material 9 at the other end. In such a case, the number of rows or columns of the roughening recesses 720 along the edge located at the end in the direction in which greater stress (thermal strain) occurs may be greater than the number of rows or columns of the roughening recesses 720 along the edge located at the end in the direction in which lesser stress (thermal strain) occurs.

[0063] FIG. 21 shows another example in which roughening recesses 720, each including a main recess 721 and sub-recesses 722-725, and recesses 721′ using the sub-recesses and not having a return portion are arranged in a two-dimensional lattice pattern on the upper surface 710 of the first bonding portion 701 of the lead 7. In FIG. 21, the roughening recesses 720 with a return portion and the recesses 721′ without a return portion are arranged adjacent to each other in the directions (X direction and Y direction) of the unit translation vector representing the two-dimensional lattice arranging the roughening recesses 720 and the recesses 721′. In other words, the roughening recesses 720 with a return portion and the recesses 721′ without a return portion are arranged alternately in the first direction (X direction) and the second direction (Y direction) on the upper surface 710 of the first bonding portion 701, respectively. The arrangement of the roughening recesses 720 and the arrangement of the recesses 721′ illustrated in FIG. 21 may each be referred to as a staggered arrangement.

[0064] Fig. 22 shows a modified example of a roughening recess 720 including a main recess 721 having a return portion formed on the wall surface by a sub-recess. In the roughening recess 720 described above with reference to Figs. 3 to 5, etc., a recess 721' defining a rectangular prism-shaped space has four wall surfaces 721a, 721c, 721e, and 721g each having return portions 721b, 721d, 721f, and 721h formed by the sub-recess, which protrude toward the opposing wall surface. In contrast, in the roughening recess 720 shown in Fig. 22, return portions protruding toward the opposing wall surface are formed by the sub-recess on only three of the four wall surfaces 721a, 721c, 721e, and 721g of each recess 721'. 22, each of the roughening recesses 720 has a sub-recess formed between at least the main recess 721 and one of the sides of the upper surface 710 of the first bonding portion 701 that is closest to the main recess 721. Note that the positions and number of the sub-recesses relative to the main recess 721 in the roughening recess 720 are not limited to those illustrated in FIG.

[0065] The roughening recess 720 described above with reference to the drawings is merely an example of a roughening recess including a main recess having a return portion formed toward one or more opposing wall surfaces of the recess, and a sub-recess having a center outside the main recess in a plan view, a predetermined distance L3 away from the wall surface on which the return portion is formed, and a slope that becomes shallower from the center toward the open end of the main recess. The relationship between the main recess and one or more sub-recesses in the roughening recess 720 is not limited to the example described above with reference to the drawings, and various changes and modifications are possible. Furthermore, the recess without a return portion formed by the sub-recess is not limited to the recess 721′ that defines a rectangular prism-shaped space used to form the main recess 721, but may also be a recess defining a space of another shape.

[0066] As described above, the semiconductor device 1 including the semiconductor module 2 of this embodiment can be applied to a power conversion device such as an inverter for an in-vehicle motor. A vehicle to which the semiconductor device 1 of the present invention is applied will be described with reference to Fig. 23 .

[0067] Fig. 23 is a schematic plan view showing an example of a vehicle to which the semiconductor device according to the present invention is applied. Vehicle 2001 shown in Fig. 23 is, for example, a four-wheeled vehicle having four wheels 2002. Vehicle 2001 may be, for example, an electric vehicle in which the wheels are driven by a motor or the like, or a hybrid vehicle that uses power from an internal combustion engine in addition to a motor.

[0068] Vehicle 2001 includes drive unit 2003 that applies power to wheels 2002, and control device 2004 that controls drive unit 2003. Drive unit 2003 may be configured with at least one of an engine, a motor, or a hybrid of an engine and a motor, for example.

[0069] The control device 2004 controls (for example, controls power) the above-described drive unit 2003. The control device 2004 includes the above-described semiconductor device 1. The semiconductor device 1 may be configured to control power to the drive unit 2003.

[0070] In the semiconductor module 2 of the semiconductor device 1 used in this type of vehicle 2001, if the first bonding portion 701 of the lead 7 described above is bonded to an electrode on the top surface of the semiconductor element (for example, the second main electrode of the semiconductor element 510) with the bonding material S3, it is possible to prevent the progression of peeling at the interface between the sealing material 9 and the top surface 710 of the first bonding portion 701. This makes it possible to reduce the frequency of inspection and replacement of the semiconductor device 1 used in the vehicle 2001.

[0071] The vehicle to which the semiconductor device 1 is applied is not limited to a four-wheeled vehicle as exemplified in Fig. 23. The vehicle to which the semiconductor device 1 is applied includes, for example, two-wheeled vehicles and railroad vehicles.

[0072] Although the present embodiment and modifications have been described above, other embodiments may be combinations of the above embodiments and modifications in whole or in part.

[0073] Furthermore, the present embodiment is not limited to the above-described embodiments and modifications, and may be variously changed, substituted, or modified within the scope of the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way due to technological advances or other derived technologies, it may be implemented using that method. Therefore, the scope of the claims covers all embodiments that may fall within the scope of the technical idea.

[0074] The features of the above embodiment will be summarized below.

[0075] The semiconductor module according to the above embodiment comprises a circuit board on which a semiconductor element is mounted, leads joined to electrodes on the upper surface of the semiconductor element by a bonding material, and a sealing material that seals the semiconductor element and the leads. The leads have a roughening recess formed on their upper surface opposite to the lower surface facing the electrode at the joint where they are joined to the electrode, to prevent peeling at the interface between the lead and the sealing material. The roughening recess includes a main recess having a return portion formed thereon that protrudes toward a wall surface facing one or more wall surfaces of the recess, and a sub-recess that is outside the main recess in a planar view, has its center at a predetermined distance from the wall surface on which the return portion is formed, and has a slope that becomes shallower from the center toward the opening end of the main recess.

[0076] In the semiconductor module according to the above embodiment, the main recess has a rectangular shape with a flat bottom, the sub-recess has a rectangular opening end and is shaped to define a quadrangular pyramidal space with the opening end as its bottom, and each side of the opening end of the sub-recess is approximately parallel to one of the sides of the bottom of the main recess.

[0077] In the semiconductor module according to the above embodiment, the main recess has a rectangular shape with a flat bottom, and the sub-recess has a rectangular opening end and a shape that defines a valley-shaped space with a valley line that is approximately parallel to the sides of the opening end and the sides of the bottom surface of the main recess.

[0078] In the semiconductor module according to the above embodiment, the main recess has a shape in which the return portion is formed on each of four wall surfaces of the recess that defines a quadrangular prism-shaped space.

[0079] In the semiconductor module according to the above embodiment, the gap between the main recesses of two adjacent roughening recesses is longer than the dimension of the main recess in the direction in which the two roughening recesses are adjacent to each other.

[0080] In the semiconductor module according to the above embodiment, the roughening recesses are arranged at positions corresponding to lattice points of a two-dimensional lattice set on the top surface of the first bonding portion of the lead.

[0081] In the semiconductor module according to the above embodiment, the roughening recess having the return portion formed thereon and the second roughening recess having no return portion are arranged adjacent to each other at positions corresponding to the lattice points of the two-dimensional lattice.

[0082] In the semiconductor module according to the above embodiment, the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion.

[0083] In the semiconductor module according to the above embodiment, a second roughening recess that does not have a return portion is arranged within an area surrounded by the annularly arranged roughening recesses on the upper surface of the first joint.

[0084] The semiconductor device according to the above embodiment includes the above semiconductor module, and a cooler disposed on the surface of the circuit board of the semiconductor module opposite to the surface on which the semiconductor element is mounted.

[0085] The vehicle according to the above embodiment includes the above semiconductor module or semiconductor device. [Industrial Applicability]

[0086] As described above, the present invention has the effect of preventing peeling at the interface between the upper surface of the joint portion of the lead that is joined to the electrode of the semiconductor element and the sealing material, and is particularly useful for industrial or electrical semiconductor modules, semiconductor devices, and vehicles.

[0087] This application is based on Japanese Patent Application No. 2022-170593, filed on October 25, 2022, the contents of which are incorporated herein in their entirety.

Claims

1. a circuit board on which a semiconductor element is mounted; a lead bonded to an electrode on the upper surface of the semiconductor element by a bonding material; a sealing material that seals the semiconductor element and the leads, the lead has a roughening recess formed on an upper surface opposite to a lower surface facing the electrode at a joint portion joined to the electrode, the roughening recess preventing peeling at an interface between the lead and the sealing material; The roughening recess includes a main recess in which a return portion protruding toward one or more wall surfaces of the recess is formed only on the upper portion of the wall surface opposite the return portion, and a sub-recess that is located outside the main recess in a plan view, has a center at a position a predetermined distance away from the wall surface on which the return portion is formed, has an inclined surface that becomes shallower from the center toward the open end of the main recess, and the inclined surface overlaps the wall surface in a plan view. Semiconductor module.

2. The main recess has a rectangular shape with a flat bottom surface, and the sub-recess has a rectangular opening end and a shape that defines a quadrangular pyramidal space with the opening end as the bottom surface, and each side of the opening end of the sub-recess is approximately parallel to one of the sides of the bottom surface of the main recess. The semiconductor module according to claim 1 .

3. The main recess has a rectangular shape with a flat bottom surface, and the sub-recess has a rectangular opening end and a shape that defines a valley-shaped space with a valley line that is approximately parallel to the sides of the opening end and the sides of the bottom surface of the main recess. The semiconductor module according to claim 1 .

4. The main recess has a shape in which the return portion is formed on each of four wall surfaces of a recess that defines a quadrangular prism-shaped space. The semiconductor module according to claim 1 .

5. The gap between the main recesses of two adjacent roughening recesses is longer than the dimension of the main recess in the direction in which the two roughening recesses are adjacent to each other. The semiconductor module according to claim 1 .

6. The roughening recesses are arranged at positions corresponding to lattice points of a two-dimensional lattice set on the top surface of the first bonding portion of the lead. The semiconductor module according to claim 1 .

7. The roughening recess having the return portion formed therein and a second roughening recess having no return portion are arranged adjacent to each other at positions corresponding to the lattice points of the two-dimensional lattice. The semiconductor module according to claim 6 .

8. The semiconductor module according to claim 1 , wherein the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion of the lead.

9. A second roughening recess not having the return portion is disposed in a region surrounded by the annularly arranged roughening recesses on the upper surface of the first bonding portion. The semiconductor module according to claim 8 .

10. a circuit board on which a semiconductor element is mounted; a lead bonded to an electrode on the upper surface of the semiconductor element by a bonding material; a sealing material that seals the semiconductor element and the leads, the lead has a roughening recess formed on an upper surface opposite to a lower surface facing the electrode at a joint portion joined to the electrode, the roughening recess preventing peeling at an interface between the lead and the sealing material; The roughening recess includes a main recess in which a return portion that protrudes toward one or more wall surfaces of the recess so that the vicinity of the center of the wall surface is convex in plan view is formed only on the upper part of the wall surface, and a sub-recess that is outside the main recess in plan view, has a center at a position a predetermined distance away from the wall surface on which the return portion is formed, has an inclined surface that becomes shallower from the center toward the open end of the main recess, and the inclined surface overlaps the wall surface in plan view. Semiconductor module.

11. the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion of the lead; The depth of the sub-recess on the side along the first side of the roughening recess along a first side located at an end of the top surface in a first direction in the plan view is different from the depth of the sub-recess on the side along the second side of the roughening recess along a second side located at an end of the top surface in a second direction perpendicular to the first direction in the plan view. The semiconductor module according to claim 1 .

12. the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion of the lead; The number of rows of the roughening recesses along the edge of the top surface in a first direction in the plan view is different from the number of rows of the roughening recesses along the edge of the top surface in a second direction perpendicular to the first direction in the plan view, or the number of columns of the roughening recesses along the edge of the top surface in the first direction in the plan view is different from the number of columns of the roughening recesses along the edge of the top surface in the second direction in the plan view. The semiconductor module according to claim 1 .

13. the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion of the lead; The depth of the sub-recess on the side along the first side of the roughening recess along a first side located at an end of the top surface in a first direction in the plan view is different from the depth of the sub-recess on the side along the second side of the roughening recess along a second side located at an end of the top surface in a second direction perpendicular to the first direction in the plan view. The semiconductor module according to claim 10.

14. the roughening recess is arranged in a ring shape along a side of the top surface of the first bonding portion of the lead; The number of rows of the roughening recesses along the edge of the top surface in a first direction in the plan view is different from the number of rows of the roughening recesses along the edge of the top surface in a second direction perpendicular to the first direction in the plan view, or the number of columns of the roughening recesses along the edge of the top surface in the first direction in the plan view is different from the number of columns of the roughening recesses along the edge of the top surface in the second direction in the plan view. The semiconductor module according to claim 10.

15. A semiconductor module according to any one of claims 1 to 14; a cooler disposed on a surface of the circuit board of the semiconductor module opposite to a surface on which the semiconductor element is mounted; A semiconductor device comprising:

16. A vehicle comprising the semiconductor module according to any one of claims 1 to 14.

17. A vehicle comprising the semiconductor device according to claim 15.

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