Insulated circuit boards, semiconductor devices, and power converters

Abstract

The purpose of the present invention is to provide an insulated circuit board that makes it possible to suppress warpage.　In order to achieve this purpose, the present invention employs, as a solution, an insulated circuit board comprising a ceramic base material, one or more circuit patterns that are provided to a surface of the ceramic base material, and one or more back patterns that are provided to another surface of the ceramic base material and that are thinner than the circuit patterns, wherein the back patterns are enlarged and moved using an adjustment factor in accordance with the distance from the center of the entirety of one or more reference patterns which are set to have the same shape as the circuit patterns.

Description

Technical Field

[0001] The present invention relates to an insulating circuit board, a semiconductor device, and a power converter.

Background Art

[0002] Patent Document 1 below discloses a semiconductor device including a heat sink and an insulating substrate. The insulating substrate includes a ceramic base material, a circuit pattern, and a back surface pattern. The ceramic base material is joined to the circuit pattern and the back surface pattern by an active metal joining or direct joining. A semiconductor element is joined to the circuit pattern via an under-bump of the semiconductor element, and the back surface pattern is joined to the heat sink by an under-board solder, so that the entire insulating substrate is fixed to the heat sink. In this semiconductor device, the corner portions of the circuit pattern and the corner portions of the back surface pattern are set-patterned, and the vicinity other than the corner portions of the circuit pattern and the vicinity other than the corner portions of the back surface pattern are offset-patterned. Further, a semiconductor device is disclosed in which the curvature of the corner portion of the back surface pattern is made larger than the curvature of the corner portion of the circuit pattern.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in the above background art, in the insulating substrate (insulating circuit board), the circuit pattern is formed thicker than the back surface pattern. That is, in the insulating circuit board of the background art, the thicknesses of the conductive patterns provided on both surfaces of the ceramic base material are different. In such a configuration of the insulating circuit board, when heat acts, the elongation of the circuit pattern and the back surface pattern is not uniform, so there is a problem that warping of the insulating circuit board cannot be suppressed.

[0005] The present invention has been made in view of the above circumstances, and aims to provide an insulating circuit board capable of suppressing warping, as well as a semiconductor device and a power converter equipped with the insulating circuit board. [Means for solving the problem]

[0006] An insulating circuit board according to an aspect of the present disclosure is an insulating circuit board comprising a ceramic substrate, one or more circuit patterns provided on one surface of the ceramic substrate, and one or more back patterns provided on the other surface of the ceramic substrate and thinner than the circuit patterns, wherein the back patterns are enlarged and moved using an adjustment coefficient corresponding to the distance from the overall center of one or more reference patterns set to the same shape as the circuit patterns. [Effects of the Invention]

[0007] According to this disclosure, it is possible to provide an insulating circuit board capable of suppressing warping, as well as a semiconductor device and a power converter equipped with the insulating circuit board. [Brief explanation of the drawing]

[0008] [Figure 1A] This is a front view showing the mechanical configuration of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 1B] This is a rear view showing the mechanical configuration of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 1C] This is a cross-sectional view showing the mechanical configuration of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 2] This is a longitudinal cross-sectional view showing the configuration of semiconductor device B according to one embodiment of the present disclosure. [Figure 3] This is a block diagram showing the configuration of a power converter C according to one embodiment of the present disclosure. [Figure 4A] This is a first front view showing the features of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 4B] This is a second front view showing the features of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 5A] This is a first schematic diagram showing the features of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 5B] This is a second schematic diagram showing the features of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 6] This is a third front view showing the features of an insulating circuit board A according to one embodiment of the present disclosure. [Figure 7] This is a cross-sectional view showing a modified configuration of an insulating circuit board A according to one embodiment of the present disclosure. [Best Mode for Carrying Out the Invention]

[0009] An embodiment of this disclosure will be described below with reference to the drawings. The insulating circuit board A according to this embodiment is a DCB board equipped with a ceramic plate 1, a circuit pattern 2, and a back pattern 3, as shown in Figures 1A to 1C. That is, this insulating circuit board A is made using the DCB (Direct Copper Bonding) method without using adhesive. This is a board 1 with the circuit pattern 2 and the back pattern 3 directly bonded to it.

[0010] The ceramic plate 1 is an insulating plate made of ceramics. This ceramic plate 1 is the base material for the insulating circuit board A, and is an insulating flat plate formed in a predetermined rectangular shape and having a predetermined thickness. Such a ceramic plate 1 has a front surface (top surface) and a back surface (bottom surface).

[0011] Circuit pattern 2 is a conductive pattern provided on the surface (top surface) of ceramic plate 1. As shown in Figure 1A, this circuit pattern 2 is composed of a plurality of individual circuit patterns 2a to 2g, and is a thin, plate-like member of a predetermined shape formed from a predetermined conductive material. These plurality of individual circuit patterns 2a to 2g are island-like conductive portions that are independent of each other, that is, not connected to each other.

[0012] The back pattern 3 is a conductive pattern provided on the back surface (lower surface) of the ceramic plate 1 corresponding to the plurality of individual circuit patterns 2a to 2g. As shown in FIG. 1B, this back pattern 3 is composed of a plurality of individual back patterns 3a to 3g, and is a member having a predetermined shape and a thin plate shape formed from a predetermined conductive material. These plurality of individual back patterns 3a to 3g are island-shaped conductive portions independent of each other, similar to the plurality of individual circuit patterns 2a to 2g.

[0013] Here, the back pattern 3 is obtained by expanding and moving a plurality of reference patterns 3R virtually set to the same shape as the plurality of individual circuit patterns 2a to 2g on the back surface (lower surface) of the ceramic plate 1, using an adjustment coefficient corresponding to the distance from the overall center of the plurality of reference patterns 3ra to 3rg. Details of the shape and position adjustment process for obtaining the individual back patterns 3a to 3g from the reference pattern 3R will be described later.

[0014] That is, the plurality of individual back patterns 3a to 3g are in a front-back relationship with the plurality of individual circuit patterns 2a to 2g and are formed in the same shape. By multiplying the adjustment coefficient to the plurality of reference patterns 3R, the shape and position are adjusted with respect to the plurality of individual circuit patterns 2a to 2g.

[0015] Such an insulating circuit board A is a component of the semiconductor device B as shown in FIG. 2. That is, the semiconductor device B according to the present embodiment is one in which circuit components such as semiconductor elements 4a, 4b and a conductive member 5 are mounted on the insulating circuit board A. In FIG. 2, a state where the first semiconductor element 4a and the conductive member 5 are mounted on the individual circuit pattern 2c and the second semiconductor element 4b is mounted on the individual circuit pattern 2a is shown as an example.

[0016] The semiconductor device B is, for example, a switching element in which a plurality of transistors are connected in parallel. That is, the first and second semiconductor elements 4a and 4b are transistor chips (semiconductor chips) that are connected to each other in parallel via individual circuit patterns 2a, 2c, etc. The conductive member 5 is a lead frame that outputs the output signals of the first and second semiconductor elements 4a and 4b to the outside.

[0017] As shown in FIG. 3, for example, a total of six such semiconductor devices B are interconnected to form a three-phase inverter C. This three-phase inverter C corresponds to the power conversion device of the present invention. That is, this three-phase inverter C includes first to sixth semiconductor devices B1 to B6 (switching elements) and first to fifth terminals T1 to T5.

[0018] Among the first to sixth semiconductor devices B1 to B6, for the first semiconductor device B1, the collector terminal is connected to the first terminal T1, and the emitter terminal is connected to the collector terminal of the second semiconductor device B2 and the third terminal T3. For the second semiconductor device B2, the collector terminal is connected to the emitter terminal of the first semiconductor device B1 and the third terminal T3, and the emitter terminal is connected to the second terminal T2.

[0019] For the third semiconductor device B3, the collector terminal is connected to the first terminal T1, and the emitter terminal is connected to the collector terminal of the fourth semiconductor device B4 and the fourth terminal T4. For the fourth semiconductor device B4, the collector terminal is connected to the emitter terminal of the third semiconductor device B3 and the fourth terminal T4, and the emitter terminal is connected to the second terminal T2.

[0020] For the fifth semiconductor device B5, the collector terminal is connected to the first terminal T1, and the emitter terminal is connected to the collector terminal of the sixth semiconductor device B6 and the fifth terminal T5. For the sixth semiconductor device B6, the collector terminal is connected to the emitter terminal of the fifth semiconductor device B5 and the fifth terminal T5, and the emitter terminal is connected to the second terminal T2.

[0021] Of the first to fifth terminals T1 to T5, the first and second terminals T1 and T2 are one input / output terminals, and the third to fifth terminals T3 to T5 are the other input / output terminals. In other words, the first and second terminals T1 and T2 are DC terminals that handle DC power input and output, and the third to fifth terminals T3 to T5 are AC terminals that handle AC electric power input and output.

[0022] Furthermore, each base terminal of the first to sixth semiconductor devices B1 to B6 is driven and controlled by a drive circuit and control circuit (not shown). That is, each base terminal of the first to sixth semiconductor devices B1 to B6 is individually input from the drive circuit. The first to sixth semiconductor devices B1 to B6 are set to either an ON state (conductive state) or an OFF state (non-conductive state) based on the drive signals input to each base terminal.

[0023] This type of three-phase inverter C converts DC power input from the outside to the first and second terminals T1 and T2 (DC terminals) into AC power by switching the first to sixth semiconductor devices B1 to B6 ON / OFF, and outputs it to the outside from the third to fifth terminals T3 to T5 (AC terminals).

[0024] Furthermore, this three-phase inverter C converts AC power input from the outside to the third to fifth terminals T3 to T5 (AC terminals) into DC power by switching the first to sixth semiconductor devices B1 to B6 ON / OFF, and outputs it to the outside from the first and second terminals T1 and T2 (DC terminals).

[0025] Such a three-phase inverter C is installed, for example, between the DC power supply and the traction motor of an electric vehicle. It converts the DC power input from the DC power supply to the first and second terminals T1 and T2 (DC terminals) into AC power, and outputs this AC power as driving power to the traction motor from the third to fifth terminals T3 to T5 (AC terminals).

[0026] Furthermore, the three-phase inverter C converts the regenerative power (AC power) input from the drive motor to the third to fifth terminals T3 to T5 (AC terminals) into DC power, and outputs this DC power as charging power to the DC power supply from the first and second terminals T1 and T2 (DC terminals).

[0027] In other words, the insulated circuit board A, semiconductor device B, and three-phase inverter C (power converter) according to this embodiment are applicable to driving the traction motor in an electric vehicle. Furthermore, these insulated circuit board A, semiconductor device B, and three-phase inverter C (power converter) are applicable to charging a DC power source (such as a lithium-ion battery or fuel cell) with regenerative power generated by the traction motor during braking of an electric vehicle.

[0028] As is well known, power conversion devices used in electric vehicles include a power conversion circuit that converts DC power to AC power, such as the three-phase inverter C shown in Figure 3, and a step-up / step-down circuit that steps up or down the voltage of the DC power, connected in series. The insulated circuit board A and semiconductor device B according to this embodiment can also be applied as switching elements in such step-up / step-down circuits (power conversion devices).

[0029] Next, the design method for the back pattern 3 (3a to 3g) on ​​the insulated circuit board A will be explained with reference to Figures 4A to 46.

[0030] To set up the reverse pattern 3 (3a~3g), as shown in Figure 4A, first determine the centroid P of the multiple individual circuit patterns 2 (2a~2g) that have been pre-designed on the surface (top surface) of the ceramic plate 1. This centroid P can be calculated, for example, from the design data (CAD data) of the multiple individual circuit patterns 2 (2a~2g). Alternatively, this centroid P can also be determined by suspending a sample substrate on which only the multiple individual circuit patterns 2 (2a~2g) are provided using a string or the like.

[0031] Furthermore, this centroid P is the same as the geometric center of the multiple individual circuit patterns 2 (2a to 2g) if all of the multiple individual circuit patterns 2 (2a to 2g) are formed from a conductive material of the same thickness and specific gravity. In this embodiment, the multiple individual circuit patterns 2 (2a to 2g) may all be formed from a conductive material of the same thickness and specific gravity, or they may each have a different thickness.

[0032] Once the centroids P of the multiple individual circuit patterns 2 (2a to 2g) are determined in this way, the distance L from the centroid P is calculated for the multiple reference patterns 3R (3ra to 3rg) shown in Figure 4B. This distance L is the deviation from the centroid P of each edge that makes up each reference pattern 3ra to 3rg.

[0033] Figure 5A shows an example of the distance L between the reference pattern 3rc and the centroid P. The reference pattern 3rc is roughly composed of six mutually orthogonal sides h1 to h6, as shown in the figure. For such a reference pattern 3rc, the first distance L1 between the first side h1 and the centroid P is The second distance L2 between the second side h2 and the centroid P is calculated as a deviation.

[0034] Furthermore, for the reference pattern 3rc, the third distance L3 between the third side h3 and the centroid P is calculated as a deviation, and the fourth distance L4 between the fourth side h4 and the centroid P is calculated as a deviation. In addition, for the reference pattern 3rc, the fifth distance L5 between the fifth side h5 and the centroid P is calculated as a deviation, and the sixth distance L6 between the sixth side h6 and the centroid P is calculated as a deviation.

[0035] Then, the adjustment shape for each reference pattern 3ra to 3rg is determined by multiplying the distance L obtained for each reference pattern 3ra to 3rg by a predetermined adjustment coefficient α. For example, for reference pattern 3rc, the first adjustment distance L1' is obtained by multiplying the first distance L1 by the adjustment coefficient α, and the second adjustment distance L2' is obtained by multiplying the second distance L2 by the adjustment coefficient α.

[0036] Furthermore, for standard pattern 3rc, the third adjusted distance L3' is obtained by multiplying the third distance L3 by the adjustment coefficient α, and the fourth adjusted distance L4' is obtained by multiplying the fourth distance L4 by the adjustment coefficient α. In addition, for standard pattern 3rc, the fifth adjusted distance L5' is obtained by multiplying the fifth distance L5 by the adjustment coefficient α, and the sixth adjusted distance L6' is obtained by multiplying the sixth distance L6 by the adjustment coefficient α.

[0037] The reverse pattern 3c, corresponding to the reference pattern 3rc, is composed of the first to sixth adjustment sides h1' to h6', which correspond to the first to sixth adjustment distances L1' to L6', as shown in Figure 5B. Similarly, each of the reverse patterns 3a, 3b, 3d to 3g, other than reverse pattern 3c, is given as an adjustment shape for each of the reference patterns 3ra, 3rb, 3rd to 3rg, based on the distance L and adjustment coefficient α, just like reverse pattern 3c.

[0038] Figure 6 shows the reverse patterns 3 (3a-3g) obtained by adjusting the shape and position of each reference pattern 3ra-3rg based on the distance L and adjustment coefficient α. These reverse patterns 3 (3a-3g) are obtained by adjusting the position of each side that represents the shape of each reference pattern 3ra-3rg using the distance L and adjustment coefficient α, and therefore are not identical in shape to the corresponding reference patterns 3ra-3rg, but rather are shapes that have been extended outward with respect to the center of gravity P.

[0039] Here, the adjustment coefficient α is a quantity given based on, for example, the ratio of the thickness t2 of circuit pattern 2 to the thickness t3 of back pattern 3 (t2 > t3). For example, the adjustment coefficient α is a constant proportional to t2 / t3.

[0040] According to the insulating circuit board A of this embodiment, the shape and position of the back pattern 3, whose thickness t3 is thinner than the thickness t2 of the circuit pattern 2, are adjusted by multiplying the distance L from the centroid P of the circuit pattern 2 by an adjustment coefficient α. This makes it possible to equalize the amount of expansion between the circuit pattern 2 and the back pattern 3 when heat is applied.

[0041] Furthermore, the semiconductor device B according to this embodiment is manufactured by mounting the first and second semiconductor elements 4a and 4b and circuit components such as the conductive member 5 on an insulating circuit board A that has been designed and manufactured as described above. In other words, this semiconductor device B is manufactured by bonding the circuit components to the circuit pattern 2 of the insulating circuit board A using a predetermined bonding material.

[0042] Furthermore, the three-phase inverter C according to this embodiment is manufactured by interconnecting the semiconductor devices B manufactured as described above, as shown in Figure 3. That is, this three-phase inverter C is manufactured by interconnecting six semiconductor devices B with a predetermined connecting material.

[0043] According to this embodiment, it is possible to provide an insulating circuit board A capable of suppressing warping when heat is applied, as well as a semiconductor device B equipped with the insulating circuit board A and a three-phase inverter C (power converter).

[0044] This disclosure is not limited to the embodiments described above, and variations such as the following are possible. (1) In the above embodiments, the adjustment coefficient α was set to a constant, but the present invention is not limited thereto. For example, it is conceivable to set the internal adjustment coefficient β for the inside (center side) and the external adjustment coefficient γ for the outside (outer edge side) of each reference pattern 3ra to 3rg to different values.

[0045] For example, by setting the inner adjustment coefficient β to the adjustment coefficient α mentioned above, and the outer adjustment coefficient γ to a smaller value than the adjustment coefficient α, the amount of adjustment towards the outside (outer edge) of each reference pattern 3ra to 3rg can be limited, and the amount of adjustment towards the inside (center) can be increased by the same amount. This design method for the back pattern 3 makes it possible to suppress warping when heat is applied, as well as to suppress the increase in the thermal resistance of the back pattern 3.

[0046] (2) A metal layer 6 as shown in Figure 7 may be provided on the back surface of the insulating circuit board A. This metal layer 6 is a conductive layer thinner than the back pattern 3 and interconnects multiple back patterns 3 (3a to 3g). With an insulating circuit board A1 equipped with such a metal layer 6, the bonding area is increased, making it possible to improve the bonding strength between the ceramic substrate 1 and the back patterns 3 (3a to 3g).

[0047] Furthermore, this insulated circuit board A1 makes it possible to improve the heat spread effect when a heat sink or cooling element is joined to the back pattern 3 (3a to 3g) via a bonding material such as solder. In other words, this modified example makes it possible to provide an insulated circuit board A1 with excellent heat dissipation.

[0048] (3) Although DCB substrates have been described in each of the above embodiments, the present invention is not limited thereto. The present invention is applicable to various insulating circuit boards in which conductive patterns such as circuit patterns are provided on the surface of an insulating substrate.

[0049] (4) In the above embodiments, a three-phase inverter C was described as an example of a power conversion device, but the present invention is not limited thereto. That is, the power conversion device according to the present invention is applicable to various power conversion circuits other than the three-phase inverter C and step-up / step-down circuits described above.

[0050] [Note 1] An insulating circuit board comprising a ceramic substrate, one or more circuit patterns provided on one surface of the ceramic substrate, and one or more back patterns provided on the other surface of the ceramic substrate, which are thinner than the circuit patterns, The aforementioned back pattern is an insulated circuit board that has been enlarged and moved using an adjustment coefficient corresponding to the distance from the overall center of one or more reference patterns set to the same shape as the circuit pattern.

[0051] [Note 2] The overall center is the centroid of the entire reference pattern in one or more of the reference patterns, as described in Appendix 1, which is the insulating circuit board.

[0052] [Note 3] The insulating circuit board according to Appendix 1 or 2, wherein the adjustment coefficient is set so that the amount of elongation between the circuit pattern and the back pattern becomes equal when heat is applied.

[0053] [Note 4] An insulating circuit board according to Appendix 1 or 2, wherein, when multiple back patterns are provided, the back patterns are interconnected by a metal layer thinner than the back patterns.

[0054] [Note 5] An insulating circuit board as described in Appendix 1 or 2, A semiconductor element joined to the circuit pattern and A semiconductor device equipped with a semiconductor device.

[0055] [Note 6] A power conversion device equipped with the semiconductor device described in Appendix 5 as a switching element. [Industrial applicability]

[0056] This disclosure can be used in insulating circuit boards, semiconductor devices and power converters equipped with said insulating circuit boards. [Explanation of symbols]

[0057] A Insulated circuit board B Semiconductor Device C. Three-phase inverter (power converter) 1 Ceramic plate 2. Circuit patterns 2a~2g 3, 3a~3g Reverse Pattern 3R, 3ra~3rg Standard Pattern 4a, 4b Semiconductor devices 5. Conductive members 6 metal layer

Claims

1. An insulating circuit board comprising a ceramic substrate, one or more circuit patterns provided on one surface of the ceramic substrate, and one or more back patterns provided on the other surface of the ceramic substrate, which are thinner than the circuit patterns, The aforementioned back pattern is an insulated circuit board that has been enlarged and moved using an adjustment coefficient corresponding to the distance from the overall center of one or more reference patterns set to the same shape as the circuit pattern.

2. The insulating circuit board according to claim 1, wherein the overall center is the overall centroid in one or more of the reference patterns.

3. The insulating circuit board according to claim 1 or 2, wherein the adjustment coefficient is set so that the amount of elongation between the circuit pattern and the back pattern becomes equal when heat is applied.

4. In the case where multiple back patterns are provided, the insulating circuit board according to claim 1 or 2, wherein the back patterns are interconnected by a metal layer thinner than the back patterns.

5. An insulating circuit board according to claim 1 or 2, A semiconductor element joined to the circuit pattern and A semiconductor device equipped with a semiconductor device.

6. A power conversion device comprising the semiconductor device described in claim 5 as a switching element.

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