Semiconductor module and method for manufacturing a semiconductor module

The semiconductor module design addresses epoxy resin adherence to high-current/voltage terminals by using a structured case and nozzle positioning, ensuring efficient and reliable power conversion.

JP7830911B2Active Publication Date: 2026-03-17FUJI ELECTRIC CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-02
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

Conventional semiconductor modules face issues with epoxy resin adhering to terminals handling high currents or voltages, leading to increased contact resistance, overheating, and reduced efficiency or failure in driving loads.

Method used

A semiconductor module design with a case structure that includes a peripheral portion and inner wall, featuring offset sealing portions and nozzle positioning to prevent epoxy resin from adhering to terminals by shielding splashes during resin casting.

Benefits of technology

Prevents epoxy resin from adhering to terminals with high currents or voltages, maintaining efficient operation and preventing overheating, thus ensuring reliable power conversion.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a semiconductor module capable of preventing adhesion of an epoxy resin to a terminal to which at least one of high current and high voltage is supplied, and a method for manufacturing the semiconductor module.SOLUTION: A semiconductor module 1 comprises: a case 11 including an inner wall 112 delimiting a cast region 113u and a peripheral part 111 arranged outside the inner wall 112; an intermediate terminal Mu arranged in a long side part 111a of the peripheral part 111 and including fastening surface 751u to which a cable is fastened; a structure 31u adjacent to the long side part 111a in which the intermediate terminal Mu is arranged, arranged in a long side part 112a of the inner wall 112, and higher than the fastening surface 751u; and a sealing part 81u having a weld line WLu formed lean to the side of the structure 31u formed of an epoxy resin on a surface 811u, cast into the cast region 113u, and sealing transistors 211 to 281.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to a semiconductor module applicable to a power conversion device or the like and a method for manufacturing the semiconductor module.

Background Art

[0002] Patent Document 1 discloses that "in the step of hermetically sealing a container and a lid, in order to provide a surface-mounted piezoelectric component in which there is no risk of droplets of sealing solder adhering to a crystal oscillator, a container having a recess and a lid, and a notch is provided at an outer peripheral edge that contacts the lid of the container and at an outer periphery of a position where the container and the lid are sealed, and a sealing member is filled in the notch."

[0003] Patent Document 2 discloses a semiconductor module including a base plate, a resin case provided on the base plate, three main terminals attached to the resin case, a plurality of semiconductor chips provided on the base plate in a hollow space of the resin case, and a sealing material injected into the hollow space. Patent Document 3 discloses a semiconductor module including a plurality of semiconductor chips, a resin case accommodating the plurality of semiconductor chips, input terminals and three-phase output terminals connected to a main power source provided on the surface of the resin case, and a resin for sealing the plurality of semiconductor chips. Patent Document 4 discloses a semiconductor module including a plurality of transistors, a package accommodating the plurality of transistors, and input terminals for power supply and output terminals connected to a motor fixed to the package.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

[0005] Patent Document 1 describes a drawback in the process of sealing a container and lid: when the sealing solder is heated and melted, splashes of molten solder are generated and adhere to the quartz crystal oscillator, causing characteristic defects such as changes in its resonant frequency or the cessation of vibration, which reduces the manufacturing yield of surface-mount piezoelectric components. However, Patent Document 1 does not describe semiconductor modules.

[0006] The main terminal of the semiconductor module disclosed in Patent Document 2, the input terminals and three-phase output terminals of the semiconductor module disclosed in Patent Document 3, and the input terminals and of the semiconductor module disclosed in Patent Document 4 output Terminals are subjected to much higher currents and voltages compared to control terminals connected to semiconductor chips or transistors. In conventional semiconductor modules, epoxy resin, which forms the sealing material, may adhere to these terminals where high currents flow or high voltages are applied. Epoxy resin is an insulating material. Therefore, when epoxy resin adheres to terminals where high currents flow or high voltages are applied, the contact resistance between these terminals and the cables connected to them increases. This can cause these terminals to overheat, or prevent the desired current from flowing or the desired voltage from being applied. As a result, the semiconductor module may experience reduced efficiency in driving loads such as motors, or may even become unable to drive loads at all.

[0007] The object of the present invention is to provide a semiconductor module and a method for manufacturing a semiconductor module that can prevent epoxy resin from adhering to terminals to which at least one of a large current and a high voltage is supplied. [Means for solving the problem]

[0008] To achieve the above objective, a semiconductor module according to one aspect of the present invention includes a case having an inner wall defining a space in which a plurality of switching elements are arranged, a peripheral portion formed in a rectangular ring shape and positioned outside the inner wall, an intermediate terminal connected to the plurality of switching elements and having a fastening surface that is part of the peripheral portion and positioned on one of a pair of opposing long sides to which a cable connected to a load to be driven is fastened, and a structure positioned in a part of the inner wall adjacent to the long side in which the intermediate terminal is located and higher than the fastening surface, and a component formed of epoxy resin and offset to the side of the structure. Linear marks It comprises a sealing portion having a surface and being cast into the space to seal the plurality of switching elements.

[0009] Furthermore, in order to achieve the above objective, a method for manufacturing a semiconductor module according to one aspect of the present invention is a method for manufacturing a semiconductor module, wherein the semiconductor module is the semiconductor module of the present invention described above, and a nozzle provided in a casting device for pouring the epoxy resin into the space is positioned at a predetermined position in the space from above the case, and epoxy resin is discharged from the nozzle into the space while moving the nozzle toward and toward one of the pair of long sides, the movement of the nozzle is stopped at a position in the space that is biased toward the side of the structure, and the discharge of the epoxy resin into the space is stopped, thereby completing the formation of the sealing portion. [Effects of the Invention]

[0010] According to one aspect of the present invention, it is possible to prevent epoxy resin from adhering to terminals to which at least one of a large current and a high voltage is supplied. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic plan view showing an example of the general configuration of a semiconductor module according to one embodiment of the present invention. [Figure 2]This is an example of a schematic configuration of a U-phase inverter section provided in a semiconductor module according to one embodiment of the present invention, and is a schematic cross-sectional view taken along the α-α line shown in Figure 1. [Figure 3] This is a circuit diagram of a U-phase inverter section provided in a semiconductor module according to one embodiment of the present invention. [Figure 4] This is a diagram (part 1) illustrating a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Figure 5] This is a diagram (part 2) illustrating a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Figure 6] This is a diagram (part 3) illustrating a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Figure 7] This is a diagram (part 4) illustrating a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Figure 8] This is Figure (5) illustrating a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Figure 9] This figure illustrates the effects of a semiconductor module and a method for manufacturing a semiconductor module according to one embodiment of the present invention. [Modes for carrying out the invention]

[0012] Each embodiment of the present invention illustrates an apparatus or method for embodying the technical concept of the present invention, and the technical concept of the present invention does not limit the materials, shapes, structures, arrangements, etc. of the components to those described below. The technical concept of the present invention can be modified in various ways within the technical scope defined by the claims described in the patent claims.

[0013] A semiconductor module and a method for manufacturing the semiconductor module according to one embodiment of the present invention will be described with reference to Figures 1 to 9. First, the schematic configuration of the semiconductor module according to this embodiment will be described with reference to Figures 1 to 3. In this embodiment, a power conversion module capable of DC to AC conversion will be used as an example of the semiconductor module.

[0014] (Overall Configuration of Semiconductor Module) FIG. 1 is a plan schematic view showing an example of the schematic configuration of a semiconductor module 1 according to the present embodiment. In FIG. 1, for ease of understanding, a predetermined center and a virtual straight line that are not originally provided on the surface of the sealing portion are shown in the semiconductor module 1. FIG. 2 is a cross-sectional schematic view of the semiconductor module 1 cut along the α-α line shown in FIG. 1. In FIG. 2, the existence region of the inverter circuit provided in the semiconductor module 1 is shown, and the illustration of transistors and the like constituting the inverter circuit is omitted. Also, in FIG. 2, the illustration of the bonding wires connecting each main control terminal provided in the semiconductor module 1 and the transistors is omitted. FIG. 3 is a circuit diagram of the inverter circuit of the inverter section for the U-phase provided in the semiconductor module 1.

[0015] As shown in FIG. 1, the semiconductor module 1 according to the present embodiment includes a case 11 having an inner wall 双12 that defines casting regions (an example of a space) 113u, 113v, 113w in which a plurality of transistors (an example of switching elements) 211, 221, 231, 241, 251, 261, 271, 281 (not shown in FIG. 1, see FIG. 3) are arranged, and a peripheral portion 111 that is arranged outside the inner wall 双12 and formed in a rectangular annular shape. Hereinafter, the transistors 211, 221, 231, 241, 251, 261, 271, 281 may be abbreviated as "transistors 211 to 281".

[0016] The peripheral portion 111 has a pair of long side portions 111a, 111b arranged opposite to each other, and a pair of short side portions 111c, 111d spanned between both ends of the pair of long side portions 111a, 111b. The inner wall 112 has a pair of long side portions 112a, 112b arranged opposite to each other, and partition portions 112c, 112d that partition the space surrounded by the peripheral portion 111 into the casting regions 113u, 113v, 113w. Long side portion 111a is positioned adjacent to the long side portion 112a of the peripheral portion 111. The long side portion 112b is positioned adjacent to the long side portion 111b of the peripheral portion 111. The partition portion 112c divides the space enclosed by the peripheral portion 111 into the casting area 113u and the other area, and the partition portion 112d divides the other area into the casting area 113v and the casting area 113w.

[0017] Therefore, the casting area 113u is the area enclosed by the short side portion 111c of the peripheral portion 111 and the long side portion 112a, partition portion 112c, and long side portion 112b of the inner wall 112. The casting area 113v is the area enclosed by the partition portion 112c of the inner wall 112. 、 Long side 112 a、 Partition 112d and Long side 112 b It is an enclosed area. The casting area 113w is the area enclosed by the partition portion 112d and the long side portion 112a of the inner wall 112, the short side portion 111d of the peripheral portion 111, and the long side portion 112b of the inner wall 112.

[0018] The peripheral portion 111 and the inner wall 112 are formed integrally, for example. That is, the peripheral portion 111 and the inner wall 112, i.e., the case 11, are formed of, for example, a thermoplastic resin.

[0019] The semiconductor module 1 has a fastening surface 751u located on one of the opposing long sides 111a and 111b, which is part of the peripheral edge 111, and is attached to the long side 111a (one example). A cable (not shown) connected to the load to be driven is fastened to the fastening surface 751u, and it is equipped with an intermediate terminal Mu connected to transistors 211 to 281. The semiconductor module 1 also has a U-phase positive electrode terminal Pu connected to the positive polarity side of the DC power. Furthermore, the semiconductor module 1 is equipped with a U-phase negative electrode terminal Nu located next to the positive electrode terminal Pu and connected to the negative polarity side of the DC power. The positive electrode terminal Pu and the negative electrode terminal Nu are located on the long side 111b, which is part of the peripheral edge 111 and is the other of the opposing long side 111a and 111b. The positive electrode terminal Pu and the negative electrode terminal Nu and the intermediate terminal Mu are located on the peripheral edge 111 with the casting region 113u in between.

[0020] The intermediate terminal Mu, the positive terminal Pu, and the negative terminal Nu are connected to transistors 211-281 located in the casting region 113u. The positive terminal Pu and the negative terminal Nu supply the input DC power to transistors 211-281 located in the casting region 113u. Transistors 211-281 located in the casting region 113u are controlled by a control device (not shown) and convert the DC power input from the positive terminal Pu and the negative terminal Nu into U-phase AC power. The U-phase AC power generated by transistors 211-281 located in the casting region 113u is output externally via the intermediate terminal Mu. Thus, the intermediate terminal Mu becomes an output terminal from which U-phase AC power is output.

[0021] The semiconductor module 1 has a fastening surface 751v located on the long side 111a (one example) of a pair of opposing long sides 111a and 111b, which is part of the peripheral edge 111, and to which a cable (not shown) connected to the load to be driven is fastened, and has an intermediate terminal Mv connected to transistors 211 to 281. The semiconductor module 1 also has a V-phase positive terminal Pv connected to the positive polarity side of the DC power. Furthermore, the semiconductor module 1 has a V-phase negative terminal Nv located next to the positive terminal Pv and connected to the negative polarity side of the DC power. The positive terminal Pv and the negative terminal Nv are located on the long side 111b, which is the other of a pair of opposing long sides 111a and 111b, which is part of the peripheral edge 111. The positive terminal Pv and the negative terminal Nv and the intermediate terminal Mv are located on the peripheral edge 111 with the casting region 113v in between.

[0022] The intermediate terminal Mv, the positive terminal Pv, and the negative terminal Nv are connected to transistors 211-281 located in the casting region 113v. The positive terminal Pv and the negative terminal Nv supply the input DC power to transistors 211-281 located in the casting region 113v. Transistors 211-281 located in the casting region 113v are controlled by a control device (not shown) and convert the DC power input from the positive terminal Pv and the negative terminal Nv into V-phase AC power. The V-phase AC power generated by transistors 211-281 located in the casting region 113v is output externally via the intermediate terminal Mv. Thus, the intermediate terminal Mv becomes an output terminal from which V-phase AC power is output.

[0023] The semiconductor module 1 has a fastening surface 751w located on one of the opposing long sides 111a and 111b, which is part of the peripheral edge 111, and is fastened to a cable (not shown) connected to the load to be driven. It also has an intermediate terminal Mw connected to transistors 211 to 281. Furthermore, the semiconductor module 1 has a W-phase positive terminal Pw connected to the positive polarity side of the DC power. In addition, the semiconductor module 1 has a W-phase negative terminal Nw located next to the positive terminal Pw and connected to the negative polarity side of the DC power. The positive terminal Pw and the negative terminal Nw are located on the other long side 111b of the opposing long side 111a and 111b, which is part of the peripheral edge 111. The positive terminal Pw and the negative terminal Nw and the intermediate terminal Mw are located on the peripheral edge 111 with the casting region 113w in between.

[0024] The intermediate terminal Mw, the positive terminal Pw, and the negative terminal Nw are connected to transistors 211-281 located in the casting region 113w. The positive terminal Pw and the negative terminal Nw supply the input DC power to transistors 211-281 located in the casting region 113w. Transistors 211-281 located in the casting region 113w are controlled by a control device (not shown) and convert the DC power input from the positive terminal Pw and the negative terminal Nw into W-phase AC power. The W-phase AC power generated by transistors 211-281 located in the casting region 113w is output externally via the intermediate terminal Mw. Thus, the intermediate terminal Mw becomes an output terminal to which W-phase AC power is output.

[0025] In the portion of the long side 112a of the inner wall 112 that defines the casting area 113u, gate signal output terminals 41, 43, 45, 47, 51, 53, 55, 57 and current detection terminals 42, 44, 46, 48, 52, 54, 56, 58 are arranged, connected to transistors 211 to 281 (not shown in Figure 1) provided in the U-phase inverter section 12u. Hereinafter, gate signal output terminals 41, 43, 45, 47, 51, 53, 55, 57 will be abbreviated as "gate signal output terminals 41 to 57", and current detection terminals 42, 44, 46, 48, 52, 54, 56, 58 will be abbreviated as "current detection terminals 42 to 58".

[0026] In the portion of the long side 112a of the inner wall 112 that defines the casting area 113v, gate signal output terminals 41 to 57 and current detection terminals 42 to 58 are arranged, which are connected to transistors 211 to 281 (not shown in Figure 1) provided in the V-phase inverter section 12v. The gate signal output terminals 41 to 57 and current detection terminals 42 to 58 provided in the V-phase inverter section 12v have the same structure as the gate signal output terminals 41 to 57 and current detection terminals 42 to 58 provided in the U-phase inverter section 12u.

[0027] In the portion of the long side 112a of the inner wall 112 that defines the casting area 113w, gate signal output terminals 41 to 57 and current detection terminals 42 to 58, which are connected to transistors 211 to 281 (not shown in Figure 1) provided in the W-phase inverter section 12w, are arranged. The gate signal output terminals 41 to 57 and current detection terminals 42 to 58 provided in the W-phase inverter section 12w have the same structure as the gate signal output terminals 41 to 57 and current detection terminals 42 to 58 provided in the U-phase inverter section 12u.

[0028] As shown in Figures 1 and 2, the semiconductor module 1 has a structure 31u that is positioned on the long side portion 111a where the intermediate terminal Mu is located and on the long side portion 112a of the adjacent inner wall 112 (an example of a certain area), and is higher than the fastening surface 751u. In this embodiment, the structure 31u has gate signal output terminals 41 to 57 and current detection terminals 42 to 58 connected to each of the transistors 211 to 281 located within the casting area 113u.

[0029] As shown in Figure 2, the gate signal output terminal 47 provided on the U-phase inverter section 12u is higher than the fastening surface 751u of the intermediate terminal Mu, when the surface 114 of the case 11 on the side to which the DBC (Direct Bonded Copper) substrate 14u is attached is used as a reference. Although not shown in the figure, the gate signal output terminals 41, 43, 45, 51, 53, 55, and 57 have a similar structure to the gate signal output terminal 47 and are provided on the case 11 in the same manner as the gate signal output terminal 47. Therefore, when the surface 114 of the case 11 is used as a reference, the gate signal output terminals 41, 43, 45, 51, 53, 55, and 57 are also higher than the fastening surface 751u.

[0030] As shown in Figure 2, the current detection terminal 48 provided on the U-phase inverter section 12u is higher than the fastening surface 751u of the intermediate terminal Mu when the surface 114 of the case 11 is used as a reference. Although not shown in the figure, the current detection terminals 42, 44, 46, 52, 54, 56, and 58 have the same structure as the current detection terminal 48 and are provided on the case 11 in the same manner as the current detection terminal 48. Therefore, when the surface 114 of the case 11 is used as a reference, the current detection terminals 42, 44, 46, 52, 54, 56, and 58 are also higher than the fastening surface 751u.

[0031] Returning to Figure 1, the semiconductor module 1 has a structure 31v that is located in a portion of the adjacent inner wall 112 and is higher than the fastening surface 751v, with respect to the long side portion 111a where the intermediate terminal Mv is located. In this embodiment, the structure 31v has gate signal output terminals 41 to 57 and current detection terminals 42 to 58 connected to each of the transistors 211 to 281 located within the casting region 113v.

[0032] Although not shown in the diagram, the gate signal output terminals 41-57 provided on the V-phase inverter section 12v have the same structure as the gate signal output terminal 47 provided on the U-phase inverter section 12u, and are provided on the case 11 in the same manner as the gate signal output terminal 47 provided on the U-phase inverter section 12u. Therefore, when the surface 114 of the case 11 is used as a reference, the gate signal output terminals 41-57 provided on the V-phase inverter section 12v are higher than the fastening surface 751v of the intermediate terminal Mv.

[0033] Although not shown in the diagram, the current detection terminals 42-58 provided on the V-phase inverter section 12v have the same structure as the current detection terminal 48 provided on the U-phase inverter section 12u, and are provided on the case 11 in the same manner as the gate signal output terminal 47 provided on the U-phase inverter section 12u. Therefore, with reference to the surface 114 of the case 11, the current detection terminals 42-58 provided on the V-phase inverter section 12v are higher than the fastening surface 751v of the intermediate terminal Mv.

[0034] As shown in Figure 1, the semiconductor module 1 has a structure 31w that is positioned in a portion of the adjacent inner wall 112 and is higher than the fastening surface 751w, with respect to the long side portion 111a where the intermediate terminal Mw is located. In this embodiment, the structure 31w has gate signal output terminals 41 to 57 and current detection terminals 42 to 58 connected to each of the transistors 211 to 281 arranged in the casting region 113w.

[0035] Although not shown in the diagram, the gate signal output terminals 41 to 57 provided on the W-phase inverter section 12w have the same structure as the gate signal output terminal 47 provided on the U-phase inverter section 12u, and are provided on the case 11 in the same manner as the gate signal output terminal 47 provided on the U-phase inverter section 12u. Therefore, when the surface 114 of the case 11 is used as a reference, the gate signal output terminals 41 to 57 provided on the W-phase inverter section 12w are higher than the fastening surface 751w of the intermediate terminal Mw.

[0036] Although not shown in the diagram, the current detection terminals 42-58 provided on the W-phase inverter section 12w have the same structure as the current detection terminal 48 provided on the U-phase inverter section 12u, and are provided on the case 11 in the same manner as the gate signal output terminal 47 provided on the U-phase inverter section 12u. Therefore, with reference to the surface 114 of the case 11, the current detection terminals 42-58 provided on the W-phase inverter section 12w are higher than the fastening surface 751w of the intermediate terminal Mw.

[0037] Therefore, in the semiconductor module 1, the structure 31u provided on the U-phase inverter section 12u is higher than the fastening surface 751u, the structure 31v provided on the V-phase inverter section 12v is higher than the fastening surface 751v, and the structure 31w provided on the W-phase inverter section 12w is higher than the fastening surface 751w.

[0038] As shown in Figures 1 and 2, the semiconductor module 1 is made of epoxy resin and has a weld line WLu formed off-center on the side of the structure 31u on its surface 811u, and includes a sealing portion 81u that is cast into the casting region 113u to seal the transistors 211 to 281.

[0039] The weld line WLu formed on the sealing portion 81u is formed in a region of the surface 811u of the sealing portion 81u that is contained between the virtual straight line VL1u, which intersects the direction in which the pair of long sides 111a and 111b of the peripheral portion 111 constituting the case 11 are aligned and includes the center C1u in that direction, and the long side 112a of the inner wall 112.

[0040] At least a portion of the weld line WLu formed on the sealing portion 81u has a shape that is symmetrical with respect to a virtual straight line VL2u that is parallel to the direction in which the pair of long sides 111a and 111b, including the center C1u, are aligned, when viewed in a direction intersecting the surface 811u of the sealing portion 81u.

[0041] At least a portion of the weld line WLu formed on the sealing portion 81u has a circular shape that spreads out from a region A1u (an example of a predetermined region) on the surface 811u located in front of the structure 31u, when viewed in a direction intersecting the surface 811u of the sealing portion 81u. Furthermore, at least a portion of the weld line WLu formed on the sealing portion 81u has a circular shape that spreads out from a region A2u (an example of a predetermined region) on the surface 811u located in front of the structure 31u, when viewed in a direction intersecting the surface 811u of the sealing portion 81u.

[0042] As will be explained in more detail later, in semiconductor module 1, epoxy resin is extruded from two nozzles into the casting area 113u to form a sealing portion 81u. Regions A1u and A2u correspond to the positions where these two nozzles ultimately stop. The weld line WLu is formed when the epoxy resin extruded at the final stopping positions of the two nozzles flows within the casting area 113u.

[0043] As shown in Figure 2, the long side portion 111a of the peripheral portion 111 and the long side portion 112a of the inner wall 112 have a stepped shape in which the DBC substrate 14u side protrudes toward the casting area 113u compared to the fastening surface 751u side of the intermediate terminal Mu. The ends of the L-shaped bent gate signal output terminals 41-57 and current detection terminals 42-58 are exposed in the casting area 113u at this stepped portion. Bonding wires (not shown) for connecting the transistors 211-281 (not shown in Figure 2, see Figure 3) located in the region 121a of the inverter circuit 121u to the gate signal output terminals 41-57 and current detection terminals 42-58 are connected to these ends. Therefore, when the transistors 211-281 and bonding wires arranged in the casting region 113u are considered as a single group of components, the longer side 112a of the inner wall 112 is relatively higher than the longer side 112b of the inner wall 112. For this reason, the sealing portion 81u is formed so that the longer side 112a is thicker than the longer side 112b of the inner wall 112, in order to reliably seal the entire group of components.

[0044] As will be explained in detail later, during the manufacturing of the semiconductor module 1, epoxy resin may remain at the tip of the nozzle after the extrusion of epoxy resin into the casting areas 113u, 113v, and 113w is completed. Before the nozzle is retracted from the semiconductor module 1, air bubbles formed in the epoxy resin remaining at the nozzle tip may burst, causing splashes of epoxy resin to scatter. However, a structure 31u having gate signal output terminals 41-57 and current detection terminals 42-58 that are higher than the fastening surface 751u of the intermediate terminal Mu is positioned near the nozzle's stopping point. Therefore, the semiconductor module 1 can prevent splashes of epoxy resin remaining at the nozzle tip from adhering to the fastening surface 751u of the intermediate terminal Mu by shielding them with the structure 31u.

[0045] Returning to Figure 1, the semiconductor module 1 is made of epoxy resin and has a weld line WLv formed off-center on the side of the structure 31v on its surface 811v, and includes a sealing portion 81v that is cast into the casting region 113v to seal the transistors 211 to 281.

[0046] The weld line WLv formed on the sealing portion 81v is formed in a region of the surface 811v of the sealing portion 81v that is contained between the virtual straight line VL1v, which intersects the direction in which the pair of long sides 111a and 111b of the peripheral portion 111 constituting the case 11 are aligned and includes the center C1v in that direction, and the long side 112a of the inner wall 112.

[0047] At least a portion of the weld line WLv formed on the sealing portion 81v has a shape that is symmetrical with respect to a virtual straight line VL2v that is parallel to the direction in which the pair of long sides 111a and 111b, including the center C1v, are aligned, when viewed in a direction intersecting the surface 811v of the sealing portion 81v.

[0048] At least a portion of the weld line WLv formed on the sealing portion 81v has a circular shape that spreads out from a region A1v (an example of a predetermined region) on the surface 811v located in front of the structure 31v when viewed in a direction intersecting with the surface 811v of the sealing portion 81v. In addition, at least a portion of the weld line WLv formed on the sealing portion 81v has a circular shape that spreads out from a region A2v (an example of a predetermined region) on the surface 811v located in front of the structure 31v when viewed in a direction intersecting with the surface 811v of the sealing portion 81v.

[0049] The intermediate terminal Mv is provided in the case 11 such that its fastening surface 751v is substantially flush with the fastening surface 751u of the intermediate terminal Mu. The gate signal output terminals 41-57 and current detection terminals 42-58 of the V-phase inverter section 12v are provided in the case 11 in substantially the same manner as the gate signal output terminals 41-57 and current detection terminals 42-58 of the U-phase inverter section 12u. The relative positions of regions A1v and A2v with respect to the casting region 113v are substantially the same as the relative positions of regions A1u and A2u with respect to the casting region 113u. Regions A1v and A2v correspond to the final stopping positions of the two nozzles that extrude epoxy resin to form the sealing portion 81v in the casting region 113v. Therefore, the semiconductor module 1 can prevent splashes of epoxy resin remaining at the nozzle tip after the extrusion of epoxy resin into the casting area 113v from adhering to the fastening surface 751v of the intermediate terminal Mv by shielding them with the structure 31v.

[0050] As shown in Figure 1, the semiconductor module 1 is formed of epoxy resin, and a weld line WLw formed off-center on the side of the structure 31w is formed on the surface. 811w It has a sealing portion 81w which is cast into the casting region 113w and seals the transistors 211 to 281 (not shown in Figure 1, see Figure 3).

[0051] The weld line WLw formed on the sealing portion 81w is formed in a region of the surface 811w of the sealing portion 81w that is contained between the virtual straight line VL1w, which intersects the direction in which the pair of long sides 111a and 111b of the peripheral portion 111 constituting the case 11 are aligned and includes the center C1w in that direction, and the long side 112a of the inner wall 112.

[0052] At least a portion of the weld line WLw formed on the sealing portion 81w has a shape that is symmetrical with respect to a virtual straight line VL2w that is parallel to the direction in which a pair of long sides 111a and 111b are aligned, including the center C1w, when viewed in a direction intersecting the surface 811w of the sealing portion 81w.

[0053] At least a portion of the weld line WLw formed on the sealing portion 81w has a circular shape that spreads out from a region A1w (an example of a predetermined region) on the surface 811w located in front of the structure 31w, when viewed in a direction intersecting with the surface 811w of the sealing portion 81w. Furthermore, at least a portion of the weld line WLw formed on the sealing portion 81w has a circular shape that spreads out from a region A2w (an example of a predetermined region) on the surface 811w located in front of the structure 31w, when viewed in a direction intersecting with the surface 811w of the sealing portion 81w.

[0054] The intermediate terminal Mw is provided in the case 11 such that the fastening surface 751w of the intermediate terminal Mu is almost flush with the fastening surface 751u of the intermediate terminal Mu. The gate signal output terminals 41 to 57 and current detection terminals 42 to 58 of the W-phase inverter section 12w are U Phase inverter section 12 u The gate signal output terminals 41-57 and current detection terminals 42-58 are provided in the case 11 in substantially the same manner. The relative positions of regions A1w and A2w with respect to the casting region 113w are substantially the same as the relative positions of regions A1u and A2u with respect to the casting region 113u. Regions A1w and A2w correspond to the final stopping positions of the two nozzles that extrude epoxy resin to form the sealing portion 81w in the casting region 113w. Therefore, the semiconductor module 1 can prevent splashes of epoxy resin remaining at the nozzle tips from adhering to the fastening surface 751w of the intermediate terminal Mw by shielding them with the structure 31w after the extrusion of epoxy resin into the casting region 113w is completed.

[0055] The weld lines WLu, WLv, and WLw are formed by the flow of epoxy resin extruded into the casting regions 113u, 113v, and 113w to form the sealing portions 81u, 81v, and 81w. Therefore, the weld lines WLu, WLv, and WLw do not necessarily have exactly the same shape as each other. However, the weld lines WLu, WLv, and WLw each have the shapes described above and are at least similar in shape to each other.

[0056] Case 11 has fixing parts 115u formed at each of the four corners of the casting area 113u, fixing parts 115v formed at each of the four corners of the casting area 113v, and fixing parts 115w formed at each of the four corners of the casting area 113w. Two fixing parts 115u, 115v, and 115w are arranged on the long sides 112a and 112b of the inner wall 112. The fixing parts 115u, 115v, and 115w are formed to be higher than the peripheral edge 111 of case 11, with reference to the surface 114 of case 11 (not shown in Figure 1, see Figure 2). The peripheral edge 111, the inner wall 112, and the fixing parts 115u, 115v, and 115w are formed integrally. Therefore, the fixing parts 115u, 115v, and 115w are also formed of, for example, thermoplastic resin.

[0057] The four fixing parts 115u are provided to fix a circuit board (not shown) on which a control device (not shown) for controlling the inverter circuit 121u (not shown in Figure 1, see Figure 3) provided in the U-phase inverter section 12u is mounted. The four fixing parts 115v are provided to fix a circuit board (not shown) on which a control device (not shown) for controlling the inverter circuit 121v (not shown in Figure 1, see Figure 3) provided in the V-phase inverter section 12v is mounted. The four fixing parts 115w are provided to fix a circuit board (not shown) on which a control device (not shown) for controlling the inverter circuit 121w (not shown in Figure 1, see Figure 3) provided in the W-phase inverter section 12w is mounted.

[0058] As will be described in detail later, transistors 211, 221, 231, and 241 provided in the U-phase inverter section 12u are connected in parallel, and transistors 251, 261, 271, and 281 are connected in parallel. In the U-phase inverter section 12u, the parallel-connected transistors 211, 221, 231, and 241, and the parallel-connected transistors 251, 261, 271, and 281 are connected in series between the positive terminal Pu and the negative terminal Nu. In the U-phase inverter section 12u, the connection points where transistors 211 to 281 are connected to each other are connected to the intermediate terminal Mu, where U-phase AC power is output. In other words, the transistors 211, 221, 231, and 241 provided in the U-phase inverter section 12u become part of the components that make up the upper arm Uup (not shown in Figure 1, see Figure 3) of the U-phase AC power. The elements 251, 261, 271, and 281 provided in the U-phase inverter section 12u become part of the components that make up the lower arm Ulo (not shown in Figure 1, see Figure 3) of the U-phase AC power.

[0059] Transistors 211-281 provided in the V-phase inverter section 12v are connected between the positive terminal Pv and the negative terminal Nv in the same way as the connection between the positive terminal Pu and the negative terminal Nu of transistors 211-281 provided in the U-phase inverter section 12u. Therefore, transistors 211, 221, 231, and 241 provided in the V-phase inverter section 12v become part of the components that constitute the upper arm Vup (not shown in Figure 1, see Figure 3) of the V-phase AC power. Transistors 251, 261, 271, and 281 provided in the V-phase inverter section 12v become part of the components that constitute the lower arm Vlo (not shown in Figure 1, see Figure 3) of the V-phase AC power.

[0060] Transistors 211 to 281 provided in the W-phase inverter section 12w are connected between the positive terminal Pw and the negative terminal Nw in the same way as the connection between the positive terminal Pu and the negative terminal Nu of transistors 211 to 281 provided in the U-phase inverter section 12u. Therefore, transistors 211, 221, 231, and 241 provided in the W-phase inverter section 12w become part of the components that constitute the upper arm Wup (not shown in Figure 1, see Figure 3) of the W-phase AC power. Transistors 251, 261, 271, and 281 provided in the W-phase inverter section 12w become part of the components that constitute the lower arm Wlo (not shown in Figure 1, see Figure 3) of the W-phase AC power.

[0061] (Inverter circuit configuration) Next, the general configuration of the U-phase inverter section 12u, the V-phase inverter section 12v, and the W-phase inverter section 12w provided in the semiconductor module 1 will be explained using Figure 3 with reference to Figures 1 and 2. The U-phase inverter section 12u, the V-phase inverter section 12v, and the W-phase inverter section 12w have similar configurations. Therefore, the general configuration of the U-phase inverter section 12u, the V-phase inverter section 12v, and the W-phase inverter section 12w will be explained using the U-phase inverter section 12u as an example.

[0062] As shown in Figure 2, the U-phase inverter section 12u includes a DBC substrate 14u and an inverter circuit 121u formed on the DBC substrate 14u. In Figure 2, the inverter circuit 121u is not shown in detail, but is depicted as an existing region 121a on the DBC substrate 14u. The DBC substrate 14u has an insulating substrate 140 formed in the shape of a rectangular plate, with an area approximately the same as the opening of the casting region 113u. The DBC substrate 14u has a plurality of wiring patterns (not shown) of a predetermined shape formed on the insulating substrate 140 using a conductive material (e.g., copper) on the side that is sealed by the sealing portion 81u. The DBC substrate 14u has a rectangular plate-shaped heat transfer pattern (not shown) formed on the insulating substrate 140 on the back side of the side that is sealed by the sealing portion 81u. The DBC substrate 14u is attached to the case 11 by adhesive (not shown).

[0063] Multiple wiring patterns are mounted with semiconductor elements 21, 22, 23, 24, 25, 26, and 27 (not shown in Figure 2, see Figure 3), each containing transistors 211 to 281, and are electrically and mechanically connected to an intermediate terminal Mu, a positive terminal Pu, and a negative terminal Nu. Hereinafter, semiconductor elements 21, 22, 23, 24, 25, 26, and 27 may be abbreviated as "semiconductor elements 21 to 27".

[0064] Furthermore, the semiconductor module 1 has a cooler (not shown) attached to the case 11, which is located on the surface 114 side of the case 11 and in contact with the heat transfer pattern. The cooler is mechanically fixed to the case 11, for example, by adhesive. The DBC substrate 14u is soldered to the cooler, for example. As a result, the semiconductor module 1 can dissipate heat generated from the transistors 211 to 281 provided on the DBC substrate 14u to the outside via the cooler.

[0065] Here, the connection relationships of the positive terminal Pu, negative terminal Nu, intermediate terminal Mu, and transistors 211 to 281 provided on the semiconductor module 1 will be explained using the circuit diagram of the inverter circuit 121u shown in Figure 3. Figure 3 shows the reference numerals for the positive terminal Pu, negative terminal Nu, intermediate terminal Mu, inverter circuit 121u, upper arm Uup, and lower arm Ulo for the U phase, as well as the reference numerals for the positive terminals Pv, Pw, negative terminals Nv, Nw, intermediate terminals Mv, Mw, inverter circuits 121v, 121w, upper arms Vup, Wup, and lower arms Vlo, Wlo for the V and W phases.

[0066] As shown in Figure 3, semiconductor module 1 comprises transistors 211, 221, 231, 241 and freewheeling diodes 212, 222, 232, 242. Semiconductor module 1 also comprises transistors 251, 261, 271, 281 and freewheeling diodes 252, 262, 272, 282.

[0067] Transistors 211 to 281 are composed of, for example, N-type metal-oxide-semiconductor field-effect transistors (MOSFETs). The freewheeling diode 212 is connected in antiparallel to transistor 211. The drain of transistor 211 is connected to the cathode of freewheeling diode 212, and the source of transistor 211 is connected to the anode of freewheeling diode 212. The semiconductor element 21 is composed of transistor 211 and freewheeling diode 212. In the semiconductor element 21, transistor 211 and freewheeling diode 212 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0068] The freewheel diode 222 is connected in antiparallel to the transistor 221. The drain of transistor 221 is connected to the cathode of freewheel diode 222, and the source of transistor 221 is connected to the anode of freewheel diode 222. The transistor 221 and the freewheel diode 222 constitute the semiconductor element 22. In the semiconductor element 22, the transistor 221 and the freewheel diode 222 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0069] The drain of transistor 211, the cathode of freewheeling diode 212, the drain of transistor 221, and the cathode of freewheeling diode 222 are connected to each other. The drain of transistor 211, the cathode of freewheeling diode 212, the drain of transistor 221, and the cathode of freewheeling diode 222 are electrically connected to the positive terminal Pu.

[0070] The source of transistor 211 and the anode of freewheeling diode 212 are electrically connected. .toThe source of transistor 221 and the anode of freewheeling diode 222 are electrically connected. The source of transistor 211 and the anode of freewheeling diode 212, and the source of transistor 221 and the anode of freewheeling diode 222 are connected to each other. The source of transistor 211 and the anode of freewheeling diode 212, and the source of transistor 221 and the anode of freewheeling diode 222 are electrically connected to the intermediate terminal Mu.

[0071] The freewheeling diode 232 is connected in antiparallel to the transistor 231. The semiconductor element 23 is composed of the transistor 231 and the freewheeling diode 232. In the semiconductor element 23, the transistor 231 and the freewheeling diode 232 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0072] The freewheeling diode 242 is connected in antiparallel to the transistor 241. The semiconductor element 24 is composed of the transistor 241 and the freewheeling diode 242. In the semiconductor element 24, the transistor 241 and the freewheeling diode 242 may be formed on separate semiconductor substrates (not shown), or they may be formed on the same semiconductor substrate to form a single chip.

[0073] The drain of transistor 231, the cathode of freewheeling diode 232, the drain of transistor 241, and the cathode of freewheeling diode 242 are connected to each other. The drain of transistor 231, the cathode of freewheeling diode 232, the drain of transistor 241, and the cathode of freewheeling diode 242 are electrically connected to the drain of transistor 211, the cathode of freewheeling diode 212, the drain of transistor 221, the cathode of freewheeling diode 222, and the positive terminal Pu.

[0074] The source of transistor 231 and the anode of freewheeling diode 232 are electrically connected. .toThe source of transistor 241 and the anode of freewheeling diode 222 are electrically connected. The source of transistor 231 and the anode of freewheeling diode 232 are connected to each other. The source of transistor 231 and the anode of freewheeling diode 232 are electrically connected to the source of transistor 241 and the anode of freewheeling diode 242, and the source of transistor 211 and the anode of freewheeling diode 242 are electrically connected to the source of transistor 211 and the anode of freewheeling diode 212, the source of transistor 221 and the anode of freewheeling diode 222 and the intermediate terminal Mu.

[0075] As a result, transistor 211, freewheeling diode 212, transistor 221, freewheeling diode 222, transistor 231, freewheeling diode 232, transistor 241, and freewheeling diode 242 are connected in parallel between the positive terminal Pu and the intermediate terminal Mu. Therefore, semiconductor elements 21, 22, 23, and 24 are connected in parallel between the positive terminal Pu and the intermediate terminal Mu, forming the upper arm Uup.

[0076] The freewheeling diode 252 is connected in antiparallel to the transistor 251. The semiconductor element 25 is composed of the transistor 251 and the freewheeling diode 252. In the semiconductor element 25, the transistor 251 and the freewheeling diode 252 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0077] The freewheeling diode 262 is connected in antiparallel to the transistor 261. The semiconductor element 26 is composed of the transistor 261 and the freewheeling diode 262. In the semiconductor element 26, the transistor 261 and the freewheeling diode 262 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0078] The drain of transistor 251, the cathode of freewheeling diode 252, the drain of transistor 261, and the cathode of freewheeling diode 262 are connected to each other. The drain of transistor 251, the cathode of freewheeling diode 252, the drain of transistor 261, and the cathode of freewheeling diode 262 are electrically connected to the drain of transistor 211, the cathode of freewheeling diode 212, the drain of transistor 221, the cathode of freewheeling diode 222, and the intermediate terminal Mu.

[0079] The source of transistor 251 and the anode of freewheeling diode 252 are electrically connected. The source of transistor 261 and the anode of freewheeling diode 262 are electrically connected. The source of transistor 251 and the anode of freewheeling diode 252, and the source of transistor 261 and the anode of freewheeling diode 262 are connected to each other. The source of transistor 251 and the anode of freewheeling diode 252, and the source of transistor 261 and the anode of freewheeling diode 262 are electrically connected to the negative terminal Nu.

[0080] The freewheeling diode 272 is connected in antiparallel to the transistor 271. The semiconductor element 27 is composed of the transistor 271 and the freewheeling diode 272. In the semiconductor element 27, the transistor 271 and the freewheeling diode 272 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0081] The freewheeling diode 282 is connected in antiparallel to the transistor 281. The semiconductor element 28 is composed of the transistor 281 and the freewheeling diode 282. In the semiconductor element 28, the transistor 281 and the freewheeling diode 282 may be formed on separate semiconductor substrates, or they may be formed on the same semiconductor substrate to form a single chip.

[0082] The drain of transistor 271, the cathode of freewheeling diode 272, the drain of transistor 281, and the cathode of freewheeling diode 282 are connected to each other. The drain of transistor 271, the cathode of freewheeling diode 272, the drain of transistor 281, and the cathode of freewheeling diode 282 are connected to the drain of transistor 251, the cathode of freewheeling diode 252, the drain of transistor 261, the cathode of freewheeling diode 262, and the intermediate terminal Mu.

[0083] The source of transistor 271 and the anode of freewheeling diode 272 are electrically connected. The source of transistor 281 and the anode of freewheeling diode 282 are electrically connected. The source of transistor 271, the anode of freewheeling diode 272, the source of transistor 281, and the anode of freewheeling diode 282 are all connected to each other. The source of transistor 271, the anode of freewheeling diode 272, the source of transistor 281, and the anode of freewheeling diode 282 are electrically connected to the source of transistor 251, the anode of freewheeling diode 252, the source of transistor 261, the anode of freewheeling diode 262, and the negative terminal Nu.

[0084] Transistor 251, freewheeling diode 252, transistor 261, freewheeling diode 262, transistor 271, freewheeling diode 272, transistor 281, and freewheeling diode 282 are connected in parallel between the intermediate terminal Mu and the negative terminal Nu. As a result, semiconductor elements 25, 26, 27, and 28 are connected in parallel between the intermediate terminal Mu and the negative terminal Nu, forming the lower arm Ulo.

[0085] Structurally, when considering the connection relationships between semiconductor elements 21, 22, 23, 24, 25, 26, 27, and 28, the positive terminal Pu, the negative terminal Nu, and the intermediate terminal Mu, parallel-connected semiconductor elements 21 and 22 and parallel-connected semiconductor elements 25 and 26 are connected in series between the positive terminal Pu and the negative terminal Nu. Similarly, parallel-connected semiconductor elements 23 and 24 and parallel-connected semiconductor elements 27 and 28 are connected in series between the positive terminal Pu and the negative terminal Nu. Semiconductor elements 21, 22, 25, and 26 connected in series between the positive terminal Pu and the negative terminal Nu, and semiconductor elements 23, 24, 27, and 28 connected in series between the positive terminal Pu and the negative terminal Nu, are connected by the intermediate terminal Mu.

[0086] Therefore, when considering the electrical connection relationships of semiconductor elements 21, 22, 23, 24, 25, 26, 27, 28, positive terminal Pu, negative terminal Nu, and intermediate terminal Mu, the parallel-connected semiconductor elements 21, 22, 23, 24 and the parallel-connected semiconductor elements 25, 26, 27, 28 are connected in series between the positive terminal Pu and the negative terminal Nu. In addition, the intermediate terminal Mu is connected to the connection point where the positive terminal Pu and the negative terminal Nu are connected between the parallel-connected semiconductor elements 21, 22, 23, 24 and the parallel-connected semiconductor elements 25, 26, 27, 28.

[0087] The gate of transistor 211 is connected to the gate signal output terminal 41. By connecting the gate of transistor 211 and the gate signal output terminal 41, the gate signal output from the control device is connected to the gate signal output terminal 41. 41 It is input to the gate of transistor 211 via [this].

[0088] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 211 is connected to the current-sensing terminal 42. By connecting the source of the current-sensing transistor and the current-sensing terminal 42, the current flowing from the source of the current-sensing transistor is input to the control device.

[0089] The gate of transistor 221 is connected to the gate signal output terminal 43. By connecting the gate of transistor 221 to the gate signal output terminal 43, the gate signal output from the control device is input to the gate of transistor 221 via the gate signal output terminal 43.

[0090] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 221 is connected to the current-sensing terminal 44. By connecting the source of the current-sensing transistor and the current-sensing terminal 44, the current flowing from the source of the current-sensing transistor is input to the control device.

[0091] The gate of transistor 231 is connected to the gate signal output terminal 45. By connecting the gate of transistor 231 to the gate signal output terminal 45, the gate signal output from the control device is input to the gate of transistor 231 via the gate signal output terminal 45.

[0092] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 231 is connected to the current-sensing terminal 46. By connecting the source of the current-sensing transistor and the current-sensing terminal 46, the current flowing from the source of the current-sensing transistor is input to the control device.

[0093] The gate of transistor 241 is connected to the gate signal output terminal 47. By connecting the gate of transistor 241 to the gate signal output terminal 47, the gate signal output from the control device is input to the gate of transistor 241 via the gate signal output terminal 47.

[0094] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 241 is connected to the current-sensing terminal 48. By connecting the source of the current-sensing transistor and the current-sensing terminal 48, the current flowing from the source of the current-sensing transistor is input to the control device.

[0095] The gate of transistor 251 is connected to the gate signal output terminal 51. Because the gate of transistor 251 and the gate signal output terminal 51 are connected, the gate signal output from the control device is input to the gate of transistor 251 via the gate signal output terminal 51.

[0096] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 251 is connected to the current-sensing terminal 52. By connecting the source of the current-sensing transistor and the current-sensing terminal 52, the current flowing from the source of the current-sensing transistor is input to the control device.

[0097] The gate of transistor 261 is connected to the gate signal output terminal 53. By connecting the gate of transistor 261 to the gate signal output terminal 53, the gate signal output from the control device is input to the gate of transistor 261 via the gate signal output terminal 53.

[0098] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 261 is connected to the current-sensing terminal 54. By connecting the source of the current-sensing transistor and the current-sensing terminal 54, the current flowing from the current-sensing transistor is input to the control device.

[0099] The gate of transistor 271 is connected to the gate signal output terminal 55. Because the gate of transistor 271 and the gate signal output terminal 55 are connected, the gate signal output from the control device is output to the gate of transistor 271 via the gate signal output terminal 55.

[0100] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 271 is connected to the current-sensing terminal 56. By connecting the source of the current-sensing transistor and the current-sensing terminal 56, the current flowing from the current-sensing transistor is input to the control device.

[0101] The gate of transistor 281 is connected to the gate signal output terminal 57. By connecting the gate of transistor 281 to the gate signal output terminal 57, the gate signal output from the control device is input to the gate of transistor 281 via the gate signal output terminal 57.

[0102] The source (auxiliary source) of a current-sensing transistor (not shown) provided on transistor 281 is connected to the current-sensing terminal 58. By connecting the source of the current-sensing transistor and the current-sensing terminal 58, the current flowing from the current-sensing transistor is input to the control device.

[0103] The gate signal is a pulsed signal. The same gate signal is input to transistors 211, 221, 231, and 241, respectively. The potential difference between the low potential level and the high potential level of the gate signal output from gate signal output terminals 41, 43, 45, and 47 becomes the gate-source voltage applied to transistors 211, 221, 231, and 241. Therefore, when the potential level of the gate signal output from gate signal output terminals 41, 43, 45, and 47 is at the high potential level, transistors 211, 221, 231, and 241 are in the ON state (conducting state). On the other hand, when the potential level of the gate signal output from gate signal output terminals 41, 43, 45, and 47 is at the low potential level, transistors 211, 221, 231, and 241 are in the OFF state (non-conducting state).

[0104] The same gate signal is input to transistors 251, 261, 271, and 281, respectively. The potential difference between the low potential level and the high potential level of the gate signal output from gate signal output terminals 51, 53, 55, and 57 becomes the gate-source voltage applied to transistors 251, 261, 271, and 281. Therefore, when the potential level of the gate signal output from gate signal output terminals 51, 53, 55, and 57 is at the high potential level, transistors 251, 261, 271, and 281 are in the ON state (conducting state). On the other hand, when the potential level of the gate signal output from gate signal output terminals 51, 53, 55, and 57 is at the low potential level, transistors 251, 261, 271, and 281 are in the OFF state (non-conducting state).

[0105] The gate signals output from gate signal output terminals 41, 43, 45, and 47 are signals of opposite polarity to the gate signals output from gate signal output terminals 51, 53, 55, and 57. Therefore, the control device controls transistors 211, 221, 231, and 241 to be turned on / off at predetermined intervals, and transistors 251, 261, 271, and 281 to be turned on / off at the same intervals. As a result, the U-phase inverter section 12u can convert the DC voltage applied between the positive terminal Pu and the negative terminal Nu into an AC voltage and output it to the load from the intermediate terminal Mu.

[0106] (Manufacturing method for semiconductor modules) The method for manufacturing a semiconductor module according to this embodiment will be explained with reference to Figures 4 to 8. Figure 4 is a schematic plan view of the semiconductor module 1 for explaining the method for manufacturing the semiconductor module 1, and is a diagram for explaining the initial positions of the nozzles 62u and 63u provided in the casting apparatus 6 and the movement state during the discharge of the epoxy resin 82. Figure 5 is a cross-sectional view of the semiconductor module 1 cut along the α-α line shown in Figure 4 for explaining the method for manufacturing the semiconductor module 1, and is a diagram for explaining the initial positions of the nozzles 62u and 63u provided in the casting apparatus 6. Figure 6 is a cross-sectional view of the semiconductor module 1 cut at a location corresponding to the α-α line shown in Figure 4 for explaining the method for manufacturing the semiconductor module 1, and is a diagram for explaining the movement state of the nozzles 62u and 63u provided in the casting apparatus 6 during the discharge of the epoxy resin 82. Figure 7 is a schematic plan view of the semiconductor module 1 for explaining the method for manufacturing the semiconductor module 1, and is a diagram for explaining the position where the nozzles 62u and 63u provided in the casting apparatus 6 stop after the discharge of the epoxy resin 82 is completed. Figure 8 is a schematic cross-sectional view of the semiconductor module 1 cut along the α-α line shown in Figure 7 to illustrate the manufacturing method of the semiconductor module 1, and is a diagram illustrating the position where the nozzles 62u and 63u provided in the casting apparatus 6 stop after the epoxy resin 82 has been dispensed.

[0107] In the manufacturing method of the semiconductor module 1 according to this embodiment, a case 11, on which gate signal output terminals 41 to 57 for the U-phase, V-phase, and W-phase, and current detection terminals 42 to 58 are attached, is attached, for example, to a base portion (not shown) on which DBC substrates 14u, 14v, and 14w on which inverter circuits 121u, 121v, and 121w are mounted, and a cooler is provided, is attached, for example, to a base portion (not shown) with adhesive. As a result, a casting area 113u is formed, with the top of the case 11 open and surrounded by the inner wall 112 of the case 11 and the DBC substrate 14u; a casting area 113v is formed, with the top of the case 11 open and surrounded by the inner wall 112 of the case 11 and the DBC substrate 14v; and a casting area 113w is formed, with the top of the case 11 open and surrounded by the inner wall 112 of the case 11 and the DBC substrate 14w.

[0108] In each of the U-phase inverter section 12u, V-phase inverter section 12v, and W-phase inverter section 12w, the gate signal output terminals 41-57 and current detection terminals 42-58 are connected to the corresponding locations on the semiconductor elements 21-27 by bonding wires. Furthermore, in each of the U-phase inverter section 12u, V-phase inverter section 12v, and W-phase inverter section 12w, the positive terminals Pu, Pv, Pw, negative terminals Nu, Nv, Nw, and intermediate terminals Mu, Mv, Mw are connected to the corresponding locations on the wiring patterns formed on the DBC substrates 14u, 14v, and 14w. As a result, the semiconductor module 1 is assembled except for the sealing sections 81u, 81v, 81w and the control device that outputs the gate signal. The semiconductor module 1 in this state is placed in a reduced-pressure environment.

[0109] Next, as shown in Figures 4 and 5, in the manufacturing method of the semiconductor module 1, nozzles 62u and 63u provided in the casting apparatus 6 for casting epoxy resin 82 into the casting regions 113u, 113v, and 113w are positioned at predetermined locations in the casting region 113u from above the case 11. The upper side of the case 11 is the side where the casting regions 113u, 113v, and 113w are open, that is, the side opposite to the surface 114, and where the fastening surfaces 751u, 751v, and 751w of the intermediate terminals Mu, Mv, and Mw are located. The two nozzles 62u and 63u are positioned from above the case 11 with a predetermined gap between them in a direction intersecting the direction in which the pair of long sides 111a and 111b of the peripheral edge 111 constituting the case 11 are aligned. More specifically, when viewed in a direction perpendicular to the fastening surface 751u of the intermediate terminal Mu (i.e., in a plan view), nozzle 62u is positioned at a predetermined location in the center of one of the two equal regions obtained by dividing the casting area 113u in the direction in which the short side portion 111c of the case 11 and the partition portion 112c of the inner wall 112 are aligned. Nozzle 63u is positioned at a predetermined location in the center of the other half of the same divided region. As shown in Figure 4, nozzles 62u and 63u are arranged almost in a straight line in the direction in which the short side portion 111c of the case 11 and the partition portion 112c of the inner wall 112 are aligned, but in Figure 5 and Figures 6 and 8 described later, nozzles 62u and 63u are shown offset from each other for ease of understanding.

[0110] Furthermore, nozzles 62v and 63v provided in the casting apparatus 6 for casting epoxy resin 82 into the casting regions 113u, 113v, and 113w are positioned at predetermined locations in the casting region 113v from above the case 11. The two nozzles 62v and 63v are positioned from above the case 11 with a predetermined gap between them in a direction intersecting the direction in which the pair of long sides 111a and 111b of the peripheral edge 111 constituting the case 11 are aligned. More specifically, looking at the fastening surface 751v of the intermediate terminal Mv in a direction perpendicular to it (i.e., in a plan view), nozzle 62v is positioned at a predetermined location in the center of one of the regions obtained by dividing the casting region 113v into two equal parts in the direction in which the partitions 112c and 112d of the inner wall 112 of the case 11 are aligned. Nozzle 63v is positioned at a predetermined location in the center of the other half of the same divided region. The nozzles 62v and 63v are arranged in a nearly straight line in the direction in which the partitions 112c and 112d of the inner wall 112 of the case 11 are aligned.

[0111] Furthermore, nozzles 62w and 63w provided in the casting device 6 for casting epoxy resin 82 into the casting regions 113u, 113v, and 113w are positioned at predetermined locations in the casting region 113w from above the case 11. The two nozzles 62w and 63w are positioned from above the case 11 with a predetermined gap between them in a direction intersecting the direction in which the pair of long sides 111a and 111b of the peripheral edge 111 constituting the case 11 are aligned. More specifically, looking at the fastening surface 751w of the intermediate terminal Mw in a direction perpendicular to it (i.e., in a plan view), nozzle 62w is positioned at a predetermined location in the center of one of the regions that divide the casting region 113w into two equal parts in the direction in which the partition portion 112d of the inner wall 112 of the case 11 and the short side portion 111d of the peripheral edge 111 of the case 11 are aligned. Nozzle 63w is positioned at a predetermined location in the center of the other half of the same divided region. Nozzles 62w and 63w are located on the inner wall 112 of case 11. The Cut section 112d and the short side portion 111d of the peripheral edge portion 111 of case 11 They are arranged almost in a straight line in the direction in which they are aligned.

[0112] In this embodiment, the casting apparatus 6 has two nozzles each for the U phase, V phase, and W phase, namely nozzles 62u, 63u, nozzles 62v, 63v, and nozzles 62w, 63w. Alternatively, it may have two nozzles and be configured to sequentially discharge epoxy resin 82 from these two nozzles into the casting areas 113u, 113v, and 113w.

[0113] Next, as shown in Figure 6, the peripheral edge 111 that constitutes the case 11 of While moving the nozzles 62u and 63u toward and toward the long side portion 111a of the pair of long sides 111a and 111b (an example of one of the pair of long sides 111a and 111b), epoxy resin 82 is discharged from the nozzles 62u and 63u into the casting area 113u. Controlled by the nozzle control unit 61, the two nozzles 62u and 63u operate similarly to each other. Specifically, as shown by arrow Y1 in Figures 4 and 6, the nozzle control unit 61 provided in the casting device 6 moves the nozzles 62u and 63u toward the long side portion 111a of the peripheral portion 111 while controlling the discharge amount of epoxy resin 82 (not shown in Figure 4). The nozzle control unit 61 brings the nozzles 62u and 63u close to the long side portion 111a of the peripheral portion 111 by a predetermined distance, and then moves the nozzles 62u and 63u away from the long side portion 111a of the peripheral portion 111 while controlling the amount of epoxy resin 82 discharged, as shown by arrow Y2 in Figures 4 and 6. In this way, the nozzle control unit 61 moves the nozzles 62u and 63u back and forth multiple times in the longitudinal direction of the casting area 113u, filling the casting area 113u with epoxy resin 82.

[0114] Furthermore, the nozzles 62v and 63v are moved in a direction toward and away from the long side 111a (an example of one of the pair of long side portions 111a and 111b) of the peripheral portion 111 that constitutes the case 11, while the epoxy resin 82 is discharged from the nozzles 62v and 63v into the casting area 113v. The two nozzles 62v and 63v operate similarly to each other under the control of the nozzle control unit 61. Specifically, as shown by arrow Y1 in Figures 4 and 6, the nozzle control unit 61 provided in the casting device 6 moves the nozzles 62v and 63v toward the long side 111a of the peripheral portion 111 while controlling the discharge amount of epoxy resin 82. The nozzle control unit 61 brings the nozzles 62v and 63v close to the long side portion 111a of the peripheral portion 111 by a predetermined distance, and then, as shown by arrow Y2 in Figures 4 and 6, moves the nozzles 62v and 63v away from the long side portion 111a of the peripheral portion 111 while controlling the discharge amount of epoxy resin 82. In this way, the nozzle control unit 61 moves the nozzles 62v and 63v back and forth multiple times in the longitudinal direction of the casting area 113v, thereby controlling the casting area 113 v Fill it with epoxy resin 82.

[0115] Furthermore, the nozzles 62w and 63w are moved in a direction toward and away from the long side portion 111a (an example of one of the pair of long side portions 111a and 111b) of the peripheral portion 111 that constitutes the case 11, while the epoxy resin 82 is discharged from the nozzles 62w and 63w into the casting area 113w. The nozzle control unit 61 controls the two nozzles 62 w ,63 wThese operate similarly to each other. Specifically, as shown by arrow Y1 in Figures 4 and 6, the nozzle control unit 61 provided in the casting device 6 moves the nozzles 62w and 63w toward the long side 111a of the peripheral edge 111 while controlling the amount of epoxy resin 82 discharged. Once the nozzle control unit 61 has brought the nozzles 62w and 63w toward the long side 111a of the peripheral edge 111 to a predetermined distance, it then moves the nozzles 62w and 63w toward the long side 111a of the peripheral edge 111 toward the long side 111a of the peripheral edge 111 while controlling the amount of epoxy resin 82 discharged, as shown by arrow Y2 in Figures 4 and 6. In this way, the nozzle control unit 61 moves the nozzles 62w and 63w back and forth multiple times in the longitudinal direction of the casting area 113w, filling the casting area 113w with epoxy resin 82.

[0116] The nozzle control unit 61 moves the nozzles 62u and 63u back and forth multiple times (for example, twice) in the longitudinal direction of the casting area 113u, and then moves the nozzles 62u and 63u in a direction approaching the long side portion 111a of the peripheral portion 111. As shown in Figures 7 and 8, the nozzle control unit 61 stops the movement of the nozzles 62u and 63u at a position in the casting area 113u that is biased towards the side of the structure 31u, stops the discharge of epoxy resin 82 into the casting area 113u, and completes the formation of the sealing portion 81u.

[0117] The nozzle control unit 61, provided in the casting apparatus 6, views the casting area 113u from above the case 11 (i.e., in a plan view) and stops the movement of the nozzles 62u and 63u in the area of ​​the casting area 113u that is contained between the structure 31u and a virtual straight line VL3u that intersects the direction in which the pair of long sides 111a and 111b of the peripheral edge portion 111 constituting the case 11 are aligned, including the center C2u of the casting area 113u. In a plan view, the center C2u coincides with the center C1u (see Figure 1), and the virtual straight line VL3u coincides with the virtual straight line VL1u (see Figure 1).

[0118] The nozzle 62u stops above region A1u, and the nozzle 63u stops above region A2u. Therefore, in the process of forming the sealing portion 81u, the epoxy resin 82 is last extruded from the nozzle 62u into the casting region 113u at a position corresponding to region A1u during the formation of the sealing portion 81u. The casting region 113u contained between the virtual straight line VL3u and the structure 31u is the area to which the nozzles 62u and 63u move more times than the casting region 113u contained between the virtual straight line VL3u and the long side portion 112b of the inner wall 112. For this reason, the amount of epoxy resin 82 extruded into the casting region 113u contained between the virtual straight line VL3u and the structure 31u is greater than that into the casting region 113u contained between the virtual straight line VL3u and the long side portion 112b of the inner wall 112. As a result, as shown in Figure 8, the sealing portion 81u finally formed in the casting region 113u is thicker in the region of the casting region 113u located between the virtual line VL3u and the structure 31u than in the region of the casting region 113u located between the virtual line VL3u and the long side portion 112b of the inner wall 112. Furthermore, as shown in Figure 7, weld lines WLu are generated on the surface 811u of the sealing portion 81u finally formed in the casting region 113u, spreading concentrically around regions A1u and A2u, biased towards the structure 31u side.

[0119] Furthermore, the nozzle control unit 61 moves the nozzles 62v and 63v back and forth multiple times (for example, twice) in the longitudinal direction of the casting area 113v, and then moves the nozzles 62v and 63v toward the longer side 111a of the peripheral edge 111. As shown in Figure 7, the nozzle control unit 61 stops the movement of the nozzles 62v and 63v at a position in the casting area 113v that is biased toward the side of the structure 31v, and stops the discharge of epoxy resin 82 into the casting area 113v, thereby completing the formation of the sealing portion 81v.

[0120] The nozzle control unit 61, provided in the casting apparatus 6, views the casting area 113v from above the case 11 (i.e., in a plan view) and stops the movement of the nozzles 62v and 63v in the area of ​​the casting area 113v that is contained between the structure 31v and a virtual straight line VL3v that intersects in the direction in which the pair of long sides 111a and 111b of the peripheral edge portion 111 constituting the case 11 are aligned, including the center C2v of the casting area 113v. In a plan view, the center C2v coincides with the center C1v (see Figure 1), and the virtual straight line VL3v coincides with the virtual straight line VL1v (see Figure 1).

[0121] The nozzle 62v stops above region A1v, and the nozzle 63v stops above region A2v. Therefore, in the process of forming the sealing portion 81v, the epoxy resin 82 is last extruded from the nozzle 62v into the casting region 113v at a position corresponding to region A1v during the formation of the sealing portion 81v. The region of the casting region 113v contained between the virtual straight line VL3v and the structure 31v is the area to which the nozzles 62v and 63v move more times than the region of the casting region 113v contained between the virtual straight line VL3v and the long side portion 112b of the inner wall 112. For this reason, the amount of epoxy resin 82 extruded into the region of the casting region 113v contained between the virtual straight line VL3v and the structure 31v is greater than that into the region of the casting region 113v contained between the virtual straight line VL3v and the long side portion 112b of the inner wall 112. As a result, the sealing portion 81v finally formed in the casting region 113v is thicker in the region of the casting region 113v contained between the virtual line VL3v and the structure 31u than in the region of the casting region 113v contained between the virtual line VL3v and the long side portion 112b of the inner wall 112. Furthermore, as shown in Figure 7, a weld line WLv is generated on the surface 811v of the sealing portion 81v finally formed in the casting region 113v, spreading concentrically around regions A1v and A2v, biased towards the structure 31v side.

[0122] Furthermore, the nozzle control unit 61 controls the casting area 113 wAfter the nozzles 62w and 63w are moved back and forth multiple times (for example, twice) in the longitudinal direction, the nozzles 62w and 63w are moved in a direction that approaches the long side 111a of the peripheral edge 111. As shown in Figure 7, the nozzle control unit 61 stops the movement of the nozzles 62w and 63w at a position in the casting area 113w that is biased toward the side of the structure 31w. Then, the dispensing of epoxy resin 82 into the casting area 113w is stopped, and the formation of the sealing portion 81w is completed.

[0123] The nozzle control unit 61, provided in the casting apparatus 6, views the casting area 113w from above the case 11 (i.e., in a plan view) and stops the movement of the nozzles 62w and 63w in the area of ​​the casting area 113w that is contained between the structure 31w and a virtual straight line VL3w that intersects in the direction including the center C2w of the casting area 113w, which is aligned in the direction in which the pair of long sides 111a and 111b of the peripheral edge portion 111 constituting the case 11 are aligned. In a plan view, the center C2w coincides with the center C1w (see Figure 1), and the virtual straight line VL3w coincides with the virtual straight line VL1w (see Figure 1).

[0124] The nozzle 62w stops above region A1w, and the nozzle 63w stops above region A2w. Therefore, in the process of forming the sealing portion 81w, the epoxy resin 82 is last dispensed from the nozzle 62w into the casting region 113w at a position corresponding to region A1w, which is in the process of forming the sealing portion 81w. The casting region 113w, which is located between the virtual straight line VL3w and the structure 31w, is the area to which the nozzles 62w and 63w move more times than the casting region 113w, which is located between the virtual straight line VL3w and the long side portion 112b of the inner wall 112. For this reason, the amount of epoxy resin 82 dispensed in the casting region 113w, which is located between the virtual straight line VL3w and the structure 31w, is greater than in the casting region 113w, which is located between the virtual straight line VL3w and the long side portion 112b of the inner wall 112. As a result, the sealing portion 81w ultimately formed in the casting region 113w is thicker in the region of casting region 113w that is located between the virtual straight line VL3w and the structure 31w than in the region of casting region 113w that is located between the virtual straight line VL3w and the long side portion 112b of the inner wall 112. Furthermore, as shown in Figure 7, a weld line WLw is generated on the surface 811w of the sealing portion 81w ultimately formed in the casting region 113w, spreading concentrically around regions A1w and A2w, biased towards the structure 31w side.

[0125] When the injection of epoxy resin 82 into the injection regions 113u, 113v, and 113w is complete, the nozzle control unit 61 provided in the injection apparatus 6 retracts the nozzles 62u, 63u, 63v, 63v, 62w, and 63w from above the case 11. Subsequently, the control device is attached to the case 11, and the epoxy resin 82 injected into the injection regions 113u, 113v, and 113w hardens to form the sealing portions 81u, 81v, and 81w, thereby completing the semiconductor module 1.

[0126] (Effects of semiconductor modules and methods for manufacturing semiconductor modules) The effects of the semiconductor module and the method for manufacturing the semiconductor module according to this embodiment will be explained with reference to Figures 5 and 7, and with reference to Figure 9. In this embodiment, the effects of the U-phase inverter section 12u, the V-phase inverter section 12v, and the W-phase inverter section 12w are the same, so the effects of the semiconductor module 1 and the method for manufacturing the semiconductor module 1 will be explained below using the U-phase inverter section 12u as an example. Figure 9 is a diagram illustrating the effects of the semiconductor module 1 and the method for manufacturing the semiconductor module 1 according to this embodiment, and shows a schematic cross-sectional view of the semiconductor module 1 cut along the α-α line shown in Figure 7, along with nozzles 62u and 63u in a state where the casting of epoxy resin 82 has been completed.

[0127] When epoxy resin is poured into a casting area, unexpected air bubbles may form in the epoxy resin. Epoxy resin pouring, or sealing, is performed under reduced pressure. Therefore, when air bubbles burst during epoxy resin pouring, the resulting droplets of resin material can scatter far enough from the point of bursting to reach the periphery of the case.

[0128] As shown in Figure 9, the semiconductor module 1 includes a structure 31u. Structure 31u is, The structure 31u is positioned between the nozzles 62u and 63u and the fastening surface 751u of the intermediate terminal Mu. The structure 31u has gate signal output terminals 41 to 57 and current detection terminals 42 to 58. The portions of the gate signal output terminals 41 to 57 and the current detection terminals 42 to 58 that protrude from the long side portion 112a of the inner wall 112 are higher than the discharge port 621 of nozzle 62u, the discharge port 631 of nozzle 63u, and the fastening surface 751u of the intermediate terminal Mu, when viewed from the nozzle 62u and 63u side. Therefore, when viewed from the nozzle 62u and 63u side, the structure 31u is positioned so that the gate signal output terminals 41 to 57 and the current detection terminals 42 to 58 shield the fastening surface 751u of the intermediate terminal Mu.

[0129] Furthermore, as shown in Figure 9, when the discharge of epoxy resin 82 is completed, the discharge ports 621 and 631 of nozzles 62u and 63u stop at a position lower than the structure 31u. Discharge port of nozzle 62u when the discharge of epoxy resin 82 is completed 621 Furthermore, epoxy resin 82 remains at the discharge port 631 of the nozzle 63u.

[0130] The semiconductor module 1 includes a structure 31u having gate signal output terminals 41-57 and current detection terminals 42-58 arranged to shield the fastening surface 751u of the intermediate terminal Mu. As shown in Figure 7, the gate signal output terminals 41-57 and current detection terminals 42-58 are arranged in multiple rows in the direction in which the pair of long sides 111a and 111b of the peripheral edge 111 constituting the case 11 are aligned, and each has a surface with a predetermined extent when viewed in the direction in which the pair of long sides 111a and 111b are aligned. Therefore, as shown in Figure 9, even if bubbles are generated in the epoxy resin 82 remaining at the discharge port 621 of nozzle 62u and the discharge port 631 of nozzle 63u, and the generated bubbles burst and droplets DR are scattered toward the intermediate terminal Mu, the droplets DR will adhere to at least one of the surfaces of the gate signal output terminals 41-57 and current detection terminals 42-58.

[0131] Furthermore, when viewed in the direction in which the pair of long sides 111a and 111b are aligned, adjacent gate signal output terminals 41 to 57 and current detection terminals 42 to 58 are arranged so as not to overlap, for example, with a spacing of 0.5 mm or less.

[0132] There are no conductive materials, such as terminals with a higher workload than the gate signal output terminals 41-57 and current detection terminals 42-58, between the gate signal output terminals 41-57 and current detection terminals 42-58 and the intermediate terminal Mu. Furthermore, droplet DR has the characteristic of being attracted to conductive materials. For this reason, even if adjacent terminals of the gate signal output terminals 41-57 and current detection terminals 42-58 are spaced apart when viewed in the direction in which the pair of long sides 111a, 111b are aligned (i.e., the direction in which the droplet DR is directed toward the intermediate terminal Mu), the droplet DR will be attracted to either the gate signal output terminals 41-57 or the current detection terminals 42-58 and will adhere to the surface of the terminal to which it is attracted.

[0133] Furthermore, even if the droplet DR flies beyond the gate signal output terminals 41-57 and current detection terminals 42-58 toward the intermediate terminal Mu, there is no problem as long as it reaches the outside of the case 11 rather than the fastening surface 751u of the intermediate terminal Mu. As shown in Figure 9, D1 is the distance from the structure 31u to the outer edge of the case 11 that is parallel to the fastening surface 751u of the intermediate terminal Mu. Also, D2 is the distance from the virtual straight line VL3u (see Figure 7) containing the center C2u (see Figure 7) of the casting region 113u to the structure 31u that is parallel to the fastening surface 751u of the intermediate terminal Mu.

[0134] As shown in Figure 9, assume that the nozzles 62u and 63u stopped within a distance D3 where the distance from the structure 31u to the casting area 113u is equal to the distance D1. In this case, the discharge ports of the nozzles 62u and 63u 621 Regardless of the magnitude of the energy when the bubbles generated in the epoxy resin 82 remaining in 631 burst, the droplets DR collide with the structure 31u or the inner wall 112 and do not adhere to the fastening surface 751u of the intermediate terminal Mu.

[0135] Furthermore, assume that the distance from the structure 31u to the casting area 113u is longer than distance D3, and the nozzles 62u and 63u stop within the range of distance D4, which is less than or equal to the length to the center C2u. In this case, if the energy of the bubbles generated when they burst in the epoxy resin 82 remaining in the discharge ports 621 and 631 of the nozzles 62u and 63u is small, the droplets DR will collide with the structure 31u or the inner wall 112, and will not adhere to the fastening surface 751u of the intermediate terminal Mu.

[0136] On the other hand, if the nozzles 62u and 63u stop within the range of distance D4, and the energy of the bursting of bubbles generated in the epoxy resin 82 remaining at the discharge ports 621 and 631 of the nozzles 62u and 63u is large, the droplets DR will fly over the intermediate terminal Mu and reach the outside of the case 11, and will not adhere to the fastening surface 751u of the intermediate terminal Mu.

[0137] Furthermore, suppose the nozzles 62u and 63u stop in a range where the distance from the structure 31u to the casting area 113u is longer than the distance D2. In this case, regardless of the magnitude of the energy when the bubbles generated in the epoxy resin 82 remaining in the discharge ports 621 and 631 of the nozzles 62u and 63u burst, the droplets DR either collide with the structure 31u or the inner wall 112 or do not reach the structure 31u or the inner wall 112, and therefore do not adhere to the fastening surface 751u of the intermediate terminal Mu.

[0138] In this way, during the manufacturing of the semiconductor module 1, it is possible to prevent droplet DR from reaching the fastening surface 751u of the intermediate terminal Mu. As a result, in the semiconductor module 1, an increase in contact resistance between the fastening surface 751u of the intermediate terminal Mu and the cable can be prevented, thus preventing heat generation at the intermediate terminal Mu, and allowing the desired current to be supplied to the load from the U-phase inverter section 12u. Furthermore, in the semiconductor module 1, since the adhesion of droplet DR to the fastening surface 751u of the intermediate terminal Mu is prevented, the problem of workers fastening cables to the intermediate terminal Mu without noticing the droplet DR does not occur.

[0139] The semiconductor module 1, like the U-phase inverter section 12u, has a structure 31v in the V-phase inverter section 12v with a configuration similar to structure 31u, and a structure 31w in the W-phase inverter section 12w with a configuration similar to structure 31u. Furthermore, the semiconductor module 1 During manufacturing, the movement of the nozzles 62v and 63v (see Figure 7) is stopped at a position (i.e., within a distance D2) on the side of the structure 31v within the casting area 113v, and the extrusion of epoxy resin 82 into the casting area 113v is stopped. Similarly, semiconductor module 1 During manufacturing, the movement of the nozzles 62w and 63w (see Figure 7) is stopped at a position (i.e., within the range of distance D2) that is biased toward the structure 31w within the casting area 113w, and the discharge of epoxy resin 82 into the casting area 113w is stopped. As a result, the semiconductor module 1 can prevent splash DR from adhering to the intermediate terminals Mv and Mw, thereby preventing heat generation at the intermediate terminals Mv and Mw, and allowing the desired current to be supplied to the load from the V-phase inverter section 12v and the W-phase inverter section 12w, respectively. Mv, Mw This prevents the problem of workers connecting cables to intermediate terminals Mv and Mw without noticing the presence of droplet DR.

[0140] The gate signal output terminals 41-57 and current detection terminals 42-58 have a current smaller than the current flowing through the intermediate terminals Mu, Mv, and Mw, and a voltage lower than the voltage applied to the intermediate terminals Mu, Mv, and Mw is applied to them. Therefore, even if droplet DR adheres to the gate signal output terminals 41-57 and current detection terminals 42-58, it does not generate heat or produce the desired gate signal. The number Problems such as inability to transmit to transistors 211-281 do not occur.

[0141] As described above, the semiconductor module 1 according to this embodiment comprises a case 11 having an inner wall 112 defining casting regions 113u, 113v, and 113w on which transistors 211 to 281 are arranged, and a peripheral portion 111 located outside the inner wall 112 and formed in a rectangular ring shape, intermediate terminals Mu, Mv, and Mw connected to transistors 211 to 281 having fastening surfaces 751u, 751v, and 751w on the long side 111a of a pair of opposing long sides 111a and 111b, on which cables connected to the load to be driven are fastened, and structures 31u, 31v, and 31w located on the long side 112a of the inner wall 112 adjacent to the long side 111a on which the intermediate terminals Mu, Mv, and Mw are arranged, and which are higher than the fastening surfaces 751u, 751v, and 751w, and epoxy resin 82 It has weld lines WLu, WLv, WLw formed on the surface 811u, 811v, 811w, which are offset to the side of the structures 31u, 31v, 31w, and a sealing portion 81u, 81v, 81w which is cast into the casting region 113u, 113v, 113w to seal the transistors 211 to 281.

[0142] Furthermore, the method for manufacturing the semiconductor module 1 according to this embodiment is a method for manufacturing a semiconductor module, wherein the semiconductor module is the semiconductor module 1 according to this embodiment, and epoxy resin is cast in the casting regions 113u, 113v, and 113w. 82 The nozzles 62u, 63u, 62v, 63v, 62w, and 63w provided in the casting device 6 for casting are positioned from above the case 11 at predetermined positions in the casting areas 113u, 113v, and 113w. The nozzles 62u, 63u, 62v, 63v, 62w, and 63w are moved in the direction towards and away from the long side 111a of the pair of long sides 111a, 111b of the peripheral portion 111, while epoxy resin is poured from the nozzles 62u, 63u, 62v, 63v, 62w, and 63w. 82The epoxy resin is dispensed into casting regions 113u, 113v, and 113w. The nozzles 62u, 63u, 62v, 63v, 62w, and 63w are stopped at positions (regions A1u, A2u, A1v, A2v, A1w, A2w) that are biased towards the structures 31u, 31v, and 31w within the casting regions 113u, 113v, and 113w, and the epoxy resin is dispensed into the casting regions 113u, 113v, and 113w. 82 The dispensing is stopped, and the formation of the sealing portions 81u, 81v, and 81w is completed.

[0143] This prevents epoxy resin from adhering to terminals to which at least one of a high current and a high voltage is supplied in the semiconductor module 1.

[0144] The present invention is not limited to the embodiments described above, and various modifications are possible. The semiconductor module according to the above embodiment includes a structure having a gate signal output terminal and a current detection terminal, but the present invention is not limited thereto. The structure may have configurations other than a gate signal output terminal and a current detection terminal, as long as it is positioned between the sealing portion and the intermediate terminal. For example, even if the structure has a long side portion of the inner wall formed higher than the fastening surface of the intermediate terminal, the same effects as the semiconductor module according to the above embodiment can be obtained.

[0145] In the semiconductor module manufacturing method according to the above embodiment, two nozzles are used for each casting area, but the present invention is not limited to this. For example, one or three or more nozzles may be used for each casting area.

[0146] In the above embodiment, the transistor provided in the semiconductor element is composed of a MOSFET, but it may also be composed of an Insulated Gate Bipolar Transistor (IGBT).

[0147] In the above embodiment, the gate signal output terminal and the current detection terminal are arranged in two rows, but they may be arranged in one row or in three or more rows.

[0148] In the above embodiment, the gate signal output terminal and the current detection terminal have a surface that has a predetermined extension toward the casting area. , this The terminal may be a press-fit terminal having a through hole on its surface.

[0149] The semiconductor module according to the above embodiment has a case that is approximately the same height as the fastening surfaces of the positive and negative terminals. S The present invention has an internal wall, but is not limited to this. S The inner wall may have a height higher than the respective fastening surfaces of the positive and negative terminals. This prevents splashes from adhering to the fastening surfaces of the positive and negative terminals during manufacturing of the semiconductor module.

[0150] The technical scope of the present invention is not limited to the illustrative and described embodiments, but also includes all embodiments that produce effects equivalent to those aimed at by the present invention. Furthermore, the technical scope of the present invention is not limited to the combination of features of the invention defined by the claims, but can be defined by any desired combination of specific features from all disclosed features. [Explanation of Symbols]

[0151] 1. Semiconductor module 6 Casting equipment 11 cases 12u U-phase inverter section 12V V-phase inverter section 12W W-phase inverter section 14u,14v,14w DBC board 21,22,23,24,25,26,27,28 Semiconductor elements 31u,31v,31w structure 41, 43, 45, 47, 51, 53, 55, 57 Gate signal output terminals 42, 44, 46, 48, 52, 54, 56, 58 Current detection terminals 61 Nozzle Control Unit 62u, 62v, 62w, 63u, 63v, 63w nozzle 81u,81v,81w Sealing part 82 Epoxy resin 111 Peripheral area 111a, 111b, 112a, 112b Long side 111c, 111d Short side 112 Inner wall 112c, 112d Partition 113u,113v,113w Casting area 114,811u,811v,811w surface 115u,115v,115w fixed part 121a Existence area 121u, 121v, 121w inverter circuit 140 Insulating substrate 211, 221, 231, 241, 251, 261, 271, 281 transistors 212, 222, 232, 242, 252, 262, 272, 282 freewheeling diodes 621,631 Discharge port 751u,751v,751w fastening surface A1u,A1v,A1w,A2u,A2v,A2w area C1u,C1v,C1w,C2u,C2v,C2w Center D1, D2, D3, D4 Distance DR droplets Mu, Mv, Mw intermediate terminals Nu,Nv,Nw Negative terminal Pu,Pv,Pw Positive terminal Ulo, Vlo, Wlo lower arm Uup, Vup, Wup Upper Arm VL1u, VL1v, VL1w, VL2u, VL2v, VL2w, VL3u, VL3v, VL3w virtual line WLu, WLv, WLw Weldline Y1, Y2 arrows

Claims

1. A case having an inner wall that defines a space in which multiple switching elements are arranged, and a peripheral portion that is located outside the inner wall and is formed in a rectangular ring shape, A part of the peripheral edge is located on one of a pair of opposing long sides and has a fastening surface on which a cable connected to the load to be driven is fastened, and has an intermediate terminal connected to the plurality of switching elements, A structure is located adjacent to the long side portion where the intermediate terminal is positioned, and is positioned in a part of the inner wall region that is higher than the fastening surface. A sealing portion formed of epoxy resin, having linear marks on its surface that are offset to the side of the structure, and which is cast into the space to seal the plurality of switching elements. A semiconductor module equipped with the following features.

2. The linear marks are formed in a region of the surface that is contained between the region and a virtual straight line that intersects the direction in which the pair of long sides are aligned, including the center in the direction in which the two long sides are aligned, when viewed in a direction intersecting the surface. The semiconductor module according to claim 1.

3. At least a portion of the linear mark has a shape that is symmetrical with respect to a virtual straight line parallel to the direction in which the center and the pair of long sides are aligned, when viewed in a direction intersecting the surface. The semiconductor module according to claim 2.

4. At least a portion of the linear marks have a circular shape that spreads out from a predetermined area of ​​the surface located in front of the structure, when viewed in a direction intersecting the surface. A semiconductor module according to any one of claims 1 to 3.

5. A method for manufacturing semiconductor modules, The semiconductor module is the semiconductor module described in any one of claims 1 to 4. A nozzle provided in a casting device for pouring the epoxy resin into the space is positioned at a predetermined location in the space from above the case. While moving the nozzle in a direction toward and away from one of the pair of long sides, epoxy resin is discharged from the nozzle into the space. The nozzle's movement is stopped at a position within the space that is biased towards the structure. The discharge of the epoxy resin into the space is stopped, and the formation of the sealing portion is completed. A method for manufacturing semiconductor modules.

6. Viewing the space from above the case, the movement of the nozzle is stopped in the region of the space that is contained between the structure and a virtual straight line that intersects the direction including the center of the space in the direction in which the pair of long sides are aligned, and the structure. A method for manufacturing a semiconductor module according to claim 5.

7. Two nozzles are positioned above the case with a predetermined gap between them in a direction intersecting the direction in which the pair of long sides are aligned. The two nozzles operate similarly to each other. A method for manufacturing a semiconductor module according to claim 5 or 6.

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