Semiconductor device and method for manufacturing the same
A dual-layer barrier metal structure with a polycrystalline first layer and amorphous second layer, combined with a diffusion prevention layer, addresses copper diffusion issues in semiconductor devices, improving adhesion and barrier properties.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-03-10
- Publication Date
- 2026-03-17
AI Technical Summary
Copper diffusion into semiconductor substrates deteriorates the characteristics of semiconductor devices, and existing barrier metals fail to provide effective adhesion and barrier properties against copper diffusion.
A semiconductor device with a dual-layer barrier metal structure, where the first barrier metal is polycrystalline and the second is amorphous, and a diffusion prevention layer is used to maintain the amorphous structure of the second barrier metal, ensuring high adhesion and barrier properties against copper diffusion.
The dual-layer barrier metal structure effectively prevents copper diffusion, maintains adhesion, and reduces stress-related issues, enhancing the performance and reliability of semiconductor devices.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same.
Background Art
[0002] III-V semiconductor devices such as GaAs are used in communication devices and the like. As an electrode material of the semiconductor device, copper having high electrical conductivity or the like is used. However, copper diffuses into the semiconductor substrate and deteriorates the characteristics of the semiconductor device. Therefore, a barrier metal is formed between the semiconductor substrate and the copper film. In order to improve the adhesion between the semiconductor substrate and the barrier metal, heat treatment is performed to diffuse the metal atoms of the barrier metal into the semiconductor substrate, and a diffusion layer is formed between the barrier metal and the semiconductor substrate. It is known to form the barrier metal by electroless nickel plating (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0006] The semiconductor device according to this disclosure comprises a semiconductor substrate, a barrier metal formed on the semiconductor substrate and made of a metallic material co-deposited with phosphorus or boron, and a copper film formed on the barrier metal, wherein the barrier metal has a first barrier metal in contact with the semiconductor substrate and a second barrier metal formed on the first barrier metal, the first barrier metal and the second barrier metal are made of the same material, the first barrier metal is polycrystalline, and the second barrier metal has an amorphous structure. [Effects of the Invention]
[0007] In this disclosure, since the second barrier metal has an amorphous structure, high barrier properties against the diffusion of copper atoms in the copper film can be obtained. [Brief explanation of the drawing]
[0008] [Figure 1] This is a cross-sectional view showing a semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1. [Figure 3] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example. [Figure 4] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example. [Figure 5] This is a cross-sectional view showing a semiconductor device according to Embodiment 2. [Figure 6] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 2. [Figure 7] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 2. [Figure 8] This is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 2. [Modes for carrying out the invention]
[0009] A semiconductor device according to an embodiment and a method for manufacturing the same will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repetition of the description may be omitted.
[0010] Embodiment 1. Figure 1 is a cross-sectional view showing a semiconductor device according to Embodiment 1. The semiconductor substrate 1 is made of a III-V semiconductor such as GaAs. A barrier metal 2 made of a metallic material in which phosphorus (P) or boron (B) is co-deposited is formed on the semiconductor substrate 1. A copper film 3 is formed on the barrier metal 2.
[0011] Barrier metal 2 is, for example, a nickel alloy (Ni-P) with phosphorus co-deposited. Here, Ni-P indicates an alloy of nickel and phosphorus, and similarly, a hyphen will be used to represent the alloy. However, barrier metal 2 is not limited to this; any alloy in which phosphorus or boron is co-deposited on at least one of nickel (Ni), cobalt (Co), or tungsten (W) is acceptable. That is, barrier metal 2 can be any of Ni-P, Ni-WP, Ni-Co-P, Co-P, Co-WP, Ni-B, Ni-WB, Ni-Co-B, Co-B, or Co-WB. These alloys can be formed by electroless plating and have high barrier properties against the diffusion of copper (Cu) in the copper film 3. The crystallinity of barrier metal 2 can also be controlled by the liquid composition or processing conditions.
[0012] The barrier metal 2 comprises a first barrier metal 2a in contact with the semiconductor substrate 1 and a second barrier metal 2b formed on the first barrier metal 2a. A diffusion prevention layer 4 is formed between the first barrier metal 2a and the second barrier metal 2b. The diffusion prevention layer 4 has at least one of gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), titanium (Ti), and aluminum (Al). The diffusion prevention layer 4 made of these materials can prevent the diffusion of nickel, cobalt, or tungsten, which are metallic materials of the second barrier metal 2b, and has high adhesion to nickel alloys, cobalt alloys, or tungsten alloys.
[0013] The internal stress and the linear expansion amount of the metal film are determined by the material. Therefore, the first barrier metal 2a and the second barrier metal 2b are formed of the same material. Thereby, the stress generated at the interface due to the difference in the internal stress or the linear expansion amount between the two can be reduced, and the interface peeling caused by the stress can be prevented.
[0014] The metal material of the first barrier metal 2a diffuses into the semiconductor substrate 1, and a diffusion layer 5 is formed between the first barrier metal 2a and the semiconductor substrate 1. The diffusion layer 5 has higher adhesion to the barrier metal 2 and the semiconductor substrate 1 than the sputtered film and the deposited film. Therefore, by forming the diffusion layer 5, the adhesion between the semiconductor substrate 1 and the barrier metal 2 can be improved.
[0015] The first barrier metal 2a is polycrystalline such as Ni3P, Ni 12 P5 or Ni7P3. The crystal grains of the polycrystal are on the nanoscale. On the other hand, the second barrier metal 2b has a uniform amorphous structure instead of being polycrystalline. In the amorphous structure, phosphorus or boron enters the lattice of the nickel crystal, causing the crystal to be distorted.
[0016] Subsequently, a method for manufacturing a semiconductor device according to the present embodiment will be described. FIG. 2 is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1. First, as a pretreatment, a hydrophilic treatment and an activator treatment are performed. For example, oxygen plasma treatment or ozone treatment is carried out to modify the surface of the semiconductor substrate 1 to be hydrophilic. Subsequently, when immersed in an active solution of an electroless plating reaction containing Pd ions, the surface of the semiconductor substrate 1 is dissolved by the effect of galvanic corrosion and Pd is deposited. For example, the Pd ion concentration is from 10 ppm to 100 ppm, the liquid temperature is from 0°C to 50°C, and the immersion time is from 1 minute to 5 minutes. If the amount of Pd deposition is too small, the subsequent Ni plating film cannot be formed, and if it is too large, the adhesion between the films deteriorates. However, since the ease of Pd deposition varies depending on the type of semiconductor, it is necessary to adjust within the above range according to the type of substrate.
[0017] After the pretreatment, it is immersed in an electroless Ni plating solution mainly composed of hypophosphorous acid. For example, the liquid temperature is processed at 70°C to 90°C. By performing liquid circulation, filtration, and oscillation together, the plating reaction can be stabilized, so that a smooth plating film can be formed. Due to the catalytic action of Pd, Ni ions are deposited as Ni, and P in the liquid components is eutectic to form a Ni-P alloy film. Here, Pd is taken as an example of the catalytic metal, but as long as it is a metal with catalytic activity for electroless plating deposition such as Au, Ag, Pt, Ni, Sn, Ru, etc., a Ni alloy film can be obtained in the same way. In this way, the first barrier metal 2a with an amorphous structure is formed on the semiconductor substrate 1 by electroless plating. Note that the first barrier metal 2a may be formed by other means such as the PVD method or the vapor deposition method. In that case, the step of depositing a catalytic metal such as Pd as a pretreatment becomes unnecessary.
[0018] After taking out the wafer from the electroless Ni plating solution and washing it with water, the diffusion prevention layer 4 is formed on the first barrier metal 2a by immersing it in the electroless Pd plating solution while it is still wet. The film thickness of the diffusion prevention layer 4 is, for example, 0.01 μm. When it is thicker than 0.1 μm, it peels off at the boundary with the first barrier metal 2a, so it is designed to be 0.1 μm or less. When it is less than 0.01 micron, the deposition is not stable, so it is designed to be 0.01 μm or more. The material of the diffusion prevention layer 4 is not limited to Pd, and other materials may be used as long as they can prevent mutual diffusion. For example, plating of metals such as Au, Ag, Pt, Sn, Ru, etc. with catalytic activity for electroless plating deposition can be used. Note that electroless plating is simple and easy to use as the film formation method of the diffusion prevention layer 4, but sputtering or vapor deposition may also be used.
[0019] Next, the second barrier metal 2b with an amorphous structure is formed on the diffusion prevention layer 4 by electroless plating. The film formation method of the second barrier metal 2b is the same as that of the first barrier metal 2a.
[0020] Next, the wafer and copper plate are immersed in a copper sulfate plating solution, and an electric current is passed through the outer edge of the wafer as the cathode and the copper plate as the anode, thereby forming a copper film 3 on the second barrier metal 2b that is proportional to the amount of electricity supplied. For example, the solution temperature is set to 30°C. Alternatively, electroless plating can be used instead of electroplating. In the case of electroless plating, the copper film 3 can also be formed by adjusting the additives. Furthermore, to prevent surface oxidation of the copper film 3, Ni plating, Pd plating, and Au plating can be sequentially performed as post-treatment using electroless plating or electroplating. This improves the adhesion of the die bond or wire bond.
[0021] The first barrier metal 2a and the second barrier metal 2b are made of the same material, for example, a Ni-P film. When a Ni-P film is deposited with a phosphorus concentration of 10 at.% to 25 at.%, it forms an amorphous structure. Therefore, the first barrier metal 2a and the second barrier metal 2b to be deposited are made amorphous by ensuring that the amount of phosphorus or boron co-deposited is 10 at.% or more.
[0022] Next, a heat treatment is performed at 150°C to 300°C. This causes the metallic material of the first barrier metal 2a to diffuse into the semiconductor substrate 1, forming a diffusion layer 5 between the first barrier metal 2a and the semiconductor substrate 1. The first barrier metal 2a, in which the metallic material has diffused into the semiconductor substrate 1, crystallizes due to an increase in the eutectoidization of P or B. On the other hand, the diffusion prevention layer 4 prevents the diffusion of metallic atoms of the second barrier metal 2b, so even after heat treatment, the second barrier metal 2b maintains an amorphous structure without any change in film composition. Therefore, the second barrier metal 2b has high barrier properties against the diffusion of copper atoms in the copper film 3.
[0023] Furthermore, if heat is applied when the interface between the semiconductor substrate 1 and the barrier metal 2 is in poor condition, delamination may occur. Therefore, heat treatment can also be used to remove defective products before shipment.
[0024] Next, the effects of this embodiment will be explained in comparison with a comparative example. Figures 3 and 4 are cross-sectional views showing a method for manufacturing a semiconductor device according to a comparative example. As shown in Figure 3, one layer of barrier metal 6 is formed on a semiconductor substrate 1, and a copper film 3 is formed on top of it. The barrier metal 6 has an amorphous structure when the film is formed. Next, when heat treatment is performed at 150°C to 300°C, as shown in Figure 4, the metal atoms of the barrier metal 6 diffuse into the semiconductor substrate 1 and a diffusion layer 5 is formed. The barrier metal 6 in which the metal atoms have diffused crystallizes completely due to an increase in the co-deposition of phosphorus or boron. For this reason, the barrier properties of the barrier metal 6 against the diffusion of copper atoms of the copper film 3 deteriorate after heat treatment.
[0025] In contrast, in this embodiment, the diffusion prevention layer 4 prevents the diffusion of metal atoms in the second barrier metal 2b, so the second barrier metal 2b does not crystallize even after heat treatment. Therefore, because the second barrier metal 2b has an amorphous structure, high barrier properties against the diffusion of copper atoms in the copper film 3 can be obtained. In addition, since the nickel diffusion layer 5 is thinner compared to the case where the barrier metal is a single-layer nickel alloy, the stress caused by the diffusion layer 5 is reduced.
[0026] The barrier metal 2 needs to have a thickness of 0.1 μm or more to provide a barrier against copper atom diffusion. However, if the barrier metal 2 is thicker than 0.5 μm, the device will bend under stress. Therefore, the barrier metal 2 thickness should be between 0.1 μm and 0.5 μm.
[0027] Embodiment 2. Figure 5 is a cross-sectional view showing a semiconductor device according to Embodiment 2. It differs from Embodiment 1 in that there is no diffusion prevention layer 4, and the second barrier metal 2b is formed directly on the first barrier metal 2a. The other configurations are the same as in Embodiment 1.
[0028] Next, a method for manufacturing a semiconductor device according to this embodiment will be described. Figures 6 to 8 are cross-sectional views showing a method for manufacturing a semiconductor device according to Embodiment 2. First, as shown in Figure 6, a first barrier metal 2a is formed on the semiconductor substrate 1 by electroless plating. At this stage, the first barrier metal 2a has an amorphous structure.
[0029] Next, as shown in Figure 7, the metal atoms of the first barrier metal 2a are diffused into the semiconductor substrate 1 by heat treatment at 150°C to 300°C, forming a diffusion layer 5 between the first barrier metal 2a and the semiconductor substrate 1. The first barrier metal 2a is polycrystalline after heat treatment. Depth analysis confirmed that the P concentration within Ni-P remained uniform in the film even after Ni diffusion. Therefore, the concentrations of the metal material and eutectoid of the first barrier metal 2a after heat treatment are uniform in the film.
[0030] Next, as shown in Figure 8, the second barrier metal 2b is directly formed on the first barrier metal 2a by electroless plating. The first barrier metal 2a and the second barrier metal 2b are formed from the same material. If the first barrier metal 2a is polycrystalline, even if the second barrier metal 2b, composed of the same Ni and P, is laminated on top of the first barrier metal 2a, the elements of both layers will not mutually diffuse. This is because the polycrystalline Ni-P crystal structure of the first barrier metal 2a is energetically more stable than the amorphous structure and is less prone to structural change. The second barrier metal 2b has an amorphous structure. Amorphous Ni-P films with a low phosphorus concentration (10 at.% to 25 at.%) do not crystallize at temperatures below 300°C. Therefore, the amorphous structure of the second barrier metal 2b is maintained if the heat treatment or usage environment is below 300°C.
[0031] Subsequently, a copper film 3 is formed on the second barrier metal 2b by electroless plating, thereby manufacturing the semiconductor device shown in Figure 5.
[0032] In this embodiment, heat treatment is performed after forming the first barrier metal 2a but before forming the second barrier metal 2b, so the second barrier metal 2b remains in an amorphous structure. Therefore, high barrier properties against the diffusion of copper atoms in the copper film 3 can be obtained. In addition, the step of forming a diffusion prevention layer 4 between the first barrier metal 2a and the second barrier metal 2b is unnecessary.
[0033] Furthermore, the diffusion layer 5 can be made thinner compared to when the barrier metal is formed in a single layer. Since the diffusion layer 5 is subjected to high stress, the stress can be reduced by making the diffusion layer 5 thinner. In addition, since the first barrier metal 2a and the second barrier metal 2b are made of the same material, they have high adhesion to each other. [Explanation of symbols]
[0034] 1 Semiconductor substrate, 2 Barrier metal, 2a First barrier metal, 2b Second barrier metal, 3 Copper film, 4 Diffusion prevention layer, 5 Diffusion layer
Claims
1. Semiconductor substrate and A barrier metal made of a metallic material co-deposited with phosphorus or boron is formed on the semiconductor substrate, The barrier metal comprises a copper film formed on the barrier metal, The barrier metal comprises a first barrier metal in contact with the semiconductor substrate and a second barrier metal formed on the first barrier metal. The first barrier metal and the second barrier metal are made of the same material. The first barrier metal is polycrystalline, The semiconductor device is characterized in that the second barrier metal has an amorphous structure.
2. The semiconductor device according to claim 1, characterized in that the metal atoms of the first barrier metal diffuse into the semiconductor substrate, thereby forming a diffusion layer between the first barrier metal and the semiconductor substrate.
3. The semiconductor device according to claim 1 or 2, characterized in that the film thickness of the barrier metal is 0.1 μm or more and 0.5 μm or less.
4. The semiconductor device according to claim 1 or 2, characterized in that the metal material has at least one of nickel, cobalt, and tungsten.
5. The semiconductor device according to claim 1 or 2, further comprising a diffusion prevention layer formed between the first barrier metal and the second barrier metal, which prevents the diffusion of metal atoms of the second barrier metal.
6. The semiconductor device according to claim 5, characterized in that the diffusion prevention layer has at least one of gold, silver, copper, palladium, platinum, titanium, and aluminum.
7. The semiconductor device according to claim 1 or 2, characterized in that the second barrier metal is formed directly on the first barrier metal.
8. A step of forming a first barrier metal made of a metallic material in which phosphorus or boron is co-deposited on a semiconductor substrate, A step of diffusing the metal atoms of the first barrier metal into the semiconductor substrate by heat treatment to form a diffusion layer between the first barrier metal and the semiconductor substrate, A step of forming a second barrier metal directly on the first barrier metal after the heat treatment, The process includes the step of forming a copper film on the second barrier metal, The first barrier metal and the second barrier metal are made of the same metallic material. The first barrier metal after the heat treatment is polycrystalline. A method for manufacturing a semiconductor device, characterized in that the second barrier metal has an amorphous structure.
Citation Information
Patent Citations
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JP2011044546A
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JP2013166998A
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JP2014112634A
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JP2020100869A
Electroplated CoWP composite structures as copper barrier layers
US20050104216A1