SiC polycrystalline substrate, SiC bonded substrate, and method for manufacturing a SiC bonded substrate
By controlling stacking fault density to 1.0% or less in SiC polycrystalline substrates through heating and polishing, the manufacturing yield of SiC bonded substrates is improved by reducing defects and ensuring a smooth bonding interface.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2026-03-17
AI Technical Summary
The challenge in manufacturing SiC bonded substrates lies in achieving a flat bonding interface between SiC polycrystalline and single-crystal layers to prevent unbonded areas, which can lead to crystal defects and reduced device performance due to irregularities and stacking faults, making it difficult to improve manufacturing yield.
The SiC polycrystalline substrate is prepared with a stacking fault density of 1.0% or less by controlling the heating process and polishing, ensuring a smooth bonding surface for SiC single-crystal substrates, thereby reducing defects at the interface.
This approach enhances the manufacturing yield of SiC bonded substrates by minimizing unbonded areas and crystal defects, leading to improved device performance.
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Abstract
Description
Technical Field
[0001] Relates to a SiC polycrystalline substrate, a SiC bonded substrate, and a method for manufacturing a SiC bonded substrate.
Background Art
[0002] Silicon carbide (hereinafter sometimes referred to as "SiC") semiconductors are expected as materials for power devices. However, it is difficult to obtain a large-area single-crystalline SiC substrate, and mass production is difficult and expensive compared to conventionally used silicon semiconductors.
[0003] In order to produce a SiC single-crystalline substrate at a low cost, a technique for bonding a SiC single-crystalline ingot (SiC single-crystalline substrate) and a SiC polycrystalline substrate has been proposed (for example, Patent Document 1). The SiC polycrystalline substrate of the SiC bonded substrate functions as a support substrate. Therefore, a single crystal attached on the SiC polycrystalline substrate may be a thin film. After bonding the SiC single-crystalline ingot and the SiC polycrystalline substrate, a thin SiC single-crystalline layer is left on the SiC polycrystalline substrate and the SiC single-crystalline ingot is peeled off. The SiC polycrystalline substrate (SiC bonded substrate) with the thin SiC single-crystalline layer attached can form a SiC thin film on the surface SiC single-crystalline layer, and further elements such as power devices can be formed thereon.
[0004] On the other hand, the peeled SiC single-crystalline ingot is repeatedly used to produce another SiC bonded substrate. Therefore, since a plurality of SiC bonded substrates can be created from one SiC single-crystalline ingot, the cost of SiC semiconductors can be reduced.
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Summary of the Invention
[0006] From the perspective of preventing the inclusion of impurities during processes such as device formation, it is desirable that the bonding interface between the SiC single-crystal layer and the SiC polycrystalline layer of a SiC bonded substrate, which is composed of a SiC single-crystal substrate and a SiC polycrystalline substrate, does not have an adhesive layer made of materials other than SiC. Therefore, it is desirable that the SiC polycrystalline substrate and the SiC single-crystal substrate be directly bonded.
[0007] In direct bonding, since there is no adhesive layer, the bonding surface between the SiC polycrystalline layer and the SiC single-crystal layer must be as flat as possible. If there are localized depressions (scratches or holes) on the bonding surface, unbonded areas will occur at the bonding interface where the SiC polycrystalline substrate and the SiC single-crystal layer cannot be partially bonded. These unbonded areas at the bonding interface can cause irregularities on the surface of the SiC single-crystal layer, inducing crystal defects when forming the SiC thin film on the SiC single-crystal layer, which can lead to a decrease in device performance and yield.
[0008] Grinding and polishing are performed to flatten the substrate surface before bonding. For the final polishing of the SiC single crystal layer surface, chemical mechanical polishing (CMP) is performed. CMP flattens the substrate surface by simultaneously performing chemical reactions and mechanical polishing with abrasive grains.
[0009] On the other hand, a SiC polycrystalline substrate is an aggregate of crystal grains with irregular crystal orientations. Therefore, the crystal orientation exposed on the surface of the SiC polycrystalline substrate differs depending on the location on the substrate. Different crystal orientations mean different arrangements of atoms, resulting in different chemical reactivity. Consequently, when a SiC polycrystalline substrate is polished using the CMP process, the chemical reaction progresses differently for each crystal grain, making it difficult to achieve a completely flat surface across the entire SiC polycrystalline substrate.
[0010] One proposed solution to improve this is to weaken the chemical reaction during the CMP process for SiC polycrystalline substrates and polish them using mechanical action. However, even with this measure, localized irregularities occur on the surface of the SiC polycrystalline substrate. These irregularities can cause areas where the SiC polycrystalline layer and SiC single crystal layer are not bonded together at the interface in SiC bonded substrates, where a SiC polycrystalline substrate and a SiC single crystal substrate are bonded together.
[0011] Thus, it is necessary to reduce defects (unbonded areas) at the bonding interface between the SiC single-crystal layer and the SiC polycrystalline layer of a SiC bonded substrate. However, it has not been clarified how to evaluate the properties of the bonding interface, such as the density of defects, in order to avoid a decrease in the manufacturing yield of the SiC bonded substrate.
[0012] Therefore, in order to solve the above problems, the present invention aims to improve the manufacturing yield of SiC bonded substrates. [Means for solving the problem]
[0013] To solve the above problems, the SiC polycrystalline substrate of the present invention has a bonding surface that bonds with a SiC single crystal substrate, and the stacking fault density of the bonding surface is 1.0% or less. The stacking fault density is determined based on the ratio of the first peak intensity at 2θ=33.6° and the second peak intensity at 2θ=41.4° in the X-ray diffraction profile of a SiC polycrystalline substrate using CuKα rays. It is characterized by the following. Furthermore, the SiC bonded substrate of the present invention is characterized by comprising the above-mentioned SiC polycrystalline substrate and a SiC single-crystal substrate bonded to the bonding surface of the above-mentioned SiC substrate. [Effects of the Invention]
[0015] The present invention makes it possible to improve the manufacturing yield of SiC bonded substrates. [Brief explanation of the drawing]
[0016] [Figure 1] This graph shows the results of an investigation into the impact of stacking fault density on product yield.
Embodiments for Carrying Out the Invention
[0017] Hereinafter, an example of an embodiment of a SiC polycrystalline substrate, a SiC bonded substrate, and a method for manufacturing a SiC bonded substrate of the present invention will be described.
[0018] [SiC single crystal substrate] As the SiC single crystal substrate, for example, a 4H-SiC single crystal substrate produced by the sublimation method can be used. The shape of the SiC single crystal substrate is substantially disk-shaped. In addition to circular, it may be provided with an index portion indicating the direction of the substrate, such as an orientation flat or a notch. It is preferable to use a substrate with a diameter of 100 mm or more and 305 mm or less (4 inches or more and 12 inches or less). Note that the shape is not limited to a substantially disk shape such as a circle, and may be, for example, a polygon.
[0019] [SiC polycrystalline substrate] The SiC polycrystalline substrate is a substrate that can reinforce the SiC single crystal substrate as a support substrate by directly bonding to the SiC single crystal substrate. By reinforcing the SiC single crystal substrate, for example, warping of the SiC single crystal substrate can be suppressed, and by suppressing warping, holding and transporting of the SiC single crystal substrate become possible.
[0020] 〈Stacking defect〉 SiC is a substance that exhibits polymorphism. The polymorphism of SiC appears by the stacking method in the c-axis direction of the crystal and has a structure such as a hexagonal system or a cubic system. The structure of SiC is such that regular tetrahedrons formed by silicon (or carbon) share vertices to form a bottom surface and are stacked. The period of this stacking is different for each crystal structure.
[0021] This disorder of the stacking period is called a stacking defect. Stacking defects occur, for example, when synthesizing SiC powder, when forming a SiC polycrystalline substrate by chemical vapor deposition (CVD method), when applying stress to the SiC polycrystalline substrate, or when performing heat treatment. Also, stacking defects occur in the SiC single crystal during the growth of the SiC single crystal substrate or when growing a SiC single crystal thin film by epitaxial growth by the CVD method on the SiC single crystal substrate. Stacking defects in the SiC single crystal are known to have an adverse effect on the device operation of silicon carbide.
[0022] The influence of stacking defects occurring in the SiC polycrystalline substrate on the SiC polycrystalline substrate is the flatness of the polished surface (surface irregularities). Since the stacking defect part is a disorder of the stacking period, extremely speaking, the crystal structure of the defect part is different from that of the surrounding area. Therefore, a difference in polishing speed occurs between the surrounding area and the defect part during polishing. As a result, the stacking defect part will have irregularities on the polished surface. Therefore, in the SiC polycrystalline substrate where strict flatness is required (for example, the SiC polycrystalline substrate for bonding), the fewer the stacking defects, the better.
[0023] The SiC polycrystalline substrate in the present embodiment includes a bonding surface that bonds to the SiC single crystal substrate, and the stacking defect density Y of the bonding surface is 1.0% or less. By the stacking defect density Y being 1.0% or less, the defects (unbonded parts) at the bonding interface between the SiC polycrystalline layer and the SiC single crystal layer of the SiC bonded substrate in which the SiC single crystal substrate and the SiC polycrystalline substrate are bonded are reduced. When forming a SiC single crystal thin film by epitaxial growth by the CVD method on the SiC single crystal layer of the SiC bonded substrate, the defects at the bonding interface that serve as the starting point of crystal defects are reduced, so that the yield of the device can be improved.
[0024] In particular, when the stacking defect density Y is 0.55% or more and 1.0% or less, the yield of the device can be further improved.
[0025] The stacking fault density (%) of a SiC polycrystalline substrate can be calculated, for example, by X-ray diffraction. In this case, the diffraction intensity ratio X = a / b is determined based on the peak intensity at 2θ = 33.6° (a) and the peak intensity at 2θ = 41.4° (b) in the X-ray diffraction profile using CuKα rays, and the stacking fault density Y of the SiC polycrystalline layer that forms the junction can be determined based on the diffraction intensity ratio X using the following equation (1).
[0026] [Formula 1] Y = X / (0.0682X + 0.0227) + 1.7X 3 (1)
[0027] That is, in equation (1), X is the diffraction intensity ratio obtained from X = a / b, a is the peak intensity at 2θ = 33.6° in the X-ray diffraction profile of the SiC polycrystalline substrate using CuKα rays, and b is the peak intensity at 2θ = 41.4° in the X-ray diffraction profile of the SiC polycrystalline substrate using CuKα rays.
[0028] <Crystal structure> Considering factors such as the difference in thermal expansion with the SiC single-crystal substrate, heat resistance, and high rigidity, 3C-SiC, in which the crystal structure of the SiC polycrystalline substrate is zincblende, can be adopted.
[0029] <Thickness of SiC polycrystalline substrate> Furthermore, if the thickness of the SiC polycrystalline substrate is reduced, the reinforcing effect that mitigates the warping of the SiC single crystal substrate weakens, which may result in problems such as transport errors that prevent the SiC bonded substrate from being transported. For this reason, the thickness of the SiC polycrystalline substrate used for the SiC bonded substrate is preferably 300 μm or more, more preferably 350 μm or more. The upper limit of the thickness of the SiC polycrystalline substrate is not particularly limited and does not affect the solution of the problems of the present invention, but it can be set to, for example, 1000 μm or less.
[0030] The SiC polycrystalline substrate can be manufactured by depositing a film on a graphite support substrate using methods such as CVD. After film deposition, the graphite support substrate is removed and polishing or lapping is performed. Since the thickness of the SiC polycrystalline substrate varies before and after polishing, for example, to match the thickness of the SiC polycrystalline substrate mentioned above, the thickness before polishing (after film deposition) is approximately 750 ± 250 μm. After lapping, the thickness is approximately 400 ± 50 μm. The SiC polycrystalline substrate may be manufactured by the CVD method and may be in an unpolished state, polished state, or lapped state. A SiC single crystal substrate is bonded to the polished or lapped SiC polycrystalline substrate at the bonding surface, and a portion of the bonded SiC single crystal substrate, peeled or cut parallel to the bonding surface (i.e., perpendicular to the thickness direction), is transferred to the bonding surface as a SiC single crystal layer to manufacture a SiC bonded substrate having a SiC single crystal layer.
[0031] <Shape of SiC polycrystalline substrate> The SiC polycrystalline substrate has a roughly disc-like shape, similar to that of a SiC single-crystal substrate, and may be equipped with indicators to show the orientation of the substrate, such as an orientation flat or notch. Substrates with a diameter of 100 mm to 305 mm (4 inches to 12 inches) can be used. However, the shape is not limited to a disc shape; for example, a polygonal shape may also be used.
[0032] [SiC bonded substrate] The SiC bonded substrate according to this embodiment is formed by directly bonding a SiC single crystal substrate to the bonding surface of a SiC polycrystalline substrate. The SiC bonded substrate may also include a portion of the bonded SiC single crystal substrate, peeled or cut parallel to the bonding surface (perpendicular to the thickness direction), as a SiC single crystal layer on the SiC polycrystalline substrate.
[0033] [Manufacturing method for SiC bonded substrates] The method for manufacturing the SiC bonded substrate of the present invention will now be described. The method includes the following heating step, grinding step, and bonding step, and the SiC bonded substrate of the present invention can be manufactured by this method.
[0034] <Heating process> The substrate to be heated is a SiC polycrystalline substrate before bonding with a SiC single crystal substrate. The heating process rearranges dislocations within the SiC substrate, leading to relaxation of internal stresses and stabilization of the SiC polycrystalline substrate. On the other hand, the rearrangement of dislocations and the thermal stability of polymorphisms introduce stacking faults. If the relaxation of internal stresses is insufficient, the warping of the SiC polycrystalline substrate will increase. Furthermore, as mentioned above, if the stacking fault density increases, defects (unbonded areas) are more likely to occur at the bonding interface of the SiC bonded substrate. Therefore, it is necessary to set heating conditions that relax internal stresses without increasing the stacking fault density.
[0035] Specifically, a SiC polycrystalline substrate is placed in a heating furnace or the like, and the SiC polycrystalline substrate is heated in an inert atmosphere to a temperature of 1750°C to 1950°C for 15 to 30 hours, or to a temperature of 1980°C to 2100°C for 5 to 15 hours.
[0036] The purpose of maintaining an inert atmosphere is to prevent oxidation of the SiC polycrystalline substrate, and it is preferable to thoroughly remove oxygen from the heated atmosphere using argon gas, nitrogen gas, or the like.
[0037] The heating process rearranges dislocations within the SiC polycrystalline substrate, leading to relaxation of internal stresses and stabilization of the substrate. While the heating process does generate stacking faults, within the above temperature and time range, the stacking fault density Y can be kept below 1.0%.
[0038] Furthermore, a SiC polycrystalline substrate manufactured by chemical vapor deposition may be used as the SiC polycrystalline substrate to be subjected to the heating process. In addition, as explained in the section on [Thickness of SiC Polycrystalline Substrate], the SiC polycrystalline substrate can be manufactured by depositing a film on a graphite support substrate, but the SiC polycrystalline substrate to be subjected to the heating process may be used either before or after the removal of the graphite support substrate.
[0039] As described in the section on [SiC Polycrystalline Substrates], a disc-shaped substrate with a diameter of 100 mm or more and 305 mm or less can be used as the SiC polycrystalline substrate to be subjected to the heating process.
[0040] As explained in the section on [SiC Polycrystalline Substrate], a disc-shaped substrate with a thickness of 750 ± 250 μm can be used as the SiC polycrystalline substrate to be subjected to the heating process. The thickness of the SiC polycrystalline substrate can be set based on the thickness reduction due to polishing. For example, if the thickness reduction due to polishing is 100 μm, a SiC polycrystalline substrate with a thickness of 750 ± 150 μm can be used.
[0041] Furthermore, when a SiC polycrystalline substrate is heated, sublimation begins at around 1800°C, and a damage layer is formed on the surface of the SiC polycrystalline substrate due to sublimation. If this damage layer remains, the surface of the SiC polycrystalline substrate becomes rough before bonding with the SiC single crystal substrate, causing bonding defects in the bonded substrate. However, with a SiC polycrystalline substrate with a thickness of 750 ± 250 μm, the amount of grinding and lapping performed after the heating process is large, and the damage layer can be sufficiently removed, making it possible to perform the heating process at a temperature higher than the sublimation temperature of the SiC polycrystalline substrate.
[0042] Furthermore, in a SiC polycrystalline substrate with a 3C-SiC crystal structure, the peak at 2θ=33.6° in X-ray diffraction originates from stacking faults, and the peak height increases as the number of stacking faults increases. Conversely, it is known that the peak height of the peak at 2θ=41.4° decreases as the number of stacking faults increases. Therefore, by using a SiC polycrystalline substrate with a 3C-SiC structure, it becomes easier to determine the stacking fault density at the junction by performing X-ray diffraction after the heating process.
[0043] <Polishing process> In the polishing process, the surface of at least one of the bonding surfaces of the SiC polycrystalline substrate, whose stacking fault density has been reduced to 1.0% or less by the heating process, is polished. Polishing may be performed on both the bonding surface and the other surface opposite the bonding surface. Furthermore, the polishing process may be divided into multiple steps, such as rough grinding, precision polishing, and lapping.
[0044] <Joining process> In the bonding process, first, the oxide film on the surface of the SiC polycrystalline substrate polished in the polishing process and the SiC single-crystal substrate to be bonded is removed. The oxide film can be removed by washing the SiC polycrystalline substrate and the SiC single-crystal substrate with various liquids. After the oxide film has been removed by washing, the SiC polycrystalline substrate and the SiC single-crystal substrate are dried and then placed in a bonding apparatus under a vacuum atmosphere. In the bonding process, a neutral Ar atomic beam is irradiated onto the bonding surface of the SiC polycrystalline substrate and the bonding surface of the SiC single-crystal substrate to remove surface contamination and oxide film, modify the bonding surface of both substrates into an amorphous layer, and create bonding bonds. Ion beam irradiation can be used instead of a neutral Ar atomic beam to similarly remove surface contamination and oxide film, modify the bonding surface of both substrates into an amorphous layer, and create bonding bonds. Subsequently, the bonding surfaces of both substrates are brought into contact within the bonding apparatus and a load is applied to bond the bonding surface of the SiC polycrystalline substrate and the bonding surface of the SiC single-crystal substrate. In this way, the bonded substrate according to the embodiment is manufactured.
[0045] (Other processes) The method for manufacturing a SiC polycrystalline substrate of the present invention may include further steps in addition to the heating step. For example, these may include a film deposition step in which a SiC polycrystalline film is deposited on a Si support substrate or a graphite support substrate by a CVD method, a support substrate removal step in which the support substrate is removed after the film deposition step, and an outer edge offset chamfering step in which the shape of the SiC polycrystalline substrate obtained after the removal of the support substrate is adjusted. These steps can also be performed before the heating step, or performed midway through these steps. [Examples]
[0046] The present invention will be described in more detail below with reference to examples and comparative examples, but the present invention is not limited in any way by these examples.
[0047] In the following example, a heating process was performed on a SiC polycrystalline substrate, and the stacking fault density and product yield were measured.
[0048] [Heat treatment of SiC polycrystalline substrates] <Test specimen> The test specimen used in the heating process was a 3C-SiC film deposited by CVD, and a disc-shaped SiC polycrystalline substrate with a diameter of 6 inches and a thickness of 750 ± 250 μm was used, which had no heating history such as annealing after the support substrate removal process.
[0049] <Example 1> Three test specimens were placed in an annealing furnace under an inert atmosphere created by argon gas to prevent oxidation, and held at 1800°C for 24 hours (heating process). After that, they were left to room temperature and removed from the annealing furnace.
[0050] <Example 2> Except for setting the holding temperature to 1900°C, the heating process was carried out in the same manner as in Example 1, and the product was removed from the annealing furnace.
[0051] <Example 3> The heating process was carried out in the same manner as in Example 1, except that the holding temperature was set to 2000°C and the holding time to 6 hours, and the product was removed from the annealing furnace.
[0052] <Example 4> The heating process was carried out in the same manner as in Example 1, except that the holding time was set to 2000°C for 12 hours, and the product was removed from the annealing furnace.
[0053] <Comparative Example 1> The heating process was carried out in the same manner as in Example 1, except that the holding time was set to 2000°C, and the product was removed from the annealing furnace.
[0054] [Stacking fault density] The stacking fault density of the test specimens in Examples 1-4 and Comparative Example 1 after heat treatment was calculated by X-ray diffraction measurement under the following conditions.
[0055] <X-ray diffraction measurement conditions, etc.> Measurements were performed using the 2θ / θ method with a Rigaku SmartLab. The measurement conditions were as follows: CuKα line (Cu target), step size: 0.0070°, scanning range: 20~80°, current / voltage: 200mA, 45kV.
[0056] <Calculation of stacking fault density> Based on the X-ray diffraction profile obtained from the measurement, the diffraction intensity ratio X = a / b was determined using the peak intensity at 2θ = 33.6° (a) and the peak intensity at 2θ = 41.4° (b), and the stacking fault density Y of the junction surface was calculated using the above formula (1).
[0057] [Product yield evaluation] The following procedure was used to polish the test specimens of Examples 1-4 and Comparative Example 1 (hereinafter sometimes collectively referred to as "SiC polycrystalline substrates") after heat treatment to form a bonding surface. A SiC single crystal substrate was then bonded to this bonding surface to obtain a SiC bonded substrate as a SiC single crystal layer, and the product yield was evaluated.
[0058] <Polishing of test specimens, etc.> The bonding surfaces (C-planes) of the 6-inch SiC single-crystal substrate and the bonding surfaces of the 6-inch SiC polycrystalline substrate were polished to a surface roughness suitable for bonding. The surface roughness (Sa) was 0.2 nm for the bonding surface of the SiC single-crystal substrate and 0.3 nm for the bonding surface of the SiC polycrystalline substrate.
[0059] The surface roughness (Sa) can be calculated from the surface roughness measured using a white light interferometer (Nexview, Zygo). The orientation flat of the bonding surface was set to the 6 o'clock position, and the surface roughness was measured at 9 points in the plane (coordinate positions X:0mmY:70mm, X:0mmY:35mm, X:0mmY:0mm (center of the substrate), X:0mmY:-35mm, X:0mmY:-60mm, X:-70mmY:0mm, X:-35mmY:0mm, X:35mmY:0mm, X:70mmY:0mm). The average of the 9 measured values was calculated and this was taken as the surface roughness (Sa).
[0060] <Washing process> The SiC single-crystal substrate and SiC polycrystalline substrate were cleaned using the following procedure after polishing to remove the oxide film from the surface.
[0061] (Sulfuric acid water washing) A mixture of concentrated sulfuric acid and hydrogen peroxide in a deposition ratio of 10:1 was heated to 140°C, and then SiC single-crystal substrates and SiC polycrystalline substrates were immersed in the liquid for 950 seconds.
[0062] (Washing with warm pure water) After washing with sulfuric acid, the SiC single crystal substrate and SiC polycrystalline substrate were removed from the liquid and immersed in 70°C warm pure water for 750 seconds.
[0063] (Pure water cleaning) After washing with warm pure water, the SiC single crystal substrate and SiC polycrystalline substrate were removed from the warm pure water and immersed in room temperature (15°C to 30°C) pure water for 600 seconds.
[0064] (Drying) After washing with pure water, the SiC single-crystal substrate and SiC polycrystalline substrate were removed from the pure water and dried by IPA vapor drying.
[0065] (SC-1 cleaning) The dried SiC single-crystal substrates and SiC polycrystalline substrates were ultrasonically cleaned by immersing them in SC-1 cleaning solution at 75°C for 300 seconds. The SC-1 cleaning solution is a mixture of NH4OH water (29% by mass):H2O2 water (31% by mass):DIW (ultrapure water) in a volume ratio of 1:4:40.
[0066] (Washing with warm pure water) After cleaning with SC-1, the SiC single-crystal substrate and SiC polycrystalline substrate were removed from the SC-1 cleaning solution and immersed in 50°C warm pure water for 600 seconds.
[0067] (HF cleaning) After washing with warm pure water, the SiC single crystal substrate and SiC polycrystalline substrate were removed from the warm pure water and immersed in HF (0.25 mass%) water at room temperature (15°C to 30°C) for 345 seconds.
[0068] (SC-2 cleaning) After HF cleaning, the SiC single-crystal substrates and SiC polycrystalline substrates were immersed in SC-2 cleaning solution at 75°C for 600 seconds and ultrasonically cleaned. The SC-2 cleaning solution is a mixture of HCl water (29% by mass): H2O2 water (31% by mass): DIW (ultrapure water) in a volume ratio of 1:1:6.
[0069] (Washing with warm pure water) After SC-2 cleaning, the SiC single-crystal substrate and SiC polycrystalline substrate were removed from the SC-2 cleaning solution and immersed in 50°C warm pure water for 600 seconds.
[0070] (Pure water cleaning) After washing with warm pure water, the SiC single crystal substrate and SiC polycrystalline substrate were removed from the warm pure water and immersed in pure water at room temperature (15°C to 30°C) for 300 seconds.
[0071] (Drying) After washing with pure water, the SiC single-crystal substrate and SiC polycrystalline substrate were removed from the pure water and dried by IPA vapor drying.
[0072] <Manufacturing of bonded circuit boards> The bonded circuit boards were manufactured using the following procedure.
[0073] <Injection of hydrogen ions> After polishing, the oxide film was washed away, and hydrogen ion implantation was performed on the first bonding surface (C-plane) of the SiC single crystal substrate. The implantation energy was controlled to form an implanted layer at a depth of approximately 0.6 μm from the surface of the first bonding surface.
[0074] <Irradiation process> After storage in the atmosphere, the SiC single-crystal substrates and SiC polycrystalline substrates were placed in a bonding apparatus (Nidek Machine Tools, MWB-06-AX-FAB) and vacuumed. After vacuuming, a neutral Ar atomic beam was irradiated onto the bonding surfaces of both substrates using a Fast Atom Beam gun (hereinafter abbreviated as FAB gun) inside the bonding apparatus to remove surface contamination and oxide films, modify the bonding surfaces of both substrates into amorphous layers, and create bonding bonds. The amount of neutral Ar atomic beam irradiation was controlled by the acceleration voltage, current value, and irradiation time of the FAB gun, with the following parameters: acceleration voltage: 0.9kV, current value: 30mA, and irradiation time: 150 seconds, respectively.
[0075] <Joining process> After irradiation with a neutral Ar atomic beam, the bonding surfaces of both substrates were brought into contact within the bonding apparatus, and a load of 45 kN was applied to complete the bonding process. The vacuum level in the process chamber of the bonding apparatus was 0.7E from immediately before irradiation with the neutral Ar atomic beam until during the bonding process. -5 Pa(0.7×10 -5 The temperature was Pa, and the time lag from the completion of irradiation with the neutral Ar atomic beam to the contact of the bonding surfaces was 30 seconds.
[0076] <Peeling process> The bonded substrate was heat-treated at 1100°C in an N2 atmosphere to recrystallize the amorphous layer at the bonding interface, and then exfoliated using a hydrogen ion implantation layer to obtain a bonded substrate in which a SiC single crystal layer approximately 0.6 μm thick was formed (transferred) onto a SiC polycrystalline support substrate.
[0077] <Heat treatment process> The bonded substrates after the delamination process were further heat-treated at 1700°C in an Ar atmosphere.
[0078] <Surface polishing> The surface of the SiC single crystal layer on the bonded substrate was polished to ensure a smooth surface for subsequent epitaxial film deposition.
[0079] [Product yield evaluation results] Table 1 shows the evaluation results for heat treatment conditions, stacking fault density Y, and product yield. Figure 1 shows a graph illustrating the effect of stacking fault density on product yield when held at 1800°C, 1900°C, and 2000°C for 24 hours (Example 1, Example 2, Comparative Example 1). Product yield is the ratio of good products to the total number of products manufactured. The result for Example 2, which had the highest product yield, is set to 100%, and the other examples are shown as relative values.
[0080] [Table 1]
[0081] Table 1 and Figure 1 show that when the stacking fault density Y of the SiC polycrystalline substrate was 1.0% or less, the product yield was good. On the other hand, when the stacking fault density Y of the SiC polycrystalline substrate exceeded 1.0%, the number of bonding defects in the SiC bonded substrate increased, resulting in a decrease in product yield.
Claims
1. It has a bonding surface that bonds with a SiC single crystal substrate, The stacking fault density of the aforementioned bonding surface is 1.0% or less. The stacking fault density is determined based on the ratio of the first peak intensity at 2θ = 33.6° and the second peak intensity at 2θ = 41.4° in the X-ray diffraction profile of a SiC polycrystalline substrate using CuKα rays. A SiC polycrystalline substrate characterized by the following features.
2. The SiC polycrystalline substrate according to claim 1, wherein the crystal structure is 3C-SiC.
3. A SiC polycrystalline substrate according to claim 1, having a disc shape with a diameter of 100 mm or more and 305 mm or less.
4. A SiC polycrystalline substrate according to claim 1, wherein the thickness is 300 μm or more and 1000 μm or less.
5. A SiC polycrystalline substrate according to claim 1, The SiC single crystal substrate to be bonded to the bonding surface, A SiC bonded substrate characterized by comprising the above features.
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