Manufacturing method for semiconductor devices
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-01-11
- Publication Date
- 2026-03-17
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Figure 0007832135000001 
Figure 0007832135000002 
Figure 0007832135000003
Abstract
Description
[Technical Field]
[0001] The technology disclosed herein relates to a method for manufacturing a semiconductor device.
[0002] Patent Document 1 discloses a method for manufacturing a semiconductor device from a semiconductor substrate made of SiC (i.e., silicon carbide) (hereinafter referred to as a SiC substrate). In this manufacturing method, dopants such as boron and phosphorus are ion-implanted into the front surface of the SiC substrate. When dopants are ion-implanted into the front surface of the SiC substrate, warping occurs in the SiC substrate. Next, warp-reducing ions are implanted into the back surface of the SiC substrate. This reduces the warping that has occurred in the SiC substrate. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2022-153954 [Overview of the project] [Problems that the invention aims to solve]
[0004] This specification proposes a technique for effectively mitigating warping that occurs in SiC substrates. [Means for solving the problem]
[0005] A method for manufacturing a semiconductor device disclosed herein comprises a first ion implantation step and a second ion implantation step. In the first ion implantation step, a dopant is ion implanted into the first surface of a SiC substrate. In the second ion implantation step, after the first ion implantation step, a dopant of 1 × 10¹⁶ is implanted into the second surface of the SiC substrate located opposite to the first surface. 19 cm -3 The elements are ion-implanted at a higher concentration than the first ion implantation step. In the first ion implantation step, the SiC substrate warps in a direction in which the first surface becomes convex. In the second ion implantation step, the warping of the SiC substrate is mitigated.
[0006] In addition, the element ion-implanted into the SiC substrate in the second ion implantation step may be a dopant or an element other than the dopant.
[0007] Also, the relaxation of the warp of the SiC substrate in the second ion implantation step means that the warp of the SiC substrate generated in the first ion implantation step (i.e., the warp in the direction in which the first surface becomes convex) is relaxed. Therefore, in the second ion implantation step, a warp in the direction in which the second surface becomes convex may occur.
[0008] When a dopant is ion-implanted into the first surface in the first ion implantation step, a warp occurs in the SiC substrate in the direction in which the first surface becomes convex. When an element is ion-implanted into the second surface of the SiC substrate in the second ion implantation step, the SiC substrate is deformed so as to relax the warp generated in the first ion implantation step. When an element is ion-implanted into the second surface at a concentration higher than 1×10 19 cm -3 in the second ion implantation step, the SiC substrate can be efficiently deformed. Therefore, according to this manufacturing method, the warp generated in the SiC substrate in the first ion implantation step can be effectively relaxed.
Brief Description of Drawings
[0009] [Figure 1] Cross-sectional view of the SiC substrate 12 before ion implantation. [Figure 2] Explanatory drawing of the ion implantation step for the electric field relaxation region 18. [Figure 3] Explanatory drawing of the epitaxial growth step of the second drift region 20. [Figure 4] Explanatory drawing of the first ion implantation step. [Figure 5] Explanatory drawing of the warp of the SiC substrate 12 after the first ion implantation step. <00000�3> [Figure 6] Explanatory drawing of the second ion implantation step. [Figure 7] [[ID=4ο]]Explanatory drawing of the warp of the SiC substrate 12 after the second ion implantation step. [Figure 8]Graph showing the relationship between the amount of warpage and the ion implantation concentration in the second ion implantation step. [Figure 9] Explanatory drawing of the third ion implantation step. [Figure 10] Explanatory drawing of the trench formation step. [Figure 11] Explanatory drawing of the crystal defect region removal step. [Figure 12] Cross-sectional view of a MOSFET (metal-oxide-semiconductor field effect transistor) manufactured by the manufacturing method of the embodiment.
Mode for Carrying Out the Invention
[0010] In the manufacturing method disclosed in this specification, in the second ion implantation step, elements may be ion-implanted at a concentration lower than 1×10 20 cm -3 .
[0011] When elements are ion-implanted at a concentration of 1×10 20 cm -3 or higher in the second ion implantation step, it has been found that the amount of deformation generated in the second ion implantation step decreases. By ion-implanting elements at a concentration lower than 1×10 20 cm -3 in the second ion implantation step, the warpage generated in the first ion implantation step can be more effectively relaxed.
[0012] In the manufacturing method disclosed in this specification, in the second ion implantation step, elements may be ion-implanted at a concentration higher than the concentration of the dopant implanted on the first surface in the first ion implantation step.
[0013] According to this configuration, the warpage generated in the first ion implantation step can be more effectively relaxed.
[0014] In the manufacturing method disclosed in this specification, in the second ion implantation step, an aggregation layer of carbon may be formed within the implantation range of the element in the second ion implantation step of the SiC substrate.
[0015] This configuration allows for more effective mitigation of warping caused during the first ion implantation process.
[0016] In the manufacturing method disclosed herein, the SiC substrate may be composed of 4H-SiC or 6H-SiC. In the second ion implantation step, 3C-SiC may be formed within the element implantation range of the SiC substrate in the second ion implantation step.
[0017] This configuration allows for more effective mitigation of warping caused during the first ion implantation process.
[0018] The manufacturing method disclosed herein may further include a third ion implantation step, which involves ion implanting a dopant into the first surface, after the second ion implantation step. In the second ion implantation step, the SiC substrate may warp in a direction in which the second surface is convex. In the third ion implantation step, the SiC substrate may warp in a direction in which the first surface is convex.
[0019] According to this manufacturing method, the second ion implantation step can mitigate the warping that occurred in the first and third ion implantation steps.
[0020] The manufacturing method disclosed herein may further include a step of removing the element implantation range of the SiC substrate in the second ion implantation step, after the second ion implantation step.
[0021] In the manufacturing method of this embodiment, a semiconductor device is manufactured from a SiC substrate 12 shown in Figure 1. The SiC substrate 12 is composed of 4H-SiC or 6H-SiC. The SiC substrate 12 has an n-type drain region 14 and an n-type first drift region 16. The first drift region 16 is located above the drain region 14. The n-type impurity concentration in the first drift region 16 is lower than the n-type impurity concentration in the drain region 14.
[0022] First, as shown in Figure 2, multiple p-type field relaxation regions 18 are formed within the first drift region 16 by selectively ion-implanting p-type impurities into the upper surface 12a of the SiC substrate 12 via a mask. Next, as shown in Figure 3, an n-type second drift region 20 is epitaxially grown on top of the first drift region 16. The n-type impurity concentration in the second drift region 20 is approximately equal to that of the first drift region 16. At this stage, no significant warping occurs in the SiC substrate 12.
[0023] (First ion implantation step) Next, the first ion implantation process is performed. In the first ion implantation process, as shown in Figure 4, p-type impurities are selectively ion-implanted into the upper surface 12a of the SiC substrate 12 via a mask, thereby forming a p-type body region 22 within the second drift region 20. Here, 1 × 10 18 cm -3p-type impurities are ion-implanted at a concentration of less than 1.5. Here, a body region 22 is formed over a wide area exposed on the upper surface 12a. Furthermore, a thick body region 22 is formed by ion-implanting p-type impurities multiple times while varying the implantation depth. In addition, a second drift region 20 is left at the bottom of the body region 22. When p-type impurities are ion-implanted on the upper surface 12a, the SiC substrate 12 expands in the area where the p-type impurities are implanted near the upper surface 12a (i.e., the body region 22). Because the area where the body region 22 is formed is wide, the SiC substrate 12 expands significantly near the upper surface 12a. On the other hand, in the first ion implantation step, the area near the lower surface 12b of the SiC substrate 12 does not expand. As a result, as shown in Figure 5, the SiC substrate 12 warps in a direction in which the upper surface 12a becomes convex. In the following, when the SiC substrate 12 is placed on a horizontal surface, the portion of the upper surface 12a that has the greatest displacement in the vertical direction relative to the outer edge 12r of the upper surface 12a is referred to as the maximum displacement portion 12d. The position of the maximum displacement portion 12d in the vertical direction relative to the outer edge 12r (more specifically, the position measured with the upper side as positive) is referred to as the warp amount S. A positive warp amount S means that the upper surface 12a is convex, and a negative warp amount S means that the lower surface 12b is convex. If the absolute value of the warp amount S is large, malfunctions will occur in the manufacturing equipment (for example, the SiC substrate 12 transport device). Therefore, in the semiconductor device manufacturing process, the absolute value of the warp amount S of the SiC substrate 12 is controlled to be less than or equal to the reference value Smax. In the first ion implantation process, the warp amount S is a positive value. In the first ion implantation process, the warp amount S does not reach the reference value Smax, but it rises to a value close to the reference value Smax.
[0024] (Second ion implantation step) Next, a second ion implantation step is performed. In the second ion implantation step, as shown in Figure 6, a warpage-correcting element 42 is ion-implanted into the lower surface 12b of the SiC substrate 12. In this embodiment, aluminum (Al), a type of p-type impurity, is used as the warpage-correcting element 42. However, the warpage-correcting element 42 is not particularly limited. The warpage-correcting element 42 may be a dopant (i.e., a p-type or n-type impurity) or another element (i.e., an element that does not affect the conductivity of the SiC substrate 12). Also, in this case, the warpage-correcting element 42 is ion-implanted to a constant depth without changing the implantation depth. When the warpage-correcting element 42 is ion-implanted into the lower surface 12b, crystal defects are formed in the region near the lower surface 12b where the warpage-correcting element 42 was implanted. Hereinafter, the region in which crystal defects are formed by the ion implantation of the warpage-correcting element 42 will be referred to as the crystal defect region 40. When a crystal defect region 40 is formed, the SiC substrate 12 expands in the crystal defect region 40 (i.e., the region near the lower surface 12b). On the other hand, in the second ion implantation step, the region near the upper surface 12a of the SiC substrate 12 does not expand. Therefore, the SiC substrate 12 deforms in such a way that the amount of warpage S decreases. That is, the SiC substrate 12 deforms in such a way that it alleviates the warpage caused in the first ion implantation step. Here, by implanting a warpage-adjusting element 42 at a higher concentration than the p-type impurities implanted in the first ion implantation step, the amount of warpage S is reduced to a negative value. That is, as shown in Figure 7, the SiC substrate 12 is warped so that the lower surface 12b of the SiC substrate 12 becomes convex. The absolute value of the amount of warpage S after the second ion implantation step is controlled to a value lower than the reference value Smax.
[0025] Figure 8 shows the relationship between the warpage ratio S2 / S1 and the ion implantation concentration D of the warpage adjustment element 42. The warpage ratio S2 / S1 represents the absolute value of the change in warpage S2 occurring in the second ion implantation step divided by the change in warpage S1 occurring in the first ion implantation step. S2 / S1>1 means that the lower surface 12b of the SiC substrate 12 becomes convex in the second ion implantation step. S2 / S1<1 means that the upper surface 12a of the SiC substrate 12 is maintained in a convex state in the second ion implantation step. As shown in Figure 8, the ion implantation concentration D in the second ion implantation step is 1 × 10⁻⁶ 19 cm -3 Beyond this point, the ratio S2 / S1 increases sharply. Therefore, in the second ion implantation step, 1 × 10 19 cm -3 By ion-implanting the warp-adjusting element 42 at a higher concentration than that, the amount of warp S can be efficiently changed. In particular, when the ion implantation concentration D is 1 × 10 19 cm -3 When the value exceeds a certain point, the ratio S2 / S1 exceeds 1, which allows the SiC substrate 12 to warp so that the lower surface 12b becomes convex.
[0026] The ion implantation concentration D in the second ion implantation step is 1 × 10⁻⁶ 19 cm -3 The reason why the ratio S2 / S1 increases sharply when it exceeds 1 × 10 is thought to be as follows: In the second ion implantation process, 1 × 10 19 cm -3 When ion implantation is performed at an ion implantation concentration exceeding 1 × 10, analysis of the cross-section of the crystal defect region 40 reveals the detection of at least one of a carbon aggregate layer and a 3C-SiC layer. The carbon aggregate layer is a layer in which carbon has aggregated within the SiC substrate 12. The 3C-SiC layer is a layer in which the crystal structure of the SiC substrate 12 has changed to a 3C-SiC crystal structure. When the ion implantation concentration D in the second ion implantation step is 1 × 10⁻⁶ 19 cm -3 When the ion implantation concentration D exceeds 1 × 10⁻¹⁰, it is thought that a carbon aggregate layer or a 3C-SiC layer is formed within the crystal defect region 40, causing the crystal defect region 40 to expand significantly. Therefore, when the ion implantation concentration D exceeds 1 × 10⁻¹⁰, 19 cm -3Beyond a certain point, the ratio of curvature S2 / S1 is thought to increase sharply.
[0027] Also, the ion implantation concentration D is 1 × 10 20 cm -3 At higher values, the ratio S2 / S1 gradually decreases as the ion implantation concentration D increases. Therefore, in the second ion implantation step, 1 × 10 20 cm -3 By ion-implanting the warp-adjusting element 42 at a lower concentration than that, the amount of warp S can be efficiently changed.
[0028] (Third ion implantation step) Next, a third ion implantation step is performed. In the third ion implantation step, as shown in Figure 9, p-type and n-type impurities are selectively ion-implanted into the upper surface 12a of the SiC substrate 12 via a mask, thereby forming multiple n-type source regions 24 and multiple p-type contact regions 26. Note that the ion implantation of n-type impurities into the source regions 24 and the ion implantation of p-type impurities into the contact regions 26 may be performed in either order. Here, 1 × 10 18 Higher, 1 x 10 19 cm -3n-type and p-type impurities are ion-implanted at lower concentrations. That is, the concentration of n-type impurities ion-implanted in the source region 24 and the concentration of p-type impurities ion-implanted in the contact region 26 are higher than the concentration of p-type impurities implanted in the body region 22, and lower than the concentration of elements ion-implanted in the crystal defect region 40. In this process, the source region 24 and contact region 26 are formed over a wide area exposed on the upper surface 12a. The body region 22 is left below the source region 24 and contact region 26. When n-type and p-type impurities are ion-implanted on the upper surface 12a, the SiC substrate 12 expands in the impurity-implanted region near the upper surface 12a (i.e., the source region 24 and contact region 26). Because the area where the source region 24 and contact region 26 are formed is wide, the SiC substrate 12 expands significantly near the upper surface 12a. On the other hand, in the third ion implantation step, the region near the lower surface 12b of the SiC substrate 12 does not expand. Therefore, the SiC substrate 12 deforms in such a way that the amount of warpage S increases. That is, the SiC substrate 12 deforms in such a way that it alleviates the warpage that occurred in the second ion implantation step. Here, the amount of warpage S increases to a positive value. That is, similar to Figure 5, the SiC substrate 12 warps so that its upper surface 12a becomes convex. Since the SiC substrate 12 warps so that its lower surface 12b becomes convex after the second ion implantation step, it is prevented that the amount of warpage S becomes excessive when the upper surface 12a of the SiC substrate 12 becomes convex in the third ion implantation step. Therefore, in the third ion implantation step, the amount of warpage S is controlled to a value lower than the reference value Smax.
[0029] Next, the SiC substrate 12 is annealed to activate the n-type and p-type impurities implanted in the SiC substrate 12. Then, as shown in Figure 10, the upper surface 12a of the SiC substrate 12 is etched to form multiple trenches 28 that penetrate the source region 24, the body region 22, and the second drift region 20 and reach the electric field relaxation region 18.
[0030] Next, as shown in Figure 11, the lower surface 12b of the SiC substrate 12 is polished, etched, etc., to remove the crystal defect region 40 and reduce the thickness of the drain region 14.
[0031] Next, as shown in Figure 12, a gate insulating film 30 and a gate electrode 32 are formed in the trench 28. A source electrode 34 is also formed on the upper surface 12a of the SiC substrate 12. Furthermore, a drain electrode 36 is formed on the lower surface 12b of the SiC substrate 12. Through these steps, the MOSFET shown in Figure 12 is completed.
[0032] As described above, in this embodiment, in the second ion implantation step, 1 × 10 19 cm -3 Elements are ion-implanted into the lower surface 12b at a higher concentration than the first ion implantation step. Therefore, the amount of warpage S of the SiC substrate 12 can be efficiently reduced in the second ion implantation step. In addition, in the second ion implantation step, 1 × 10 20 cm -3 Since elements are ion-implanted into the lower surface 12b at a lower concentration, it is possible to prevent deterioration of the efficiency of the change in the amount of warping S due to excessive ion implantation.
[0033] Furthermore, in this embodiment, in the second ion implantation step, elements are implanted at a higher concentration than the p-type impurities implanted in the first ion implantation step. Therefore, the upper surface 12a becomes convex in the first ion implantation step, and the lower surface 12b becomes convex in the second ion implantation step. Moreover, in the third ion implantation step following the second ion implantation step, the upper surface 12a becomes convex. Therefore, the warpage generated in the second ion implantation step can cancel out both the warpage generated in the first ion implantation step and the warpage generated in the third ion implantation step. Consequently, even with a small number of ion implantations of elements into the lower surface 12b, the amount of warpage S of the SiC substrate 12 can be controlled to a low value.
[0034] In the embodiment described above, the step of ion implanting elements into the lower surface 12b was performed only once. However, the step of ion implanting dopants into the upper surface 12a and the step of ion implanting elements into the lower surface 12b may be repeated alternately multiple times.
[0035] In the embodiment described above, the amount of warpage S was reduced to a negative value in the second ion implantation step. However, in other examples, the amount of warpage S after the second ion implantation step may be a positive value. In this configuration as well, the warpage generated in the first ion implantation step can be mitigated in the second ion implantation step.
[0036] The components of the technology disclosed herein are listed below. (Composition 1) A method for manufacturing a semiconductor device, A first ion implantation step involves ion implanting a dopant into the first surface of a SiC substrate, After the first ion implantation step, 1 × 10⁻¹⁶ ions are implanted on the second surface located opposite the first surface of the SiC substrate. 19 cm -3 A second ion implantation step in which elements are implanted at a higher concentration than the first step. It has, In the first ion implantation step, the SiC substrate warps in a direction in which the first surface becomes convex. In the second ion implantation step, the warping of the SiC substrate is mitigated. Manufacturing method. (Configuration 2) In the aforementioned second ion implantation step, 1 × 10 20 cm -3 A manufacturing method according to configuration 1, wherein elements are ion-implanted at a lower concentration than that. (Composition 3) The manufacturing method according to configuration 1 or 2, wherein in the second ion implantation step, an element is ion-implanted at a higher concentration than the concentration of the dopant implanted on the first surface in the first ion implantation step. (Composition 4) The manufacturing method according to any one of the three configurations, wherein in the second ion implantation step, a carbon aggregate layer is formed within the element implantation range of the SiC substrate in the second ion implantation step. (Composition 5) The SiC substrate is made of 4H-SiC or 6H-SiC, The manufacturing method according to any one of the three configurations, wherein in the second ion implantation step, 3C-SiC is formed within the element implantation range of the SiC substrate in the second ion implantation step. (Composition 6) The process further includes a third ion implantation step, which is performed after the second ion implantation step, in which a dopant is ion-implanted onto the first surface. In the second ion implantation step, the SiC substrate warps in a direction in which the second surface becomes convex. In the third ion implantation step, the SiC substrate warps in a direction in which the first surface becomes convex. A manufacturing method described in any one of items 1 to 5. (Composition 7) The manufacturing method according to any one of configurations 1 to 6, further comprising a step of removing the element implantation range of the SiC substrate in the second ion implantation step, after the second ion implantation step.
[0037] Although embodiments have been described in detail above, these are merely illustrative and do not limit the scope of the claims. The technologies described in the claims include various modifications and changes to the specific examples illustrated above. The technical elements described in this specification or drawings exhibit technical usefulness individually or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technologies illustrated in this specification or drawings achieve multiple objectives simultaneously, and achieving even one of these objectives constitutes technical usefulness. [Explanation of Symbols]
[0038] 12: SiC substrate, 22: Body region, 24: Source region, 26: Contact region, 40: Crystal defect region
Claims
1. A method for manufacturing a semiconductor device, A first ion implantation step involves ion implanting a dopant into the first surface of a SiC substrate, After the first ion implantation step, 1 × 10⁻¹⁶ ions are implanted on the second surface located opposite the first surface of the SiC substrate. 19 cm -3 A second ion implantation step in which aluminum is ion-implanted at a higher concentration than the first step. It has, In the first ion implantation step, the SiC substrate warps in a direction in which the first surface becomes convex. In the second ion implantation step, a carbon aggregate layer is formed within the aluminum implantation range of the SiC substrate in the second ion implantation step, and the warping of the SiC substrate is mitigated. Manufacturing method.
2. A method for manufacturing a semiconductor device, A first ion implantation step involves ion implanting a dopant into the first surface of a SiC substrate, After the first ion implantation step, 1 × 10⁻¹⁶ ions are implanted on the second surface located opposite the first surface of the SiC substrate. 19 cm -3 A second ion implantation step in which aluminum is ion-implanted at a higher concentration than the first step. It has, The SiC substrate is made of 4H-SiC or 6H-SiC. In the first ion implantation step, the SiC substrate warps in a direction in which the first surface becomes convex. In the second ion implantation step, 3C-SiC is formed within the aluminum implantation range of the SiC substrate in the second ion implantation step, and the warping of the SiC substrate is mitigated. Manufacturing method.
Citation Information
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