Applications of core substrates, substrates, and semiconductor packaging substrates

The core substrate with protective vias and grooves addresses cracking issues in semiconductor packaging substrates, enhancing processability and yield by preventing damage propagation and managing stress.

JP7833429B2Active Publication Date: 2026-03-19ABSOLICS INC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-07-31
Publication Date
2026-03-19

AI Technical Summary

Technical Problem

Existing semiconductor packaging substrates face issues with cracking during manufacturing processes, which affect processability and manufacturing yield, particularly due to stress accumulation and external impacts.

Method used

A core substrate is divided into a product area and a blank area with a protective area surrounding the edge, featuring vias or grooves that act as stoppers to prevent damage propagation, and includes redistribution layers with varying thermal expansion coefficients to manage stress.

Benefits of technology

The solution effectively suppresses cracking in the product area, improving process efficiency and yield by acting as a protective barrier against damage from external impacts and stress.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a core substrate, a substrate for semiconductor packaging, and a use thereof, which are capable of preventing, e.g., the substrate from being broken during a manufacturing process, and improving the processability and manufacturing yield.SOLUTION: A core substrate 100 applied to the manufacture of a semiconductor packaging substrate is distinguished into: a product area 10 where a product utilized as a substrate of an individual semiconductor is disposed; and a blank area 20 other than the product area. The blank area comprises a protective area 25 disposed between the product area and the substrate. The protective area comprises a concave or a via.EFFECT: The invention can substantially inhibit the occurrence of damage in the product area utilized as a substrate for semiconductor packaging in spite of application of a core substrate which may be easily broken by external impact.SELECTED DRAWING: Figure 3
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Citation Information

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