Semiconductor equipment

Abstract

To provide a semiconductor device capable of reducing occurrence of breakdowns.SOLUTION: A bus bar 60 includes a laminate in which a flat-plate-like P-type conductive plate 61, a flat-plate-like insulation sheet 63, and a flat-plate-like N-type conductive plate 62 are laminated in this order. The laminate is formed with main terminal connection parts 61c and 62c into which each of other end parts of an external connection terminal having a close contact with each other is inserted, and sealed by a sealing part 64 spaced apart the main terminal connection parts 61c and 62c. In a laminate 60a, the P-type conductive plate 61, the insulation sheet 63, and the N-type conductive plate 62 are pressed and placed in a close contact state toward the insulation sheet 63 parallel to a lamination direction, so a volume of an air layer included in the insulation sheet 63 (and air layers between the P-type conductive plate 61 and the insulation sheet 63 and between the N-type conducive plate 62 and the insulation sheet 63) is compressed. For this reason, a discharge voltage in which a partial discharge occurs in the laminate rises, causing that the laminate 60a is less likely to discharge.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] The present invention relates to a semiconductor device Place .

Background Art

[0002] Semiconductor modules include semiconductor chips including power devices and are used as power conversion devices. A power device is a switching element. The switching element is, for example, an IGBT (Insulated Gate Bipolar Transistor) or a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). A semiconductor device realizes a desired function by electrically connecting such semiconductor modules. Connection members are used for connecting a plurality of semiconductor modules. The connection member is, for example, a bus bar (see, for example, Patent Document 1) or a connector (see, for example, Patent Document 2). Such a connection member has a structure in which an insulating member and conductive members provided on the front and back surfaces of the insulating member are laminated. Such a structure may be used for a pair of conductive plates and an insulating sheet in a module case (see, for example, Patent Document 3) or a ceramic substrate (see, for example, Patent Document 4) in which copper plates are formed on the front and back surfaces, respectively.

[0003] Also, the layered conductive members are attached while pressing against the front and back surfaces of the layered insulating member, respectively (see, for example, Patent Documents 4 and 5). Thereby, the conductive member can be attached to the insulating member without including air bubbles between the insulating member and the conductive member. It is known that partial discharge occurs when a high voltage is applied to the electrode if air bubbles (air layers) are generated between the insulating member and the conductive member (see, for example, Patent Documents 6 and 7).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

[0005] Incidentally, busbars that connect multiple semiconductor modules are constructed by laminating a P-type conductive layer, an insulating layer, and an N-type conductive layer. Sometimes, an air layer is included within the insulating layer between the P-type and N-type conductive layers. When voltage is applied to such a busbar, partial discharge can occur in the air layer, potentially leading to dielectric breakdown. Semiconductor devices containing such busbars suffer from reduced reliability.

[0006] The present invention has been made in view of the above, and relates to a semiconductor device including a busbar in which the occurrence of dielectric breakdown is reduced. Place The purpose is to provide. [Means for solving the problem]

[0007] According to one aspect of the present invention, a semiconductor device is provided comprising: a semiconductor module in which a plurality of columnar external connection terminals conductively connected to a semiconductor chip are exposed to the outside; a laminate in which a flat plate-shaped first conductive member, a flat plate-shaped organic insulating member having reduced voids or reduced surface irregularities, and a flat plate-shaped second conductive member are sequentially stacked in close contact, and a plurality of insertion holes into which the plurality of external connection terminals are each inserted are formed; and a busbar is provided which is sealed with a sealing member, leaving open the plurality of insertion holes, a first external connection portion which is the end of the first conductive member, and a second external connection portion which is the end of the second conductive member. [Effects of the Invention]

[0009] According to the disclosed technology, a semiconductor device with improved reliability can be provided because it includes a busbar that suppresses the occurrence of dielectric breakdown. [Brief explanation of the drawing]

[0010] [Figure 1] This is a side view of the semiconductor device according to the first embodiment. [Figure 2] This is a plan view of the semiconductor device according to the first embodiment. [Figure 3] This is a side cross-section of a semiconductor module. [Figure 4] A plan view of a semiconductor module. [Figure 5] This is a plan view of the busbar according to the first embodiment. [Figure 6] This is a cross-sectional view (part 1) of the busbar of the first embodiment. [Figure 7] This is a cross-sectional view (part 2) of the busbar in the first embodiment. [Figure 8] This is a flowchart of the method for manufacturing a busbar according to the first embodiment. [Figure 9] This figure shows the set step included in the manufacturing method of the busbar according to the first embodiment. [Figure 10] This figure shows the sealing and pressurizing step included in the manufacturing method of the busbar according to the first embodiment. [Figure 11]It is a diagram showing an insulating sheet during the sealing and pressurizing process included in the method for manufacturing a bus bar according to the first embodiment. [Figure 12] It is a graph showing a curve of voltage with respect to the gap length. [Figure 13] It is a plan view of a bus bar according to Modification 1 of the first embodiment. [Figure 14] It is a side view of a bus bar according to Modification 1 of the first embodiment. [Figure 15] It is a plan view of a bus bar according to Modification 2 of the first embodiment. [Figure 16] It is a cross-sectional view of a bus bar according to Modification 2 of the first embodiment. [Figure 17] It is a flowchart of the method for manufacturing a bus bar according to the second embodiment. [Figure 18] It is a diagram showing the pressurizing process included in the method for manufacturing a bus bar according to the second embodiment.

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments will be described with reference to the drawings. In the following description, "front surface" and "upper surface" refer to the surfaces facing upward in the semiconductor device, semiconductor module, and bus bar in the figure. Similarly, "up" refers to the upward direction in the semiconductor device, semiconductor module, and bus bar in the figure. "Back surface" and "lower surface" refer to the surfaces facing downward in the semiconductor device, semiconductor module, and bus bar in the figure. Similarly, "down" refers to the downward direction in the semiconductor device, semiconductor module, and bus bar in the figure. The same directionality also means the same in other drawings as necessary. "Front surface", "upper surface", "up", "back surface", "lower surface", "down", and "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical idea of the present invention. For example, "up" and "down" do not necessarily mean the vertical direction with respect to the ground. That is, the directions of "up" and "down" are not limited to the gravitational direction. Also, in the following description, "main component" means a case where it contains 80 vol% or more.

[0012] [First Embodiment] The semiconductor device of the first embodiment will be described with reference to Figures 1 and 2. Figure 1 is a side view of the semiconductor device of the first embodiment, and Figure 2 is a plan view of the semiconductor device of the first embodiment. Note that Figure 1 is a side view of the semiconductor device 1 of Figure 2 as seen in the +Y direction.

[0013] The semiconductor device 1 includes a semiconductor module 10 and a busbar 60. The semiconductor module 10 includes external connection terminals 40a, 40b, a control terminal 41a, and a sense terminal 41b. The external connection terminals 40a, 40b, the control terminal 41a, and the sense terminal 41b are arranged linearly on the front surface of the semiconductor module 10. Furthermore, the external connection terminals 40a, 40b, the control terminal 41a, and the sense terminal 41b are electrically connected to a semiconductor chip, which will be described later, inside the semiconductor module 10. Details of the semiconductor module 10 will be described later. Three such semiconductor modules 10 are arranged in a row with their long sides parallel to each other.

[0014] The busbar 60 is sealed by a sealing portion 64 between a P-type conductive plate and an N-type conductive plate. The P-type and N-type conductive plates include main terminal connection portions 61c and 62c. External connection portions 61b and 62b extend from the side of the sealing portion 64 to the outside of the sealing portion 64. The busbar 60 is also arranged on three semiconductor modules 10 arranged in a row. The external connection terminals 40a and 40b of the semiconductor modules 10 are inserted into the busbar 60, respectively. The external connection terminals 40a and 40b are each , within Bus Bar 60 N type, P It is directly connected to the conductive plate. Details of the busbar 60 will be described later.

[0015] Next, the semiconductor module 10 will be described using Figures 3 and 4. Figure 3 is a side cross-sectional view of the semiconductor module, and Figure 4 is a plan view of the semiconductor module. Note that Figure 3 is a cross-sectional view along the dashed line YY in Figure 4.

[0016] As shown in Figure 3, the semiconductor module 10 comprises an insulating circuit board 20, semiconductor chips 24a and 24b, a printed circuit board 30, external connection terminals 40a and 40b, a control terminal 41a, a sense terminal 41b, and conductive posts 42a and 42b. These components of the semiconductor module 10 are sealed by a main body 50. In the semiconductor module 10, the main body 50 seals the insulating circuit board 20 so that its back surface is exposed. The semiconductor module 10 is formed by the main body 50 to form a roughly cubic shape (rectangular in plan view). However, the upper surface of the short side is tapered.

[0017] The insulated circuit board 20 includes an insulating plate 21, a metal plate 22 provided on the back surface of the insulating plate 21, and circuit patterns 23a and 23b provided on the front surface of the insulating plate 21. The insulating plate 21 and the metal plate 22 are rectangular in plan view. The corners of the insulating plate 21 and the metal plate 22 may be rounded (R-chamfered) or chamfered (C-chamfered). The area of ​​the metal plate 22 is smaller than the area of ​​the insulating plate 21 in plan view and is formed inside the insulating plate 21. The insulating plate 21 is made of ceramics or insulating resin with good thermal conductivity. Examples of ceramics include aluminum oxide, aluminum nitride, and silicon nitride. Examples of insulating resins include paper phenolic substrates, paper epoxy substrates, glass composite substrates, and glass epoxy substrates.

[0018] The metal plate 22 is made of a metal with excellent thermal conductivity. Such metals include, for example, aluminum, iron, silver, copper, or alloys containing at least one of these. The thickness of the metal plate 22 is between 0.1 mm and 4.0 mm. The surface of the metal plate 22 may be plated to improve its corrosion resistance. The plating material used in this case may be, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy.

[0019] The circuit patterns 23a and 23b are made of a metal with excellent conductivity. Such metals include, for example, silver, copper, nickel, or an alloy containing at least one of these. The thickness of the circuit patterns 23a and 23b is between 0.1 mm and 4.0 mm. Plating may be performed on the surface of the circuit patterns 23a and 23b to improve corrosion resistance. The plating material used in this case may be, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. The circuit patterns 23a and 23b are obtained by forming a metal layer on the front surface of the insulating plate 21 and performing an etching process on this metal layer. Alternatively, the circuit patterns 23a and 23b may be pre-cut from the metal layer and pressed onto the front surface of the insulating plate 21. Note that the circuit patterns 23a and 23b shown in Figure 3 are just examples. The number, shape, size, etc. of the circuit patterns can be appropriately selected as needed. For example, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Brazed) substrate, or a resin insulating substrate can be used for the insulating circuit board 20 composed of such components.

[0020] The semiconductor chip 24a includes a switching element. The switching element is, for example, an IGBT or a power MOSFET. If the semiconductor chip 24a is an IGBT, the collector electrode is placed on the back side as the main electrode, and on the front side, As a control electrode It is equipped with an emitter electrode as the gate electrode and a main electrode, respectively. If the semiconductor chip 24a is a power MOSFET, the drain electrode is on the back surface as the main electrode, and on the front surface, As a control electrode The semiconductor chip 24a is equipped with a gate electrode and a source electrode as the main electrode. The back surface of the semiconductor chip 24a is bonded to the circuit pattern 23a by a bonding member (not shown). Conductive posts 42a are electrically and mechanically bonded to the main electrode and gate electrode on the front surface of the semiconductor chip 24a by the bonding member. Appropriately Connected.

[0021] Furthermore, the semiconductor chip 24b includes a diode. The diode is, for example, an FWD (Free Wheeling Diode) such as an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode. Such a semiconductor chip 24b has an output electrode (cathode electrode) as the main electrode on its back surface and an input electrode (anode electrode) as the main electrode on its front surface. The back surface of the semiconductor chip 24b is bonded to the circuit pattern 23a by a bonding member (not shown). The conductive post 42b is also electrically and mechanically bonded to the main electrode on the front surface of the semiconductor chip 24b by the bonding member. ri It will continue.

[0022] Furthermore, instead of semiconductor chips 24a and 24b, RC (Reverse-Conducting)-IGBTs, which combine the functions of IGBTs and FWBs, may be used. Also, Figure 3 merely shows the case where semiconductor chips 24a and 24b are provided. The number of sets can be set according to the specifications of the semiconductor module 10, etc., and is not limited to this case.

[0023] The joining material that connects the semiconductor chips 24a, 24b to the circuit pattern 23a is solder or a metal sintered body. Lead-free solder is used. Lead-free solder mainly consists of an alloy containing at least two of the following: tin, silver, copper, zinc, antimony, indium, and bismuth. Additives may be added to the solder. Examples of additives include nickel, germanium, cobalt, or silicon. The inclusion of additives in the solder improves wettability, gloss, and bonding strength, thereby improving reliability. Examples of metals used in metal sintered bodies include silver and silver alloys. The joining material for the conductive posts 42a, 42b is similar.

[0024] The printed circuit board 30 is positioned opposite the horizontally arranged insulating circuit board 20. Such a printed circuit board 30 comprises an insulating plate and a plurality of upper circuit patterns formed on the front surface of the insulating plate. The printed circuit board 30 also comprises a plurality of lower circuit patterns on the back surface of the insulating plate. Furthermore, the printed circuit board 30 has a plurality of through holes formed at predetermined positions, penetrating from the front surface to the back surface. External connection terminals 40a, 40b and conductive posts 42a, 42b are electrically connected to the upper and lower circuit patterns of the printed circuit board 30 as appropriate. Furthermore, the printed circuit board 30 has a control terminal 41a and a sense terminal 41b electrically connected. The control terminal 41a is electrically connected to the conductive posts 42a, 42b through the upper and lower circuit patterns. The sense terminal 41b is connected to the semiconductor chip 24a through the upper and lower circuit patterns. emitter electrode and semiconductor chip 24b anode It is electrically connected to the electrodes.

[0025] insulation The board It is a flat plate-shaped material mainly composed of an insulating material. Such a material is obtained by immersing a resin in a substrate. For example, the substrate can be paper, glass cloth, or glass nonwoven fabric. For example, phenolic resin, epoxy resin, or polyimide resin can be used. Specific examples of insulating boards include paper phenolic substrates, paper epoxy substrates, glass epoxy substrates, glass polyimide substrates, and glass composite substrates. The board Furthermore, it is rectangular in shape when viewed from above. The board The corners may be rounded (R-chamfered) or chamfered (C-chamfered).

[0026] The upper and lower circuit patterns have multiple pattern shapes to form a predetermined circuit. The upper and lower circuit patterns are mainly composed of a material with excellent conductivity. Such materials include, for example, silver, copper, nickel, or alloys containing at least one of these. The surfaces of the upper and lower circuit patterns may be plated to improve corrosion resistance. Materials used in this plating process include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0027] The external connection terminals 40a and 40b are press-fitted into through holes in the printed circuit board 30. The press-fitted areas are covered with solder. The external connection terminals 40a and 40b are electrically connected to the upper and lower circuit patterns of the printed circuit board 30. One end of each external connection terminal 40a and 40b is soldered to the circuit patterns 23a and 23b of the insulating circuit board 20. These external connection terminals 40a and 40b are columnar in shape, with a circular or rectangular cross-section. The external connection terminals 40a and 40b are primarily composed of a material with excellent conductivity. Such materials include, for example, silver, copper, nickel, or an alloy containing at least one of these. Plating may be performed on the surface of the external connection terminals 40a and 40b to improve corrosion resistance. Materials for this plating include nickel, nickel-phosphorus alloy, and nickel-boron alloy.

[0028] The control terminal 41a and sense terminal 41b are press-fitted into through holes in the printed circuit board 30. The press-fitted areas are covered with solder. The control terminal 41a and sense terminal 41b are electrically connected to the upper and lower circuit patterns of the printed circuit board 30. These control terminals 41a and sense terminal 41b are pin-shaped, with a circular or rectangular cross-section. The length of the control terminal 41a and sense terminal 41b is sufficiently longer than the length of the conductive posts 42a and 42b. The control terminal 41a and sense terminal 41b are primarily composed of a material with excellent conductivity. Such materials include, for example, silver, copper, nickel, or alloys containing at least one of these. Plating may be applied to the surface of the control terminal 41a and sense terminal 41b to improve corrosion resistance. Materials for this plating include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0029] The conductive posts 42a and 42b are press-fitted into through holes in the printed circuit board 30. The press-fitted areas are covered with solder. The conductive posts 42a and 42b are electrically connected to the upper and lower circuit patterns of the printed circuit board 30. One end of each conductive post 42a and 42b is soldered to the main electrode or control electrode of the semiconductor chips 24a and 24b, respectively. These conductive posts 42a and 42b are columnar in shape, with a circular or rectangular cross-section. Furthermore, the length of the conductive posts 42a and 42b is sufficiently shorter than the length of the external connection terminals 40a and 40b. The conductive posts 42a and 42b are primarily composed of a material with excellent conductivity. Such materials include, for example, silver, copper, nickel, or an alloy containing at least one of these. Plating may be applied to the surface of the conductive posts 42a and 42b to improve corrosion resistance. The materials used in this plating process include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0030] The lower ends of these external connection terminals 40a, 40b, control terminal 41a, and sense terminal 41b are sealed by the main body 50. As shown in Figure 4, in a plan view, the external connection terminals 40a, 40b, control terminal 41a, and sense terminal 41b are arranged in a straight line along the longitudinal direction on the front surface of the semiconductor module 10, passing through the center. The conductive posts 42a, 42b are also sealed by the main body 50.

[0031] The main body 50 is composed of a sealing member. The sealing member contains a thermosetting resin such as epoxy resin, phenolic resin, or maleimide resin, and a filler contained in the thermosetting resin. An example of a sealing member for the main body 50 is an epoxy resin containing a filler. Inorganic fillers are used as the filler. Examples of inorganic fillers include silicon oxide, aluminum oxide, boron nitride, or aluminum nitride. The sealing member also contains a release agent in an amount appropriate to the requirements. Examples of release agents include wax-based, silicone-based, and fluorine-based agents. In a semiconductor module 10 sealed by such a main body 50, the metal plate 22 of the insulating circuit board 20 is exposed on its back surface. The metal plate 22 may be on the same plane as the back surface of the main body 50, or it may protrude to the outside from the back surface.

[0032] A cooling module (not shown) may be attached to the back surface of such a semiconductor module 10 via solder or silver solder. In this case, the mounting holes (not shown) of the semiconductor module 10 and the cooling module are fastened with screws. This improves the heat dissipation of the semiconductor module 10. In this case, the cooling module is made of a metal with excellent thermal conductivity, for example. Such metals include aluminum, iron, silver, copper, or alloys containing at least one of these. Alternatively, a heat sink consisting of one or more fins, a water-cooled cooling device, etc., can be used as the cooling module. The surface of such a cooling module may also be plated to improve corrosion resistance. Examples of plating materials used in this case include nickel, nickel-phosphorus alloy, and nickel-boron alloy.

[0033] Note that the semiconductor module 10 merely shows the case where the main body 50 is formed by sealing the insulating circuit board 20, semiconductor chips 24a, 24b, printed circuit board 30, etc. with a sealing material. The semiconductor module 10 may also house the insulating circuit board 20, semiconductor chips 24a, 24b, printed circuit board 30, etc. inside a case, seal the inside of the case with a sealing material, and extend the external connection terminals 40a, 40b, control terminal 41a, sense terminal 41b, and conductive posts 42a, 42b upwards.

[0034] Next, the busbar 60 will be explained using Figures 5 to 7. Figure 5 is a plan view of the busbar of the first embodiment, and Figures 6 and 7 are cross-sectional views of the busbar of the first embodiment. Figure 6 is a cross-sectional view along the dashed line YY in Figure 5. Figures 7(A) and 7(B) are cross-sectional views along the dashed lines X1-X1 and X2-X2 in Figure 5, respectively.

[0035] The busbar 60 includes a sealing portion 64 that seals the laminate 60a. The laminate 60a is constructed by stacking a P-type conductive plate 61, an insulating sheet 63, and an N-type conductive plate 62 in that order from bottom to top. The P-type conductive plate 61 and the N-type conductive plate 62 are electrically insulated by the insulating sheet 63. The busbar 60 also includes main terminal connection portions 61c and 62c that penetrate the front surface 64a and back surface 64b of the sealing portion 64. The main terminal connection portions 61c and 62c are arranged in two rows, respectively, along the longitudinal direction of the sealing portion 64.

[0036] Both the P-type conductive plate 61 and the N-type conductive plate 62 are in the form of a sheet (flat plate). The P-type conductive plate 61 and the N-type conductive plate 62 are mainly composed of a material with excellent conductivity. Examples of such materials include copper or copper alloys. The P-type conductive plate 61 and the N-type conductive plate 62 include conductive parts 61a, 62a and external connection parts 61b, 62b. The conductive parts 61a, 62a and the external connection parts 61b, 62b are integrally connected. The conductive parts 61a, 62a are rectangular in shape when viewed from above. The conductive parts 61a, 62a have a shape that includes at least the region where all the main terminal connection parts 61c, 62c shown in Figure 5 are located. The conductive parts 61a, 62a may also have the same shape when viewed from above. The conductive parts 61a, 62a each include the main terminal connection parts 61c, 62c. As will be described later, the conductive parts 61a and 62a are connected to the main terminal connection part 6 2 c,6 1 Through holes 61a1 and 62a1 are formed through which c passes without making contact. That is, the conductive part 61a has multiple through holes 61a1 through which multiple main terminal connection parts 62c connected to the conductive part 62a pass without making contact with each other. The conductive part 62a has multiple through holes 62a1 through which multiple main terminal connection parts 61c connected to the conductive part 61a pass without making contact with each other. Therefore, the main terminal connection parts 61c and 62c are at the same potential as the conductive parts 61a and 62a, respectively, while the potential between the main terminal connection parts 61c and 62c is different.

[0037] Main terminal connection section 6 2 c,6 1 c is cylindrical and includes insertion holes into which external connection terminals 40a and 40b are inserted. The insertion holes of the main terminal connector 61c and the main terminal connector 62c have different potentials. Main terminal connection section 6 2 c,6 1 The diameter of c may be smaller than the diameter of the external connection terminals 40a and 40b. In this case, the external connection terminals 40a and 40b are connected to the main terminal connection part 6. 2 c,6 1 It can be press-fitted into c.

[0038] The main terminal connector 61c is electrically and mechanically attached to the conductive part 61a. The main terminal connector 61c is attached perpendicular to the main surface of the conductive part 61a, for example, as shown in Figure 6. Three main terminal connectors 61c are attached linearly along the longitudinal direction, as shown in Figure 5. The main terminal connector 61c is attached to the conductive part 61a by penetrating the laminate 60a. In this case, the conductive part 62a has a through hole 62a1 through which the main terminal connector 61c passes (Figures 6 and 7(A)). The through hole 62a1 is sufficiently larger than the diameter of the main terminal connector 61c. Therefore, the main terminal connector 61c penetrating the laminate 60a does not come into contact with the conductive part 62a. That is, the main terminal connector 61c is electrically insulated from the conductive part 62a.

[0039] The main terminal connector 62c is also electrically and mechanically attached to the conductive part 62a. The main terminal connector 62c is attached perpendicular to the main surface of the conductive part 62a, for example, as shown in Figure 6. Three main terminal connectors 62c are attached linearly along the longitudinal direction, as shown in Figure 5. The main terminal connector 62c is attached to the conductive part 62a by penetrating the laminate 60a. In this case, the conductive part 61a has a through hole 61a1 through which the main terminal connector 62c passes (Figures 6 and 7(B)). The through hole 61a1 is sufficiently larger than the diameter of the main terminal connector 62c. Therefore, the main terminal connector 62c penetrating the laminate 60a does not come into contact with the conductive part 61a. That is, the main terminal connector 62c is electrically insulated from the conductive part 61a.

[0040] The external connection parts 61b and 62b may have the same shape in a plan view. The external connection parts 61b and 62b are integrally connected to the conductive parts 61a and 62a, parallel to the arrangement direction of the main terminal connection parts 61c and 62c. The external connection parts 61b and 62b have the same thickness as the conductive parts 61a and 62a. The external connection parts 61b and 62b extend outward from the sealing part 64, parallel to the arrangement direction of the main terminal connection parts 61c and 62c. Furthermore, the external connection part 62b is located higher than the external connection part 61b (Figures 1 and 7).

[0041] The insulating sheet 63 is in the form of a sheet (flat plate). The insulating sheet 63 is mainly composed of an insulating material that can be compressed and deformed. For example, aramid paper can be used as such a material. In other words, the insulating sheet 63 is made of an organic insulating material. The area of ​​the insulating sheet 63 is sufficiently larger than the conductive parts 61a and 62a of the P-type conductive plate 61 and the N-type conductive plate 62. Therefore, the insulating properties of the conductive parts 61a and 62a are reliably maintained. Also, the main terminal connection parts 61c and 62c pass through the insulating sheet 63. Note that during the manufacturing process of the insulating sheet 63, air layers (voids, holes) may be formed inside.

[0042] In this laminate 60a, a P-type conductive plate 61, an insulating sheet 63, and an N-type conductive plate 62 are laminated in that order from bottom to top, and are in close contact with each other. Compared to a case where the P-type conductive plate 61, insulating sheet 63, and N-type conductive plate 62 are simply laminated, the laminate 60a has a smaller volume of voids contained in the insulating sheet 63 and smaller surface irregularities. In other words, the voids contained in the insulating sheet 63 and the surface irregularities are reduced. Furthermore, there is a risk that air may be trapped in the void, creating an air layer.

[0043] The sealing portion 64 seals the laminate 60a. The sealing portion 64 is approximately cubic in shape. The corners and edges of the sealing portion 64 may be rounded (R-chamfered) or chamfered (C-chamfered). The sealing portion 64 seals the laminate 60a, and the main terminal connection portion 6 has multiple insertion holes into which the external connection terminals 40a and 40b are inserted. 2 c,6 1 c. External connection portion 6 which is the end of the P-type and N-type conductive plates 61 and 62 1 b,6 2b is left open and sealed. That is, the sealing portion 64 also has the main terminal connection portions 61c and 62c penetrating the front surface 64a and the back surface 64b. The front surface 64a and the back surface 64b of the sealing portion 64 have base portions 60b formed at the points where the main terminal connection portions 61c and 62c penetrate. The base portions 60b protrude vertically from the front surface 64a and the back surface 64b and are made thicker than the thickness between the front surface 64a and the back surface 64b. The base portions 60b increase the strength of the main terminal connection portions 61c and 62c against the sealing portion 64. When attaching the external connection terminals 40a and 40b to the main terminal connection portions 6 2 c,6 1 The misalignment of c is prevented. Also, the main terminal connection part 6 2 c,6 1 Even after the external connection terminals 40a and 40b are attached, for example, even if the busbar 60 is subjected to an external impact, the external connection terminals 40a and 40b will remain connected to the main terminal connection part 6. 2 c,6 1 It is reliably maintained by c. The height of the base portion 60b in this embodiment is an example and can be set as appropriate. The height of the base portion 60b may be the same as the opening at the end of the main terminal connection portions 61c and 62c, for example. The sealing portion 64 is made of the same sealing member as the main body portion 50.

[0044] Next, the manufacturing method of the semiconductor device 1 will be described. First, the semiconductor module 10 and the busbar 60 are manufactured. Then, the external connection terminals 40a and 40b of the semiconductor module 10 are connected to the main terminal connection part 6 of the busbar 60. 2 c,6 1 A connection process is performed to attach them to c respectively. This connects the P-type and N-type conductive plates 61 and 62 of the busbar 60 to the semiconductor chips 24a and 24b included in the semiconductor module 10. Thus, the semiconductor device 1 is obtained.

[0045] The method for manufacturing the busbar 60, which is included in this manufacturing method, will be explained using Figures 8 to 12 and Figures 6 and 7. Figure 8 is a flowchart of the busbar manufacturing method of the first embodiment. Figure 9 is a diagram showing the set process included in the busbar manufacturing method of the first embodiment, Figure 10 is a diagram showing the sealing and pressurizing process included in the busbar manufacturing method of the first embodiment, and Figure 11 is a diagram showing the insulating sheet during the sealing and pressurizing process included in the busbar manufacturing method of the first embodiment. Figure 12 is a graph showing the voltage curve with respect to gap length.

[0046] Note that the cross-sections in Figures 9 and 10 correspond to the cross-section of the dashed line YY in Figure 5 (Figure 6). Figure 11 schematically shows an enlarged view of the cross-section of the boundary between the N-type conductive plate 62 and the insulating sheet 63 enclosed by the dashed rectangle in Figure 10. Figure 11(A) shows the boundary between the N-type conductive plate 62 and the insulating sheet 63 before pressurization of the laminate 60a, and Figure 11(B) shows the boundary between the N-type conductive plate 62 and the insulating sheet 63 after pressurization of the laminate 60a. In Figure 12, the X axis corresponds to the gap length (μm) and the Y axis corresponds to the voltage (kV). The curves represent the Paschen curve, the voltage shared by the air layer, and the voltage shared by the insulating sheet, respectively.

[0047] First, a preparation process is carried out to prepare the parts necessary for manufacturing the busbar 60 (step S1). The parts include P-type conductive plate 61 and N-type conductive plate 62, main terminal connection parts 61c, 62c, insulating sheet 63, sealing member, etc. The P-type conductive plate 61 and N-type conductive plate 62 are cut from conductive plate into the desired shape and through holes are made at predetermined positions. 61a1, 62a1 It is obtained by forming it.

[0048] Next, a lamination process is performed in which the P-type conductive plate 61, insulating sheet 63, and N-type conductive plate 62 are laminated (step S2). The P-type conductive plate 61, insulating sheet 63, and N-type conductive plate 62 are laminated to form a laminated body 60a.

[0049] Next, a setting process is performed in which the laminate 60a formed in step S2 is set into the mold 70 (step S3). The mold 70 is formed by combining an upper mold section 71 and a lower mold section 72 to create a cavity 73, which is a storage area inside. As shown in Figure 9, the laminate 60a is sandwiched between the upper mold section 71 and the lower mold section 72 and set into the cavity 73. The mold 70 is mainly composed of a material with excellent heat resistance. Such a material can be, for example, a cemented carbide. In this case, the area where the main terminal connection parts 61c and 62c are located is covered by the mold 70.

[0050] Next, the inside of the mold 70 is sealed with a sealing member 64c, and a sealing and pressurizing process is performed in which the sealing member 64c pressurizes the laminate 60a (step S4). In the mold 70 in which the laminate 60a is set in the cavity 73, the molten sealing member 64c is injected from the injection port (not shown) while maintaining a vacuum inside the cavity 73. The injected sealing member 64c fills the cavity 73 and seals the entire laminate 60a.

[0051] With the entire laminate 60a sealed by the sealing member 64c, the cavity 73 is further filled with the sealing member 64c. The laminate 60a then receives sealing pressure from the sealing member 64c. In particular, as shown in Figure 10, the laminate 60a is subjected to sealing pressure in the stacking direction. parallel The insulating sheet 63 is subjected to sealing pressure. This sealing pressure is between 5 MPa and 40 MPa.

[0052] Before the laminate 60a is subjected to sealing pressure, an air layer V exists within the insulating sheet 63, as shown in Figure 11(A). This air layer V is a general term for voids, holes, etc. Also, Figure 11(A) shows only the N-type conductive plate 62 side of the insulating sheet 63. The air layer V exists throughout the insulating sheet 63. Although not shown in the figure, minute air layers may occur between the N-type conductive plate 62 and the insulating sheet 63, and between the P-type conductive plate 61 and the insulating sheet 63. If the busbar 60 is energized with such air layers V present, partial discharge may occur. If partial discharge occurs, there is a concern that the insulating sheet 63 will be damaged and the insulating properties between the P-type conductive plate 61 and the N-type conductive plate 62 cannot be maintained.

[0053] Therefore, when such a laminate 60a is subjected to sealing pressure, the air layer V within the insulating sheet 63 is pressurized. As a result, as shown in Figure 11(B), the air layer V within the insulating sheet 63 is compressed and its volume decreases. In addition, the volume of the air layer between the N-type conductive plate 62 and the insulating sheet 63, and between the P-type conductive plate 61 and the insulating sheet 63 also decreases.

[0054] Here, we will explain partial discharge in response to changes in the volume of the air layer V (Figure 12). In Figure 12, we show the case where aramid paper is used for the insulating sheet 63. In Figure 12, the solid line (thick line) represents the Paschen curve, the dashed line represents the voltage shared by the air layer V, and the solid line (thin line) represents the voltage shared by the insulating sheet 63. Therefore, the gap length on the X axis represents the distance between the objects in the case of the Paschen curve, the thickness of the air layer V in the case of the air layer V, and the thickness of the insulating sheet 63 in the case of the insulating sheet 63. The voltage on the Y axis represents the discharge voltage in the case of the Paschen curve, and the shared voltage in the cases of the air layer V and insulating sheet 63. The laminate 60a is compressed toward the insulating sheet 63 parallel to the lamination direction, and the volume of the air layer V contained in the insulating sheet 63 also decreases in the lamination direction. The change in the volume of the air layer V can be considered as a change in the thickness of the air layer V.

[0055] First, the Paschen curve represents the discharge voltage at which discharge begins (Paschen's law), which is the product of pressure and gap length. Note that the pressure in Figure 12 is 1 atmosphere. In Figure 12, as the gap length increases, the discharge voltage at which discharge begins initially decreases. Then, as the gap length increases further, discharge occurs. discharge The voltage also increases.

[0056] The insulating portion of the laminate 60a is composed of a composite structure including an air layer V and an insulating sheet 63. Since the insulating properties of the gas (air layer V) are inferior to those of the solid (insulating sheet 63 (excluding the air layer V)), partial discharge is more likely to occur in the air layer V than in the insulating sheet 63.

[0057] Furthermore, when the insulating portion is complex, the triple point where the conductor and two insulators intersect at one point becomes a weak point, and discharge often occurs there. This is because when the angle between the conductor and the insulator is 90° or less, the electric field strength at the triple point becomes infinite. When the insulating sheet 63 is aramid paper, it is known that under adverse conditions, discharge occurs at the triple point when AC is applied, and discharge occurs in the air layer when DC is applied. The laminate 60a contains an air layer, and it is conceivable that a busbar 60 containing such a laminate 60a is prone to discharge when used with DC.

[0058] When a voltage is applied to the laminate 60a, the voltage is shared between the insulating sheet 63 and the air layer V. Whether or not discharge occurs depends on the relationship between the magnitude of the shared voltage (dashed line in Figure 12) and the Paschen curve (solid thick line in Figure 12). That is, discharge occurs in the range where the shared voltage of the air layer V exceeds the discharge voltage of the Paschen curve. This corresponds to the hatched region in Figure 12. Since the thickness (gap length) of the air layer V that forms within the insulating sheet 63 is sufficiently small compared to the insulating sheet 63, it is conceivable that some of it falls within this hatched region. Therefore, partial discharge is likely to occur in the air layer V. For example, if the thickness (gap length) of the air layer V before pressurization is "before pressurization" in Figure 12, the shared voltage of the air layer V exceeds the discharge voltage of the Paschen curve. If current is passed through the laminate 60a in this state, discharge will occur in the air layer V. Furthermore, the change in the voltage distributed by the insulating sheet 63 is inversely related to the change in the voltage distributed by the air layer V.

[0059] According to the Paschen curve, the gap length and discharge voltage at which discharge is most likely to occur at 1 atmosphere are approximately 7 μm and 350 V, respectively. Therefore, by keeping the voltage shared by the air layer V below this voltage on the Paschen curve, it is possible to prevent discharge from occurring in the air layer V.

[0060] Therefore, in this embodiment, the air layer V contained in the insulating sheet 63 is compressed by applying pressure to the laminate 60a in the lamination direction. As shown in Figure 12, for example, the thickness (gap length) of the air layer V is compressed from "before pressurization" to "after pressurization". The voltage shared by the air layer V "after pressurization" is below the discharge voltage at which discharge is most likely to occur on the Paschen curve. The voltage shared by the insulating sheet 63 becomes relatively larger with respect to the air layer V. As a result, the discharge voltage at which partial discharge occurs in the laminate 60a increases. Therefore, discharge in the laminate 60a becomes less likely. In particular, in this embodiment, if the thickness (gap length) of the air layer V is made smaller than 7 μm, discharge in the laminate 60a becomes less likely.

[0061] Next, a post-processing step is performed in which the sealing member 64c is cured and the mold 70 is removed (step S5). Sealing portion 64 The laminate 60a is covered. The upper mold portion 71 and the lower mold portion 72 of the mold 70 are detached. At this time, any burrs or other debris on the sealing portion 64 are removed. Then, the main terminal connection portion 61c is placed on the P-type conductive plate 61. At this time, the main terminal connection portion 61c is inserted through the through hole 62a1 of the N-type conductive plate 62 without making contact. The main terminal connection portion 62c is placed on the N-type conductive plate 62. At this time, the main terminal connection portion 62c is inserted through the through hole 61a1 of the P-type conductive plate 61 without making contact. Based on the above, the busbar 60 shown in Figures 5 and 6 is obtained.

[0062] The semiconductor device 1 described above comprises a semiconductor module 10 and a busbar 60. The semiconductor module 10 includes semiconductor chips 24a and 24b, a plurality of columnar external connection terminals 40a and 40b electrically connected to the semiconductor chips 24a and 24b, and a main body portion 50 that includes one end of the semiconductor chips 24a and 24b and the external connection terminals 40a and 40b, and extends vertically from the front surface of the main body where the other ends of the external connection terminals 40a and 40b face the semiconductor chips 24a and 24b. The busbar 60 is into which the other ends of the external connection terminals 40a and 40b extending from the main body portion 50 are inserted. Such a busbar 60 further includes a laminate 60a into which a flat P-type conductive plate 61, a flat insulating sheet 63, and a flat N-type conductive plate 62 are stacked in order. The laminate 60a are in close contact with each other and have main terminal connection portions 6 into which the other ends of the external connection terminals 40a and 40b are respectively inserted. 2 c,6 1 c is formed, and the main terminal connection part 6 2 c,6 1 c is left open and sealed with a sealing portion 64. In the laminate 60a, the P-type conductive plate 61, the insulating sheet 63, and the N-type conductive plate 62 are pressed together parallel to the lamination direction toward the insulating sheet 63, so the volume of the air layer V contained in the insulating sheet 63 (as well as the air layer between the P-type conductive plate 61 and the insulating sheet 63 and between the N-type conductive plate 62 and the insulating sheet 63) is compressed. As a result, the discharge voltage at which partial discharge occurs in the laminate 60a increases, making it less likely for discharge to occur in the laminate 60a. As a result, the occurrence of dielectric breakdown in the busbar 60 is suppressed, and the reliability of the semiconductor device 1 including such a busbar 60 can be improved.

[0063] (Variation 1) Next, Modification 1 of the first embodiment will be described using Figures 13 and 14. Figure 13 is a plan view of the busbar of Modification 1 of the first embodiment, and Figure 14 is a side view of the busbar of Modification 1 of the first embodiment. Note that Figure 14 is a side view taken in the +Y direction in Figure 13. In Modification 1, the same components as in Figures 5 and 6 are denoted by the same reference numerals.

[0064] In the modified example 1, the busbar 60 has multiple grooves 60c formed on the front surface 64a between the base portion 60b to which the main terminal connection portion 61c (connected to the P-type conductive plate 61) extends and the base portion 60b to which the main terminal connection portion 62c (connected to the N-type conductive plate 62) extends. Although not shown in the figure, multiple grooves 60c are also formed on the back surface 64b in a similar manner. Furthermore, the busbar 60 also has grooves 60c formed on the short side surface, continuous with the front surface 64a and the back surface 64b. Therefore, the creepage distance between the main terminal connection portion 61c and the main terminal connection portion 62c can be extended. As a result, the insulation between the main terminal connection portion 61c and the main terminal connection portion 62c can be maintained. As a result, the busbar 60 can be made smaller.

[0065] It is desirable that such grooves 60c be formed to the extent that the strength of the sealing portion 64 is not reduced. For this reason, if the grooves 60c are shallow, the number of grooves may be increased, and if the grooves 60c are deep, the number of grooves may be decreased. Furthermore, the grooves 60c must be formed on at least the front surface 64a, the back surface 64b, and the side surface (on the side where the external connection portions 61b and 62b extend). 。

[0066] (Modification 2) Next, a modification 2 of the first embodiment will be described using Figures 15 and 16. Figure 15 is a plan view of the busbar of modification 2 of the first embodiment, and Figure 16 is a cross-sectional view of the busbar of modification 2 of the first embodiment. Note that Figure 16 is a cross-sectional view along the dashed line YY in Figure 15. In modification 2, the same reference numerals are used for components that are the same as those in Figures 5 and 6.

[0067] The base portion 60b of the busbar 60 in Figures 5 and 6 does not necessarily have to be formed. For example, Figures 15 and 16 illustrate this case. In the modified example 2 of Figures 15 and 16, the busbar 60 has an opening 65 formed in the area corresponding to the base portion 60b of the busbar 60 in Figures 5 and 6. Therefore, the front surface 64a and the back surface 64b of the sealing portion 64 each have openings 65 formed therein, creating a grid-like structure. The grids on the front surface 64a and the back surface 64b of the sealing portion 64 overlap.

[0068] Furthermore, the P-type conductive plate 61 and N-type conductive plate 62 exposed from the opening 65 may not have main terminal connection portions 61c and 62c, and may have insertion holes formed as appropriate. External connection terminals 40a and 40b are inserted into these insertion holes. .Ma Furthermore, similar to Figures 5 and 6, the P-type conductive plate 61 and N-type conductive plate 62 exposed from the opening 65 may be provided with a main terminal connection portion 61c and a main terminal connection portion 62c.

[0069] Such busbars 60 are also formed in the same manner as in the first embodiment. However, in this case, the area corresponding to the opening 65 is not sealed by the sealing member 64c, and therefore the sealing pressure of the sealing member 64c is not sufficient. For this reason, the area corresponding to the opening 65 may be pressurized by the pressure of the upper mold portion 71 and the lower mold portion 72 of the mold 70 instead of the sealing pressure of the sealing member 64c. This makes it possible to maintain pressure on the entire front surface 64a and back surface 64b of the laminate 60a.

[0070] [Second Embodiment] In the second embodiment, a method for manufacturing the busbar 60 that differs from that of the first embodiment will be described with reference to Figures 17 and 18. Figure 17 is a flowchart of the busbar manufacturing method of the second embodiment. Figure 18 is a diagram showing the pressurization step included in the busbar manufacturing method of the second embodiment. In the second embodiment, the same reference numerals are used for components that are the same as those in the first embodiment.

[0071] First, in the second embodiment, steps S1 and S2 are performed in the same manner as the flowchart in Figure 8 of the first embodiment. However, when forming the laminate 60a in step S2, adhesive layers 66 are used to laminate between the P-type conductive plate 61 and the insulating sheet 63, and between the insulating sheet 63 and the N-type conductive plate 62. As a result, in the laminate 60a, the P-type conductive plate 61 and the N-type conductive plate 62 are fixed to the insulating sheet 63. The adhesive layer 66 is, for example, in the form of a sheet. In this case, through holes are formed corresponding to the through holes 61a1 of the P-type conductive plate 61 and the through holes 62a1 of the N-type conductive plate 62. Alternatively, a resin sheet may be used as the adhesive layer 66.

[0072] Next, a pressurizing step is performed in which the laminate 60a is pressurized with a pressurizing jig 80 (step S4a). The pressurizing jig 80 includes a flat upper plate portion 81 and a lower plate portion 82 facing the upper plate portion 81. For example, the laminate 60a is placed on the lower plate portion 82. The upper plate portion 81 is moved toward the lower plate portion 82 to press the laminate 60a. As a result, the laminate 60a is pressurized parallel to the lamination direction and toward the insulating sheet 63, as shown in Figure 18. The pressurization at this time is also between 5 MPa and 40 MPa. As a result, the air layer V contained in the insulating sheet 63 is compressed, similar to the first embodiment. As a result, the discharge voltage at which partial discharge occurs in the laminate 60a increases. Therefore, discharge in the laminate 60a becomes less likely.

[0073] Next, the laminate 60a pressurized in step S4a is set in the mold 70, and a sealing process is performed in which the inside of the mold 70 is sealed with the sealing member 64c (step S4b). The setting process in step S3 and the sealing and pressurizing process in step S4 of the first embodiment are performed. That is, the laminate 60a is sandwiched between the upper mold part 71 and the lower mold part 72 and set in the cavity 73 (see Figure 9). In the mold 70 in which the laminate 60a is set in the cavity 73, the molten sealing member 64c is injected from the injection port (not shown) while maintaining a vacuum inside the cavity 73. The injected sealing member 64c fills the cavity 73 and seals the entire laminate 60a. After this, the same process as in step S5 of Figure 8 is performed. As a result, the bus bar 60 is obtained. [Explanation of Symbols]

[0074] 1 Semiconductor device 10 Semiconductor Modules 20 Insulated Circuit Boards 21 Insulating board 22 Metal plate 23a, 23b Circuit Patterns 24a, 24b semiconductor chips 30 Printed circuit boards 40a, 40b External connection terminals 41a Control terminal 41b Sense terminal 42a, 42b Conductive posts 50 Main body 60 Bus Bar 60a laminate 60b Base 60c groove 61 P type conductive plate 61a, 62a Conductive parts 61a1,62a1 Through hole 61b, 62b External connection section 61c, 62c Main terminal connection section 62 N-type conductive plate 63 Insulating Sheet 64 Sealing part 64a Front side 64b Reverse side 64c Sealing member 65 Opening 66 Adhesive layer 70 molds 71 Upper mold section 72 Lower mold section 73 Cavity 80 Pressurizing fixture 81 Upper plate section 82 Lower plate part

Claims

1. A semiconductor module in which multiple columnar external connection terminals, electrically connected to a semiconductor chip, are exposed to the outside, A busbar having a laminate in which a flat plate-shaped first conductive member, a flat plate-shaped organic insulating member having reduced voids or reduced surface irregularities, and a flat plate-shaped second conductive member are sequentially stacked in close contact, and a plurality of insertion holes into which the plurality of external connection terminals are each inserted are formed, and the busbar is sealed with a sealing member, leaving open the plurality of insertion holes, the first external connection portion which is the end of the first conductive member, and the second external connection portion which is the end of the second conductive member, A semiconductor device equipped with the following features.

2. The main body of the semiconductor module has a rectangular shape in plan view, and the plurality of external connection terminals are arranged along the long side of the main body. The first external connection portion and the second external connection portion extend in directions perpendicular to the arrangement direction of the plurality of external connection terminals, The semiconductor device according to claim 1.

3. The first external connection portion extends parallel to the longitudinal direction of the first conductive member, and the second external connection portion extends parallel to the longitudinal direction of the second conductive member, and the first external connection portion and the second external connection portion are of different heights. The semiconductor device according to claim 2.

4. A groove is formed between the multiple insertion holes, which have different potentials. The semiconductor device according to claim 2 or 3.

5. The busbar has a back surface facing the semiconductor module that is formed in a grid pattern including a plurality of openings, each of which contains one of the plurality of insertion holes. The front surface opposite to the aforementioned back surface is formed in a grid pattern, including a plurality of openings, each containing one of the plurality of insertion holes. The semiconductor device according to any one of claims 1 to 4.

6. The outer edges of the first conductive member and the second conductive member within the sealing member are configured to overlap in a plan view. The semiconductor device according to claim 5.

7. The aforementioned organic insulating material is aramid paper. A semiconductor device according to any one of claims 1 to 6.

8. The aforementioned organic insulating member includes an air layer. The semiconductor device according to claim 7.

9. The thickness of the air layer in the stacking direction of the laminate is less than 7 μm. The semiconductor device according to claim 8.

Images