Solid-state image sensors and electronic devices

Abstract

The present disclosure relates to a solid-state imaging element and an electronic apparatus with which it is possible to achieve improved image quality. The imaging element comprises: pixels including global drive portions which are driven at the same timing in all lines, and rolling drive portions which are driven at a line-by-line timing; a pixel array region in which a plurality of pixels are arranged in an array; global drive circuits for supplying a drive signal to the global drive portions; and rolling drive circuits for supplying a drive signal to the rolling drive portions. The global drive circuits are disposed on at least three of four sides surrounding the pixel array region. The present techniques are applicable to a stacked CMOS image sensor, for example.

Description

Technical Field

[0001] The present disclosure relates to a solid-state imaging device and an electronic device, and particularly to a solid-state imaging device and an electronic device that can achieve higher image quality.

[0002] Conventionally, in electronic devices equipped with imaging functions such as digital still cameras and digital video cameras, for example, solid-state imaging devices such as CCD (Charge Coupled Device) and CMOS (Complementary Metal Oxide Semiconductor) image sensors are used. For example, in a CMOS image sensor, the charge photoelectrically converted in a photodiode is transferred to a FD (Floating Diffusion) section, and the pixel signal output through an amplification transistor according to the amount of the charge is AD (Analog to Digital) converted.

[0003] For example, Patent Document 1 discloses a CMOS image sensor capable of performing a global shutter operation in which the transfer of charge from a photodiode to a memory is performed at the same timing for all rows.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Incidentally, in conventional CMOS image sensors, the drive circuit that performs global shutter operation is located on one side of the pixel array area, or on two opposing sides of the pixel array area. As a result, exposure time unevenness can occur due to waveform dulling caused by instantaneous current IR drop and wiring delays. In particular, at high speeds, exposure time unevenness becomes noticeable enough to negatively affect image quality. Therefore, there is a need to reduce such exposure time unevenness and enable the acquisition of higher quality images.

[0006] This disclosure is made in light of these circumstances and aims to enable higher image quality. [Means for solving the problem]

[0007] A solid-state image sensor according to one aspect of this disclosure comprises pixels having a global drive portion that drives at the same timing throughout the entire row and a rolling drive portion that drives at row-by-row timing; a pixel array region in which a plurality of the pixels are arranged in an array; a global drive circuit that supplies a drive signal to the global drive portion; and a rolling drive circuit that supplies a drive signal to the rolling drive portion, wherein the global drive circuit is arranged on at least three of the four sides surrounding the pixel array region and is located near a power pad. Power lines for supplying power to the global drive circuit from the power pads located at the four corners of the pixel array area are arranged along the four sides surrounding the pixel array area.

[0008] An electronic device according to one aspect of the present disclosure comprises a pixel having a global drive portion that drives at the same timing across all rows and a rolling drive portion that drives at row-by-row timing; a pixel array region in which a plurality of the pixels are arranged in an array; a global drive circuit that supplies a drive signal to the global drive portion; and a rolling drive circuit that supplies a drive signal to the rolling drive portion, wherein the global drive circuit is located on at least three of the four sides surrounding the pixel array region and is located near a power pad. Power lines for supplying power from the power pads located at the four corners of the pixel array area to the global drive circuit are arranged along the four sides surrounding the pixel array area. It is equipped with a solid-state image sensor.

[0009] In one aspect of this disclosure, the solid-state image sensor includes pixels having a global drive portion that drives at the same timing throughout the entire row and a rolling drive portion that drives at row-by-row timing, a pixel array region in which a plurality of pixels are arranged in an array, a global drive circuit that supplies a drive signal to the global drive portion, and a rolling drive circuit that supplies a drive signal to the rolling drive portion. The global drive circuit is arranged on at least three of the four sides surrounding the pixel array region and is located near the power pad. Power lines are arranged along the four sides surrounding the pixel array area to supply power to the global drive circuit from power pads located at the four corners of the pixel array area. [Brief explanation of the drawing]

[0010] [Figure 1] This figure shows an example configuration of a first embodiment of an image sensor to which this technology is applied. [Figure 2] Figure 1 shows an example of the circuit configuration of the image sensor. [Figure 3] This figure shows an example of the transfer voltage for a global drive signal. [Figure 4] This figure shows an example configuration of the second embodiment of the image sensor. [Figure 5] This figure shows an example configuration of a third embodiment of the image sensor. [Figure 6] This figure shows an example configuration of the fourth embodiment of the image sensor. [Figure 7] Figure 6 shows an example of the circuit configuration of the image sensor. [Figure 8] This figure shows an example configuration of the fifth embodiment of the image sensor. [Figure 9] Figure 8 shows an example of the circuit configuration of the image sensor. [Figure 10] This figure shows an example of a cross-sectional configuration of an image sensor with a two-layer stacked structure. [Figure 11] This figure shows a cross-sectional example of an image sensor with a three-layer stacked structure. [Figure 12] This is a block diagram showing an example of the configuration of an imaging device. [Figure 13] This figure shows an example of use with an image sensor.

Embodiments for Carrying out the Invention

[0011] Hereinafter, specific embodiments to which this technology is applied will be described in detail with reference to the drawings.

[0012] <First Configuration Example of Image Sensor> FIG. 1 is a diagram showing a configuration example of a first embodiment of an image sensor to which this technology is applied.

[0013] The image sensor 11 shown in FIG. 1 is, for example, a stacked-type CMOS image sensor formed by stacking a plurality of chips 12. In the configuration example shown in FIG. 1, the image sensor 11 has a two-layer stacked structure in which an upper chip 12a and a lower chip 12b are stacked.

[0014] In addition, in the image sensor 11, a plurality of pixels 31 are arranged in an array. The pixel 31 has a structure straddling the upper chip 12a and the lower chip 12b. A part of the pixel 31 provided in the upper chip 12a is referred to as an upper pixel 31a, and a part of the pixel 31 provided in the lower chip 12b is referred to as a lower pixel 31b. The upper pixel 31a is configured to have a part driven at the same timing for all rows (hereinafter referred to as a global drive part) and a part driven at the timing of each row unit (hereinafter referred to as a rolling drive part). Further, the lower pixel 31b has a rolling drive part and is configured without a global drive part.

[0015] As shown in FIG. 1, in the upper chip 12a, a pixel array region 21a, global drive circuits 22-1 to 22-4, and wirings 23 are arranged. In the lower chip 12b, a pixel array region 21b, power supply pads 24-1 to 24-4, rolling drive circuits 25-1 and 25-2, load MOS regions 26, an AD conversion unit 27, and a horizontal transfer circuit 28 are arranged.

[0016] In the pixel array region 21a, the upper pixels 31a are arranged in an array, and in the pixel array region 21b, the lower pixels 31b are arranged in an array.

[0017] The global drive circuits 22-1 to 22-4 are arranged along the four sides of the pixel array region 21a, and each outputs a signal for driving the global drive part of the upper pixel 31a. For example, the global drive circuit 22-1 is arranged along the left side of the pixel array region 21a, the global drive circuit 22-2 is arranged along the right side of the pixel array region 21a, the global drive circuit 22-3 is arranged along the upper side of the pixel array region 21a, and the global drive circuit 22-4 is arranged along the lower side of the pixel array region 21a.

[0018] The wiring 23 is a power line and a ground line for supplying the power required for driving the global drive circuits 22-1 to 22-4. The wiring 23 is arranged so as to surround the outer periphery (left side, right side, upper side, and lower side) of the upper chip 12a so as to be connected to each of the global drive circuits 22-1 to 22-4.

[0019] The power supply pads 24-1 to 24-4 are pads that are electrically and mechanically connected to the upper chip 12a, and are respectively arranged at the four corners of the lower chip 12b. For example, the power supply pads 24-1 to 24-4 are respectively connected to the wiring 23, and supply the power supplied from the outside to the global drive circuits 22-1 to 22-4 via the wiring 23.

[0020] The rolling drive circuits 25-1 and 25-2 are arranged along the left and right two sides of the pixel array region 21b, and each outputs a signal for driving the rolling drive parts of the upper pixel 31a and the lower pixel 31b.

[0021] In the load MOS region 26, for example, a plurality of MOS transistors used as load elements for reading pixel signals from the pixels 31 are arranged.

[0022] The AD conversion unit 27 has, for example, a comparator and a counter, and AD-converts and outputs the pixel signal read from the pixel 31.

[0023] The horizontal transfer circuit 28, for example, transfers the pixel signals output from the AD conversion unit 27 horizontally for each row of pixels 31 and outputs them to the signal processing unit downstream of the image sensor 11.

[0024] Figure 2 is a diagram illustrating the circuit configuration of the image sensor 11.

[0025] As shown by the dashed line in Figure 2, the image sensor 11 is divided into an upper chip 12a and a lower chip 12b. Figure 2 also shows the circuit configuration of the upper pixel 31a and global drive circuit 22 of the upper chip 12a, and the lower pixel 31b and rolling drive circuit 25 of the lower chip 12b.

[0026] The upper pixel 31a is composed of a photodiode 51, an output transistor 52, a transfer transistor 53, a memory 54, a read transistor 55, and an FD unit 56. The lower pixel 31b is composed of an amplification transistor 57, a selection transistor 58, and a reset transistor 59.

[0027] The photodiode 51 generates and stores electric charge through photoelectric conversion.

[0028] The discharge transistor 52 is driven according to the discharge signal OFG, and for example, at the timing when exposure of the pixel 31 begins, it discharges the charge accumulated in the photodiode 51 to the drain OFD. The discharge transistor 52 also has a function to overflow any charge generated that exceeds the capacitance of the photodiode 51.

[0029] The transfer transistor 53 is driven according to the transfer signal TRX and transfers the charge generated by the photodiode 51 during exposure of the pixel 31 to the memory 54.

[0030] The memory 54 temporarily holds the charge transferred via the transfer transistor 53 until it is time to read it for each row of pixels 31.

[0031] The read transistor 55 is driven according to the read signal TRG and reads the charge held in the memory 54 into the FD unit 56.

[0032] The FD unit 56 holds the charge read out via the readout transistor 55 and applies a potential corresponding to the level of that charge to the gate electrode of the amplification transistor 57.

[0033] The amplification transistor 57 amplifies the charge stored in the FD section 56 and outputs a pixel signal corresponding to the level of that charge to the vertical signal line VSL.

[0034] The selection transistor 58 is driven according to the selection signal SEL and connects the amplification transistor 57 to the constant current source 61 via the vertical signal line VSL.

[0035] The reset transistor 59 is driven according to the reset signal RST, and resets the pixel 31 by discharging the charge stored in the memory 54 and the FD unit 56.

[0036] The global drive circuit 22 is composed of multiple amplifiers 41, including amplifier 41-1 which supplies a transfer signal TRX to the transfer transistor 53, and amplifier 41-2 which supplies an output signal OFG to the output transistor 52. Hereafter, the transfer signal TRX and output signal OFG output from the global drive circuit 22 will also be referred to as the global drive signal.

[0037] The rolling drive circuit 25 is composed of multiple amplifiers 42, including amplifier 42-1 which supplies a read signal TRG to the read transistor 55, and amplifier 42-2 which supplies a selection signal SEL to the selection transistor 58.

[0038] Therefore, the photodiode 51, output transistor 52, and transfer transistor 53, enclosed by the dashed line in Figure 2, constitute the global drive portion of the pixel 31. Similarly, the readout transistor 55 and selection transistor 58, enclosed by the double-dashed line in Figure 2, constitute the rolling drive portion of the pixel 31.

[0039] As described above, the image sensor 11 is configured such that global drive circuits 22-1 to 22-4 supply global drive signals to the global drive portion of the pixels 31 from four directions in the pixel array region 21a. As a result, the image sensor 11 has a configuration in which the number of global drive circuits 22 that supply global drive signals to each pixel 31 is increased compared to conventional designs, thereby mitigating the saturation that occurs in the waveform of the global drive signals.

[0040] Now, referring to Figure 3, we will explain the waveform of the global drive signal output from the global drive circuit 22.

[0041] For example, as shown in Figure 3A, the edges of the pixel array region 21a are near the global drive circuit 22, so the waveform of the global drive signal output from the global drive circuit 22 is pulsed and has nearly vertical ends (sharp rise and fall). Then, as the pixel array region 21a moves away from the global drive circuit 22 towards the center, the waveform of the global drive signal becomes blunted.

[0042] For example, conventional image sensors had a configuration in which global drive circuits were provided on one or two sides of the pixel array area. As a result, as shown in Figure 3B, the waveform of the global drive signal was significantly slower (the rise and fall times were more gradual) in the central part of the pixel array area compared to the edges.

[0043] In contrast, as shown in Figure 3C, the image sensor 11 can reduce the blunting of the global drive signal waveform in the central part of the pixel array region 21a compared to conventional image sensors, that is, it can suppress waveform blunting.

[0044] In this way, the image sensor 11 can suppress the deformation of the waveform of the global drive signal in the central part of the pixel array region 21a, and ensure the same timing for driving the pixels 31 across the entire pixel array region 21a. Furthermore, the image sensor 11 is configured to distribute the paths of instantaneous current. As a result, the image sensor 11 can reduce the occurrence of uneven exposure time, that is, all pixels 31 can be exposed with the same timing exposure time, and higher quality images can be captured even during high-speed operation (short shutter time).

[0045] Furthermore, by arranging the global drive circuit 22 on the upper chip 12a and the rolling drive circuit 25 on the lower chip 12b, the image sensor 11 achieves an efficient layout that allows for a reduction in chip size compared to a layout where these drive circuits are placed on a single chip.

[0046] <Second example of image sensor configuration> Figure 4 shows an example configuration of a second embodiment of an image sensor to which this technology is applied. In the image sensor 11A shown in Figure 4, components common to the image sensor 11 in Figure 1 are denoted by the same reference numerals, and their detailed descriptions are omitted.

[0047] In other words, the image sensor 11A is constructed by stacking an upper chip 12a and a lower chip 12b, similar to the image sensor 11 in Figure 1. The image sensor 11A has the same configuration as the image sensor 11 in Figure 1, in that the upper chip 12a has the pixel array area 21a and wiring 23, and the lower chip 12b has the pixel array area 21b, power pads 24-1 to 24-4, rolling drive circuits 25-1 and 25-2, load MOS area 26, AD conversion unit 27, and horizontal transfer circuit 28.

[0048] Furthermore, the image sensor 11A has a different configuration from the image sensor 11 in Figure 1, in that three global drive circuits 22-1 to 22-3 are arranged on the upper chip 12a.

[0049] For example, if the number of global drive circuits 22 that supply a global drive signal to each pixel 31 is increased compared to conventional configurations, the blunting that occurs in the waveform of the global drive signal can be mitigated, as described above with reference to Figure 3. In other words, even if the image sensor 11 in Figure 1 does not have a configuration with four global drive circuits 22-1 to 22-4, it is sufficient if there are at least three or more global drive circuits 22.

[0050] Furthermore, the arrangement of the three global drive circuits 22-1 to 22-3 is not limited to the left, right, and top edges, as shown in Figure 4. That is, the image sensor 11A may employ a configuration in which the global drive circuits 22-1 to 22-3 are arranged on the left, right, and bottom edges, or on the left, top, and bottom edges, or on the right, top, and bottom edges, etc.

[0051] Furthermore, the circuit configuration of the image sensor 11A is the same as that of the image sensor 11 shown in Figure 2.

[0052] The image sensor 11A configured in this way suppresses the blunting that occurs in the waveform of the global drive signal compared to conventional image sensors, thereby reducing the occurrence of uneven exposure time and enabling the capture of higher-quality images.

[0053] <Third example of image sensor configuration> Figure 5 shows an example configuration of a third embodiment of an image sensor to which this technology is applied. In the image sensor 11B shown in Figure 5, components common to the image sensor 11 in Figure 1 are denoted by the same reference numerals, and their detailed descriptions are omitted.

[0054] In other words, the image sensor 11B is constructed by stacking an upper chip 12a and a lower chip 12b, similar to the image sensor 11 in Figure 1. The image sensor 11B has the same configuration as the image sensor 11 in Figure 1, in that the pixel array area 21a is located on the upper chip 12a, and the pixel array area 21b, power pads 24-1 to 24-4, load MOS area 26, AD conversion unit 27, and horizontal transfer circuit 28 are located on the lower chip 12b.

[0055] Furthermore, the image sensor 11A has a different configuration from the image sensor 11 in Figure 1, in that the rolling drive circuits 25-1 and 25-2 are located on the upper chip 12a, and the global drive circuits 22-1 to 22-4 are located on the lower chip 12b.

[0056] Thus, even if the image sensor 11B is configured such that global drive circuits 22-1 to 22-4 are provided on the lower chip 12b to drive the global drive portion of the upper pixel 31a located in the pixel array area 21a of the upper chip 12a, the saturation occurring in the waveform of the global drive signal can be mitigated. In particular, by configuring the image sensor 11B so that the global drive circuits 22-1 to 22-4 are located near the power supply pads 24-1 to 24-4, more power can be supplied to the global drive circuits 22-1 to 22-4. As a result, the image sensor 11B can further mitigate the saturation occurring in the waveform of the global drive signal.

[0057] Furthermore, the circuit configuration of the image sensor 11B is the same as that of the image sensor 11 shown in Figure 2.

[0058] The image sensor 11B configured in this way suppresses the blunting that occurs in the waveform of the global drive signal compared to conventional image sensors, thereby reducing the occurrence of uneven exposure time and enabling the capture of higher-quality images.

[0059] <Fourth example of image sensor configuration> Figure 6 shows an example configuration of a fourth embodiment of an image sensor to which this technology is applied. In the image sensor 11C shown in Figure 6, components common to the image sensor 11 in Figure 1 are denoted by the same reference numerals, and their detailed descriptions are omitted.

[0060] In other words, the image sensor 11C is constructed by stacking an upper chip 12a and a lower chip 12b, similar to the image sensor 11 in Figure 1. The image sensor 11C has the same configuration as the image sensor 11 in Figure 1, in that the upper chip 12a has a pixel array area 21a and wiring 23, and the lower chip 12b has a pixel array area 21b, power pads 24-1 to 24-4, rolling drive circuits 25-1 and 25-2, load MOS area 26, AD conversion unit 27, and horizontal transfer circuit 28.

[0061] Furthermore, the image sensor 11C has a different configuration from the image sensor 11 in Figure 1, in that global drive circuits 22-1a to 22-4a are arranged on the upper chip 12a, and global drive circuits 22-1b to 22-4b are arranged on the lower chip 12b. In other words, in the image sensor 11C, the global drive circuit 22 is formed by global drive circuits 22a and 22b so that it spans the upper chip 12a and the lower chip 12b.

[0062] Referring to Figure 7, the structure of the global drive circuit 22 for the image sensor 11C will be described. Amplifiers 41-1 and 41-2 are configured similarly and will be simply referred to as amplifier 41 below.

[0063] As shown in Figure 7, in the image sensor 11C, the amplifier 41 of the global drive circuit 22 is composed of an N-type transistor 71a and a P-type transistor 71b. In the image sensor 11C, the N-type transistor 71a is located in the global drive circuit 22a of the upper chip 12a, and the P-type transistor 71b is located in the global drive circuit 22b of the lower chip 12b.

[0064] In the case of an image sensor 11C with such a configuration, for example, if the upper pixel 31a is composed only of N-type transistors, the upper chip 12a can be fabricated simply by using an NMOS process.

[0065] Furthermore, the image sensor 11C can mitigate the blunting that occurs in the waveform of the global drive signal only during the falling edge (from high level to low level) of the global drive signal. Therefore, the image sensor 11C can also reduce the occurrence of uneven exposure time, enabling the capture of higher-quality images than conventional image sensors.

[0066] <Fifth example of image sensor configuration> Figure 8 shows an example configuration of a fifth embodiment of an image sensor to which this technology is applied. In the image sensor 11D shown in Figure 8, components common to the image sensor 11 in Figure 1 are denoted by the same reference numerals, and their detailed descriptions are omitted.

[0067] In other words, the image sensor 11D is constructed by stacking an upper chip 12a and a lower chip 12b, similar to the image sensor 11 in Figure 1. The image sensor 11D has the same configuration as the image sensor 11 in Figure 1, with the pixel array area 21a, global drive circuits 22-1 to 22-4, and wiring 23 arranged on the upper chip 12a, and the pixel array area 21b, power pads 24-1 to 24-4, rolling drive circuits 25-1 and 25-2, and horizontal transfer circuit 28 arranged on the lower chip 12b.

[0068] Furthermore, the image sensor 11D differs from the image sensor 11 in Figure 1 in that it is configured to perform an A / D conversion on the analog pixel signals within the pixels 31 and output digital pixel signals.

[0069] Referring to Figure 9, the configuration of the pixels 31 of the image sensor 11D will be described.

[0070] As shown in Figure 9, the pixel 31 is composed of a photodiode 51, an output transistor 52, a transfer transistor 53, an FD section 56, a comparator 81, a counter 82, and a latch 83. In addition, the pixel 31 has a structure in which the comparator 81 spans the upper chip 12a and the lower chip 12b, and the charge accumulated in the FD section 56 is converted by the comparator 81 and the counter 82.

[0071] Furthermore, the image sensor 11D is configured to supply a latch data read control signal from the rolling drive circuit 25 to the latch 83, and when reading out digital pixel signals row by row, the latch 83 can be considered as the rolling drive portion of the pixel 31. In other words, the rolling drive portion of the pixel 31 is configured to handle digital signals rather than analog signals.

[0072] The image sensor 11D configured in this way suppresses the blunting that occurs in the waveform of the global drive signal compared to conventional image sensors, thereby reducing the occurrence of uneven exposure time and enabling the capture of higher-quality images.

[0073] <Stacked configuration of image sensor> The stacked configuration of the image sensor 11 will be described with reference to Figures 10 and 11.

[0074] Figure 10 shows an example of a cross-sectional configuration of the image sensor 11 with the two-layer stacked structure described above.

[0075] The upper chip 12a has a cross-sectional configuration in which an insulating layer 102, a filter layer 103, and an on-chip lens layer 104 are stacked on the back side of the semiconductor layer 101, and a wiring layer 105 is stacked on the front side of the semiconductor layer 101. For example, a photodiode 51 and a memory 54 are formed on the semiconductor layer 101 for each pixel 31, and the memory 54 is configured to be light-shielded.

[0076] The lower chip 12b has a cross-sectional configuration in which a wiring layer 112 is stacked on a semiconductor layer 111.

[0077] In the image sensor 11, a connection pad formed to be exposed on the wiring layer 105 of the upper chip 12a and a connection pad formed to be exposed on the wiring layer 112 of the lower chip 12b are electrically and mechanically connected to each other.

[0078] In such a stacked image sensor 11, logic circuits and the like are provided in the peripheral region outside the pixel array area 21b of the lower chip 12b. Therefore, if the chip sizes of the upper chip 12a and the lower chip 12b are the same, there is a margin in the peripheral region outside the pixel array area 21a of the upper chip 12a where no elements are formed. Thus, in the image sensor 11, by providing global drive circuits 22-1 to 22-4 in the peripheral region of the upper chip 12a, the mounting density can be improved more effectively.

[0079] Figure 11 shows an example of a cross-sectional configuration of the three-layer image sensor 11E.

[0080] In other words, the image sensor 11E has a stacked configuration consisting of an upper chip 12a, a lower chip 12b, and a logic chip 12c.

[0081] The upper chip 12a has the same cross-sectional configuration as the upper chip 12a in Figure 10, while the lower chip 12b has a cross-sectional configuration in which a wiring layer 113 for stacking on the logic chip 12c is added. The logic chip 12c has a cross-sectional configuration in which a wiring layer 122 is stacked on a semiconductor layer 121.

[0082] Furthermore, in the image sensor 11E, the logic circuit is formed on the logic chip 12c, and the load MOS region 26, AD conversion unit 27, and horizontal transfer circuit 28 can also be formed on the logic chip 12c. Therefore, in the image sensor 11E, a layout can be adopted in which global drive circuits 22-1 to 22-4 are provided in the peripheral region of the upper chip 12a, and rolling drive circuits 25-1 and 25-2 are provided in the peripheral region of the lower chip 12b.

[0083] Compared to a configuration like the two-layer stacked image sensor 11, where logic circuits and the like are placed in the peripheral region of the lower chip 12b, this stacked image sensor 11E can be made even smaller.

[0084] <Example of electronic device configuration> The image sensor 11 described above can be applied to various electronic devices, such as imaging systems like digital still cameras and digital video cameras, mobile phones equipped with imaging functions, or other devices equipped with imaging functions.

[0085] Figure 12 is a block diagram showing an example configuration of an imaging device mounted on an electronic device.

[0086] As shown in Figure 12, the imaging device 201 is configured to include an optical system 202, an image sensor 203, a signal processing circuit 204, a monitor 205, and a memory 206, and is capable of capturing still images and moving images.

[0087] The optical system 202 is composed of one or more lenses and guides the image light (incident light) from the subject to the image sensor 203, forming an image on the light-receiving surface (sensor part) of the image sensor 203.

[0088] The image sensor 203 is the same as the image sensor 11 described above. Electrons are accumulated in the image sensor 203 for a certain period of time, depending on the image formed on the light-receiving surface via the optical system 202. Then, a signal corresponding to the electrons accumulated in the image sensor 203 is supplied to the signal processing circuit 204.

[0089] The signal processing circuit 204 performs various signal processing operations on the pixel signals output from the image sensor 203. The image (image data) obtained by the signal processing circuit 204 is supplied to the monitor 205 for display or supplied to the memory 206 for storage (recording).

[0090] With the imaging device 201 configured in this way, by applying the image sensor 11 described above, it is possible to capture, for example, higher quality images.

[0091] <Examples of image sensor usage> Figure 13 shows an example of using the image sensor (imaging element) described above.

[0092] The image sensor described above can be used in various cases to sense light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows.

[0093] • Devices that capture images for viewing purposes, such as digital cameras and portable devices with camera functions. Devices used for traffic purposes, such as on-board sensors that photograph the front, rear, surroundings, and interior of a vehicle for safe driving such as automatic stopping, and for recognizing the driver's condition; surveillance cameras that monitor moving vehicles and roads; and distance measuring sensors that measure the distance between vehicles. A device used in home appliances such as TVs, refrigerators, and air conditioners to capture user gestures and perform device operations according to those gestures. • Devices used for medical and healthcare purposes, such as endoscopes and devices that perform angiography using infrared light reception. • Security devices such as surveillance cameras for crime prevention and cameras for person recognition. • Devices used for cosmetic purposes, such as skin measuring devices for photographing skin and microscopes for photographing the scalp. • Action cameras, wearable cameras, and other devices used for sports purposes. • Cameras and other devices used for agricultural purposes to monitor the condition of fields and crops.

[0094] <Examples of configuration combinations> Furthermore, this technology can also be configured as follows. (1) A pixel having a global drive portion that drives at the same timing across all rows, and a rolling drive portion that drives at row-by-row timing, A pixel array region in which multiple pixels are arranged in an array, A global drive circuit that supplies drive signals to the global drive section, A rolling drive circuit that supplies a drive signal to the aforementioned rolling drive unit, Equipped with, The global drive circuit is positioned on at least three of the four sides surrounding the pixel array region. Solid-state image sensor. (2) The four global drive circuits are arranged along the left and right edges and the top and bottom edges of the pixel array region. The solid-state image sensor described in (1) above. (3) It is a stacked structure in which at least two chips are stacked on top of each other. A solid-state image sensor as described in (1) or (2) above. (4) The pixel is configured to span across an upper chip on which the global drive portion and the rolling drive circuit are provided, and a lower chip on which the rolling drive circuit is provided. The solid-state image sensor described in (3) above. (5) The global drive circuit is arranged in the peripheral region of the pixel array area on the upper chip, and the rolling drive circuit is arranged in the peripheral region of the pixel array area on the lower chip. The solid-state image sensor described in (4) above. (6) The rolling drive circuit is arranged in the peripheral region of the pixel array area on the upper chip, and the global drive circuit is arranged in the peripheral region of the pixel array area on the lower chip. The solid-state image sensor described in (4) above. (7) The global drive circuit is configured to span the upper chip and the lower chip. A solid-state image sensor as described in any of (4) to (6) above. (8) The N-type transistors constituting the global drive circuit are arranged on the upper chip. The P-type transistors that constitute the global drive circuit are arranged on the lower chip. The solid-state image sensor described in (7) above. (9) The global drive portion comprises a photodiode, an output transistor, and a transfer transistor that constitute the pixel. The rolling drive portion includes a readout transistor and a selection transistor that constitute the pixel. A solid-state image sensor as described in any of (1) through (8) above. (10) The aforementioned pixel has a comparator and a counter for performing A / D conversion on the analog pixel signal and outputting a digital pixel signal. The global drive portion comprises a photodiode, an output transistor, and a transfer transistor that constitute the pixel. The rolling drive portion has a latch that constitutes the pixel. A solid-state image sensor as described in any of (1) through (9) above. (11) A pixel having a global drive portion that drives at the same timing across all rows, and a rolling drive portion that drives at row-by-row timing, A pixel array region in which multiple pixels are arranged in an array, A global drive circuit that supplies drive signals to the global drive section, A rolling drive circuit that supplies a drive signal to the aforementioned rolling drive unit, It has, The global drive circuit is positioned on at least three of the four sides surrounding the pixel array region. An electronic device equipped with a solid-state image sensor.

[0095] It should be noted that this embodiment is not limited to the embodiment described above, and various modifications are possible without departing from the spirit of this disclosure. Furthermore, the effects described herein are merely illustrative and not limiting, and other effects may also exist. [Explanation of Symbols]

[0096] 11 Image sensor, 12 Chip, 12a Upper chip, 12b Lower chip, 21a and 21b Pixel array area, 22 Global drive circuit, 23 Wiring, 24 Power pad, 25 Rolling drive circuit, 26 Load MOS area, 27 AD conversion section, 28 Horizontal transfer circuit, 31 Pixel, 31a Upper pixel, 31b Lower pixel, 41 and 42 Amplifier, 51 Photodiode, 52 Ejection transistor, 53 Transfer transistor, 54 Memory, 55 Readout transistor, 56 FD section, 57 Amplifier transistor, 58 Selection transistor, 59 Reset transistor, 61 Constant current source, 71a N-type transistor, 71b P-type transistor, 81 Comparator, 82 Counter, 83 Latch

Claims

1. A pixel having a global drive portion that drives at the same timing across all rows, and a rolling drive portion that drives at row-by-row timing, A pixel array region in which multiple pixels are arranged in an array, A global drive circuit that supplies drive signals to the global drive section, A rolling drive circuit that supplies a drive signal to the aforementioned rolling drive unit, Equipped with, The global drive circuit is arranged on at least three of the four sides surrounding the pixel array region and is located near the power pad. Power lines for supplying power to the global drive circuit from the power pads located at the four corners of the pixel array area are arranged along the four sides surrounding the pixel array area. Solid-state image sensor.

2. The four global drive circuits are arranged along the left and right edges and the top and bottom edges of the pixel array region. The solid-state image sensor according to claim 1.

3. It is a stacked structure in which at least two chips are stacked on top of each other. The solid-state image sensor according to claim 1.

4. The pixel is configured to span across an upper chip on which the global drive portion and the rolling drive portion are provided, and a lower chip on which the rolling drive portion is provided. The solid-state image sensor according to claim 3.

5. The global drive circuit is arranged in the peripheral region of the pixel array area on the upper chip, and the rolling drive circuit is arranged in the peripheral region of the pixel array area on the lower chip. The solid-state image sensor according to claim 4.

6. The rolling drive circuit is arranged in the peripheral region of the pixel array area on the upper chip, and the global drive circuit is arranged in the peripheral region of the pixel array area on the lower chip. The solid-state image sensor according to claim 4.

7. The global drive circuit is configured to span the upper chip and the lower chip. The solid-state image sensor according to claim 4.

8. The N-type transistors constituting the global drive circuit are arranged on the upper chip. The P-type transistors constituting the global drive circuit are arranged on the lower chip. The solid-state image sensor according to claim 7.

9. The global drive portion comprises a photodiode, an output transistor, and a transfer transistor that constitute the pixel. The rolling drive portion includes a readout transistor and a selection transistor that constitute the pixel. The solid-state image sensor according to claim 1.

10. The aforementioned pixel has a comparator and a counter for performing A / D conversion on an analog pixel signal and outputting a digital pixel signal. The global drive portion comprises a photodiode, an output transistor, and a transfer transistor that constitute the pixel. The rolling drive portion has a latch that constitutes the pixel. The solid-state image sensor according to claim 1.

11. A pixel having a global drive portion that drives at the same timing across all rows, and a rolling drive portion that drives at row-by-row timing, A pixel array region in which multiple pixels are arranged in an array, A global drive circuit that supplies drive signals to the global drive section, A rolling drive circuit that supplies a drive signal to the aforementioned rolling drive unit, It has, The global drive circuit is arranged on at least three of the four sides surrounding the pixel array region and is located near the power pad. Power lines for supplying power to the global drive circuit from the power pads located at the four corners of the pixel array area are arranged along the four sides surrounding the pixel array area. An electronic device equipped with a solid-state image sensor.

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