Semiconductor equipment
The semiconductor device addresses the issue of heat dissipation material displacement by allowing independent thermal expansion of the insulating substrate and base plate, ensuring consistent heat dissipation performance, especially with wide bandgap semiconductors.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-01-05
- Publication Date
- 2026-04-03
AI Technical Summary
Existing semiconductor devices experience a decrease in heat dissipation performance due to the pumping out of heat dissipation materials caused by the difference in thermal expansion rates between the insulating substrate and the base plate, especially when using wide bandgap semiconductors that operate at higher temperatures.
The semiconductor device design includes an insulating substrate and base plate that are not fixed together, allowing for independent thermal expansion, thereby preventing the protrusion of the base plate towards the heat sink and minimizing the displacement of heat dissipation materials, which is further enhanced by incorporating gaps or grooves to prevent contact and maintain thermal contact.
This design effectively suppresses the pumping out of heat dissipation materials, maintaining optimal heat dissipation performance even under temperature fluctuations, particularly when using wide bandgap semiconductors.
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Abstract
Description
Technical Field
[0001] This disclosure relates to a semiconductor device.
Background Art
[0002] In Patent Document 1, there is disclosed a semiconductor device including an insulating substrate having a semiconductor element mounted on one surface thereof, and a heat sink having a plate shape and having one surface thermally joined to the other surface of the insulating substrate via a buffer material.
Prior Art Documents
Patent Documents
[0003] [[ID=Not present , The first heat dissipation material is grease. It is a semiconductor device.
Effect of the Invention
[0007] According to the present disclosure, a semiconductor device capable of suppressing pumping out of a heat dissipation material and thereby suppressing a decrease in heat dissipation performance is provided.
Brief Description of the Drawings
[0008] [Figure 1] It is a cross-sectional view of the semiconductor device of Embodiment 1. [Figure 2] It is a cross-sectional view of the semiconductor device of the comparative example. [Figure 3] It is a cross-sectional view of the semiconductor device of the comparative example. [Figure 4] It is a cross-sectional view of the semiconductor device of Embodiment 2. [Figure 5] It is a cross-sectional view of the semiconductor device of Embodiment 3. [Figure 6] It is a diagram showing the manufacturing process of the semiconductor device of Embodiment 3.
Modes for Carrying Out the Invention
[0009] <A. Embodiment 1> <A-1. Configuration> FIG. 1 is a diagram showing a semiconductor device 100a of Embodiment 1.
[0010] The semiconductor device 100a is a semiconductor device for power.
[0011] The semiconductor device 100a includes a semiconductor chip 1a, a semiconductor chip 1b, solder 2, a signal terminal 3, a main terminal 4, a case 5, a lid 6, wires 7, wires 8, a sealing material 9, an adhesive 10, an insulating substrate 13, a heat dissipation material 14, and a base plate 15.
[0012] The insulating substrate 13 includes an insulating layer 11 and a conductor pattern 12a provided on the upper surface of the insulating layer 11.
[0013] The material of the insulating layer 11 is, for example, ceramic or resin.
[0014] The conductor pattern 12a is a pattern formed of, for example, copper, a copper alloy, aluminum, or an aluminum alloy.
[0015] The semiconductor chips 1a and 1b are joined to the conductor pattern 12a by solder 2.
[0016] The semiconductor chips 1a and 1b are disposed in the case 5 and sealed by the sealing material 9.
[0017] The case 5 is, for example, a resin case. The material of the case 5 is, for example, PPS (Poly Phenylene Sulfide Resin).
[0018] The sealing material 9 is, for example, a gel. The gel is, for example, a silicone gel.
[0019] A lid 6 is attached to the case 5.
[0020] The case 5 is adhered to the insulating substrate 13 by an adhesive 10.
[0021] A signal terminal 3 and a main terminal 4 are attached to the case 5. The main terminal 4 is a terminal for power. Only one main terminal 4 is shown in the cross section shown in FIG. 1, but a plurality of main terminals 4 are attached to the case 5.
[0022] The semiconductor chip 1a is, for example, a diode, and the semiconductor chip 1b is, for example, an IGBT (Insulated Gate Bipolar Transistor). The semiconductor chip 1b may also be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Instead of having a diode semiconductor chip 1a and an IGBT semiconductor chip 1b, the semiconductor device 100a may also have an RC-IGBT (Reverse-Conducting IGBT). The semiconductor chips 1a and 1b are, for example, semiconductor chips using Si semiconductor, SiC semiconductor, or GaN semiconductor.
[0023] The main terminal 4 shown in Figure 1 is connected to the upper surfaces of semiconductor chips 1a and 1b by wire 7. Another main terminal 4, different from the one shown in Figure 1, is connected to a conductor pattern 12a in a different cross-section than that shown in Figure 1. The signal terminal 3 is connected to semiconductor chip 1b. The semiconductor chip 1b controls the current flowing between the main terminals 4 based on a signal input from outside the semiconductor device 100a via the signal terminal 3.
[0024] The lower surface of the insulating layer 11, that is, the lower surface of the insulating substrate 13, is in contact with the base plate 15 via a heat dissipation material 14. The base plate 15 is a metal plate. The base plate 15 is, for example, a plate of copper, a copper alloy, aluminum, or an aluminum alloy. The heat dissipation material 14 is, for example, grease or a heat dissipation sheet.
[0025] For example, the entire lower surface of the insulating substrate 13 is in contact with the base plate 15 via the heat dissipation material 14.
[0026] If the heat dissipation material 14 is a heat dissipation sheet, the heat dissipation sheet is not bonded to at least one of the insulating substrate 13 and the base plate 15.
[0027] In Figure 1, the semiconductor device 100a is attached to the heat sink 17 by screws 18. The lower surface of the base plate 15 is in contact with the heat sink 17 via a heat dissipation material 16. Heat generated by the semiconductor chip 1a or semiconductor chip 1b is transferred to the heat sink 17 through, for example, the solder 2, the conductor pattern 12a, the insulating layer 11, the heat dissipation material 14, the base plate 15, and the heat dissipation material 16. The material of the heat sink 17 is, for example, copper, copper alloy, aluminum, or aluminum alloy. The heat sink 17 may be provided with fins. The semiconductor device of this embodiment may include the heat dissipation material 16 and the heat sink 17 in addition to the semiconductor device 100a.
[0028] The heat dissipation material 16 is, for example, grease or a heat dissipation sheet. The heat dissipation material 16 may also be conductive. By having conductivity in the heat dissipation material 16, the potential of the base plate 15 can be made equal to that of the heat sink 17, and discharge between the base plate 15 and the heat sink 17 can be suppressed.
[0029] The semiconductor device 100a is attached to the heat sink 17 by screws 18, and the base plate 15 is supported by being sandwiched between the case 5 and the heat sink 17 from above and below.
[0030] The insulating substrate 13 and the base plate 15 are not fixed to each other. This means that when the base plate 15 expands due to thermal expansion during the operation of the semiconductor device 100a, a change in the relative in-plane position between the lower surface of the insulating substrate 13 and the upper surface of the base plate 15 is possible. The base plate 15 is in contact with the lower surface of the case 5 via the heat dissipation material 14. The base plate 15 is not fixed to the case 5. This means that when the base plate 15 expands due to thermal expansion during the operation of the semiconductor device 100a, a change in the relative in-plane position between the lower surface of the case 5 and the upper surface of the base plate 15 is possible.
[0031] Figure 2 shows a comparative example semiconductor device 100z. Compared to semiconductor device 100a, semiconductor device 100z includes an insulating substrate 130 instead of insulating substrate 13. The insulating substrate 130 includes a conductor pattern 12a provided on the upper surface of the insulating layer 11 and a conductor pattern 12b provided on the lower surface of the insulating layer 11. In addition, in semiconductor device 100z, the conductor pattern 12b of the insulating substrate 130 and the base plate 15 are fixed by solder 140. Except for these points, semiconductor device 100z is the same as semiconductor device 100a.
[0032] In the semiconductor device 100z, the insulating substrate 130 and the base plate 15 are fixed together. The coefficient of linear expansion of the base plate 15 is greater than that of the insulating layer 11. Therefore, when the temperature of the semiconductor device 100z rises, the difference in expansion rates between the insulating substrate 13 and the base plate 15 causes the base plate 15 to deform and protrude toward the heat sink 17. Figure 2 shows the semiconductor device 100z in this situation. This deformation of the base plate 15 causes pumping out of the heat dissipation material 16 between the semiconductor device 100z and the heat sink 17. The portion 160 of the heat dissipation material 16 that is pushed out by the deformation of the base plate 15 does not return to its original shape when the temperature of the semiconductor device 100z drops, creating a gap 20 between the semiconductor device 100z and the heat sink 17, which hinders heat dissipation (see Figure 3).
[0033] On the other hand, in the semiconductor device 100a of this embodiment, since the insulating substrate 13 and the base plate 15 are not fixed together, even if the temperature of the semiconductor device 100a rises, the base plate 15 does not, or is unlikely to, protrude toward the heat sink 17. Therefore, the effect of the difference between the expansion rate of the insulating substrate 13 and the expansion rate of the base plate 15 is suppressed, and pumping out of the heat dissipation material 16 is suppressed. This suppresses a decrease in heat dissipation performance.
[0034] The semiconductor device 100a may include an insulating substrate 130 instead of the insulating substrate 13. In that case, the lower surface of the insulating substrate 130, that is, the lower surface of the conductor pattern 12b provided on the lower surface of the insulating layer 11, contacts the base plate 15 via the heat dissipation material 14. Also in this case, since the insulating substrate 130 and the base plate 15 are not fixed to each other, even if the temperature of the semiconductor device 100a rises, the base plate 15 does not bulge or is less likely to bulge toward the radiator 17. Therefore, the influence of the difference in the expansion rate between the insulating substrate 130 and the base plate 15 is suppressed, and the pumping out of the heat dissipation material 16 is suppressed. In order to suppress the insulating substrate 130 from bulging downward and the pumping out of the heat dissipation material 14 due to the difference in the linear expansion rate between the conductor pattern 12b and the insulating layer 11 when the temperature of the semiconductor device 100a rises, the thickness of the conductor pattern 12b is preferably equal to or less than the thickness of the conductor pattern 12a.
[0035] Since a semiconductor chip using a wide bandgap semiconductor operates at a higher temperature than a semiconductor chip using silicon, in the semiconductor device 100z of the comparative example, pumping out is more likely to occur when at least one of the semiconductor chips 1a or 1b is a semiconductor chip using a wide bandgap semiconductor. In the semiconductor device 100a of the present embodiment, since the insulating substrate 13 or 130 and the base plate 15 are not fixed to each other, even if at least one of the semiconductor chips 1a or 1b is a semiconductor chip using a wide bandgap semiconductor, pumping out can be suppressed, thereby suppressing a decrease in heat dissipation performance. Here, the wide bandgap semiconductor is a semiconductor having a larger bandgap than a silicon semiconductor, and is, for example, a SiC semiconductor or a GaN semiconductor.
[0036] <B. Embodiment 2> FIG. 4 is a diagram showing the semiconductor device 100b of Embodiment 2.
[0037] Compared to the semiconductor device 100a of Embodiment 1, the semiconductor device 100b differs in that the base plate 15 is surrounded by the case 5 in a plan view, and the inner side surface 50 of the case 5 faces the side surface 150 of the base plate 15. In other respects, the semiconductor device 100b is the same as the semiconductor device 100a of Embodiment 1.
[0038] The base plate 15 is smaller than the case 5 in plan view. There is an in-plane gap between the inner side surface 50 of the case 5 and the side surface 150 of the base plate 15. This in-plane gap between the inner side surface 50 of the case 5 and the side surface 150 of the base plate 15 prevents contact between the base plate 15 and the case 5, or reduces the force applied to the case 5 and the base plate 15 when they come into contact, even if the temperature of the base plate 15 rises and it expands during the operation of the semiconductor device 100b.
[0039] If the temperature rise of the base plate 15 is 125K, and the base plate 15 is a copper plate, then the coefficient of linear expansion of copper is 16.8 × 10⁻⁶. ‐6 Since it's / K, the base plate 15 is 100% × 16.8 × 10 ‐6 / K × 125K = 0.21% expansion. Between the inner side surface 50 of case 5 and the side surface 150 of base plate 15, there should be a gap of at least 0.13% of the width W0 of base plate 15 in the X direction in one direction within the plane, namely in the X direction (see Figure 4) and in the opposite direction to the X direction. In other words, the size of gaps W1 and W2 should be at least 0.13% of the width W0. The same applies to the Y direction within the plane perpendicular to the X direction. In other words, between the inner side surface 50 of case 5 and the side surface 150 of base plate 15, there should be a gap of at least 0.13% of the width of base plate 15 in the Y direction in the plane perpendicular to the X direction. With this configuration, even if the temperature of base plate 15 rises by 125K, contact between base plate 15 and case 5 can be avoided, or the force applied to case 5 and base plate 15 when base plate 15 and case 5 come into contact can be suppressed.
[0040] The size of a general semiconductor module is 150 mm or less. When the size of the base plate 15 in plan view is 150 mm or less and the temperature rise of the base plate 15 is 125 K, if the base plate 15 is a copper plate, since the linear expansion coefficient of copper is 16.8×10 ‐6 / K, the base plate 15 expands by 16.8×10 ‐6 / K × 125 K × 150 mm = 0.315 mm due to the temperature rise. There should be a gap of 0.2 mm or more in the in-plane direction in the X direction, which is one direction in the plane, and the opposite direction of the X direction, between the inner side surface 50 of the case 5 and the side surface 150 of the base plate 15, and a gap of 0.2 mm or more in the in-plane direction in the Y direction, which is orthogonal to the X direction, and the opposite direction of the Y direction. With such a configuration, even if the temperature of the base plate 15 rises by 125 K, contact between the base plate 15 and the case 5 can be avoided, or the force applied to the case 5 and the base plate 15 when they come into contact can be suppressed.
[0041] The semiconductor device of the present embodiment may include a heat dissipation material 16 and a radiator 17 in addition to the semiconductor device 100b.
[0042] <C. Embodiment 3> FIG. 5 is a diagram showing a semiconductor device 100c of Embodiment 3. In the semiconductor device 100c, a groove 151 extending along the outer periphery of the base plate 15 is provided on the side surface 150 of the base plate 15. The groove 151 may be provided on the entire outer periphery of the side surface 150 of the base plate 15 or on a part of the outer periphery. The case 5 includes a protrusion 51. The protrusion 51 is provided on a portion of the inner side surface 50 of the case 5 that faces the side surface 150 of the base plate 15. The protrusion is at least partially inserted into the groove 151. The semiconductor device 100c is the same as the semiconductor device 100b of Embodiment 2 except for these points.
[0043] Case 5, as shown in Figure 6, comprises, for example, a main body 5a and a side cover 5b. When manufacturing the semiconductor device 100c, the base plate 15 is attached to the main body 5a of case 5 by sliding it in from the side, as shown by the arrow in Figure 6, and then the side cover 5b is attached to the side of the main body 5a with screws or adhesive. The base plate 15 is attached to the main body 5a of case 5, for example, as shown in Figure 6, after the insulating substrate 13 is bonded to case 5 with adhesive 10 and a heat dissipation material 14 is placed on its upper surface.
[0044] To prevent the base plate 15 from coming into contact with the projection 51 when the base plate 15 expands, it is preferable that the tip of the projection 51 does not reach the bottom of the groove 151, and that there is a gap between the tip of the projection 51 and the bottom of the groove 151 in the in-plane direction.
[0045] As shown in Figure 5, the projection 51 and the groove 151 are not engaged, and there is a gap between the surface of the projection 51 and the groove 151. The projection 51 and the groove 151 may be engaged. In that case, the degree of engagement between the projection 51 and the groove 151 is preferably such that it does not hinder the attachment of the base plate 15 to the main body 5a by sliding it from the side as shown in Figure 6.
[0046] The projection 51 enters the groove 151 at least partially, thereby integrating the base plate 15 and the case 5. This integration of the base plate 15 and the case 5 prevents the base plate 15, the insulating substrate 13, and the semiconductor chips 1a and 1b from falling out of the case 5. Therefore, even if the semiconductor device 100c has multiple insulating substrates 13, the semiconductor device 100c is easy to handle.
[0047] The semiconductor device of this embodiment may include a heat dissipation material 16 and a heat sink 17 in addition to the semiconductor device 100c.
[0048] Furthermore, it is possible to freely combine each embodiment, or to modify or omit each embodiment as appropriate. [Explanation of symbols]
[0049] 1a,1b Semiconductor chip, 2 Solder, 3 Signal terminal, 4 Main terminal, 5 Case, 5a Main body, 5b Side cover, 6 Cover, 7,8 Wire, 9 Encapsulating material, 10 Adhesive, 11 Insulating layer, 12a,12b Conductor pattern, 13 Insulating substrate, 14,16 Heat dissipation material, 15 Base plate, 17 Heat sink, 18 Screw, 20 Gap, 50 Inner side, 51 Protrusion, 100a,100b,100c,100d Semiconductor device, 130 Insulating substrate, 140 Solder, 150 Side, 151 Groove.
Claims
1. Insulating substrate and Semiconductor chips and Base plate and First heat dissipation material, The case and, Equipped with, The semiconductor chip and the sealing material that seals the semiconductor chip are housed in the case. The insulating substrate comprises an insulating layer and a conductor pattern provided on the upper surface of the insulating layer. The semiconductor chip is bonded to the conductor pattern by a bonding material. The lower surface of the insulating substrate and the upper surface of the base plate are in contact via the first heat dissipation material. The insulating substrate and the base plate are not fixed to each other. The first heat dissipation material is grease. Semiconductor equipment.
2. A semiconductor device according to claim 1, The lower surface of the insulating substrate is the lower surface of the insulating layer. Semiconductor equipment.
3. A semiconductor device according to claim 1 or 2, The inner side of the case is opposite the side of the base plate. There is a gap in the in-plane direction between the inner side surface of the case and the side surface of the base plate. Semiconductor equipment.
4. A semiconductor device according to claim 3, Between the inner side surface of the case and the side surface of the base plate, there is a gap of 0.2 mm or more in the in-plane direction on one side and the opposite side of that direction. Semiconductor equipment.
5. A semiconductor device according to claim 4, Between the inner side surface of the case and the side surface of the base plate, there is a gap of 0.2 mm or more in the in-plane direction on the other side of the plane perpendicular to the one direction and on the opposite side of the other direction. Semiconductor equipment.
6. A semiconductor device according to claim 3, Between the inner side surface of the case and the side surface of the base plate, there is a gap of 0.13% or more of the width of the base plate in that direction, with respect to the in-plane direction, on one side in the plane and on the opposite side in the plane. Semiconductor equipment.
7. A semiconductor device according to claim 6, Between the inner side surface of the case and the side surface of the base plate, there is a gap of 0.13% or more of the width of the base plate in the other direction in the plane perpendicular to the one direction, on the other direction side and the opposite direction side of the other direction, with respect to the in-plane direction. Semiconductor equipment.
8. A semiconductor device according to any one of claims 3 to 7, The side surface of the base plate is provided with a groove that extends along the outer circumference of the base plate. A projection is provided on the portion of the inner side surface of the case that faces the side surface of the base plate. The projection is at least partially inserted into the groove. Semiconductor equipment.
9. A semiconductor device according to any one of claims 1 to 8, The aforementioned sealing material is a gel. Semiconductor equipment.
10. A semiconductor device according to any one of claims 1 to 9, Further comprising a second heat dissipation material and a heat sink, The lower surface of the base plate is in contact with the heat sink via the second heat dissipation material. Semiconductor equipment.
11. A semiconductor device according to claim 10, The second heat dissipation material is grease or a heat dissipation sheet. Semiconductor equipment.
12. A semiconductor device according to claim 10 or 11, The aforementioned second heat dissipation material is conductive. Semiconductor equipment.
Citation Information
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