High-frequency semiconductor package

Abstract

A ground terminal (11b), first to third ground patterns (11a, 21a, 21b), first and second ground via holes (12b, 22), and a third connection member (25) constitute an electromagnetic shield structure that surrounds a signal terminal (14b), first and second signal patterns (14a, 24), a first signal via hole (12a), a semiconductor chip (103), and first and second connection members (26a, 26b).

Description

Technical Field

[0001] The present disclosure relates to a high-frequency semiconductor package having an electromagnetic shield.

Background Art

[0002] In recent years, in electronic devices, with the requirements for miniaturization and high functionality, high-density mounting of board-mounted components has been demanded. Regarding the radio front-end parts of communication devices such as smartphones, mobile phone base stations, and radar devices, electromagnetic interference between high-frequency devices becomes a particular problem due to high-density mounting. For this reason, a plurality of structures having an electromagnetic shield for a single high-frequency device have been proposed. Specifically, a structure has been proposed in which a metal film is formed on the outside of the encapsulation resin of the package, and an electromagnetic shield is formed by electrically connecting the metal film and the ground wiring of the package (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, special processes such as sputtering, vapor deposition, and plating are required to form a metal film on the outside of the encapsulation resin. For this reason, there is a problem that the manufacturing cost becomes higher than that of a normal resin-encapsulated package. In addition, there is a problem that the connection area between the metal film and the ground wiring of the package is small and the mechanical reliability is low.

[0005] The present disclosure has been made to solve the above-described problems, and an object thereof is to obtain a semiconductor device capable of reducing the manufacturing cost and improving the mechanical reliability.

Means for Solving the Problems

[0006] The high-frequency semiconductor package according to this disclosure comprises: a first substrate; a signal terminal and a ground terminal provided on the lower surface of the first substrate; a first signal pattern and a first ground pattern provided on the upper surface of the first substrate; a first substrate having a signal via hole that penetrates the first substrate and electrically connects the signal terminal and the first signal pattern; a first ground via hole that penetrates the first substrate and electrically connects the ground terminal and the first ground pattern; a semiconductor chip mounted on the upper surface of the first substrate; a second substrate; a second signal pattern and a second ground pattern provided on the lower surface of the second substrate; a third ground pattern provided on the entire upper surface of the second substrate; and a second ground pattern that penetrates the second substrate. The semiconductor chip comprises a second substrate having a second ground via hole for electrically connecting the third ground pattern, a first connecting member for connecting the signal pads of the semiconductor chip to the second signal pattern, a second connecting member for connecting the second signal pattern to the first signal pattern, a third connecting member for connecting the first ground pattern to the second ground pattern, and a sealing resin for sealing the second substrate, the semiconductor chip, and the first to third connecting members, wherein the ground terminal, the first to third ground patterns, the first and second ground via holes, and the third connecting member constitute an electromagnetic shielding structure that covers the periphery of the signal terminal, the first and second signal patterns, the first signal via hole, the semiconductor chip, and the first and second connecting members. The second signal pattern has a third signal pattern electrically connected to the signal pad of the semiconductor chip by the first connecting member, and a fourth signal pattern electrically connected to the first signal pattern by the second connecting member; the second substrate has a harmonic processing filter provided in the inner layer of the second substrate, a second signal via hole electrically connecting the third signal pattern and the harmonic processing filter, and a third signal via hole electrically connecting the fourth signal pattern and the harmonic processing filter; the semiconductor chip is a semiconductor high-frequency amplifier, and the harmonic processing filter is connected to the output side of the semiconductor high-frequency amplifier. It is characterized by the following:

[0007] Other high-frequency semiconductor packages according to this disclosure include: a first substrate having a first substrate, a signal terminal and a ground terminal provided on the lower surface of the first substrate, a first signal pattern and a first ground pattern provided on the upper surface of the first substrate, a first signal via hole penetrating the first substrate and electrically connecting the signal terminal and the first signal pattern, a first ground via hole penetrating the first substrate and electrically connecting the ground terminal and the first ground pattern, a semiconductor chip mounted on the upper surface of the first substrate, a second substrate, a second signal pattern and a second ground pattern provided on the lower surface of the second substrate, a third ground pattern provided on the entire upper surface of the second substrate, and a second ground via hole penetrating the second substrate and electrically connecting the second ground pattern and the third ground pattern. The semiconductor chip comprises a second substrate having ear holes, a first connecting member connecting the signal pads of the semiconductor chip to the second signal pattern, a second connecting member connecting the second signal pattern to the first signal pattern, and a third connecting member connecting the first ground pattern to the second ground pattern, wherein the ground terminal, the first to third ground patterns, the first and second ground via holes and the third connecting member constitute an electromagnetic shielding structure covering the periphery of the signal terminal, the first and second signal patterns, the first signal via hole, the semiconductor chip, and the first and second connecting members, a cavity is provided on the upper surface side of the first substrate, the upper surface of the ground terminal is exposed in the cavity, and the semiconductor chip is mounted on the upper surface of the ground terminal inside the cavity. [Effects of the Invention]

[0008] In the high-frequency semiconductor package according to this disclosure, the ground patterns and ground via holes of the first and second substrates surround the semiconductor chip and other components, forming an electromagnetic shielding structure. This allows for the formation of an electromagnetic shield using a standard resin-encapsulated package manufacturing method without the need for special processes such as vapor deposition, sputtering, or plating, thereby reducing the manufacturing cost of the electromagnetically shielded high-frequency semiconductor package. Furthermore, the ground patterns and ground via holes, excluding the ground terminal mounted on the master substrate, are located inside the encapsulating resin. Therefore, since the electromagnetic shielding structure is not exposed to the outside of the encapsulating resin, mechanical reliability can be improved.

[0009] In other high-frequency semiconductor packages related to this disclosure, the ground patterns and ground via holes of the first and second substrates surround the semiconductor chip and other components to form an electromagnetic shielding structure. This allows for the formation of an electromagnetic shield using a normal package manufacturing method without the need for special processes such as deposition, sputtering, or plating, thereby reducing the manufacturing cost of high-frequency semiconductor packages with electromagnetic shielding. Furthermore, the ground patterns and ground via holes, excluding the ground terminal mounted on the master substrate, are located inside the package. Therefore, since the electromagnetic shielding structure is not exposed to the outside of the package, mechanical reliability can be improved. In addition, the elimination of the molding process contributes to cost reduction. Moreover, the housing of the semiconductor chip within the cavity contributes to a lower package profile. [Brief explanation of the drawing]

[0010] [Figure 1] This is a bottom view showing the mounting surface of the high-frequency semiconductor package according to Embodiment 1. [Figure 2] This is a cross-sectional view along line I-II in Figure 1. [Figure 3] This is a bottom view showing the second substrate of the high-frequency semiconductor package according to Embodiment 1. [Figure 4] This is a top view showing the first substrate of a high-frequency semiconductor package according to Embodiment 1. [Figure 5]This is an enlarged cross-sectional view of the main part of the high-frequency semiconductor package according to Embodiment 2. [Figure 6] This is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 3. [Figure 7] This is a plan view showing the inner layer of the second substrate according to Embodiment 3. [Figure 8] This is an enlarged cross-sectional view of the main part of the high-frequency semiconductor package according to Embodiment 4. [Figure 9] This is an enlarged plan view of the main part of the mounting surface of the second substrate of the high-frequency semiconductor package according to Embodiment 4. [Figure 10] This is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 5. [Modes for carrying out the invention]

[0011] A high-frequency semiconductor package according to an embodiment will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repetition of the description may be omitted.

[0012] Embodiment 1. Figure 1 is a bottom view showing the mounting surface of a high-frequency semiconductor package according to Embodiment 1. Figure 2 is a cross-sectional view along line I-II in Figure 1. The high-frequency semiconductor package comprises a first substrate 10, a second substrate 20, a semiconductor chip 103, and a sealing resin 101.

[0013] In the first substrate 10, a ground pattern 11a and a signal pattern 14a are provided on the upper surface of the first base material 13. A ground terminal 11b and a signal terminal 14b are provided on the lower surface of the first base material 13. The signal pattern 14a and the signal terminal 14b are electrically connected by a signal via hole 12a penetrating the first base material 13. The ground pattern 11a and the ground terminal 11b are electrically connected by a ground via hole 12b penetrating the first base material 13. An opening is provided at the center of the first base material 13 in a plan view. A heat sink 15 is press-fitted into the opening of the first base material 13. The upper surface of the heat sink 15 is exposed on the upper surface of the first base material 13. The lower surface of the heat sink 15 is exposed on the lower surface of the first base material 13.

[0014] In the second substrate 20, a ground pattern 21a and a signal pattern 24 are provided on the lower surface of the second base material 23. The entire upper surface of the second base material 23 is covered with a ground pattern 21b. The ground pattern 21a and the ground pattern 21b are electrically connected by a ground via hole 22 penetrating the second base material 23. A ground metal pillar 25 is formed on the ground pattern 21a, and signal metal pillars 26a and 26b are formed on the signal pattern 24. Solder 102 is plated on the tips of the ground metal pillar 25 and the signal metal pillars 26a and 26b.

[0015] The second substrate 20 is flip-chip mounted on the first substrate 10. By this flip-chip mounting, the signal metal pillar 26a is connected to the signal pad 103a formed on the upper surface of the semiconductor chip 103 by solder 102. Also, the signal metal pillar 26b is connected to the signal pattern 14a of the first substrate 10 by solder 102. Thereby, the signal pad 103a is electrically connected to the signal terminal 14b via the signal metal pillar 26a, the signal pattern 24 of the second substrate 20, the signal metal pillar 26b, the signal pattern 14a of the first substrate 10, and the signal via hole 12a. As a result, the semiconductor chip 103 can exchange signals with the outside.

[0016] Also, by flip-chip implementation, the ground metal pillar 25 is electrically connected to the ground pattern 11a by solder 102. As a result, the ground pattern 21b, via hole 22, and ground pattern 21a of the second substrate 20, the ground metal pillar 25, and the ground pattern 11a, ground via hole 12b, and ground terminal 11b of the first substrate 10 are electrically connected. Consequently, the potentials of the ground of the first substrate 10 and the ground of the second substrate 20 become common. This common ground of the first substrate 10 and the second substrate 20 covers the periphery of the semiconductor chip 103, signal metal pillars 26a, 26b, signal patterns 14a, 24, signal via hole 12a, and signal terminal 14b, forming an electromagnetic shielding structure against interference.

[0017] FIG. 3 is a bottom view showing the second substrate of the high-frequency semiconductor package according to Embodiment 1. The ground via hole 22 and the ground metal pillar 25 are each arranged in a ring shape at the peripheral portion of the second substrate 20. The signal pattern 24 and the signal metal pillar 26 are arranged inside the ring formed by the ground via hole 22 and the ground metal pillar 25.

[0018] FIG. 4 is a top view showing the first substrate of the high-frequency semiconductor package according to Embodiment 1. The ground via hole 12b is arranged in a ring shape at the peripheral portion of the first substrate 10. The signal pattern 14a, the signal via hole 12a, and the semiconductor chip 103 are arranged inside the ring formed by the ground via hole 12b.

[0019] As described above, in this embodiment, the ground patterns and ground via holes of the first substrate 10 and the second substrate 20 cover the periphery of the semiconductor chip 103, etc., forming an electromagnetic shielding structure. As a result, the electromagnetic shield can be formed using a normal resin-encapsulated package manufacturing method without using special processes such as vapor deposition, sputtering, or plating, thus reducing the manufacturing cost of a high-frequency semiconductor package with an electromagnetic shield. Furthermore, the ground patterns and ground via holes, excluding the ground terminal 11b mounted on the master substrate, are located inside the encapsulating resin 101. Therefore, since the electromagnetic shielding structure is not exposed to the outside of the encapsulating resin 101, mechanical reliability can be improved.

[0020] In this embodiment, a heatsink 15 is provided assuming that the semiconductor chip 103 generates a large amount of heat. However, if the amount of heat generated by the semiconductor chip 103 is not a problem, a general ground via hole and ground pattern may be provided instead of the heatsink 15.

[0021] Furthermore, by arranging the spacing between adjacent ground via holes 22 to be smaller than half a wavelength λ of the desired frequency, better electromagnetic shielding performance can be ensured at the desired frequency. The same applies to the spacing between adjacent ground via holes 12b and adjacent ground metal pillars 25. Note that the wavelength λ inside a dielectric with relative permittivity εr is proportional to the reciprocal of √(εr) with respect to the wavelength λ in free space.

[0022] Embodiment 2. Figure 5 is an enlarged cross-sectional view of the main part of the high-frequency semiconductor package according to Embodiment 2. Instead of the signal metal pillars 26a, 26b, ground metal pillar 25, and solder 102 of Embodiment 1, signal solder balls 102a, 102b and ground solder ball 102c are used.

[0023] In the flip-chip mounting configuration, the signal solder ball 102a connects the signal pad 103a of the semiconductor chip 103 to the signal pattern 24 of the second substrate 20. The signal solder ball 102b connects the signal pattern 24 of the second substrate 20 to the signal pattern 14a of the first substrate 10. The ground solder ball 102c connects the ground pattern 11a of the first substrate 10 to the ground pattern 21a of the second substrate 20. The other configurations are the same as in Embodiment 1.

[0024] The ground solder ball 102c becomes part of the electromagnetic shielding structure surrounding the semiconductor chip 103, etc. This reduces manufacturing costs and improves mechanical reliability, similar to Embodiment 1. Furthermore, by using the signal solder balls 102a, 102b and the ground solder ball 102c, variations in the height of the semiconductor chip 103 due to the thickness of the die bond material and warping of the substrate can be absorbed. As a result, the mountability of flip-chip mounting is improved.

[0025] Embodiment 3. Figure 6 is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 3. The second substrate 20 is a multilayer substrate, and a harmonic processing filter 27, inner layer signal patterns 28a, 28b, and ground pattern 21c are provided in the inner layer of the second substrate 23. Signal patterns 24a, 24b are provided on the surface of the second substrate 20.

[0026] Signal pattern 24a is electrically connected to the signal pad 103a of the semiconductor chip 103 by a signal metal pillar 26a. Signal pattern 24b is electrically connected to the signal pattern 14a of the first substrate 10 by a signal metal pillar 26b. Signal pattern 24a is electrically connected to the inner layer signal pattern 28a by a signal via hole 22a. Signal pattern 24b is electrically connected to the inner layer signal pattern 28b by a signal via hole 22b. Ground patterns 21a, 21b, and 21c are electrically connected by a ground via hole 22.

[0027] Figure 7 is a plan view showing the inner layer of the second substrate according to Embodiment 3. The inner layer signal patterns 28a and 28b are electrically connected to the harmonic processing filter 27. The ground via holes 22 are arranged in a ring around the periphery of the second substrate 20. The harmonic processing filter 27, signal via holes 22a and 22b, and inner layer signal patterns 24a and 24b are located inside the ring formed by the ground via holes 22. As a result, the common ground of the first substrate 10 and the second substrate 20 covers the periphery of the harmonic processing filter 27, signal via holes 22a and 22b, and inner layer signal patterns 24a and 24b, forming an electromagnetic shielding structure against disturbances.

[0028] The output signal from the semiconductor chip 103 is input to the harmonic processing filter 27 via the signal metal pillar 26a, signal pattern 24a, signal via hole 22a, and inner layer signal pattern 28a. The output of the harmonic processing filter 27 is output to the signal terminal 14b via the inner layer signal pattern 28b, signal via hole 22b, signal pattern 24b, signal metal pillar 26b, signal pattern 14a, and via hole 12b.

[0029] The semiconductor chip 103 is a semiconductor high-frequency amplifier. Generally, semiconductor high-frequency amplifiers generate harmonics such as the second and third harmonics of the operating frequency. To remove these harmonics from the output signal, a harmonic processing filter, such as a low-pass filter or a band-pass filter, is provided on the output side of the semiconductor high-frequency amplifier. The harmonic processing filter is formed by a transmission line pattern, but at high operating frequencies, the transmission line pattern can act as an antenna, receiving electromagnetic interference or, conversely, radiating signals and causing electromagnetic interference to adjacent elements. Therefore, it is necessary to provide electromagnetic shielding against disturbances. As an example of a semiconductor high-frequency amplifier, in a configuration where a high-frequency semiconductor package is mounted on a multilayer motherboard, the harmonic processing filter may be built into the inner layer of the motherboard and surrounded by the motherboard's ground pattern or ground via holes to provide electromagnetic shielding. To provide electromagnetic shielding, it is necessary to cover the surroundings with a ground pattern or ground via holes, which occupies the mounting area of ​​multiple layers of the board and affects the degree of design freedom.

[0030] In contrast, the high-frequency semiconductor package according to this embodiment has a harmonic processing filter 27 with electromagnetic shielding properties provided on the second substrate 23. This eliminates the need to embed the harmonic processing filter in the inner layers of the motherboard substrate, enabling miniaturization of the motherboard and improved design flexibility.

[0031] Embodiment 4. Figure 8 is an enlarged cross-sectional view of the main part of the high-frequency semiconductor package according to Embodiment 4. Figure 9 is an enlarged plan view of the main part of the mounting surface of the second substrate of the high-frequency semiconductor package according to Embodiment 4. The passive component 28 is mounted on the surface of the second substrate 20 and is electrically connected between the signal pattern 24 and the ground pattern 21.

[0032] The passive component 28 is, for example, a capacitor and acts as a bypass capacitor for the semiconductor chip 103. Note that the passive component 28 is not limited to a capacitor; it may also be a resistor or an inductor. Furthermore, the connection of the passive component 28 is not necessarily limited to the connection between the signal pattern 24 and the ground pattern 21.

[0033] The first substrate 10 has a large semiconductor chip 103, signal via holes, and ground via holes, leaving no room to mount the passive components 28. Therefore, it is difficult to mount the passive components 28 on the first substrate 10 while maintaining the original substrate size.

[0034] In contrast, the second substrate 20 offers greater design flexibility, allowing for easy placement of the passive components 28 while maintaining the substrate size. Therefore, in this embodiment, there is no need to mount a bypass capacitor on the first substrate 10, contributing to a smaller package size. Furthermore, since the passive components 28 are surrounded by a common ground between the first substrate 10 and the second substrate 20, they provide electromagnetic shielding against disturbances.

[0035] Embodiment 5. Figure 10 is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 5. A cavity 29 is provided on the upper side of the first substrate 13. The upper surface of the ground terminal 11b, which is located in the center of the lower surface of the first substrate 13, is exposed in the cavity 29. The semiconductor chip 103 is mounted on the upper surface of the ground terminal 11b inside the cavity 29. A signal metal pillar 26a is formed on the signal pad 103a of the semiconductor chip 103. By flip-chip mounting, the signal metal pillar 26a is connected to the signal pattern 24 of the second substrate 20 by solder 102. The signal pattern 24 of the second substrate 20 is connected to the signal pattern 14a of the first substrate 10 by solder 102. In addition, the ground pattern 21a of the second substrate 20 is electrically connected to the ground pattern 11a of the first substrate 10 by solder 102. As a result, the potential of the ground of the first substrate 10 and the ground of the second substrate 20 become common. The common ground of the first substrate 10 and the second substrate 20 covers the semiconductor chip 103, the signal metal pillar 26a, the signal patterns 14a and 24, the signal via hole 12a, and the signal terminal 14b, forming an electromagnetic shielding structure against disturbances. In this embodiment, mold sealing with sealing resin 101 is not performed. The other configurations are the same as in Embodiment 1. Note that the configuration of Embodiment 2-4 may be combined with this embodiment.

[0036] In this embodiment, the ground patterns and ground via holes of the first substrate 10 and the second substrate 20 cover the periphery of the semiconductor chip 103, etc., forming an electromagnetic shielding structure. As a result, the electromagnetic shield can be formed using a normal package manufacturing method without using special processes such as deposition, sputtering, or plating, thus reducing the manufacturing cost of high-frequency semiconductor packages with electromagnetic shielding. Furthermore, the ground patterns and ground via holes, excluding the ground terminal 11b mounted on the master substrate, are located inside the package. Therefore, since the electromagnetic shielding structure is not exposed to the outside of the package, mechanical reliability can be improved. In addition, the elimination of the molding process contributes to cost reduction. Moreover, the housing of the semiconductor chip 103 in the cavity 29 contributes to a lower package profile. [Explanation of Symbols]

[0037] 10 First substrate, 11a Ground pattern (first ground pattern), 11b Ground terminal, 12a Signal via hole (first signal via hole), 12b Ground via hole (first ground via hole), 13 First substrate, 14a Signal pattern (first signal pattern), 14b Signal terminal, 15 Heat sink, 20 Second substrate, 21a Ground pattern (second ground pattern), 21b Ground pattern (third ground pattern), 22 Ground via hole (second ground via hole), 22a Signal via hole (second signal via hole), 22b Signal via hole (third signal via hole), 23 Second substrate, 24 Signal pattern (second signal pattern), 24a Signal pattern (third signal pattern), 24b Signal pattern (fourth signal pattern), 25 Ground metal pillar (third connecting member), 26a Signal metal pillar (first connecting member), 26b Signal metal pillar (second connecting member), 27 Harmonic processing filter, 28 Passive component, 29 Cavity, 101 Encapsulating resin, 102a Signal solder ball (first connecting member), 102b Signal solder ball (second connecting member), 102c Ground solder ball (third connecting member), 103 Semiconductor chip, 103a Signal pad

Claims

1. A first substrate having a first base material, a signal terminal and a ground terminal provided on the lower surface of the first base material, a first signal pattern and a first ground pattern provided on the upper surface of the first base material, a first signal via hole that penetrates the first base material and electrically connects the signal terminal and the first signal pattern, and a first ground via hole that penetrates the first base material and electrically connects the ground terminal and the first ground pattern, A semiconductor chip mounted on the upper surface of the first substrate, A second substrate having a second base material, a second signal pattern and a second ground pattern provided on the lower surface of the second base material, a third ground pattern provided on the entire upper surface of the second base material, and a second ground via hole that penetrates the second base material and electrically connects the second ground pattern and the third ground pattern, A first connecting member that connects the signal pad of the semiconductor chip and the second signal pattern, A second connecting member that connects the second signal pattern and the first signal pattern, A third connecting member that connects the first ground pattern and the second ground pattern, The device comprises the second substrate, the semiconductor chip, and a sealing resin that seals the first to third connecting members. The ground terminal, the first to third ground patterns, the first and second ground via holes, and the third connecting member constitute an electromagnetic shielding structure that covers the signal terminal, the first and second signal patterns, the first signal via hole, the semiconductor chip, and the first and second connecting members. The second signal pattern comprises a third signal pattern electrically connected to the signal pad of the semiconductor chip by the first connecting member, and a fourth signal pattern electrically connected to the first signal pattern by the second connecting member. The second substrate has a harmonic processing filter provided in the inner layer of the second substrate, a second signal via hole that electrically connects the third signal pattern and the harmonic processing filter, and a third signal via hole that electrically connects the fourth signal pattern and the harmonic processing filter. The aforementioned semiconductor chip is a semiconductor high-frequency amplifier, A high-frequency semiconductor package characterized in that the harmonic processing filter is connected to the output side of the semiconductor high-frequency amplifier.

2. The high-frequency semiconductor package according to claim 1, characterized in that the first to third connecting members have metal pillars.

3. The high-frequency semiconductor package according to claim 1, characterized in that the first to third connecting members are solder balls.

4. The high-frequency semiconductor package according to any one of claims 1 to 3, further comprising a passive component mounted on the lower surface of the second substrate and electrically connected between the second signal pattern and the second ground pattern.

5. An opening is provided in the center of the first substrate, The heat sink is press-fitted into the opening. The high-frequency semiconductor package according to any one of claims 1 to 3, characterized in that the semiconductor chip is mounted on the heat sink.

6. A first substrate having a first base material, a signal terminal and a ground terminal provided on the lower surface of the first base material, a first signal pattern and a first ground pattern provided on the upper surface of the first base material, a first signal via hole that penetrates the first base material and electrically connects the signal terminal and the first signal pattern, and a first ground via hole that penetrates the first base material and electrically connects the ground terminal and the first ground pattern, A semiconductor chip mounted on the upper surface of the first substrate, A second substrate having a second base material, a second signal pattern and a second ground pattern provided on the lower surface of the second base material, a third ground pattern provided on the entire upper surface of the second base material, and a second ground via hole that penetrates the second base material and electrically connects the second ground pattern and the third ground pattern, A first connecting member that connects the signal pad of the semiconductor chip and the second signal pattern, A second connecting member that connects the second signal pattern and the first signal pattern, The system comprises a third connecting member that connects the first ground pattern and the second ground pattern, The ground terminal, the first to third ground patterns, the first and second ground via holes, and the third connecting member constitute an electromagnetic shielding structure that covers the signal terminal, the first and second signal patterns, the first signal via hole, the semiconductor chip, and the first and second connecting members. A cavity is provided on the upper surface side of the first substrate. In the cavity, the upper surface of the ground terminal is exposed. The high-frequency semiconductor package is characterized in that the semiconductor chip is mounted on the upper surface of the ground terminal inside the cavity.

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