Method for depositing a molybdenum metal film on the dielectric surface of a substrate by a periodic deposition process and related semiconductor device structures

JP7842160B2Active Publication Date: 2026-04-07ASM IP HLDG BV
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-08-22
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

Existing semiconductor device manufacturing processes require low-electrical-resistivity metal films that can be conformally deposited on dielectric surfaces, especially for three-dimensional structures, without the need for thick barrier layers that increase electrical resistivity.

Method used

A method involving periodic deposition processes is used to directly deposit a molybdenum metal film on a dielectric surface through a nucleation film, utilizing a molybdenum halide precursor and a reducing agent precursor, which eliminates the need for high-resistance barrier layers.

Benefits of technology

This approach enables the deposition of low-electrical-resistivity molybdenum metal films on dielectric surfaces, reducing overall electrical resistance and improving the reliability and yield of semiconductor devices.

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Patent Text Reader

Abstract

To provide a method for depositing a low electrical resistance metal film on a dielectric material by a cyclical deposition process and using it, and a related device structure.SOLUTION: The method includes: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film. Depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed on a surface of a dielectric material with an intermediate nucleation film are also disclosed.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] Cross-reference of related applications This application claims priority to: U.S. Nonprovisional Patent Application No. 15 / 691,241, titled “Layer Forming Method,” filed August 30, 2017; U.S. Provisional Patent Application No. 62 / 607,070, titled “Layer Forming Method,” filed December 18, 2017; and U.S. Provisional Patent Application No. 62 / 619,579, titled “Deposition Method,” filed January 19, 2018.

[0002] This disclosure relates to a method for depositing a molybdenum metal film on the dielectric surface of a substrate, and to specific methods for directly depositing a nucleation film on the dielectric surface and directly depositing a molybdenum metal film on the nucleation film. This disclosure also relates to a semiconductor device structure comprising a molybdenum metal film directly disposed on a nucleation film directly disposed on the surface of a dielectric material. [Background technology]

[0003] Semiconductor device manufacturing processes at advanced technology nodes generally require state-of-the-art deposition methods for forming metal films, such as tungsten and copper metal films.

[0004] A common requirement for metal film deposition is that the deposition process is highly conformal. For example, conformal deposition is often required to uniformly deposit a metal film on a three-dimensional structure containing high aspect ratio features. Another common requirement for metal film deposition is that the deposition process can deposit a continuous ultrathin film on a large substrate area. In specific cases where the metal film is conductive, the deposition process may need to be optimized to produce a low-electrically-resistive film.

[0005] Low electrical resistance metal films commonly used in advanced semiconductor device applications may include tungsten (W) and / or copper (Cu). However, tungsten and copper metal films generally require a thick barrier layer placed between the metal film and the dielectric material. The thick barrier layer may be used to prevent diffusion of the metal species into the underlying dielectric material, thereby improving the reliability and yield of the device. However, the thick barrier layer generally exhibits high electrical resistivity, thus resulting in an increase in the overall electrical resistivity of the semiconductor device structure.

[0006] For example, periodic deposition processes such as atomic layer deposition (ALD) and periodic chemical vapor deposition (CCVD) involve sequentially introducing one or more precursors (reactants) into a reaction chamber, where the precursors react with the substrate surface one at a time. Periodic deposition processes have been demonstrated that produce metal films with excellent conformability through atomic-level thickness control.

[0007] Therefore, there is a need for methods and related device structures for depositing and utilizing low-electrical-resistivity metal films deposited on dielectric materials by conformal periodic deposition processes. [Overview of the Initiative] [Means for solving the problem]

[0008] This summary of the invention is provided to introduce the selection of concepts in a simplified manner. These concepts will be described in more detail in the embodiments for carrying out the invention of the present disclosure below. This summary of the invention is not intended to identify any important or essential features of the subject matter described in the claims, nor is it intended to be used to limit the scope of the subject matter described in the claims.

[0009] In some embodiments, a method is provided for depositing a molybdenum metal film on the dielectric surface of a substrate by a periodic deposition process. The method may include supplying a substrate having a dielectric surface into a reaction chamber, directly depositing a nucleation film on the dielectric surface, and directly depositing a molybdenum metal film on the nucleation layer, wherein the deposition of the molybdenum metal film includes contacting the substrate with a first gas-phase reactant containing a molybdenum halide precursor, and contacting the substrate with a second gas-phase reactant containing a reducing agent precursor.

[0010] In some embodiments, a semiconductor device structure is provided. The semiconductor device structure may comprise a substrate having a dielectric surface, a nucleation film directly disposed on the dielectric surface, and a molybdenum metal film directly disposed on the nucleation film.

[0011] To summarize the invention and its advantages that are achieved beyond the prior art, certain objectives and advantages of the invention have been described above in this specification. Naturally, it should be understood that not all of these objectives or advantages are necessarily achieved by any particular embodiment of the invention. Therefore, those skilled in the art will recognize that the invention may be embodied or practiced in a manner that achieves or optimizes one advantage or group of advantages, for example, as taught or suggested herein, without necessarily achieving other objectives or advantages, which may be taught or suggested herein.

[0012] All of these embodiments are intended to be within the scope of the invention disclosed herein. To those skilled in the art, these and other embodiments will be readily apparent from the embodiments for carrying out the invention described below with reference to the accompanying drawings, and the invention is not limited to all specific embodiments disclosed. [Brief explanation of the drawing]

[0013] This specification particularly points out and clearly claims what is regarded as embodiments of the present invention and concludes in the claims. However, the advantages of the embodiments of the present disclosure may be more readily elucidated from the description of an example of the embodiments of the present disclosure when read in conjunction with the accompanying drawings.

[0014] [Figure 1] FIG. 1 is a non-limiting exemplary process flow illustrating a method of directly depositing a nucleation film on a dielectric surface and subsequently directly depositing a molybdenum metal film on the nucleation film according to an embodiment of the present disclosure.

[0015] [Figure 2] FIG. 2 is a non-limiting exemplary process flow illustrating a periodic deposition process of directly depositing a nucleation film on a dielectric surface according to an embodiment of the present disclosure.

[0016] [Figure 3] FIG. 3 is a non-limiting exemplary process flow illustrating a periodic deposition process of directly depositing a molybdenum metal film on a nucleation film according to an embodiment of the present disclosure.

[0017] [Figure 4] FIGS. 4A, 4B, and 4C are schematic cross-sectional views of a semiconductor device structure formed during a process of directly depositing a nucleation film on a dielectric surface having a vertical gap feature and subsequently directly depositing a molybdenum metal film on the nucleation film according to an embodiment of the present disclosure.

[0018] [Figure 5] FIGS. 5A, 5B, and 5C are schematic cross-sectional views of a semiconductor device structure formed during a process of directly depositing a nucleation film on a dielectric surface having a horizontal gap feature and subsequently directly depositing a molybdenum metal film on the nucleation film according to an embodiment of the present disclosure.

[0019] [Figure 6]FIG. 6 shows the r.m.s. surface roughness (Ra) of a molybdenum metal film directly deposited on a dielectric surface and a molybdenum metal film deposited on the dielectric surface using an intermediate nucleation film, according to an embodiment of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Although several embodiments and examples are disclosed below, it will be understood by those skilled in the art that the present invention extends beyond the specifically disclosed embodiments and / or applications of the present invention, and their obvious modifications and equivalents. Therefore, it is intended that the scope of the present invention disclosed should not be limited by the embodiments specifically described below.

[0021] The figures shown in this specification do not mean that they are actual figures of any specific material, structure or device, but are merely idealized representations used to describe embodiments of the present disclosure.

[0022] As used herein, the term "substrate" may refer to any underlying material or plurality of underlying materials on which a device, circuit or film may be formed or used.

[0023] As used herein, the term "periodic deposition" refers to continuously introducing one or more precursors (reactants) into a reaction chamber to deposit a film on a substrate, and includes deposition techniques such as atomic layer deposition and periodic chemical vapor deposition.

[0024] As used herein, the term "periodic chemical vapor deposition" can refer to any process in which a substrate is sequentially exposed to one or more volatile precursors, and the precursors react and / or decompose on the substrate to produce a desired deposit.

[0025] As used herein, the term “atomic layer deposition” (ALD) can refer to a deposition process in which deposition cycles, preferably multiple consecutive deposition cycles, are carried out in a reaction chamber. Typically, during each cycle, a precursor is chemisorbed onto the deposition surface (e.g., the surface of a substrate or a previously deposited underlayment, e.g., a material deposited using a previous ALD cycle) to form a monolayer or sub-monolayer that does not readily react with additional precursors (i.e., a self-controlled reaction). Subsequently, if necessary, reactants (e.g., another precursor or reaction gas) can be introduced into the process chamber for use in converting the chemisorbed precursor into a desired material on the deposition surface. Typically, these reactants can further react with the precursor. Furthermore, a purging step can be utilized during each cycle to remove excess precursor from the process chamber after the conversion of the chemisorbed precursor, and / or excess reactants and / or reaction byproducts from the process chamber. Furthermore, as used herein, the term “atomic layer deposition” also means processes represented by related terms, such as “chemical vapor deposition atomic layer deposition,” “atomic layer epitaxy” (ALE), molecular beam epitaxy (MBE), gas source MBE, or organometallic MBE, and chemical beam epitaxy when carried out with alternating pulses of precursor composition, reactive gas, and purge gas (e.g., inert carrier).

[0026] As used herein, the terms “film” and “thin film” are intended to mean any continuous or discontinuous structures and materials formed by the methods disclosed herein. Examples of “film” and “thin film” include 2D materials, nanolaminates, nanorods, nanotubes, or nanoparticles, or planar partial or complete molecular layers, or partial or complete atomic layers, or clusters of atoms and / or molecules. “Film” and “thin film” may include materials or layers having pinholes, but are still at least partially continuous.

[0027] As used herein, the term “compound material” may refer to a material in which two or more different elements are chemically bonded together.

[0028] As used herein, the term “bilinary compound material” may refer to a material consisting of essentially two different elements. While the term “bilinary compound material” may refer to a material consisting of essentially two different elements, it should be noted that binary compound materials may also contain trace amounts of impurity elements.

[0029] As used herein, the term "silicon binary compound material" can refer to a material consisting essentially of silicon atoms and another distinct element. It should be noted that while the term "silicon binary compound material" can refer to a material consisting essentially of silicon atoms and another distinct element, silicon binary compound materials may also contain trace amounts of impurity elements.

[0030] As used herein, the term “molybdenum dicomponent compound material” can refer to a material consisting essentially of molybdenum atoms and another distinct element. While the term “molybdenum dicomponent compound material” can refer to a material consisting essentially of molybdenum atoms and another distinct element, it should be noted that molybdenum dicomponent compound materials may also contain trace amounts of impurity elements.

[0031] As used herein, the term “molybdenum halide precursor” refers to a reactant comprising at least a molybdenum component and a halide component, the halide component may include one or more of the following: a chlorine component, an iodine component, or a bromine component.

[0032] As used herein, the term “molybdenum chalcogenide halide” refers to a reactant comprising at least a molybdenum component, a halide component, and a chalcogenide component, where chalcogens are elements of Group IV of the periodic table, including oxygen (O), sulfur (S), selenium, and tellurium (Te).

[0033] As used herein, the term “molybdenum oxyhalide” may refer to a reactant comprising at least a molybdenum component, an oxygen component, and a halide component.

[0034] As used herein, the term “reducing agent precursor” may refer to a reactant that donates electrons to another species in a redox chemical reaction.

[0035] As used herein, the term "crystalline film" refers to a film that exhibits at least short-range regularity or long-range regularity in its crystalline structure, and includes single-crystal films and polycrystalline films.

[0036] As used herein, the term “gap feature” may mean an opening or recess located between two surfaces of a non-planar surface. The term “gap feature” may also mean an opening or recess located between the inclined sidewalls of two projections extending perpendicularly from the surface of a substrate, or between the opposing inclined sidewalls of a notch extending perpendicularly into the surface of a substrate, and such a gap feature may be referred to as a “vertical gap feature.” The term “gap feature” may also mean an opening or recess located between two opposing substantially horizontal surfaces, where the horizontal surfaces connect the horizontal opening or recess, and such a gap feature may be referred to as a “horizontal gap feature.”

[0037] As used herein, the term “seam” may refer to a line or one or more voids formed by the contact of edges formed in gap fill metal. A “seam” is present if observation reveals a distinct vertical line or one or more voids in vertical gap fill metal, or a distinct horizontal line or one or more horizontal voids in horizontal gap fill metal.

[0038] It should be noted that while many exemplary materials are given through embodiments of this disclosure, the chemical formulas given for each exemplary material should not be interpreted as restrictive, and the non-restrictive exemplary materials given should not be limited by any exemplary stoichiometry.

[0039] This disclosure includes a method for depositing a molybdenum metal film on the surface of a dielectric material by utilizing an intermediate nucleation film that is directly disposed on the surface of the dielectric material. The molybdenum metal thin film can be used in many applications, such as low electrical resistivity gap fills, liner layers for 3D-NAND and DRAM word line features, or interconnect materials for CMOS logic. The ability to deposit a molybdenum metal film on a dielectric surface using an intermediate nucleation film, i.e., without using a high electrical resistance liner layer, enables lower effective electrical resistance for logic applications, i.e., CMOS structures, and for word lines / bit lines in memory applications, such as interconnects in 3D-NAND and DRAM structures.

[0040] Accordingly, embodiments of the present disclosure include a method for depositing a molybdenum metal film on the dielectric surface of a substrate using an intermediate nucleation film. The method may include supplying a substrate having a dielectric surface to a reaction chamber, directly depositing a nucleation film on the dielectric surface, and directly depositing a molybdenum metal film on the nucleation film, wherein the deposition of the molybdenum metal film includes contacting the substrate with a first gas-phase reactant containing a molybdenum halide precursor, and contacting the substrate with a second gas-phase reactant containing a reducing agent precursor.

[0041] An exemplary process 100 for depositing a molybdenum metal film on a dielectric surface using an intermediate nucleation film is illustrated with reference to Figure 1. The exemplary process 100 may include two deposition processes: a first deposition process for directly depositing a nucleation film on the surface of a dielectric material, and a second deposition process for directly depositing a molybdenum metal film on the nucleation film.

[0042] More specifically, and referring to Figure 1, an exemplary process 100 can be initiated by a process block 110 which includes supplying a substrate having a dielectric surface into a reaction chamber.

[0043] In some embodiments of the present disclosure, the substrate may comprise a patterned substrate having high aspect ratio features, such as trench structures, horizontal gaps, and / or fin structures. For example, the substrate may include one or more substantially vertical gap features and / or one or more substantially horizontal gap features. The term “gap feature” may refer to an opening or recess located between the inclined sidewalls of two projections extending perpendicularly from the substrate surface, or between the opposing inclined sidewalls of notches extending perpendicularly into the surface of the substrate, and such a gap feature may be referred to as a “vertical gap feature.” The term “gap feature” may also mean an opening or recess located between two opposing substantially horizontal surfaces, where the horizontal surfaces connect the horizontal opening or recess, and such a gap feature may be referred to as a “horizontal gap feature.” It should be noted that embodiments of the present disclosure are not limited to filling vertical gap features and / or horizontal gap features, and other geometric shapes of gaps located within and / or on the substrate may be filled with molybdenum metal by processes disclosed herein.

[0044] In some embodiments of the present disclosure, the substrate may comprise one or more substantially vertical gap features, as illustrated in Figure 4A, which shows a semiconductor device structure 400 comprising a substrate 402 comprising a dielectric material having a high aspect ratio vertical gap feature 404 disposed within the substrate 402. In some embodiments, one or more vertical gap features may have an aspect ratio (height:width) greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or greater than 100:1, where, as used in this example, “greater” means a longer distance in the height of the gap feature.

[0045] In embodiments of the present disclosure, the substrate may comprise one or more substantially horizontal gap features, as illustrated in Figure 5A, which shows a dielectric device structure 500 comprising a substrate 502 comprising a dielectric material having a high aspect ratio horizontal gap feature 504 disposed within the substrate 502. In some embodiments, one or more horizontal gap features may have an aspect ratio (height:width) greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or greater than 1:100, where, as used in this example, “greater” means a longer distance in the width of the gap feature.

[0046] The substrate may include, but is not limited to, one or more materials and material surfaces, including semiconductor materials, dielectric materials, and metallic materials.

[0047] In some embodiments, semiconductor materials may include silicon (Si), germanium (Ge), germanium-tin (GeSn), silicon-germanium (SiGe), silicon-germanium-tin (SiGeSn), silicon (SigeSn), silicon carbide (SiC), or Group III-V semiconductor materials.

[0048] In some embodiments, the substrate may include, but is not limited to, pure metals, metal nitrides, metal carbides, metal borides, and mixtures thereof.

[0049] In some embodiments, the substrate may include dielectric materials such as silicon, including dielectric materials and metal oxide dielectric materials, for example, but not limited to these. In some embodiments, the substrate may include one or more dielectric surfaces containing silicon, including dielectric materials such as silicon dioxide (SiO2), silicon suboxide, silicon nitride (Si3N4), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon oxycarbide nitride (SiOCN), and silicon carbonitride (SicN), for example, but not limited to these. In some embodiments, the substrate may include aluminum oxide ((Al2O3), hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO)2), titanium oxide (TiO2), and hafnium silicate (HfSiO2), for example, but not limited to these. x It may include one or more dielectric surfaces containing metal oxides such as ) and lanthanum (La)2O3.

[0050] In some embodiments of the present disclosure, the substrate may comprise a designed substrate, and the surface semiconductor layer is disposed on the bulk support by interposed embedded oxidation (BOX) between them.

[0051] A patterned substrate may include a substrate that can contain semiconductor device structures formed in or on the substrate surface. For example, a patterned substrate may include manufactured and / or partially manufactured semiconductor device structures, such as transistors and / or memory elements. In some embodiments, the substrate may include one or more secondary surfaces, which may include a single-crystal surface and / or a non-single-crystal surface, such as a polycrystalline surface and / or an amorphous surface. A single-crystal surface may include, for example, one or more of silicon (Si), silicon germanium (SiGe), germanium tin (gESn), or germanium (Ge). A polycrystalline or amorphous surface may include dielectric materials such as oxides, oxynitrides, oxycarbides, oxycarbide nitrides, nitrides, or mixtures thereof.

[0052] The substrate may be placed in one or more reaction chambers configured to directly deposit a nucleation film onto the surface of a dielectric material and to directly deposit a molybdenum metal film on the nucleation film. In some embodiments, the nucleation film may be deposited directly onto the dielectric surface by one or more of the following processes: chemical vapor deposition (CVD), immersion, plasma-enhanced chemical vapor deposition (PECVD), or physical vapor deposition (PVD). In certain embodiments of the present disclosure, both the nucleation film and the molybdenum film can be deposited using a periodic deposition process, by means of inherent conformality achievable using the periodic deposition process, and by the ability of the periodic deposition process to form conformal films on non-planar substrates having one or more high aspect ratio features, including but not limited to vertical gap features and / or horizontal gap features.

[0053] Therefore, a reactor or reaction chamber that can be used to deposit a molybdenum metal film on a dielectric surface using an intermediate nucleation film can be configured to carry out a periodic deposition process, such as an atomic layer deposition process or a periodic chemical vapor deposition process. Accordingly, a reactor or reaction chamber suitable for carrying out embodiments of the present disclosure may include ALD reactors and CVD reactors configured to provide a precursor. According to some embodiments, a showerhead reactor may be used. According to some embodiments, a cross-flow, batch, mini-batch, or space ALD reactor may be used.

[0054] In some embodiments of this disclosure, a batch reactor may be used. In some embodiments, a vertical batch reactor may be used. In other embodiments, the batch reactor comprises a minibatch reactor configured to accommodate 10 or fewer wafers, 8 or fewer wafers, 6 or fewer wafers, 4 or fewer wafers, or 2 or fewer wafers. In some embodiments in which the batch reactor is used, the non-uniformity between wafers is less than 3% (1 sigma), less than 2%, less than 1%, or even less than 0.5%.

[0055] The exemplary process described herein for depositing a molybdenum metal film fill using an intermediate nucleating film may be carried out in a reactor or reaction chamber connected to a cluster tool as needed. In a cluster tool, since each reaction chamber is dedicated to one type of process, the temperature of the reaction chambers within each module can be kept constant, resulting in improved throughput compared to a reactor where the substrate is heated to process temperature before each operation. Furthermore, a cluster tool makes it possible to reduce the time required to evacuate the reaction chambers between substrates to a desired process pressure level. In some embodiments of this disclosure, the exemplary process disclosed herein may be carried out in a cluster tool comprising multiple reaction chambers, each individual reaction chamber may be used to expose the substrate to an individual precursor gas, or the substrate may be transported between different reaction chambers to be exposed to multiple precursor gases, with the transport of the substrate carried out in a controlled ambient environment to avoid oxidation / contamination of the substrate. For example, the nucleation film may be deposited by a periodic deposition process in the first reaction chamber associated with the cluster tool, while transport between the first and second reaction chambers is carried out in a controlled environment to prevent contamination or degradation of the substrate and associated film, and the molybdenum film may be deposited by a periodic deposition process in the second reaction chamber associated with the same cluster tool. In some embodiments of the present disclosure, the process of the present disclosure may be carried out in a cluster tool comprising a plurality of reaction chambers, each of which may be configured to heat the substrate to a different temperature.

[0056] In some embodiments, exemplary processes in which a nucleation film is deposited directly onto a dielectric surface and a molybdenum metal film is deposited directly onto the nucleation film can be carried out in a single, independent reactor, which may be equipped with a load lock. In this case, it is not necessary to cool the reaction chamber between each operation.

[0057] Once the substrate is deposited in a suitable reaction chamber, for example, a reaction chamber configured for a periodic deposition process, the exemplary process 100 in Figure 1 can be carried out by a process block 120 that includes directly depositing a nucleation film onto a dielectric surface. Process block 120 and its constituent subprocesses will be described in more detail with reference to Figure 2, which shows an exemplary non-limiting periodic deposition process for directly depositing a nucleation film onto a dielectric surface.

[0058] More specifically, the deposition process for directly depositing a nucleated film onto a dielectric surface can be carried out by a subprocess 210 which includes heating the substrate to a desired deposition temperature. For example, the substrate can be heated to a substrate temperature of less than about 800°C, or less than about 700°C, or less than about 600°C, or less than about 500°C, or less than about 400°C, or less than about 300°C, or less than about 200°C. In some embodiments of the present disclosure, the substrate temperature during the periodic deposition process of process block 120 can be between 250°C and 800°C, or between 300°C and 600°C, or between 550°C and 600°C.

[0059] In some embodiments, the deposition temperature for depositing the nucleating film may depend on the composition of the material to be deposited. For example, in some embodiments of the present disclosure, the nucleating film may include a compound material, i.e., a material comprising at least two different elements. In some embodiments, the compound material may include a two-component compound material, i.e., a material essentially consisting of two different elements and trace amounts of impurity elements. In some embodiments, the compound may include a three-component compound material, i.e., a material essentially consisting of three different elements and trace amounts of impurity elements.

[0060] In some embodiments, the binary compound material may include a silicon binary compound material, the silicon compound material consisting of different elements having silicon atoms and trace amounts of impurity elements. For example, in some embodiments, the silicon binary compound material may include at least one of silicon nitride (e.g., Si3N4), silicon carbide (e.g., SiC), or silicon oxide (e.g., SiO2). In such exemplary embodiments, the temperature of the substrate during the deposition of the nucleation layer containing the silicon binary compound material can be less than about 500°C, or less than about 400°C, or less than about 300°C, or less than about 250°C, or even less than about 200°C.

[0061] In some embodiments, the binary compound material may include a molybdenum binary compound material, the molybdenum compound material consisting of different elements essentially having molybdenum atoms and trace amounts of impurity elements. For example, in some embodiments, the molybdenum binary compound material may include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide. In such exemplary embodiments, the substrate temperature during the deposition of the nucleation film containing the molybdenum binary compound material can be less than about 700°C, or less than about 600°C, or less than about 500°C, or less than about 400°C, or even less than about 300°C. In some embodiments, the deposition of the nucleation film containing the molybdenum binary compound material can be carried out at a substrate temperature of 300°C to 600°C, or 400°C to 500°C.

[0062] In some embodiments of the present disclosure, the nucleating film may include a ternary compound, such as a silicon ternary compound (e.g., SiCN, SiON) or a molybdenum ternary compound (e.g., MoON, MoSiO). In such embodiments, the substrate temperature during deposition of the ternary compound may be less than about 700°C, or less than about 600°C, or less than about 500°C, or less than about 400°C, or even less than about 300°C.

[0063] Furthermore, an exemplary atomic layer deposition process (i.e., process block 120) that directly deposits a nucleated film onto a dielectric surface to achieve a desired deposition temperature, i.e., a desired substrate temperature, can also obtain the desired properties of the nucleated film directly on the dielectric surface by adjusting the pressure in the reaction chamber during deposition. For example, in some embodiments of the present disclosure, an exemplary periodic deposition process can be carried out in a reaction chamber whose reaction chamber pressure is adjusted to less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or less than 15 Torr, or even less than 1 Torr. In some embodiments, the pressure in the reaction chamber during the deposition of the nucleated film can be adjusted to a pressure of 1 Torr to 300 Torr, or 1 Torr to 50 Torr, or 1 Torr to 15 Torr, or even more than 30 Torr.

[0064] Once the substrate is heated to a desired temperature and the pressure in the reaction chamber is controlled to a desired level, the exemplary process of directly depositing a nucleation film onto the dielectric surface can be followed by a periodic deposition phase 205, which may include atomic layer deposition (ALD) or periodic chemical vapor deposition (CCVD).

[0065] A non-limiting exemplary embodiment of a periodic deposition process includes atomic layer deposition (ALD), which is based on a typical self-controlled reaction that uses sequential and alternating pulses of reactants to deposit approximately one atomic (or molecular) monolayer of material per deposition cycle. The deposition conditions and precursors are typically selected to provide a self-saturating reaction such that an adsorbed layer of one reactant leaves a surface end that is unreactive with the gas-phase reactant of the same reactant. The substrate is then brought into contact with a different reactant that reacts with the previous end, enabling continuous deposition. Thus, each cycle of the alternating pulse typically leaves a monolayer of approximately one or less of the desired material. However, as described above, it will be recognized that in one or more ALD cycles, if several gas-phase reactions occur, for example, despite the nature of the alternating process, more than one monolayer of material can be deposited.

[0066] In an ALD-type process used to directly form nucleation films on a dielectric surface, one deposition cycle may include exposing the substrate to a first gas-phase reactant, removing all unreacted first reactants and reaction byproducts from the reaction chamber, and exposing the substrate to a second gas-phase reactant, followed by a second removal step. In some embodiments of this disclosure, the first gas-phase reactant may include at least one of a first silicon precursor or a molybdenum precursor, and the second gas-phase reactant may include at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0067] The precursor can be separated by an inert gas, such as argon (Ar) or nitrogen (N2), to prevent gas-phase reactions between the reactants and enable a self-saturated surface reaction. However, in some embodiments, the substrate can be moved to bring the reactants of the first gas phase and the reactants of the second gas phase into contact separately. Since the reaction is self-saturated, strict temperature control of the substrate and precise dosage control of the precursor may not be necessary. However, it is preferable that the substrate temperature is such that the incident gas species do not condense into a single layer and do not decompose on the surface. Before contacting the substrate with the next reactive chemical, any excess chemicals and reaction byproducts are removed from the surface of the substrate, for example, by purging the reaction space or by moving the substrate. Undesirable gas molecules can be effectively removed from the reaction space using an inert purge gas. A vacuum pump can be used to facilitate purging.

[0068] According to some non-limiting embodiments of the present disclosure, an ALD process can be used to directly deposit nucleation films on the surface of a dielectric material. In some embodiments of the present disclosure, each ALD cycle may comprise two separate deposition steps or stages. In the first stage of the deposition cycle, the substrate surface to be deposited is brought into contact with a first gas-phase reactant comprising at least one of a first silicon precursor or molybdenum precursor that is chemiadsorbed onto the substrate surface, thereby forming a single layer of reactant species of about one or less on the substrate surface. In the second stage of deposition, the substrate surface to be deposited can be brought into contact with a second gas-phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0069] By heating the substrate to a desired deposition temperature and adjusting the pressure in the reaction chamber, the exemplary atomic layer deposition process 120 can continue with a periodic deposition phase 205 by process block 220, which includes contacting the substrate with a first gas-phase reactant, in particular, in some embodiments, with a first gas-phase reactant comprising at least one of a first silicon precursor or a molybdenum halide precursor.

[0070] In some embodiments, the nucleating film may contain a silicon binary compound, and in such embodiments, the first gas-phase reactant may contain a first silicon precursor. In some embodiments, the first silicon precursor is silanediamine N,N,N',N-tetraethyl(C8H 22 The first silicon precursor may include at least one of the following: N2Si), BTBAS (bis(tert-butylamino)silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexakis(ethylamino)disilane (Si2(NHC2H5)6), silicon tetraiodide (SiI4), silicon tetrachloride (SiCl4), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, the first silicon precursor may include silanes, such as silane (SiH4), disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H10 ), or the common composition formula Si x H (2x+2) It contains higher-order silanes.

[0071] In some embodiments, the nucleating film may contain a two-component molybdenum compound, and in such embodiments, the first gas-phase reactant may contain a molybdenum halide precursor. In some embodiments, the molybdenum halide precursor may contain a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, in non-limiting examples, the first gas-phase reactant may contain molybdenum chloride, such as molybdenum pentachloride (MoCl5).

[0072] In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in certain embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In certain embodiments of the present disclosure, the molybdenum precursor may include, but is not limited to, molybdenum oxychloride containing molybdenum(VI) dichloride dioxide (MoO2Cl2).

[0073] In some embodiments of this disclosure, contacting a substrate with a first gas-phase reactant comprising at least a first silicon precursor or molybdenum precursor may include contacting the first gas-phase reactant with the substrate for about 0.1 seconds to about 60 seconds, about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 5.0 seconds. Furthermore, during contact between the substrate and the first gas-phase reactant, the flow rate of the precursor may be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. Furthermore, during contact between the substrate and the first gas-phase reactant, the flow rate of the precursor may be in the range of about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

[0074] As illustrated by process block 120 in Figure 2, an exemplary atomic layer deposition process for directly depositing a nucleated film onto a dielectric surface can be continued by purging the reaction chamber. For example, excess first gas-phase reactants and reaction by-products (if any) can be removed from the substrate surface by, for example, pumping in an inert gas. In some embodiments of the present disclosure, the purging process may include a purge cycle in which the substrate surface is purged for a time of less than about 5.0 seconds, or less than about 3.0 seconds, or even less than 2.0 seconds. For example, excess first gas-phase reactants, such as excess first silicon precursor or molybdenum precursor and any possible reaction by-products, may be removed using a vacuum generated by a pump system in fluid communication with the reaction chamber.

[0075] When the reaction chamber is purged in a purge cycle, the exemplary atomic layer deposition process block 120 can proceed to the second stage of the periodic deposition phase 205 by the process block 230, which includes contacting the substrate with a second gas-phase reactant, in particular, with a second gas-phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0076] In some embodiments of the present disclosure, the nucleating film may include a silicon binary compound material, and in certain embodiments, it may include silicon nitride (e.g., Si3N4). In such embodiments, the first gas-phase reactant may include a first silicon precursor, and the second gas-phase reactant may include a nitrogen precursor.

[0077] In some embodiments of the present disclosure, the nucleating film may include a silicon binary compound material, and in certain embodiments, it may include silicon oxide (e.g., SiO2). In such embodiments, the first gas-phase reactant may include a first silicon precursor, and the second gas-phase reactant may include an oxygen precursor.

[0078] In some embodiments of this disclosure, the nucleating film may include a silicon binary compound material, and in certain embodiments, it may include silicon carbide (e.g., SiC). In such embodiments, the first gas-phase reactant may include a first silicon precursor, and the second gas-phase reactant may include a carbon precursor.

[0079] In some embodiments of the present disclosure, the nucleating film may include a molybdenum two-component compound material, and in certain embodiments, it may include molybdenum nitride. In such embodiments, the first gas-phase reactant may include a molybdenum precursor, and the second gas-phase reactant may include a nitrogen precursor.

[0080] In some embodiments of the present disclosure, the nucleating film may comprise a molybdenum two-component compound material, and in certain embodiments, it may comprise molybdenum oxide. In such embodiments, the first gas-phase reactant may comprise a molybdenum precursor, and the second gas-phase reactant may comprise an oxygen precursor.

[0081] In some embodiments of the present disclosure, the nucleating film may include a molybdenum two-component compound material, and in certain embodiments, it may include molybdenum silicide. In such embodiments, the first gas-phase reactant may include a molybdenum precursor, and the second gas-phase reactant may include a second silicon precursor.

[0082] In some embodiments of the present disclosure, the nucleating film may comprise a molybdenum two-component compound material, and in certain embodiments, it may comprise molybdenum carbide. In such embodiments, the first gas-phase reactant may comprise a molybdenum precursor, and the second gas-phase reactant may comprise a carbon precursor.

[0083] In embodiments in which the nucleating film comprises a nitride, such as silicon nitride or molybdenum nitride, the second gas-phase reactant may comprise a nitrogen precursor. In such embodiments of the present disclosure, the nitrogen precursor may comprise at least one of ammonia (NH3), hydrazine (N2H4), triazane (N3H5), tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), or nitrogen plasma, the nitrogen plasma comprising atomic nitrogen, nitrogen radicals, and excited nitrogen species.

[0084] In embodiments where the nucleating film comprises an oxide, such as silicon oxide or molybdenum oxide, the second gas-phase reactant may include an oxygen precursor. In such embodiments of the present disclosure, the oxygen precursor includes at least one of water (H2O), hydrogen peroxide (H2O2), ozone (O3), or nitrogen oxides, such as nitric oxide (NO), nitrous oxide (N2O), or nitrogen dioxide (NO2). In some embodiments of the present disclosure, the oxygen precursor may include an organic alcohol, such as isopropyl alcohol. In some embodiments, the oxygen precursor may include an oxygen plasma, which comprises atomic oxygen, oxygen radicals, and excited oxygen species.

[0085] In embodiments in which the nucleation film includes a carbide, such as silicon carbide or molybdenum carbide, the second gas-phase reactant may include a carbon precursor. In such embodiments of the present disclosure, the carbon precursor may include hydrocarbons, such as linear or branched alkanes.

[0086] In embodiments in which the nucleating film contains a silicide, such as molybdenum silicide, the second gas-phase reactant may include a second silicon precursor. In some embodiments of the present disclosure, the second silicon precursor is silanediamine N,N,N',N-tetraethyl(C8H) 22N2Si), BTBAS (bis(tert-butylamino)silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexakis(ethylamino)disilane (Si2(NHC2H5)6), silicon tetraiodide (SiI4), silicon tetrachloride (SiCl4), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, the second silicon precursor is a silane, such as silane (SiH4), disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H 10 ), or a higher-order silane of the general formula Si x H (2x+2) .

[0087] In some embodiments of the present disclosure, contacting the substrate with the second gaseous reactant can include contacting the substrate with the precursor for between about 0.01 seconds and about\120 seconds, between about 0.05 seconds and about\60 seconds, or between about 0.1 seconds and about\10 seconds. Further, during the contact of the substrate with the second gaseous reactant, the flow rate of the second gaseous reactant can be less than 10000 sccm, or less than 5000 sccm, or even less than 1000 sccm.

[0088] Exemplary process block 120 for depositing a nucleation film directly on the dielectric surface by contacting the substrate with a second gaseous reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor can proceed by purging the reaction chamber. For example, while flowing an inert gas, excess second gaseous reactant and (if any) reaction by-products can be removed from the surface of the substrate, e.g., by pumping. In some embodiments of the present disclosure, the purge process can include purging the substrate surface for between about 0.1 seconds and about\10 seconds, between about 0.5 seconds and about\3 seconds, or even between about 1 second and 2 seconds.

[0089] It should be noted that there may be some inaccuracies in the original text, especially in the chemical formula part. The above translation is based on the best understanding of the original content.Once the purging of the second gas-phase reactant and any reaction byproducts from the reaction chamber is complete, the exemplary atomic layer deposition periodic deposition phase 205 of process block 120 can proceed to a decision gate 240, which depends on the thickness of the deposited nucleation film. For example, if the nucleation film is deposited to an insufficient thickness for a desired device application, the periodic deposition phase 205 can be repeated by returning to process block 220 and continuing with a further deposition cycle. One deposition cycle may include contacting the substrate with at least a first silicon precursor or molybdenum halide precursor (process block 220), purging the reaction chamber, contacting the substrate with at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor (process block 230), and purging the reaction chamber again. One deposition cycle of periodic deposition phase 205 may be repeated once or more times until the desired thickness of the nucleation film is deposited directly onto the substrate and especially onto the dielectric surface. Once the nucleation film is deposited to the desired thickness, the exemplary atomic layer deposition process 120 is terminated by the process block 250, and the substrate having a dielectric surface on which the nucleation film is deposited can undergo further processing of the exemplary process 100 in Figure 1.

[0090] In some embodiments of this disclosure, it will be understood that the order in which the substrate is brought into contact with a first gas-phase reactant (e.g., a first silicon precursor or molybdenum precursor) and a second gas-phase reactant (e.g., a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor) can be such that the substrate is brought into contact with the second gas-phase reactant first, followed by contact with the first gas-phase reactant. Furthermore, in some embodiments, the periodic deposition phase 205 of the exemplary process block 120 may include bringing the substrate into contact with the first gas-phase reactant one or more times before bringing the substrate into contact with the second gas-phase reactant one or more times. Furthermore, in some embodiments, the periodic deposition phase 205 of the exemplary process block 120 may include bringing the substrate into contact with the second gas-phase reactant one or more times before bringing the substrate into contact with the first gas-phase reactant one or more times.

[0091] In some embodiments, the periodic deposition process can be a hybrid ALD / CVD or a periodic CVD process. For example, in some embodiments, the growth rate of the ALD process may be lower compared to the CVD process. One approach to increase the growth rate is to operate at a substrate temperature higher than that typically used in the ALD process, which consequently becomes part of the chemical vapor deposition process, but further utilizes the sequential introduction of precursors; such a process may be called periodic CVD. In some embodiments, the periodic CVD process may involve the introduction of two or more precursors into the reaction chamber, and the overlapping periods between the two or more precursors in the reaction chamber result in both the ALD and CVD components of the deposition. For example, the periodic CVD process may involve a continuous flow of one precursor and periodic pulses of a second precursor into the reaction chamber.

[0092] In some embodiments of the present disclosure, the nucleated film can be deposited directly onto the dielectric surface at growth rates of approximately 0.05 Å / cycle to approximately 5 Å / cycle, approximately 0.1 Å / cycle to approximately 5 Å / cycle, or even approximately 0.5 Å / cycle to approximately 1.5 Å / cycle Å.

[0093] In some embodiments of this disclosure, the nucleation film is deposited as a continuous film. For example, see semiconductor device structure 405 having a continuous nucleation film 406 directly disposed on a dielectric substrate 402 having a vertical gap feature 404, as illustrated in Figure 4B. Alternatively, see semiconductor device structure 505 having a continuous nucleation film 506 directly disposed on a dielectric substrate 502 having a horizontal gap feature, as illustrated in Figure 5B. In some embodiments, the continuous nucleation film 406 / 506 may be deposited to a thickness of less than 20 Å, or less than 10 Å, or less than 5 Å, or even less than 3 Å.

[0094] In some embodiments of this disclosure, the nucleation film is deposited as a discontinuous film. See, for example, inset 408 of a semiconductor device structure 405, which includes an example of a discontinuous nucleation film 406' directly deposited on a dielectric substrate 402 having a vertical gap feature 404, as illustrated in Figure 4B. Alternatively, see, for example, inset 508 of a semiconductor device structure 505, which includes an example of a discontinuous nucleation film 506' directly deposited on a dielectric substrate 502 having a horizontal gap feature, as illustrated in Figure 5. In some embodiments, the discontinuous nucleation film 406' / 506' may be deposited to a thickness of less than 20 Å, or less than 10 Å, or less than 5 Å, or even less than 3 Å.

[0095] In some embodiments, the step coverage of the nucleation film on one or more dielectric gap structures can be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

[0096] Furthermore, it should be noted that the nucleation film of this disclosure does not constitute a barrier layer or barrier material, as is commonly used in semiconductor device applications, to prevent the diffusion of metal species into the underlying dielectric material, and that the barrier layer is positioned between the metal contact and the dielectric material. The nucleation film of this disclosure is used to improve the material quality of a subsequently deposited molybdenum metal film and does not constitute a thick film, high resistivity barrier layer, or barrier material used in general semiconductor device manufacturing processes.

[0097] When a nucleation film is deposited directly onto a dielectric surface, the exemplary process 100 (Figure 1) can be continued by a process block 130 which includes depositing a molybdenum metal film directly onto the nucleation film, and, in some specific embodiments, depositing the molybdenum metal film directly onto the nucleation film by a periodic deposition process. Process block 130 and associated constituent subprocess blocks will be described in more detail with reference to Figure 3, which illustrates an exemplary periodic deposition process for depositing a molybdenum metal film.

[0098] More specifically, the exemplary periodic deposition process may include an atomic layer deposition process or a periodic chemical vapor deposition process. In a non-limiting example, process block 130 may include an atomic layer deposition process and may be initiated by a subprocess block 310 which includes heating the substrate to a desired deposition temperature. For example, the substrate can be heated to a substrate temperature of less than about 800°C, or less than about 700°C, or less than about 600°C, or less than about 550°C, or less than about 500°C, or less than about 400°C, or less than about 300°C, or even less than about 200°C. In some embodiments of the present disclosure, the substrate temperature during the exemplary atomic layer deposition process block 130 may be between 200°C and 800°C, or between 300°C and 700°C, or between 400°C and 600°C, or between 500°C and 550°C.

[0099] Furthermore, in order to achieve a desired deposition temperature, i.e., a desired substrate temperature, the exemplary atomic layer deposition process 130 can also be used to adjust the pressure in the reaction chamber during deposition to obtain the desired characteristics of the deposited molybdenum metal film. For example, in some embodiments of the present disclosure, the exemplary atomic layer deposition process 130 can be carried out in a reaction chamber where the reaction chamber pressure is adjusted to less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or even less than 10 Torr. In some embodiments, the pressure in the reaction chamber during deposition can be adjusted to a pressure of 10 Torr to 300 Torr, or 30 Torr to 80 Torr, or even more than 30 Torr.

[0100] By heating the substrate to a desired deposition temperature and adjusting the pressure in the reaction chamber, the exemplary atomic layer deposition process 130 can continue with a periodic deposition phase 305 by process block 320, which involves contacting the substrate with a first gas-phase reactant, in particular, in some embodiments, with a first gas-phase reactant containing a molybdenum halide precursor, i.e., a molybdenum precursor.

[0101] In some embodiments of this disclosure, the molybdenum halide precursor may include a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, in non-limiting examples, the first gas-phase reactant may include molybdenum chloride, such as molybdenum pentachloride (MoCl5).

[0102] In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in certain embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In certain embodiments of the present disclosure, the molybdenum precursor may include, but is not limited to, molybdenum oxychloride containing molybdenum(VI) dichloride dioxide (MoO2Cl2).

[0103] In some embodiments of the present disclosure, contacting a substrate with a first gas-phase reactant containing a molybdenum halide precursor may include contacting the substrate with the molybdenum halide precursor for about 0.1 seconds to about 60 seconds, about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 5.0 seconds. Furthermore, while contacting the substrate with the molybdenum halide precursor, the flow rate of the molybdenum halide precursor may be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. Furthermore, while contacting the substrate with the molybdenum halide precursor, the flow rate of the molybdenum precursor may be in the range of about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

[0104] An exemplary atomic layer deposition process 130 for directly depositing a molybdenum metal film onto a nucleating film, as illustrated by process block 130 in Figure 3, can be continued by purging the reaction chamber. For example, excess primary gas-phase reactants and reaction by-products (if any) can be removed from the substrate surface by, for example, pumping in an inert gas. In some embodiments of the present disclosure, the purging process may include a purge cycle in which the substrate surface is purged for a time of less than about 5.0 seconds, or less than about 3.0 seconds, or even less than 2.0 seconds. For example, excess primary gas-phase reactants, such as excess molybdenum precursors and possible reaction by-products, may be removed using a vacuum generated by a pump system in fluid communication with the reaction chamber.

[0105] When the reaction chamber is purged in a purge cycle, the exemplary atomic layer deposition process block 130 can continue the second stage of the periodic deposition phase 305 by process block 330, which includes contacting the substrate with a second gas-phase reactant, in particular with a second gas-phase reactant containing a reducing agent precursor ("reducing precursor").

[0106] In some embodiments of this disclosure, the reducing agent precursor is a forming gas (H2+N2), ammonia (NH3), hydrazine (N2H4), alkyl hydrazine (e.g., tertiary butyl hydrazine (C4H) 12 The reducing agent precursor may include at least one of the following: N2, hydrogen molecules (H2), hydrogen atoms (H), hydrogen plasma, hydrogen radicals, hydrogen excited species, alcohols, aldehydes, carboxylic acids, boranes, or amines. In further embodiments, the reducing agent precursor may include at least one silane (SiH4), disilane (Si2H6), trisilane (Si3H8), germane (GeH4) digermane (Ge2H6), borane (BH3), or diborane (B2H6). In certain embodiments of the present disclosure, the reducing agent precursor may include hydrogen molecules (H2).

[0107] In some embodiments of this disclosure, contacting the substrate with the reducing agent precursor may include contacting the substrate with the reducing agent precursor for about 0.01 seconds to about 180 seconds, about 0.05 seconds to about 60 seconds, or about 0.1 seconds to about 10.0 seconds. Furthermore, during contact between the substrate and the reducing agent precursor, the flow rate of the reducing agent precursor may be less than 30 slm, or less than 15 slm, or less than 10 slm, or less than 5 slm, or less than 1 slm, or even less than 0.1 slm. Furthermore, during contact between the substrate and the reducing agent precursor, the flow rate of the reducing agent precursor may be in the range of about 0.1 to 30 slm, about 5 to 15 slm, or 10 slm or more.

[0108] Once the substrate is brought into contact with the reducing agent precursor, an exemplary process block 130 for directly depositing a molybdenum metal film onto the nucleating film can be advanced by purging the reaction chamber. For example, excess reducing agent precursor and reaction byproducts can be removed from the substrate surface by, for example, pumping them in while flowing an inert gas. In some embodiments of the present disclosure, the purging process may include purging the substrate surface for about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 3 seconds, or even about 1 second to 2 seconds.

[0109] Once the purging of the second gas-phase reactant, i.e., the reducing agent precursor (and any reaction by-products), from the reaction chamber is complete, the periodic deposition phase 305 of the exemplary atomic layer deposition process block 130 proceeds to the determination gate 340, which depends on the thickness of the deposited molybdenum metal film. For example, if the molybdenum metal film is deposited to an insufficient thickness for the desired device application, the periodic deposition phase 305 may be repeated by returning to process block 320 and continuing further deposition cycles, one unit deposition cycle of which may include contacting the substrate with the molybdenum halide precursor (process block 320), purging the reaction chamber, contacting the substrate with the reducing agent precursor (process block 330), and purging the reaction chamber again. The unit deposition cycle of the periodic deposition phase 305 may be repeated once or more times until a molybdenum metal film of the desired thickness is deposited directly onto the substrate, and in particular onto the nucleating film. Once the molybdenum metal film is deposited to the desired thickness, the exemplary atomic layer deposition process block 130 can be terminated by process block 350, and the substrate, including the dielectric surface on which the molybdenum metal film is deposited, can be further processed for the formation of a device structure. For example, the exemplary process 100 in Figure 1 may proceed to process block 140, where the process is terminated, and further semiconductor processing can be performed on the substrate on which the molybdenum metal film is placed to complete the semiconductor device structure.

[0110] Naturally, in some embodiments of this disclosure, the order in which the substrate is brought into contact with a first gas-phase reactant (e.g., a molybdenum precursor) and a second gas-phase reactant (e.g., a reduction precursor) can be such that the substrate is first brought into contact with the second gas-phase reactant, followed by contact with the first gas-phase reactant. Furthermore, in some embodiments, the periodic deposition phase 305 of the exemplary process block 130 may include bringing the substrate into contact with the first gas-phase reactant one or more times before bringing the substrate into contact with the second gas-phase reactant one or more times. Furthermore, in some embodiments, the periodic deposition phase 305 of the exemplary process block 130 may include bringing the substrate into contact with the second gas-phase reactant one or more times before bringing the substrate into contact with the first gas-phase reactant one or more times.

[0111] In some embodiments, the periodic deposition process used to deposit a molybdenum metal film directly onto the nucleation may be a hybrid ALD / CVD or periodic CVD process, as previously described herein.

[0112] A molybdenum metal film deposited by the methods disclosed herein may be a continuous film. In some embodiments, the molybdenum metal film may be continuous with a thickness of about 100 Å or less, or about 60 Å or less, or about 50 Å or less, or about 40 Å or less, or about 30 Å or less, or about 20 Å or less, or about 10 Å or less, or even 5 Å or less. The continuity referred to herein may be physical continuity or electrical continuity. In some embodiments of this disclosure, the thickness at which the material film may be physically continuous may not be the same as the thickness at which the film is electrically continuous, and vice versa.

[0113] In some embodiments of the present disclosure, a molybdenum metal film formed according to an embodiment of the present disclosure may have a thickness of about 20 angstroms to about 250 angstroms, or about 50 angstroms to about 200 angstroms, or even about 100 angstroms to about 150 angstroms. In some embodiments, a molybdenum metal film deposited according to some embodiments described herein may have a thickness of more than about 20 Å, or more than about 30 Å, or more than about 40 Å, or more than about 50 Å, or more than about 60 Å, or more than about 100 Å, or more than about 250 Å, or more than about 500 Å, or more than that. In some embodiments, a molybdenum metal film deposited according to some embodiments described herein may have a thickness of less than about 250 Å, or less than about 100 Å, or less than about 50 Å, or less than about 25 Å, or less than about 10 Å, or even less than about 5 Å. In some embodiments, the molybdenum metal film disposed on the dielectric surface using an intermediate nucleation film may have a thickness of about 100 angstroms to 250 angstroms.

[0114] In some embodiments of this disclosure, a molybdenum metal film may be deposited on a dielectric surface using an intermediate nucleation film, such that the molybdenum metal film may include a crystalline film. In some embodiments, the molybdenum metal film may include a polycrystalline film, and the plurality of crystalline grains comprising the polycrystalline molybdenum metal film may have particle sizes greater than 100 Å, greater than 200 Å, or even greater than 250 Å. In some embodiments, the crystalline structure of the crystalline molybdenum metal film may include a body-centered cubic structure.

[0115] In some embodiments of the present disclosure, a molybdenum metal film can be deposited on a dielectric surface having one or more high aspect ratio features, including vertical high aspect ratio features and / or horizontal high aspect ratio features.

[0116] For example, Figure 4C illustrates a semiconductor device structure 410 comprising a dielectric material 402 having a vertical-height aspect ratio feature 404. The aspect ratio (height:width) may be greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or even greater than 100:1, where in this particular example, “greater” refers to the higher height of the gap feature. The deposition methods disclosed herein can be used to deposit a molybdenum metal film on the surface of the vertical-height aspect ratio gap feature 404, as exemplified by the molybdenum metal film 412. In some embodiments, the step coverage of the molybdenum metal film on the vertical-height aspect ratio dielectric gap feature can be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

[0117] As a non-limiting example, the semiconductor device structure 410 may represent a partially fabricated CMOS logic device, the dielectric material 402 may comprise an interlayer dielectric, and the molybdenum metal film 412 may comprise a metal gap fill for providing electrical connectivity to one or more transistor structures (not shown). As illustrated in Figure 4A, the molybdenum metal film 406 is in direct contact with the nucleation film 404 which is subsequently placed directly on the dielectric material 402, i.e., without requiring an intermediate barrier layer material, thereby reducing the overall effective electrical resistivity of the semiconductor device structure 410.

[0118] In some embodiments, the molybdenum metal film 412 may include gap-fill metallization, and the molybdenum metal film 412 can fill gap features, i.e., gap features 404 with a vertical-to-height aspect ratio, without forming seams. A seam may refer to a line or one or more voids formed by the contact of edges formed in the gap-fill material, and the seam can be confirmed using a scanning transmission electron microscope (STEM) or a transmission electron microscope (TEM). A seam is present if observation reveals a clear vertical line or one or more vertical voids in the gap-fill material.

[0119] As a further non-limiting example, Figure 5C illustrates a semiconductor device structure 510 comprising a dielectric material 502 having one or more horizontally high aspect ratio gap features 504, where the aspect ratio (height:width) may be greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or even greater than 1:100, in this example the term “greater” refers to the wide width of one or more gap features. The deposition method disclosed herein may be utilized to deposit a molybdenum metal film 512 on the surface of the horizontally high aspect ratio gap features 504 using an intermediate nucleation film 506. In some embodiments, the step coverage of the molybdenum metal film deposited on the horizontally high aspect ratio dielectric gap features can be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

[0120] In non-limiting exemplary embodiments, the semiconductor device structure 510 may represent a part of a partially fabricated memory device, the dielectric material 502 may include aluminum oxide (Al2O3), and the molybdenum metal film 512 may include at least a part of the metal gate structure.

[0121] As mentioned above, similar to the vertical gap-fill process, the molybdenum metal film 512 (Figure 5C) can be used as a horizontal high-aspect-ratio gap-fill metallization without forming seams.

[0122] In some embodiments of the present disclosure, molybdenum metal films deposited directly on a nucleating film directly placed on a dielectric surface may include low resistivity molybdenum metal films. In some embodiments, molybdenum metal films deposited on a dielectric surface using an intermediate nucleating film may have lower resistivity than molybdenum films deposited directly on the dielectric surface, i.e., without using an intermediate nucleating film at all. For example, in some embodiments, the molybdenum metal films of the present disclosure may have resistivity of less than 3000 μΩ-cm, or less than 1000 μΩ-cm, or less than 500 μΩ-cm, or less than 500 μΩ-cm, or less than 25 μΩ-cm, or less than 15 μΩ-cm, or even less than 10 μΩ-cm. As a non-limiting example, a molybdenum metal film may be deposited on the surface of a dielectric material using an intermediate nucleation film to a molybdenum metal film thickness of less than approximately 60 angstroms, and the molybdenum metal film may exhibit an electrical resistivity of less than 40 μΩ-cm, less than 35 μΩ-cm, or even less than 30 μΩ-cm.

[0123] In addition to improving the electrical resistivity of the molybdenum metal film, the deposition of an intermediate nucleation film can also improve the surface roughness of the deposited molybdenum metal film. For example, Figure 6 shows the rms surface roughness (R) at angstroms for two exemplary molybdenum metal films with a thickness of 60 angstroms. a The molybdenum metal film indicated by label 600 was directly deposited onto the aluminum oxide (Al2O3) dielectric surface. Corresponding rms surface roughness (R aThe surface roughness (R) is approximately 7.3 angstroms. A molybdenum metal film, indicated by label 602, was directly deposited onto a 4 angstrom thick silicon nitride nucleation film placed directly on an aluminum oxide (Al2O3) dielectric surface. a The rms surface roughness (R) of the molybdenum metal film is approximately 3.3 angstroms. a It should be noted that this can be measured, for example, over a surface area of ​​1 micron × 1 micron using an atomic force microscope.

[0124] Therefore, by using an intermediate nucleation film, the surface roughness of the molybdenum metal film can be significantly improved. For example, in some embodiments, the rms surface roughness of a molybdenum metal film deposited on a dielectric surface using an intermediate nucleation film is less than 5 angstroms, or less than 4 angstroms, or less than 3 angstroms, or even less than 2 angstroms (R a ) can have. In some embodiments, rms surface roughness (R a ) may be expressed as a percentage of the total film thickness roughness. For example, in some embodiments, the rms surface roughness (Ra) can be less than 10 percent, less than 5 percent, less than 3 percent, or even less than 1 percent of the total thickness of the molybdenum metal film.

[0125] In some embodiments of the present disclosure, a method for depositing a molybdenum metal film on a dielectric surface using an intermediate nucleation film may further include depositing a molybdenum metal film having low atomic percentage (atomic%) impurities. For example, the molybdenum metal film of the present disclosure may have impurity concentrations of less than 5 at.%, less than 2 at.%, or even less than 1 at.%. In some embodiments, the impurities disposed within the molybdenum metal film may include at least oxygen and chlorine.

[0126] Embodiments of the present disclosure can also provide semiconductor device structures including a molybdenum metal film. In some embodiments, the semiconductor device structure comprises a substrate having a dielectric surface, a nucleation film directly disposed on the dielectric surface, and a molybdenum metal film directly disposed on the nucleation film. As a non-limiting example, semiconductor device structures 410 (in Figure 4C) and 510 (in Figure 5C) include a dielectric substrate 402 / 502, the dielectric substrate having a dielectric surface. A nucleation film 406 / 506 is directly disposed on the dielectric substrate 402, and a molybdenum metal film 412 / 512 is directly disposed on the nucleation film 406 / 506. Thus, in some embodiments, the nucleation 406 / 506 is directly disposed between the molybdenum metal film 412 / 512 and the dielectric material 402 / 502.

[0127] In some embodiments, the nucleating film 406 / 506 may be a continuous film, while in other embodiments, the nucleating film 406' / 506' may be a discontinuous film. In some embodiments, the continuous nucleating film 406 / 506 may have a thickness of less than 20 angstroms, or less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms. In some embodiments, the discontinuous nucleating film 406' / 506' may have a thickness of less than 20 angstroms, less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms.

[0128] In some embodiments, the nucleating film 406 / 506 may include a compound material, and in certain embodiments, the nucleating film 406 / 506 may include a two-component compound material, such as a silicon two-component compound material or a molybdenum two-component compound material. In some embodiments, the nucleating film 406 / 506 may include a three-component compound material, such as a silicon three-component material or a molybdenum three-component material.

[0129] As a non-limiting example, a silicon binary compound material may include at least one of silicon nitride, silicon carbide, or silicon oxide. As a further non-limiting example, a molybdenum binary compound material may include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide.

[0130] In some embodiments, the molybdenum metal film 412 / 512 may be crystalline and may have an impurity concentration of less than 5 atomic%, less than 2 atomic%, or even less than 1 atomic%. Furthermore, the molybdenum metal film 412 / 512 may have an electrical resistivity of less than 40 μΩ·cm with a thickness of less than 60 angstroms.

[0131] In some embodiments, the molybdenum metal film 412 / 512 has an rms surface roughness (R) of less than 5 angstroms, or less than 4 angstroms, or less than 3 angstroms, or even less than 2 angstroms. a ) can have. In some embodiments, rms surface roughness (R a The rms surface roughness (Ra) may be expressed as a percentage of the total film thickness. For example, in some embodiments, the rms surface roughness (Ra) can be less than 10 percent, less than 5 percent, less than 3 percent, or even less than 1 percent of the total thickness of the molybdenum metal film. As exemplified by the molybdenum metal films 412 and 512, the low surface roughness of the molybdenum metal films 412 / 512 can allow the molybdenum metal films to fill one or more gap features, such as a vertical gap feature 404 and / or a horizontal gap feature 504, in and / or on the substrate without forming seams.

[0132] The exemplary embodiments of this disclosure described above are merely examples of embodiments of the invention as defined by the appended claims and their legal equivalents, and therefore do not limit the scope of the invention by these embodiments. Any equivalent embodiments are intended to fall within the scope of the invention. In fact, various modifications of this disclosure, in addition to those shown and described herein, such as useful alternative combinations of the elements described, may be apparent to those skilled in the art from this description. Such modifications and embodiments are also intended to fall within the scope of the appended claims.

Claims

1. A method for depositing a molybdenum metal film on the dielectric surface of a substrate by a periodic deposition process, A substrate having a dielectric surface is supplied into the reaction chamber, Directly depositing a nucleation film containing a silicon compound material onto the dielectric surface, This includes directly depositing a molybdenum metal film onto the nucleating film, Depositing the nucleation film involves repeating a unit cycle of a periodic deposition process to form a nucleation film having a thickness of less than 10 angstroms, and at least one of the unit cycles is The substrate is brought into contact with a first gas-phase reactant containing a silicon precursor, The method involves contacting the substrate with a second gas-phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a carbon precursor, wherein the nitrogen precursor comprises at least one of ammonia, hydrazine, triazane, tert-butylhydrazine, methylhydrazine, dimethylhydrazine, or nitrogen plasma; the oxygen precursor comprises at least one of water, hydrogen peroxide, ozone, or a nitrogen oxide comprising at least one of nitric oxide, nitrous oxide, or nitrogen dioxide; and the carbon precursor comprises a hydrocarbon. Depositing the aforementioned molybdenum metal film is The substrate is brought into contact with a first gas-phase reactant containing a molybdenum halide precursor, A method comprising contacting the aforementioned substrate with a second gas-phase reactant containing a reducing agent precursor.

2. The method according to claim 1, wherein the silicon compound material includes a silicon binary compound material.

3. The method according to claim 2, wherein the silicon two-component compound material comprises at least one of silicon nitride, silicon carbide, or silicon oxide.

4. The molybdenum metal film has a surface roughness (R.m.s.) of less than 5 percent of the total thickness of the molybdenum metal film. a The method according to claim 1, having )

5. The method according to claim 1, further comprising heating the substrate to a substrate temperature of less than 600°C in order to deposit the molybdenum metal film.

6. The method according to claim 1, wherein depositing the molybdenum metal film further comprises heating the substrate to a substrate temperature of 400°C to 700°C.

7. The method according to claim 1, wherein the molybdenum halide precursor comprises a molybdenum chalcogenide halide.

8. The method according to claim 7, wherein the molybdenum chalcogenide halide comprises a molybdenum oxyhalide selected from the group comprising molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide.

9. The aforementioned molybdenum oxychloride is molybdenum (IV) dichloride dioxide (MoO 2 Cl 2 The method according to claim 8, including ).

10. The method according to claim 1, wherein the molybdenum metal film is a crystalline film.

11. The method according to claim 1, wherein the dielectric surface includes a gap shape, and the molybdenum metal film fills the gap shape without forming a seam.

12. The method according to claim 1, wherein the molybdenum halide precursor is selected from the group consisting of molybdenum chalcogenide halides and molybdenum oxyhalides.

13. The method according to claim 1, wherein the nucleating membrane is a discontinuous membrane.

14. The method according to claim 1, wherein the deposition of a molybdenum metal film comprises repeating a unit cycle of a periodic deposition process to form a molybdenum metal film having a thickness of 50 angstroms to 200 angstroms.

15. The method according to claim 1, wherein supplying the substrate includes supplying a designed substrate, the dielectric surface being arranged on a bulk support by an interposed embedded oxide (BOX) layer, and the embedded oxide (BOX) layer being arranged between the bulk support and the dielectric surface.

16. The method according to claim 1, wherein the thickness of the nucleating film is less than 5 angstroms.

17. The method according to claim 1, wherein the thickness of the nucleation film is less than 3 angstroms.

Citation Information

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