Semiconductor equipment

By integrating a protruding gate electrode connection portion within the encapsulating resin, the semiconductor device optimizes the active area on the chip, addressing space constraints and improving performance.

JP7844303B2Active Publication Date: 2026-04-13KK TOSHIBA +1
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
KK TOSHIBA
Filing Date
2022-09-22
Publication Date
2026-04-13

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in maximizing the active area on a chip due to the limited space occupied by gate electrode pads and connections, which restricts the overall usable area.

Method used

The semiconductor device incorporates a gate electrode with an external exposed portion and a connection portion that protrudes in one direction, sandwiched between the encapsulating resin, reducing the area of the gate electrode pad while maintaining electrical connectivity and preventing short circuits.

Benefits of technology

This configuration allows for a smaller gate electrode pad area, thereby expanding the active area on the chip, enhancing the device's functionality and efficiency.

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Abstract

To provide a semiconductor device that makes it possible to widen an active area on a chip.SOLUTION: A semiconductor device according to an embodiment includes: a chip; and a gate electrode connected to a gate electrode pad provided on the chip. The gate electrode includes an external exposed portion having an external exposed surface that is flush with an external exposed surface of a sealing resin, and a gate electrode pad connection portion continuous with the external exposed portion and connected to the gate electrode pad. The gate electrode pad connection portion including a portion sandwiched between the gate electrode pad and a part of the sealing resin.SELECTED DRAWING: Figure 7
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Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor device.

Background Art

[0002] A semiconductor device mounts a chip and various electrodes. An area where various electrodes are connected is provided on the chip.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] To provide a semiconductor device that enables a wider active area on a chip.

Means for Solving the Problems

[0005] The semiconductor device according to the embodiment includes a chip and a gate electrode connected to a gate electrode pad provided on the chip. The gate electrode includes an external exposed portion having an external exposed surface flush with the external exposed surface of the encapsulating resin, and a gate electrode pad connection portion connected to the gate electrode pad and connected to the external exposed portion. The gate electrode pad connection portion is From the externally exposed portion, a projection extends in one direction parallel to the externally exposed surface of the externally exposed portion, sandwiched between the gate electrode pad and a part of the encapsulating resin The projection has a protruding portion, and the area of ​​the surface of the projection parallel to the externally exposed surface of the externally exposed portion is smaller than the area of ​​the externally exposed surface of the externally exposed portion. .

Brief Description of the Drawings

[0006] [Figure 1]Figure 1 is a perspective view showing an example of a part of the structure of a semiconductor device according to this embodiment. [Figure 2] This is a plan view showing an example of the structure of the semiconductor device shown in Figure 1 when viewed in the Z direction. [Figure 3] Figure 3 is a cross-sectional view showing the cross-sectional shape of the AA section shown in Figure 2. [Figure 4] Figure 4 is a cross-sectional view showing the cross-sectional shape of the BB section shown in Figure 2. [Figure 5] Figure 5 is a cross-sectional view showing the cross-sectional shape of the CC section shown in Figure 2. [Figure 6] Figure 6 is an enlarged view showing the area around the gate electrode 3 shown in Figure 1. [Figure 7] Figure 7 is a conceptual diagram showing how a force F from the sealing resin R is applied to the gate electrode pad connection portion 3B of the gate electrode 3. [Figure 8A] Figure 8A is a conceptual diagram showing a first example of the arrangement of the gate electrode 3. [Figure 8B] Figure 8B is a conceptual diagram showing a second example of the gate electrode 3's configuration. [Figure 8C] Figure 8C is a conceptual diagram showing a third example of the gate electrode 3 configuration. [Modes for carrying out the invention]

[0007] The embodiments will be described below with reference to the drawings.

[0008] (Configuration of a semiconductor device) The configuration of the semiconductor device according to this embodiment will be explained with reference to Figures 1 to 5.

[0009] Figure 1 is a perspective view showing an example of a part of the structure of a semiconductor device according to this embodiment. X, Y, and Y in Figure 1 indicate the positional relationship of the semiconductor device in three-dimensional space and will be used in the figures described later. However, the example of the structure shown in Figure 1 is just one example and is not limited to this example. The arrangement, shape, size, etc. of each part may be changed as appropriate.

[0010] The semiconductor device exemplified in this embodiment is a semiconductor device encapsulated in a package having a source-down structure with a source electrode on the bottom surface. In FIG. 1, for ease of viewing the main part, a state where the source electrode is upward (that is, a state where the semiconductor device is upside down) is shown.

[0011] Although not shown in FIG. 1, the semiconductor device according to this embodiment includes not only various elements shown in FIG. 1 but also a resin (encapsulation resin) described later, and is encapsulated as one package.

[0012] As shown in FIG. 1, the semiconductor device includes a chip 1, a source electrode (first electrode) 2, a gate electrode 3, a drain electrode (second electrode) 4, and the like.

[0013] The chip 1 is constituted by, for example, an IC (Integrated Circuit) and includes a FET (Field Effect Transistor) such as a MOSFET. The source electrode 2, the gate electrode 3, and the drain electrode 4 are each constituted by a conductive material, for example, a metal material (for example, copper).

[0014] The chip 1 has a region for connecting the source electrode 2 and a region for connecting the gate electrode 3 on the first surface, and has a region for connecting the drain electrode 4 on the second surface (not shown in FIG. 1) on the back side of the first surface. A source electrode pad (first electrode pad) 12 is provided in the region for connecting the source electrode 2. A gate electrode pad (second electrode pad) 13 is provided in the region for connecting the gate electrode 3. The region where the source electrode pad 12 is located and the region where the gate electrode pad 13 is located are physically and electrically separated by a polyimide layer.

[0015] The source electrode 2 includes a source electrode external exposure portion 2A and a source electrode pad connection portion 2B. The source electrode external exposure portion 2A includes a source electrode terminal 21. The source electrode 2 has, for example, a plate-like shape, has a source pad connection portion 2B that is connected to the chip via solder on the surface, and has a source electrode external exposure portion 2A on the back surface side that is the opposite surface of the surface.

[0016] The source electrode external exposure portion 2A is a portion having a surface (external exposure surface) that is exposed to the outside after resin encapsulation. The source electrode pad connection portion 2B is configured integrally with the source electrode external exposure portion 2A and is a portion having a surface connected to the source electrode pad 12. The source electrode terminal 21 is a part of the source electrode external exposure portion 2A and corresponds to a lead terminal (or lead pin) for making an electrical connection to the outside. The source electrode external exposure portion 2A has a region overlapping the second surface of the chip 1 when viewed from the bottom side of the semiconductor device (or from below the second surface (back surface) side of the chip 1). In other words, in the Z-axis direction, the source electrode external exposure portion 2A has a region overlapping the second surface of the chip 1.

[0017] The gate electrode 3 includes a gate electrode external exposure portion 3A and a gate electrode pad connection portion 3B. The gate electrode external exposure portion 3A includes a gate electrode terminal 31. The gate electrode external exposure portion 3A is a portion having a surface (external exposure surface) that is exposed to the outside after resin encapsulation. The gate electrode pad connection portion 3B is configured integrally with the gate electrode external exposure portion 3A and is a portion connected to the gate electrode pad 13. The gate electrode terminal 31 is a part of the gate electrode external exposure portion 3A and corresponds to a lead terminal (or lead pin) for making an electrical connection to the outside.

[0018] The drain electrode 4 includes an externally exposed drain electrode portion 4A. The externally exposed drain electrode portion 4A includes a drain electrode terminal 41. The externally exposed drain electrode portion 4A is a portion having a surface (externally exposed surface) that is exposed to the outside after resin sealing. The drain electrode terminal 41 is part of the externally exposed drain electrode portion 4A and corresponds to a lead terminal (or lead pin) that makes an electrical connection to the outside. The drain electrode 4 is, for example, formed of a conductive material and has a bent shape made by processing a metal plate, and the drain electrode terminal 41 of the drain electrode 4 is provided on the first surface side and the side side of the chip 1 as described above (i.e., in the space opposite the Z direction from the first surface of the chip 1 and further opposite the x direction from the side side opposite the x direction of the chip 1).

[0019] The gate electrode 3 and the source electrode 2 are formed using the same frame member, and the gate electrode 3 is separated from the source electrode 2 by removing a part of this member by cutting or etching. As a result, the gate electrode 3 is positioned at a certain distance from the source electrode 2, and a region for the gate electrode pad 13 on the chip 1 is secured at a certain distance from the region for the source electrode pad 12 on the chip 1. Furthermore, the structure of the gate electrode pad connection part 3B, which will be described later, makes it possible to position the gate electrode pad 13 in a small region at the edge of the chip 1, for example, thereby reducing the region for the gate electrode pad 13 and simultaneously expanding the region for the source electrode pad 12.

[0020] (Scope of sealing resin) Figure 2 is a plan view showing an example of the structure of the semiconductor device shown in Figure 1 when viewed in the Z direction. However, the example structure shown in Figure 2 is just one example and is not limited to this example. The arrangement, shape, size, etc. of each part may be changed as appropriate.

[0021] In the plan view of Figure 2, the cross-sectional sections AA, BB, and CC, which indicate the key parts, are illustrated with dashed lines.

[0022] Figure 3 is a cross-sectional view showing the cross-sectional shape of the AA section shown in Figure 2.

[0023] The sealing resin R is sealed so that it fits within the area of ​​the dashed line L1, as shown in Figures 2 and 3. The sealing resin R is, for example, an epoxy resin. The parts exposed from the package after resin sealing are the externally exposed surface of the source electrode external exposure portion 2A (including the externally exposed surface of the source electrode terminal 21), the externally exposed surface of the gate electrode external exposure portion 3A (including the externally exposed surface of the gate electrode terminal 31), and the externally exposed surface of the drain electrode external exposure portion 4A (including the externally exposed surface of the drain electrode terminal 41).

[0024] Figures 2 and 3 show an example where the externally exposed surfaces of the source electrode terminal 21, gate electrode terminal 31, and drain electrode terminal 41 are flush with the surface of the adjacent sealing resin R. In this example, the package forms a rectangular parallelepiped without any protrusions, making it easy to handle. However, the source electrode terminal 21, gate electrode terminal 31, and drain electrode terminal 41 may also have a structure that protrudes outward by a predetermined distance from the surface of the adjacent sealing resin R, not limited to this example. Depending on the form of the connection destination, a protruding structure may be more advantageous.

[0025] (Cross-sectional shape of semiconductor device) Figure 4 is a cross-sectional view showing the cross-sectional shape of the BB section shown in Figure 2. Figure 5 is a cross-sectional view showing the cross-sectional shape of the CC section shown in Figure 2. The dashed lines in Figures 4 and 5 are for reference only and represent the shapes of related parts located in the depth direction or front direction of the structure shown in each cross-section.

[0026] As can be seen from Figures 3 to 5, the gate electrode terminal 31 of the gate electrode 3 is electrically connected to the gate electrode pad 13 on the chip 1 through the gate electrode external exposure portion 3A and the gate electrode pad connection portion 3B, and the source electrode terminal 21 of the source electrode 2 is electrically connected to the source electrode pad 12 on the chip 1 through the source electrode external exposure portion 2A and the source electrode pad connection portion 2B. There is a certain distance between the gate electrode pad 13 and the source electrode pad 12. In addition, the drain electrode terminal 41 of the drain electrode 4 wraps around from the drain electrode external exposure portion 4A to the second surface side mentioned above and is electrically connected to a predetermined area on the chip 1.

[0027] (Details of gate electrode 3) Figure 6 is an enlarged view showing the area around the gate electrode 3 shown in Figure 1. Figure 7 is a conceptual diagram showing how a force F from the sealing resin R is applied to the gate electrode pad connection portion 3B of the gate electrode 3.

[0028] As shown in Figure 5, the externally exposed portion 3A of the gate electrode 3 has an externally exposed surface that is flush with the externally exposed surface of the encapsulating resin R. Similarly, the externally exposed portion 2A of the source electrode 2 also includes an externally exposed portion 2A that is flush with the externally exposed surface of the encapsulating resin R. In other words, the externally exposed surface of the gate electrode externally exposed portion 3A, the externally exposed surface of the encapsulating resin R, and the externally exposed portion 2A of the source electrode form a single plane.

[0029] Furthermore, in order to prevent short circuits with other parts while ensuring a certain level of electrical connectivity with the external connection destination, the thickness of the externally exposed portion 3A of the gate electrode may be reduced near the center, and the externally exposed area on the gate electrode terminal 31 side may be increased.

[0030] On the back side of the externally exposed portion 3A of the gate electrode is a gate electrode pad connection portion 3B. The gate electrode pad connection portion 3B is connected to the externally exposed portion 3A of the gate electrode and is formed integrally with the externally exposed portion 3A from the same material. This gate electrode pad connection portion 3B has a structure that protrudes from the externally exposed portion 3A in one direction parallel to the externally exposed surface of the externally exposed portion 3A, and its back surface is joined to the gate electrode pad 13 by solder or the like. In the following description, the gate electrode pad connection portion 3B will be referred to as the protruding portion 3B.

[0031] The protruding portion 3B is positioned so as to be sandwiched between the gate electrode pad 13 and a portion of the sealing resin R. Specifically, the height of the surface of the protruding portion 3B that contacts the portion of the sealing resin R is set at a certain distance (i.e., there is a step) from the height of the externally exposed surface of the gate electrode externally exposed portion 3A, so that the sealing resin R can penetrate onto the surface opposite to the surface that joins with the gate electrode pad 13 (hereinafter referred to as the "back surface of the protruding portion 3B"). The thickness of the protruding portion 3B may be formed to be thinner than the thickness of the original frame member so that more sealing resin R can penetrate into this surface.

[0032] The size of the contact surface of the protrusion 3B that contacts the gate electrode pad 13 is formed to match the size of the gate electrode pad 13, and may be slightly smaller or slightly larger than the gate electrode pad 13. For example, the protrusion 3B may have a portion that extends horizontally beyond the gate electrode pad 13 at the contact surface with the gate electrode pad 13. However, care must be taken to prevent short circuits with other parts. In particular, the direction of the extension should not be toward the edge of the chip 1. This is because the potential is higher closer to the edge of the chip 1, which can cause leakage current.

[0033] As shown in Figure 7, the protrusion 3B is pressed against the gate electrode pad 13 by a force F applied by the sealing resin R that has penetrated the back surface of the protrusion 3B. As a result, even if the gate electrode pad 13 is small, a certain level of bonding strength with the gate electrode pad 13 can be obtained, and delamination of the bonding interface caused by material curing shrinkage, etc., is suppressed. In addition, the length of the protrusion 3B in the X direction is shorter than, for example, the length of the gate electrode external exposure portion 3A in the X direction, and the length of the protrusion 3B in the Y direction is shorter than the length of the gate electrode external exposure portion 3A in the Y direction. In other words, the area of ​​the protrusion 3B is smaller than the area of ​​the gate electrode external exposure portion 3A. This makes it easier to keep the area of ​​the gate electrode pad 13 on the chip 1 small while securing the area of ​​the gate electrode external exposure portion 3A. By keeping the area of ​​the gate electrode pad 13 small, the area on the chip 1 other than this area can be made larger, making it possible to secure a large active area. The protrusion 3B extends, for example, in the direction in which the surface of the gate electrode pad 13 expands (X and Y directions), and the length in the extending direction is longer than the length of the protrusion 3B in the Z-axis direction. As a result, the area that receives the external force F is increased, and the external force F is easily transmitted to the protrusion 3B.

[0034] (Variations in the arrangement of gate electrode 3) The arrangement of the gate electrode 3 is not limited to the examples shown in Figures 1 to 7, and may be changed as appropriate. Here, variations in the arrangement of the gate electrode 3 will be explained with reference to Figures 8A, 8B, and 8C.

[0035] Figures 8A, 8B, and 8C are conceptual diagrams showing the first, second, and third configurations of the gate electrode 3, respectively.

[0036] The first arrangement example shown in Figure 8A is an example where the protruding portion 3B protrudes from the externally exposed portion 3A of the gate electrode in the direction opposite to the X direction, similar to the arrangements shown in Figures 1 to 7. In this arrangement example, a small gate electrode pad 13 area can be provided in the corner of the chip 1, allowing the area on the chip 1 other than this area (the active area where the source electrode pad 12, etc., is placed) to be efficiently widened.

[0037] The second arrangement example shown in Figure 8B is an example where the protruding portion 3B protrudes in the Y direction from the externally exposed portion 3A of the gate electrode. This arrangement example can accommodate cases where the gate electrode pad 13 is located a short distance from the corner of the chip 1.

[0038] The third arrangement example shown in Figure 8C is an example where the positions of the gate electrode pad 13 and gate electrode 3 relative to the chip 1 are both shifted in the opposite direction to the X direction, compared to the second arrangement example. This arrangement example is effective when the relative position of the gate electrode 3 relative to the chip 1 can be changed.

[0039] As described above, according to this embodiment, the area of ​​the gate electrode pad 13 on the chip 1 can be reduced, and the area of ​​the chip 1 other than this area can be increased, making it possible to secure a wide active area.

[0040] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]

[0041] 1...Chip, 12...Source electrode pad, 13...Gate electrode pad, 2...Source electrode, 2A...External exposed portion of source electrode, 2B...Source electrode pad connection portion, 21...Source electrode terminal, 3...Gate electrode, 3A...External exposed portion of gate electrode, 3B...Gate electrode pad connection portion (protruding portion), 31...Gate electrode terminal, 4...Drain electrode, 4A...External exposed portion of drain electrode, 41...Drain electrode terminal, R...Sealing resin.

Claims

1. Tips and, A gate electrode connected to a gate electrode pad provided on the chip and It is equipped with, The aforementioned terminal is, An externally exposed portion having an externally exposed surface that is flush with the externally exposed surface of the sealing resin, A gate electrode pad connection portion which is connected to the externally exposed portion and connects to the gate electrode pad, Includes, The gate electrode pad connection portion is, The externally exposed portion has a protruding portion that extends in one direction parallel to the externally exposed surface of the externally exposed portion and is sandwiched between the gate electrode pad and a part of the sealing resin, The area of ​​the surface in the protruding portion that is parallel to the externally exposed surface of the externally exposed portion is smaller than the area of ​​the externally exposed surface of the externally exposed portion. Semiconductor equipment.

2. In a first direction from the source electrode terminal to the drain electrode terminal, the gate electrode pad is located between the source electrode pad and the drain electrode provided on the chip, The aforementioned protruding portion protrudes in the first direction or in a second direction intersecting the first direction. The semiconductor device according to claim 1.

3. The gate electrode pad connection portion is, The height of the surface in contact with a part of the sealing resin is a certain distance or more from the height of the externally exposed surface of the externally exposed part. The semiconductor device according to claim 1.

4. The gate electrode pad connection portion is, The externally exposed portion is formed integrally with the same material, The semiconductor device according to claim 1.

5. The chip further comprises a first electrode connected to a first electrode pad provided on the chip, The first electrode is The externally exposed portion includes an externally exposed surface that is flush with the externally exposed surface of the sealing resin, The semiconductor device according to claim 1.

6. The chip has a region on its first surface for connecting the first electrode and a region for connecting the gate electrode, and a region on its second surface, which is on the back side of the first surface, for connecting the second electrode. The semiconductor device according to claim 5.

7. A tip having a source electrode pad, A gate electrode connected to a gate electrode pad provided on the chip, A source electrode having a first surface that connects to the source electrode pad and a second surface on which the surface opposite to the first surface is exposed, A conductive member provided on the second surface of the chip and having a drain electrode terminal on the first surface side of the chip, It is equipped with, The aforementioned terminal is, An externally exposed portion having an externally exposed surface that is flush with the externally exposed surface of the sealing resin, A gate electrode pad connection portion which is connected to the externally exposed portion and connects to the gate electrode pad, Includes, The gate electrode pad connection portion is, The externally exposed portion has a protruding portion that extends in one direction parallel to the externally exposed surface of the externally exposed portion and is located between the gate electrode pad and the sealing resin, The area of ​​the surface in the protruding portion that is parallel to the externally exposed surface of the externally exposed portion is smaller than the area of ​​the externally exposed surface of the externally exposed portion. Semiconductor equipment.

8. In a first direction from the source electrode terminal to the drain electrode terminal, the gate electrode pad is located between the source electrode pad and the drain electrode provided on the chip, The aforementioned protruding portion protrudes in the first direction or in a second direction intersecting the first direction. The semiconductor device according to claim 7.

9. The gate electrode pad connection portion is, The externally exposed portion is formed integrally with the same material, The semiconductor device according to claim 7.

10. The semiconductor device according to any one of claims 1 to 9, wherein the semiconductor device is a semiconductor device sealed in a source-down package with the source electrode located on the bottom surface.

Citation Information

Patent Citations

  • Ornamental material and its manufacture

    JP1981037156A

  • Semiconductor IC device and manufacture thereof

    JP1983092250A

  • Semiconductor device and method for manufacturing it, and electronic device

    JP2004266096A

  • Semiconductor device and manufacturing method thereof

    JP2007311518A

  • Semiconductor device and semiconductor device manufacturing method

    JP2018006492A